Struct trellis_m4::qspi::Qspi

pub struct Qspi<MODE> { /* fields omitted */ }

Implementations

impl Qspi<OneShot>

pub fn new(
    mclk: &mut MCLK,
    port: &mut Port,
    qspi: QSPI,
    _sck: Pin<PB10, Input<Floating>>,
    _cs: Pin<PB11, Input<Floating>>,
    _io0: Pin<PA08, Input<Floating>>,
    _io1: Pin<PA09, Input<Floating>>,
    _io2: Pin<PA10, Input<Floating>>,
    _io3: Pin<PA11, Input<Floating>>
) -> Qspi<OneShot>

Enable the clocks for the qspi peripheral in single data rate mode assuming 120mhz system clock, for 4mhz spi mode 0 operation.

pub fn run_command(&self, command: Command) -> Result<(), Error>

Run a generic command that neither takes nor receives data

pub fn read_command(
    &self,
    command: Command,
    response: &mut [u8]
) -> Result<(), Error>

Run one of the read commands

pub fn write_command(&self, command: Command, data: &[u8]) -> Result<(), Error>

Run one of the write commands

pub fn erase_command(&self, command: Command, address: u32) -> Result<(), Error>

Run one of the erase commands

pub fn read_memory(&mut self, addr: u32, buf: &mut [u8])

Quad Fast Read a sequential block of memory to buf Note: Hardcodes 8 dummy cycles

pub fn write_memory(&mut self, addr: u32, buf: &[u8])

Page Program a sequential block of memory to addr.

Note more than page size bytes are sent to the device, some bytes will be discarded. Check your device for specific handling.

pub fn into_xip(self) -> Qspi<XIP>

Latches the peripheral in a read/execute state, so it can be used to read or execute directly from flash.

Note: Hardcodes 8 dummy cycles.

impl Qspi<XIP>

Operations available in XIP mode

pub fn into_oneshot(self) -> Qspi<OneShot>

Latches the peripheral in a read/execute state, so it can be used to read or execute directly from flash.

impl<MODE> Qspi<MODE>

pub fn set_clk_divider(&mut self, value: u8)

Set the clock divider, relative to the main clock

This fn safely subtracts 1 from your input value as the underlying fn is SCK Baud = MCKL / (value + 1)

ex if MCLK is 120mhz value 0 is reduced to 0 results in 120mhz clock value 1 is reduced to 0 results in 120mhz clock value 2 is reduced to 1 results in 60mhz clock