Struct teensy4_bsp::t41::Pins [−][src]
pub struct Pins {Show 48 fields
pub p0: Pad<AD_B0, UInt<UInt<UTerm, B1>, B1>>,
pub p1: Pad<AD_B0, UInt<UInt<UTerm, B1>, B0>>,
pub p2: Pad<EMC, UInt<UInt<UInt<UTerm, B1>, B0>, B0>>,
pub p3: Pad<EMC, UInt<UInt<UInt<UTerm, B1>, B0>, B1>>,
pub p4: Pad<EMC, UInt<UInt<UInt<UTerm, B1>, B1>, B0>>,
pub p5: Pad<EMC, UInt<UInt<UInt<UInt<UTerm, B1>, B0>, B0>, B0>>,
pub p6: Pad<B0, UInt<UInt<UInt<UInt<UTerm, B1>, B0>, B1>, B0>>,
pub p7: Pad<B1, UInt<UTerm, B1>>,
pub p8: Pad<B1, UTerm>,
pub p9: Pad<B0, UInt<UInt<UInt<UInt<UTerm, B1>, B0>, B1>, B1>>,
pub p10: Pad<B0, UTerm>,
pub p11: Pad<B0, UInt<UInt<UTerm, B1>, B0>>,
pub p12: Pad<B0, UInt<UTerm, B1>>,
pub p13: Pad<B0, UInt<UInt<UTerm, B1>, B1>>,
pub p14: Pad<AD_B1, UInt<UInt<UTerm, B1>, B0>>,
pub p15: Pad<AD_B1, UInt<UInt<UTerm, B1>, B1>>,
pub p16: Pad<AD_B1, UInt<UInt<UInt<UTerm, B1>, B1>, B1>>,
pub p17: Pad<AD_B1, UInt<UInt<UInt<UTerm, B1>, B1>, B0>>,
pub p18: Pad<AD_B1, UInt<UTerm, B1>>,
pub p19: Pad<AD_B1, UTerm>,
pub p20: Pad<AD_B1, UInt<UInt<UInt<UInt<UTerm, B1>, B0>, B1>, B0>>,
pub p21: Pad<AD_B1, UInt<UInt<UInt<UInt<UTerm, B1>, B0>, B1>, B1>>,
pub p22: Pad<AD_B1, UInt<UInt<UInt<UInt<UTerm, B1>, B0>, B0>, B0>>,
pub p23: Pad<AD_B1, UInt<UInt<UInt<UInt<UTerm, B1>, B0>, B0>, B1>>,
pub p24: Pad<AD_B0, UInt<UInt<UInt<UInt<UTerm, B1>, B1>, B0>, B0>>,
pub p25: Pad<AD_B0, UInt<UInt<UInt<UInt<UTerm, B1>, B1>, B0>, B1>>,
pub p26: Pad<AD_B1, UInt<UInt<UInt<UInt<UTerm, B1>, B1>, B1>, B0>>,
pub p27: Pad<AD_B1, UInt<UInt<UInt<UInt<UTerm, B1>, B1>, B1>, B1>>,
pub p28: Pad<EMC, UInt<UInt<UInt<UInt<UInt<UInt<UTerm, B1>, B0>, B0>, B0>, B0>, B0>>,
pub p29: Pad<EMC, UInt<UInt<UInt<UInt<UInt<UTerm, B1>, B1>, B1>, B1>, B1>>,
pub p30: Pad<EMC, UInt<UInt<UInt<UInt<UInt<UInt<UTerm, B1>, B0>, B0>, B1>, B0>, B1>>,
pub p31: Pad<EMC, UInt<UInt<UInt<UInt<UInt<UInt<UTerm, B1>, B0>, B0>, B1>, B0>, B0>>,
pub p32: Pad<B0, UInt<UInt<UInt<UInt<UTerm, B1>, B1>, B0>, B0>>,
pub p33: Pad<EMC, UInt<UInt<UInt<UTerm, B1>, B1>, B1>>,
pub p34: Pad<B1, UInt<UInt<UInt<UInt<UTerm, B1>, B1>, B0>, B1>>,
pub p35: Pad<B1, UInt<UInt<UInt<UInt<UTerm, B1>, B1>, B0>, B0>>,
pub p36: Pad<B1, UInt<UInt<UTerm, B1>, B0>>,
pub p37: Pad<B1, UInt<UInt<UTerm, B1>, B1>>,
pub p38: Pad<AD_B1, UInt<UInt<UInt<UInt<UTerm, B1>, B1>, B0>, B0>>,
pub p39: Pad<AD_B1, UInt<UInt<UInt<UInt<UTerm, B1>, B1>, B0>, B1>>,
pub p40: Pad<AD_B1, UInt<UInt<UInt<UTerm, B1>, B0>, B0>>,
pub p41: Pad<AD_B1, UInt<UInt<UInt<UTerm, B1>, B0>, B1>>,
pub p42: Pad<SD_B0, UInt<UInt<UTerm, B1>, B1>>,
pub p43: Pad<SD_B0, UInt<UInt<UTerm, B1>, B0>>,
pub p44: Pad<SD_B0, UInt<UTerm, B1>>,
pub p45: Pad<SD_B0, UTerm>,
pub p46: Pad<SD_B0, UInt<UInt<UInt<UTerm, B1>, B0>, B1>>,
pub p47: Pad<SD_B0, UInt<UInt<UInt<UTerm, B1>, B0>, B0>>,
}
Expand description
Fields
p0: Pad<AD_B0, UInt<UInt<UTerm, B1>, B1>>
Pin 0
p1: Pad<AD_B0, UInt<UInt<UTerm, B1>, B0>>
Pin 1
p2: Pad<EMC, UInt<UInt<UInt<UTerm, B1>, B0>, B0>>
Pin 2
p3: Pad<EMC, UInt<UInt<UInt<UTerm, B1>, B0>, B1>>
Pin 3
p4: Pad<EMC, UInt<UInt<UInt<UTerm, B1>, B1>, B0>>
Pin 4
p5: Pad<EMC, UInt<UInt<UInt<UInt<UTerm, B1>, B0>, B0>, B0>>
Pin 5
p6: Pad<B0, UInt<UInt<UInt<UInt<UTerm, B1>, B0>, B1>, B0>>
Pin 6
p7: Pad<B1, UInt<UTerm, B1>>
Pin 7
p8: Pad<B1, UTerm>
Pin 8
p9: Pad<B0, UInt<UInt<UInt<UInt<UTerm, B1>, B0>, B1>, B1>>
Pin 9
p10: Pad<B0, UTerm>
Pin 10
p11: Pad<B0, UInt<UInt<UTerm, B1>, B0>>
Pin 11
p12: Pad<B0, UInt<UTerm, B1>>
Pin 12
p13: Pad<B0, UInt<UInt<UTerm, B1>, B1>>
Pin 13
p14: Pad<AD_B1, UInt<UInt<UTerm, B1>, B0>>
Pin 14
p15: Pad<AD_B1, UInt<UInt<UTerm, B1>, B1>>
Pin 15
p16: Pad<AD_B1, UInt<UInt<UInt<UTerm, B1>, B1>, B1>>
Pin 16
p17: Pad<AD_B1, UInt<UInt<UInt<UTerm, B1>, B1>, B0>>
Pin 17
p18: Pad<AD_B1, UInt<UTerm, B1>>
Pin 18
p19: Pad<AD_B1, UTerm>
Pin 19
p20: Pad<AD_B1, UInt<UInt<UInt<UInt<UTerm, B1>, B0>, B1>, B0>>
Pin 20
p21: Pad<AD_B1, UInt<UInt<UInt<UInt<UTerm, B1>, B0>, B1>, B1>>
Pin 21
p22: Pad<AD_B1, UInt<UInt<UInt<UInt<UTerm, B1>, B0>, B0>, B0>>
Pin 22
p23: Pad<AD_B1, UInt<UInt<UInt<UInt<UTerm, B1>, B0>, B0>, B1>>
Pin 23
p24: Pad<AD_B0, UInt<UInt<UInt<UInt<UTerm, B1>, B1>, B0>, B0>>
Pin 24
p25: Pad<AD_B0, UInt<UInt<UInt<UInt<UTerm, B1>, B1>, B0>, B1>>
Pin 25
p26: Pad<AD_B1, UInt<UInt<UInt<UInt<UTerm, B1>, B1>, B1>, B0>>
Pin 26
p27: Pad<AD_B1, UInt<UInt<UInt<UInt<UTerm, B1>, B1>, B1>, B1>>
Pin 27
p28: Pad<EMC, UInt<UInt<UInt<UInt<UInt<UInt<UTerm, B1>, B0>, B0>, B0>, B0>, B0>>
Pin 28
p29: Pad<EMC, UInt<UInt<UInt<UInt<UInt<UTerm, B1>, B1>, B1>, B1>, B1>>
Pin 29
p30: Pad<EMC, UInt<UInt<UInt<UInt<UInt<UInt<UTerm, B1>, B0>, B0>, B1>, B0>, B1>>
Pin 30
p31: Pad<EMC, UInt<UInt<UInt<UInt<UInt<UInt<UTerm, B1>, B0>, B0>, B1>, B0>, B0>>
Pin 31
p32: Pad<B0, UInt<UInt<UInt<UInt<UTerm, B1>, B1>, B0>, B0>>
Pin 32
p33: Pad<EMC, UInt<UInt<UInt<UTerm, B1>, B1>, B1>>
Pin 33
p34: Pad<B1, UInt<UInt<UInt<UInt<UTerm, B1>, B1>, B0>, B1>>
Pin 34
p35: Pad<B1, UInt<UInt<UInt<UInt<UTerm, B1>, B1>, B0>, B0>>
Pin 35
p36: Pad<B1, UInt<UInt<UTerm, B1>, B0>>
Pin 36
p37: Pad<B1, UInt<UInt<UTerm, B1>, B1>>
Pin 37
p38: Pad<AD_B1, UInt<UInt<UInt<UInt<UTerm, B1>, B1>, B0>, B0>>
Pin 38
p39: Pad<AD_B1, UInt<UInt<UInt<UInt<UTerm, B1>, B1>, B0>, B1>>
Pin 39
p40: Pad<AD_B1, UInt<UInt<UInt<UTerm, B1>, B0>, B0>>
Pin 40
p41: Pad<AD_B1, UInt<UInt<UInt<UTerm, B1>, B0>, B1>>
Pin 41
p42: Pad<SD_B0, UInt<UInt<UTerm, B1>, B1>>
Pin 42
p43: Pad<SD_B0, UInt<UInt<UTerm, B1>, B0>>
Pin 43
p44: Pad<SD_B0, UInt<UTerm, B1>>
Pin 44
p45: Pad<SD_B0, UTerm>
Pin 45
p46: Pad<SD_B0, UInt<UInt<UInt<UTerm, B1>, B0>, B1>>
Pin 46
p47: Pad<SD_B0, UInt<UInt<UInt<UTerm, B1>, B0>, B0>>
Pin 47