Struct svd_rs::cpu::Cpu

#[non_exhaustive]
pub struct Cpu {

    pub name: String,
    pub revision: String,
    pub endian: Endian,
    pub mpu_present: bool,
    pub fpu_present: bool,
    pub fpu_double_precision: Option<bool>,
    pub dsp_present: Option<bool>,
    pub icache_present: Option<bool>,
    pub dcache_present: Option<bool>,
    pub itcm_present: Option<bool>,
    pub dtcm_present: Option<bool>,
    pub vtor_present: Option<bool>,
    pub nvic_priority_bits: u32,
    pub has_vendor_systick: bool,
    pub device_num_interrupts: Option<u32>,
    pub sau_num_regions: Option<u32>,
}

CPU describes the processor included in the microcontroller device.

Fields (Non-exhaustive)

Non-exhaustive structs could have additional fields added in future. Therefore, non-exhaustive structs cannot be constructed in external crates using the traditional Struct { .. } syntax; cannot be matched against without a wildcard ..; and struct update syntax will not work.

name: String

Processor architecture

revision: String

Define the HW revision of the processor

endian: Endian

Define the endianness of the processor

mpu_present: bool

Indicate whether the processor is equipped with a memory protection unit (MPU)

fpu_present: bool

Indicate whether the processor is equipped with a hardware floating point unit (FPU)

fpu_double_precision: Option<bool>

Indicate whether the processor is equipped with a double precision floating point unit. This element is valid only when fpu_present is set to true

dsp_present: Option<bool>

Indicates whether the processor implements the optional SIMD DSP extensions (DSP)

icache_present: Option<bool>

Indicate whether the processor has an instruction cache

dcache_present: Option<bool>

Indicate whether the processor has a data cache

itcm_present: Option<bool>

Indicate whether the processor has an instruction tightly coupled memory

dtcm_present: Option<bool>

Indicate whether the processor has a data tightly coupled memory

vtor_present: Option<bool>

Indicate whether the Vector Table Offset Register (VTOR) is implemented. If not specified, then VTOR is assumed to be present

nvic_priority_bits: u32

Define the number of bits available in the Nested Vectored Interrupt Controller (NVIC) for configuring priority

has_vendor_systick: bool

Indicate whether the processor implements a vendor-specific System Tick Timer

device_num_interrupts: Option<u32>

Add 1 to the highest interrupt number and specify this number in here

sau_num_regions: Option<u32>

Indicate the amount of regions in the Security Attribution Unit (SAU)

Implementations

impl Cpu

pub fn builder() -> CpuBuilder

Make a builder for Cpu

pub fn modify_from(
    &mut self,
    builder: CpuBuilder,
    lvl: ValidateLevel
) -> Result<(), SvdError>

Modify an existing Cpu based on a builder.

pub fn validate(&mut self, _lvl: ValidateLevel) -> Result<(), SvdError>

Validate the Cpu

pub fn is_cortex_m(&self) -> bool

Check if the Cpu is a Cortex-M

Trait Implementations

impl Clone for Cpu

fn clone(&self) -> Cpu

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Cpu

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl From<Cpu> for CpuBuilder

fn from(c: Cpu) -> Self

Converts to this type from the input type.

impl PartialEq<Cpu> for Cpu

fn eq(&self, other: &Cpu) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Cpu) -> bool

This method tests for !=.

impl StructuralPartialEq for Cpu