Module stm32wl::stm32wle5::rcc::apb1smenr2

APB1 peripheral clocks enable in Sleep mode register 2

Re-exports

pub use LPUART1SMEN_A as LPTIM3SMEN_A;

pub use LPUART1SMEN_A as LPTIM2SMEN_A;

pub use LPUART1SMEN_R as LPTIM3SMEN_R;

pub use LPUART1SMEN_R as LPTIM2SMEN_R;

pub use LPUART1SMEN_W as LPTIM3SMEN_W;

pub use LPUART1SMEN_W as LPTIM2SMEN_W;

Structs

APB1SMENR2_SPEC

APB1 peripheral clocks enable in Sleep mode register 2

R

Register APB1SMENR2 reader

W

Register APB1SMENR2 writer

Enums

LPUART1SMEN_A

Low power UART 1 clock enable during CPU1 Csleep and CStop modes.

Type Definitions

LPUART1SMEN_R

Field LPUART1SMEN reader - Low power UART 1 clock enable during CPU1 Csleep and CStop modes.

LPUART1SMEN_W

Field LPUART1SMEN writer - Low power UART 1 clock enable during CPU1 Csleep and CStop modes.