Module stm32wl::stm32wl5x_cm4::rcc::c2apb1enr2

CPU2 APB1 peripheral clock enable register 2 [dual core device only]

Re-exports

pub use LPUART1EN_A as LPTIM3EN_A;

pub use LPUART1EN_A as LPTIM2EN_A;

pub use LPUART1EN_R as LPTIM3EN_R;

pub use LPUART1EN_R as LPTIM2EN_R;

pub use LPUART1EN_W as LPTIM3EN_W;

pub use LPUART1EN_W as LPTIM2EN_W;

Structs

C2APB1ENR2_SPEC

CPU2 APB1 peripheral clock enable register 2 [dual core device only]

R

Register C2APB1ENR2 reader

W

Register C2APB1ENR2 writer

Enums

LPUART1EN_A

CPU2 Low power UART 1 clocks enable

Type Definitions

LPUART1EN_R

Field LPUART1EN reader - CPU2 Low power UART 1 clocks enable

LPUART1EN_W

Field LPUART1EN writer - CPU2 Low power UART 1 clocks enable