[][src]Type Definition stm32wb_pac::rcc::pllsai1cfgr::R

type R = R<u32, PLLSAI1CFGR>;

Reader of register PLLSAI1CFGR

Implementations

impl R[src]

pub fn pllr(&self) -> PLLR_R[src]

Bits 29:31 - PLLSAI division factor R for PLLADC1CLK (ADC clock)

pub fn pllren(&self) -> PLLREN_R[src]

Bit 28 - PLLSAI PLLADC1CLK output enable

pub fn pllq(&self) -> PLLQ_R[src]

Bits 25:27 - SAIPLL division factor Q for PLLSAIUSBCLK (48 MHz clock)

pub fn pllqen(&self) -> PLLQEN_R[src]

Bit 24 - SAIPLL PLLSAIUSBCLK output enable

pub fn pllp(&self) -> PLLP_R[src]

Bits 17:21 - SAI1PLL division factor P for PLLSAICLK (SAI1clock)

pub fn pllpen(&self) -> PLLPEN_R[src]

Bit 16 - SAIPLL PLLSAI1CLK output enable

pub fn plln(&self) -> PLLN_R[src]

Bits 8:14 - SAIPLL multiplication factor for VCO