Type Definition stm32wb_pac::adc::cfgr::W

type W = W<u32, CFGR>;

Writer for register CFGR

Implementations

impl W

pub fn jqdis(&mut self) -> JQDIS_W<'_>

Bit 31 - ADC group injected contexts queue disable

pub fn awdch1ch(&mut self) -> AWDCH1CH_W<'_>

Bits 26:30 - ADC analog watchdog 1 monitored channel selection

pub fn jauto(&mut self) -> JAUTO_W<'_>

Bit 25 - ADC group injected automatic trigger mode

pub fn jawd1en(&mut self) -> JAWD1EN_W<'_>

Bit 24 - ADC analog watchdog 1 enable on scope ADC group injected

pub fn awd1en(&mut self) -> AWD1EN_W<'_>

Bit 23 - ADC analog watchdog 1 enable on scope ADC group regular

pub fn awd1sgl(&mut self) -> AWD1SGL_W<'_>

Bit 22 - ADC analog watchdog 1 monitoring a single channel or all channels

pub fn jqm(&mut self) -> JQM_W<'_>

Bit 21 - ADC group injected contexts queue mode

pub fn jdiscen(&mut self) -> JDISCEN_W<'_>

Bit 20 - ADC group injected sequencer discontinuous mode

pub fn discnum(&mut self) -> DISCNUM_W<'_>

Bits 17:19 - ADC group regular sequencer discontinuous number of ranks

pub fn discen(&mut self) -> DISCEN_W<'_>

Bit 16 - ADC group regular sequencer discontinuous mode

pub fn autdly(&mut self) -> AUTDLY_W<'_>

Bit 14 - ADC low power auto wait

pub fn cont(&mut self) -> CONT_W<'_>

Bit 13 - ADC group regular continuous conversion mode

pub fn ovrmod(&mut self) -> OVRMOD_W<'_>

Bit 12 - ADC group regular overrun configuration

pub fn exten(&mut self) -> EXTEN_W<'_>

Bits 10:11 - ADC group regular external trigger polarity

pub fn extsel(&mut self) -> EXTSEL_W<'_>

Bits 6:9 - ADC group regular external trigger source

pub fn align(&mut self) -> ALIGN_W<'_>

Bit 5 - ADC data alignement

pub fn res(&mut self) -> RES_W<'_>

Bits 3:4 - ADC data resolution

pub fn dmacfg(&mut self) -> DMACFG_W<'_>

Bit 1 - ADC DMA transfer configuration

pub fn dmaen(&mut self) -> DMAEN_W<'_>

Bit 0 - ADC DMA transfer enable