[−][src]Type Definition stm32wb_pac::hsem::C1MISR

type C1MISR = Reg<u32, _C1MISR>;

HSEM Masked interrupt status register

This register you can read. See API.

For information about available fields see c1misr module

Trait Implementations

impl Readable for C1MISR[src]

read() method returns c1misr::R reader structure