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#[doc = "Reader of register AHB1ENR"] pub type R = crate::R<u32, super::AHB1ENR>; #[doc = "Writer for register AHB1ENR"] pub type W = crate::W<u32, super::AHB1ENR>; #[doc = "Register AHB1ENR `reset()`'s with value 0x0100"] impl crate::ResetValue for super::AHB1ENR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0x0100 } } #[doc = "Reader of field `TSCEN`"] pub type TSCEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TSCEN`"] pub struct TSCEN_W<'a> { w: &'a mut W, } impl<'a> TSCEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); self.w } } #[doc = "Reader of field `CRCEN`"] pub type CRCEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `CRCEN`"] pub struct CRCEN_W<'a> { w: &'a mut W, } impl<'a> CRCEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); self.w } } #[doc = "Reader of field `DMAMUXEN`"] pub type DMAMUXEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DMAMUXEN`"] pub struct DMAMUXEN_W<'a> { w: &'a mut W, } impl<'a> DMAMUXEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); self.w } } #[doc = "Reader of field `DMA2EN`"] pub type DMA2EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DMA2EN`"] pub struct DMA2EN_W<'a> { w: &'a mut W, } impl<'a> DMA2EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "Reader of field `DMA1EN`"] pub type DMA1EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DMA1EN`"] pub struct DMA1EN_W<'a> { w: &'a mut W, } impl<'a> DMA1EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } impl R { #[doc = "Bit 16 - Touch Sensing Controller clock enable"] #[inline(always)] pub fn tscen(&self) -> TSCEN_R { TSCEN_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 12 - CPU1 CRC clock enable"] #[inline(always)] pub fn crcen(&self) -> CRCEN_R { CRCEN_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 2 - DMAMUX clock enable"] #[inline(always)] pub fn dmamuxen(&self) -> DMAMUXEN_R { DMAMUXEN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - DMA2 clock enable"] #[inline(always)] pub fn dma2en(&self) -> DMA2EN_R { DMA2EN_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - DMA1 clock enable"] #[inline(always)] pub fn dma1en(&self) -> DMA1EN_R { DMA1EN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 16 - Touch Sensing Controller clock enable"] #[inline(always)] pub fn tscen(&mut self) -> TSCEN_W { TSCEN_W { w: self } } #[doc = "Bit 12 - CPU1 CRC clock enable"] #[inline(always)] pub fn crcen(&mut self) -> CRCEN_W { CRCEN_W { w: self } } #[doc = "Bit 2 - DMAMUX clock enable"] #[inline(always)] pub fn dmamuxen(&mut self) -> DMAMUXEN_W { DMAMUXEN_W { w: self } } #[doc = "Bit 1 - DMA2 clock enable"] #[inline(always)] pub fn dma2en(&mut self) -> DMA2EN_W { DMA2EN_W { w: self } } #[doc = "Bit 0 - DMA1 clock enable"] #[inline(always)] pub fn dma1en(&mut self) -> DMA1EN_W { DMA1EN_W { w: self } } }