[−][src]Module stm32wb_pac::usb
Universal serial bus full-speed device interface
Modules
addr0_rx | Reception buffer address 0 |
addr1_rx | Reception buffer address 0 |
addr2_rx | Reception buffer address 0 |
addr3_rx | Reception buffer address 0 |
addr4_rx | Reception buffer address 0 |
addr5_rx | Reception buffer address 0 |
addr6_rx | Reception buffer address 0 |
addr7_rx | Reception buffer address 0 |
bcdr | Battery charging detector( |
btable | Buffer table address |
cntr | control register |
count0_rx | Reception byte count 0 |
count0_tx | Transmission byte count 0 |
count1_rx | Reception byte count 0 |
count1_tx | Transmission byte count 0 |
count2_rx | Reception byte count 0 |
count2_tx | Transmission byte count 0 |
count3_rx | Reception byte count 0 |
count3_tx | Transmission byte count 0 |
count4_rx | Reception byte count 0 |
count4_tx | Transmission byte count 0 |
count5_rx | Reception byte count 0 |
count5_tx | Transmission byte count 0 |
count6_rx | Reception byte count 0 |
count6_tx | Transmission byte count 0 |
count7_rx | Reception byte count 0 |
count7_tx | Transmission byte count 0 |
daddr | device address |
ep0r | endpoint 0 register |
ep1r | endpoint 1 register |
ep2r | endpoint 2 register |
ep3r | endpoint 3 register |
ep4r | endpoint 4 register |
ep5r | endpoint 5 register |
ep6r | endpoint 6 register |
ep7r | endpoint 7 register |
fnr | frame number register |
istr | interrupt status register |
lpmcsr | control and status register |
Structs
RegisterBlock | Register block |
Type Definitions
ADDR0_RX | Reception buffer address 0 |
ADDR1_RX | Reception buffer address 0 |
ADDR2_RX | Reception buffer address 0 |
ADDR3_RX | Reception buffer address 0 |
ADDR4_RX | Reception buffer address 0 |
ADDR5_RX | Reception buffer address 0 |
ADDR6_RX | Reception buffer address 0 |
ADDR7_RX | Reception buffer address 0 |
BCDR | Battery charging detector( |
BTABLE | Buffer table address |
CNTR | control register |
COUNT0_RX | Reception byte count 0 |
COUNT0_TX | Transmission byte count 0 |
COUNT1_RX | Reception byte count 0 |
COUNT1_TX | Transmission byte count 0 |
COUNT2_RX | Reception byte count 0 |
COUNT2_TX | Transmission byte count 0 |
COUNT3_RX | Reception byte count 0 |
COUNT3_TX | Transmission byte count 0 |
COUNT4_RX | Reception byte count 0 |
COUNT4_TX | Transmission byte count 0 |
COUNT5_RX | Reception byte count 0 |
COUNT5_TX | Transmission byte count 0 |
COUNT6_RX | Reception byte count 0 |
COUNT6_TX | Transmission byte count 0 |
COUNT7_RX | Reception byte count 0 |
COUNT7_TX | Transmission byte count 0 |
DADDR | device address |
EP0R | endpoint 0 register |
EP1R | endpoint 1 register |
EP2R | endpoint 2 register |
EP3R | endpoint 3 register |
EP4R | endpoint 4 register |
EP5R | endpoint 5 register |
EP6R | endpoint 6 register |
EP7R | endpoint 7 register |
FNR | frame number register |
ISTR | interrupt status register |
LPMCSR | control and status register |