Module stm32mp1::stm32mp157::tim4
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TIM4
Modules
TIM4 auto-reload register
As the bits BK2BID, BKBID, BK2DSRM, BKDSRM, BK2P, BK2E, BK2F[3:0], BKF[3:0], AOE, BKP, BKE, OSSI, OSSR and DTG[7:0] can be write-locked depending on the LOCK configuration, it can be necessary to configure all of them during the first write access to the TIMx_BDTR register.
TIM4 capture/compare enable register
The same register can be used for input capture mode (this section) or for output compare mode (next section). The direction of a channel is defined by configuring the corresponding CCxS bits. All the other bits of this register have a different function for input capture and for output compare modes. It is possible to combine both modes independently (e.g. channel 1 in input capture mode and channel 2 in output compare mode). Input capture mode:
The same register can be used for input capture mode (this section) or for output compare mode (next section). The direction of a channel is defined by configuring the corresponding CCxS bits. All the other bits of this register have a different function for input capture and for output compare modes. It is possible to combine both modes independently (e.g. channel 1 in input capture mode and channel 2 in output compare mode). Input capture mode:
The channels 5 and 6 can only be configured in output. Output compare mode:
TIM4 capture/compare register 1
TIM4 capture/compare register 2
TIM4 capture/compare register 3
TIM4 capture/compare register 4
TIM4 capture/compare register 5
TIM4 capture/compare register 6
TIM4 counter
TIM4 control register 1
TIM4 control register 2
TIM4 DMA control register
TIM4 DMA/interrupt enable register
TIM4 DMA address for full transfer
TIM4 event generation register
TIM4 prescaler
TIM4 repetition counter register
TIM4 slave mode control register
TIM4 status register
Structs
Register block
Type Definitions
TIM4_ARR register accessor: an alias for Reg<TIM4_ARR_SPEC>
TIM4_BDTR register accessor: an alias for Reg<TIM4_BDTR_SPEC>
TIM4_CCER register accessor: an alias for Reg<TIM4_CCER_SPEC>
TIM4_CCMR1ALTERNATE4 register accessor: an alias for Reg<TIM4_CCMR1ALTERNATE4_SPEC>
TIM4_CCMR2ALTERNATE20 register accessor: an alias for Reg<TIM4_CCMR2ALTERNATE20_SPEC>
TIM4_CCMR3 register accessor: an alias for Reg<TIM4_CCMR3_SPEC>
TIM4_CCR1 register accessor: an alias for Reg<TIM4_CCR1_SPEC>
TIM4_CCR2 register accessor: an alias for Reg<TIM4_CCR2_SPEC>
TIM4_CCR3 register accessor: an alias for Reg<TIM4_CCR3_SPEC>
TIM4_CCR4 register accessor: an alias for Reg<TIM4_CCR4_SPEC>
TIM4_CCR5 register accessor: an alias for Reg<TIM4_CCR5_SPEC>
TIM4_CCR6 register accessor: an alias for Reg<TIM4_CCR6_SPEC>
TIM4_CNT register accessor: an alias for Reg<TIM4_CNT_SPEC>
TIM4_CR1 register accessor: an alias for Reg<TIM4_CR1_SPEC>
TIM4_CR2 register accessor: an alias for Reg<TIM4_CR2_SPEC>
TIM4_DCR register accessor: an alias for Reg<TIM4_DCR_SPEC>
TIM4_DIER register accessor: an alias for Reg<TIM4_DIER_SPEC>
TIM4_DMAR register accessor: an alias for Reg<TIM4_DMAR_SPEC>
TIM4_EGR register accessor: an alias for Reg<TIM4_EGR_SPEC>
TIM4_PSC register accessor: an alias for Reg<TIM4_PSC_SPEC>
TIM4_RCR register accessor: an alias for Reg<TIM4_RCR_SPEC>
TIM4_SMCR register accessor: an alias for Reg<TIM4_SMCR_SPEC>
TIM4_SR register accessor: an alias for Reg<TIM4_SR_SPEC>