Module stm32mp1::stm32mp157::gicd::gicd_itargetsr12

source · [−]

Expand description

GICD interrupt processor target register 12

Structs

GICD_ITARGETSR12_SPEC

GICD interrupt processor target register 12

Register GICD_ITARGETSR12 reader

Register GICD_ITARGETSR12 writer

Type Definitions

Field CPU_TARGETS0 reader - CPU_TARGETS0

Field CPU_TARGETS0 writer - CPU_TARGETS0

Field CPU_TARGETS1 reader - CPU_TARGETS1

Field CPU_TARGETS1 writer - CPU_TARGETS1

Field CPU_TARGETS2 reader - CPU_TARGETS2

Field CPU_TARGETS2 writer - CPU_TARGETS2

Field CPU_TARGETS3 reader - CPU_TARGETS3

Field CPU_TARGETS3 writer - CPU_TARGETS3