[][src]Struct stm32l5::W

pub struct W<U, REG> { /* fields omitted */ }

Register writer

Used as an argument to the closures in the write and modify methods of the register

Implementations

impl<U, REG> W<U, REG>[src]

pub unsafe fn bits(&mut self, bits: U) -> &mut Self[src]

Writes raw bits to the register

impl W<u32, Reg<u32, _CH0CFGR1>>[src]

pub fn dfsdmen(&mut self) -> DFSDMEN_W<'_>[src]

Bit 31 - DFSDMEN

pub fn ckoutsrc(&mut self) -> CKOUTSRC_W<'_>[src]

Bit 30 - CKOUTSRC

pub fn ckoutdiv(&mut self) -> CKOUTDIV_W<'_>[src]

Bits 16:23 - CKOUTDIV

pub fn datpack(&mut self) -> DATPACK_W<'_>[src]

Bits 14:15 - DATPACK

pub fn datmpx(&mut self) -> DATMPX_W<'_>[src]

Bits 12:13 - DATMPX

pub fn chinsel(&mut self) -> CHINSEL_W<'_>[src]

Bit 8 - CHINSEL

pub fn chen(&mut self) -> CHEN_W<'_>[src]

Bit 7 - CHEN

pub fn ckaben(&mut self) -> CKABEN_W<'_>[src]

Bit 6 - CKABEN

pub fn scden(&mut self) -> SCDEN_W<'_>[src]

Bit 5 - SCDEN

pub fn spicksel(&mut self) -> SPICKSEL_W<'_>[src]

Bits 2:3 - SPICKSEL

pub fn sitp(&mut self) -> SITP_W<'_>[src]

Bits 0:1 - SITP

impl W<u32, Reg<u32, _CH0CFGR2>>[src]

pub fn offset(&mut self) -> OFFSET_W<'_>[src]

Bits 8:31 - OFFSET

pub fn dtrbs(&mut self) -> DTRBS_W<'_>[src]

Bits 3:7 - DTRBS

impl W<u32, Reg<u32, _CH0AWSCDR>>[src]

pub fn awford(&mut self) -> AWFORD_W<'_>[src]

Bits 22:23 - AWFORD

pub fn awfosr(&mut self) -> AWFOSR_W<'_>[src]

Bits 16:20 - AWFOSR

pub fn bkscd(&mut self) -> BKSCD_W<'_>[src]

Bits 12:15 - BKSCD

pub fn scdt(&mut self) -> SCDT_W<'_>[src]

Bits 0:7 - SCDT

impl W<u32, Reg<u32, _CH0WDATR>>[src]

pub fn wdata(&mut self) -> WDATA_W<'_>[src]

Bits 0:15 - WDATA

impl W<u32, Reg<u32, _CH0DATINR>>[src]

pub fn indat1(&mut self) -> INDAT1_W<'_>[src]

Bits 16:31 - INDAT1

pub fn indat0(&mut self) -> INDAT0_W<'_>[src]

Bits 0:15 - INDAT0

impl W<u32, Reg<u32, _CH1CFGR1>>[src]

pub fn datpack(&mut self) -> DATPACK_W<'_>[src]

Bits 14:15 - DATPACK

pub fn datmpx(&mut self) -> DATMPX_W<'_>[src]

Bits 12:13 - DATMPX

pub fn chinsel(&mut self) -> CHINSEL_W<'_>[src]

Bit 8 - CHINSEL

pub fn chen(&mut self) -> CHEN_W<'_>[src]

Bit 7 - CHEN

pub fn ckaben(&mut self) -> CKABEN_W<'_>[src]

Bit 6 - CKABEN

pub fn scden(&mut self) -> SCDEN_W<'_>[src]

Bit 5 - SCDEN

pub fn spicksel(&mut self) -> SPICKSEL_W<'_>[src]

Bits 2:3 - SPICKSEL

pub fn sitp(&mut self) -> SITP_W<'_>[src]

Bits 0:1 - SITP

pub fn ckoutdiv(&mut self) -> CKOUTDIV_W<'_>[src]

Bits 16:23 - Output serial clock divider

pub fn ckoutsrc(&mut self) -> CKOUTSRC_W<'_>[src]

Bit 30 - Output serial clock source selection

pub fn dfsdmen(&mut self) -> DFSDMEN_W<'_>[src]

Bit 31 - Global enable for DFSDM interface

impl W<u32, Reg<u32, _CH1CFGR2>>[src]

pub fn offset(&mut self) -> OFFSET_W<'_>[src]

Bits 8:31 - OFFSET

pub fn dtrbs(&mut self) -> DTRBS_W<'_>[src]

Bits 3:7 - DTRBS

impl W<u32, Reg<u32, _CH1AWSCDR>>[src]

pub fn awford(&mut self) -> AWFORD_W<'_>[src]

Bits 22:23 - AWFORD

pub fn awfosr(&mut self) -> AWFOSR_W<'_>[src]

Bits 16:20 - AWFOSR

pub fn bkscd(&mut self) -> BKSCD_W<'_>[src]

Bits 12:15 - BKSCD

pub fn scdt(&mut self) -> SCDT_W<'_>[src]

Bits 0:7 - SCDT

impl W<u32, Reg<u32, _CH1WDATR>>[src]

pub fn wdata(&mut self) -> WDATA_W<'_>[src]

Bits 0:15 - WDATA

impl W<u32, Reg<u32, _CH1DATINR>>[src]

pub fn indat1(&mut self) -> INDAT1_W<'_>[src]

Bits 16:31 - INDAT1

pub fn indat0(&mut self) -> INDAT0_W<'_>[src]

Bits 0:15 - INDAT0

impl W<u32, Reg<u32, _CH2CFGR1>>[src]

pub fn datpack(&mut self) -> DATPACK_W<'_>[src]

Bits 14:15 - DATPACK

pub fn datmpx(&mut self) -> DATMPX_W<'_>[src]

Bits 12:13 - DATMPX

pub fn chinsel(&mut self) -> CHINSEL_W<'_>[src]

Bit 8 - CHINSEL

pub fn chen(&mut self) -> CHEN_W<'_>[src]

Bit 7 - CHEN

pub fn ckaben(&mut self) -> CKABEN_W<'_>[src]

Bit 6 - CKABEN

pub fn scden(&mut self) -> SCDEN_W<'_>[src]

Bit 5 - SCDEN

pub fn spicksel(&mut self) -> SPICKSEL_W<'_>[src]

Bits 2:3 - SPICKSEL

pub fn sitp(&mut self) -> SITP_W<'_>[src]

Bits 0:1 - SITP

pub fn ckoutdiv(&mut self) -> CKOUTDIV_W<'_>[src]

Bits 16:23 - Output serial clock divider

pub fn ckoutsrc(&mut self) -> CKOUTSRC_W<'_>[src]

Bit 30 - Output serial clock source selection

pub fn dfsdmen(&mut self) -> DFSDMEN_W<'_>[src]

Bit 31 - Global enable for DFSDM interface

impl W<u32, Reg<u32, _CH2CFGR2>>[src]

pub fn offset(&mut self) -> OFFSET_W<'_>[src]

Bits 8:31 - OFFSET

pub fn dtrbs(&mut self) -> DTRBS_W<'_>[src]

Bits 3:7 - DTRBS

impl W<u32, Reg<u32, _CH2AWSCDR>>[src]

pub fn awford(&mut self) -> AWFORD_W<'_>[src]

Bits 22:23 - AWFORD

pub fn awfosr(&mut self) -> AWFOSR_W<'_>[src]

Bits 16:20 - AWFOSR

pub fn bkscd(&mut self) -> BKSCD_W<'_>[src]

Bits 12:15 - BKSCD

pub fn scdt(&mut self) -> SCDT_W<'_>[src]

Bits 0:7 - SCDT

impl W<u32, Reg<u32, _CH2WDATR>>[src]

pub fn wdata(&mut self) -> WDATA_W<'_>[src]

Bits 0:15 - WDATA

impl W<u32, Reg<u32, _CH2DATINR>>[src]

pub fn indat1(&mut self) -> INDAT1_W<'_>[src]

Bits 16:31 - INDAT1

pub fn indat0(&mut self) -> INDAT0_W<'_>[src]

Bits 0:15 - INDAT0

impl W<u32, Reg<u32, _CH3CFGR1>>[src]

pub fn datpack(&mut self) -> DATPACK_W<'_>[src]

Bits 14:15 - DATPACK

pub fn datmpx(&mut self) -> DATMPX_W<'_>[src]

Bits 12:13 - DATMPX

pub fn chinsel(&mut self) -> CHINSEL_W<'_>[src]

Bit 8 - CHINSEL

pub fn chen(&mut self) -> CHEN_W<'_>[src]

Bit 7 - CHEN

pub fn ckaben(&mut self) -> CKABEN_W<'_>[src]

Bit 6 - CKABEN

pub fn scden(&mut self) -> SCDEN_W<'_>[src]

Bit 5 - SCDEN

pub fn spicksel(&mut self) -> SPICKSEL_W<'_>[src]

Bits 2:3 - SPICKSEL

pub fn sitp(&mut self) -> SITP_W<'_>[src]

Bits 0:1 - SITP

pub fn ckoutdiv(&mut self) -> CKOUTDIV_W<'_>[src]

Bits 16:23 - Output serial clock divider

pub fn ckoutsrc(&mut self) -> CKOUTSRC_W<'_>[src]

Bit 30 - Output serial clock source selection

pub fn dfsdmen(&mut self) -> DFSDMEN_W<'_>[src]

Bit 31 - Global enable for DFSDM interface

impl W<u32, Reg<u32, _CH3CFGR2>>[src]

pub fn offset(&mut self) -> OFFSET_W<'_>[src]

Bits 8:31 - OFFSET

pub fn dtrbs(&mut self) -> DTRBS_W<'_>[src]

Bits 3:7 - DTRBS

impl W<u32, Reg<u32, _CH3AWSCDR>>[src]

pub fn awford(&mut self) -> AWFORD_W<'_>[src]

Bits 22:23 - AWFORD

pub fn awfosr(&mut self) -> AWFOSR_W<'_>[src]

Bits 16:20 - AWFOSR

pub fn bkscd(&mut self) -> BKSCD_W<'_>[src]

Bits 12:15 - BKSCD

pub fn scdt(&mut self) -> SCDT_W<'_>[src]

Bits 0:7 - SCDT

impl W<u32, Reg<u32, _CH3WDATR>>[src]

pub fn wdata(&mut self) -> WDATA_W<'_>[src]

Bits 0:15 - WDATA

impl W<u32, Reg<u32, _CH3DATINR>>[src]

pub fn indat1(&mut self) -> INDAT1_W<'_>[src]

Bits 16:31 - INDAT1

pub fn indat0(&mut self) -> INDAT0_W<'_>[src]

Bits 0:15 - INDAT0

impl W<u32, Reg<u32, _CH4CFGR1>>[src]

pub fn datpack(&mut self) -> DATPACK_W<'_>[src]

Bits 14:15 - DATPACK

pub fn datmpx(&mut self) -> DATMPX_W<'_>[src]

Bits 12:13 - DATMPX

pub fn chinsel(&mut self) -> CHINSEL_W<'_>[src]

Bit 8 - CHINSEL

pub fn chen(&mut self) -> CHEN_W<'_>[src]

Bit 7 - CHEN

pub fn ckaben(&mut self) -> CKABEN_W<'_>[src]

Bit 6 - CKABEN

pub fn scden(&mut self) -> SCDEN_W<'_>[src]

Bit 5 - SCDEN

pub fn spicksel(&mut self) -> SPICKSEL_W<'_>[src]

Bits 2:3 - SPICKSEL

pub fn sitp(&mut self) -> SITP_W<'_>[src]

Bits 0:1 - SITP

pub fn ckoutdiv(&mut self) -> CKOUTDIV_W<'_>[src]

Bits 16:23 - Output serial clock divider

pub fn ckoutsrc(&mut self) -> CKOUTSRC_W<'_>[src]

Bit 30 - Output serial clock source selection

pub fn dfsdmen(&mut self) -> DFSDMEN_W<'_>[src]

Bit 31 - Global enable for DFSDM interface

impl W<u32, Reg<u32, _CH4CFGR2>>[src]

pub fn offset(&mut self) -> OFFSET_W<'_>[src]

Bits 8:31 - OFFSET

pub fn dtrbs(&mut self) -> DTRBS_W<'_>[src]

Bits 3:7 - DTRBS

impl W<u32, Reg<u32, _CH4AWSCDR>>[src]

pub fn awford(&mut self) -> AWFORD_W<'_>[src]

Bits 22:23 - AWFORD

pub fn awfosr(&mut self) -> AWFOSR_W<'_>[src]

Bits 16:20 - AWFOSR

pub fn bkscd(&mut self) -> BKSCD_W<'_>[src]

Bits 12:15 - BKSCD

pub fn scdt(&mut self) -> SCDT_W<'_>[src]

Bits 0:7 - SCDT

impl W<u32, Reg<u32, _CH4WDATR>>[src]

pub fn wdata(&mut self) -> WDATA_W<'_>[src]

Bits 0:15 - WDATA

impl W<u32, Reg<u32, _CH4DATINR>>[src]

pub fn indat1(&mut self) -> INDAT1_W<'_>[src]

Bits 16:31 - INDAT1

pub fn indat0(&mut self) -> INDAT0_W<'_>[src]

Bits 0:15 - INDAT0

impl W<u32, Reg<u32, _CH5CFGR1>>[src]

pub fn datpack(&mut self) -> DATPACK_W<'_>[src]

Bits 14:15 - DATPACK

pub fn datmpx(&mut self) -> DATMPX_W<'_>[src]

Bits 12:13 - DATMPX

pub fn chinsel(&mut self) -> CHINSEL_W<'_>[src]

Bit 8 - CHINSEL

pub fn chen(&mut self) -> CHEN_W<'_>[src]

Bit 7 - CHEN

pub fn ckaben(&mut self) -> CKABEN_W<'_>[src]

Bit 6 - CKABEN

pub fn scden(&mut self) -> SCDEN_W<'_>[src]

Bit 5 - SCDEN

pub fn spicksel(&mut self) -> SPICKSEL_W<'_>[src]

Bits 2:3 - SPICKSEL

pub fn sitp(&mut self) -> SITP_W<'_>[src]

Bits 0:1 - SITP

pub fn ckoutdiv(&mut self) -> CKOUTDIV_W<'_>[src]

Bits 16:23 - Output serial clock divider

pub fn ckoutsrc(&mut self) -> CKOUTSRC_W<'_>[src]

Bit 30 - Output serial clock source selection

pub fn dfsdmen(&mut self) -> DFSDMEN_W<'_>[src]

Bit 31 - Global enable for DFSDM interface

impl W<u32, Reg<u32, _CH5CFGR2>>[src]

pub fn offset(&mut self) -> OFFSET_W<'_>[src]

Bits 8:31 - OFFSET

pub fn dtrbs(&mut self) -> DTRBS_W<'_>[src]

Bits 3:7 - DTRBS

impl W<u32, Reg<u32, _CH5AWSCDR>>[src]

pub fn awford(&mut self) -> AWFORD_W<'_>[src]

Bits 22:23 - AWFORD

pub fn awfosr(&mut self) -> AWFOSR_W<'_>[src]

Bits 16:20 - AWFOSR

pub fn bkscd(&mut self) -> BKSCD_W<'_>[src]

Bits 12:15 - BKSCD

pub fn scdt(&mut self) -> SCDT_W<'_>[src]

Bits 0:7 - SCDT

impl W<u32, Reg<u32, _CH5WDATR>>[src]

pub fn wdata(&mut self) -> WDATA_W<'_>[src]

Bits 0:15 - WDATA

impl W<u32, Reg<u32, _CH5DATINR>>[src]

pub fn indat1(&mut self) -> INDAT1_W<'_>[src]

Bits 16:31 - INDAT1

pub fn indat0(&mut self) -> INDAT0_W<'_>[src]

Bits 0:15 - INDAT0

impl W<u32, Reg<u32, _CH6CFGR1>>[src]

pub fn datpack(&mut self) -> DATPACK_W<'_>[src]

Bits 14:15 - DATPACK

pub fn datmpx(&mut self) -> DATMPX_W<'_>[src]

Bits 12:13 - DATMPX

pub fn chinsel(&mut self) -> CHINSEL_W<'_>[src]

Bit 8 - CHINSEL

pub fn chen(&mut self) -> CHEN_W<'_>[src]

Bit 7 - CHEN

pub fn ckaben(&mut self) -> CKABEN_W<'_>[src]

Bit 6 - CKABEN

pub fn scden(&mut self) -> SCDEN_W<'_>[src]

Bit 5 - SCDEN

pub fn spicksel(&mut self) -> SPICKSEL_W<'_>[src]

Bits 2:3 - SPICKSEL

pub fn sitp(&mut self) -> SITP_W<'_>[src]

Bits 0:1 - SITP

pub fn ckoutdiv(&mut self) -> CKOUTDIV_W<'_>[src]

Bits 16:23 - Output serial clock divider

pub fn ckoutsrc(&mut self) -> CKOUTSRC_W<'_>[src]

Bit 30 - Output serial clock source selection

pub fn dfsdmen(&mut self) -> DFSDMEN_W<'_>[src]

Bit 31 - Global enable for DFSDM interface

impl W<u32, Reg<u32, _CH6CFGR2>>[src]

pub fn offset(&mut self) -> OFFSET_W<'_>[src]

Bits 8:31 - OFFSET

pub fn dtrbs(&mut self) -> DTRBS_W<'_>[src]

Bits 3:7 - DTRBS

impl W<u32, Reg<u32, _CH6AWSCDR>>[src]

pub fn awford(&mut self) -> AWFORD_W<'_>[src]

Bits 22:23 - AWFORD

pub fn awfosr(&mut self) -> AWFOSR_W<'_>[src]

Bits 16:20 - AWFOSR

pub fn bkscd(&mut self) -> BKSCD_W<'_>[src]

Bits 12:15 - BKSCD

pub fn scdt(&mut self) -> SCDT_W<'_>[src]

Bits 0:7 - SCDT

impl W<u32, Reg<u32, _CH6WDATR>>[src]

pub fn wdata(&mut self) -> WDATA_W<'_>[src]

Bits 0:15 - WDATA

impl W<u32, Reg<u32, _CH6DATINR>>[src]

pub fn indat1(&mut self) -> INDAT1_W<'_>[src]

Bits 16:31 - INDAT1

pub fn indat0(&mut self) -> INDAT0_W<'_>[src]

Bits 0:15 - INDAT0

impl W<u32, Reg<u32, _CH7CFGR1>>[src]

pub fn datpack(&mut self) -> DATPACK_W<'_>[src]

Bits 14:15 - DATPACK

pub fn datmpx(&mut self) -> DATMPX_W<'_>[src]

Bits 12:13 - DATMPX

pub fn chinsel(&mut self) -> CHINSEL_W<'_>[src]

Bit 8 - CHINSEL

pub fn chen(&mut self) -> CHEN_W<'_>[src]

Bit 7 - CHEN

pub fn ckaben(&mut self) -> CKABEN_W<'_>[src]

Bit 6 - CKABEN

pub fn scden(&mut self) -> SCDEN_W<'_>[src]

Bit 5 - SCDEN

pub fn spicksel(&mut self) -> SPICKSEL_W<'_>[src]

Bits 2:3 - SPICKSEL

pub fn sitp(&mut self) -> SITP_W<'_>[src]

Bits 0:1 - SITP

pub fn ckoutdiv(&mut self) -> CKOUTDIV_W<'_>[src]

Bits 16:23 - Output serial clock divider

pub fn ckoutsrc(&mut self) -> CKOUTSRC_W<'_>[src]

Bit 30 - Output serial clock source selection

pub fn dfsdmen(&mut self) -> DFSDMEN_W<'_>[src]

Bit 31 - Global enable for DFSDM interface

impl W<u32, Reg<u32, _CH7CFGR2>>[src]

pub fn offset(&mut self) -> OFFSET_W<'_>[src]

Bits 8:31 - OFFSET

pub fn dtrbs(&mut self) -> DTRBS_W<'_>[src]

Bits 3:7 - DTRBS

impl W<u32, Reg<u32, _CH7AWSCDR>>[src]

pub fn awford(&mut self) -> AWFORD_W<'_>[src]

Bits 22:23 - AWFORD

pub fn awfosr(&mut self) -> AWFOSR_W<'_>[src]

Bits 16:20 - AWFOSR

pub fn bkscd(&mut self) -> BKSCD_W<'_>[src]

Bits 12:15 - BKSCD

pub fn scdt(&mut self) -> SCDT_W<'_>[src]

Bits 0:7 - SCDT

impl W<u32, Reg<u32, _CH7WDATR>>[src]

pub fn wdata(&mut self) -> WDATA_W<'_>[src]

Bits 0:15 - WDATA

impl W<u32, Reg<u32, _CH7DATINR>>[src]

pub fn indat1(&mut self) -> INDAT1_W<'_>[src]

Bits 16:31 - INDAT1

pub fn indat0(&mut self) -> INDAT0_W<'_>[src]

Bits 0:15 - INDAT0

impl W<u32, Reg<u32, _FLT0CR1>>[src]

pub fn awfsel(&mut self) -> AWFSEL_W<'_>[src]

Bit 30 - Analog watchdog fast mode select

pub fn fast(&mut self) -> FAST_W<'_>[src]

Bit 29 - Fast conversion mode selection for regular conversions

pub fn rch(&mut self) -> RCH_W<'_>[src]

Bits 24:26 - Regular channel selection

pub fn rdmaen(&mut self) -> RDMAEN_W<'_>[src]

Bit 21 - DMA channel enabled to read data for the regular conversion

pub fn rsync(&mut self) -> RSYNC_W<'_>[src]

Bit 19 - Launch regular conversion synchronously with DFSDM0

pub fn rcont(&mut self) -> RCONT_W<'_>[src]

Bit 18 - Continuous mode selection for regular conversions

pub fn rswstart(&mut self) -> RSWSTART_W<'_>[src]

Bit 17 - Software start of a conversion on the regular channel

pub fn jexten(&mut self) -> JEXTEN_W<'_>[src]

Bits 13:14 - Trigger enable and trigger edge selection for injected conversions

pub fn jextsel(&mut self) -> JEXTSEL_W<'_>[src]

Bits 8:10 - Trigger signal selection for launching injected conversions

pub fn jdmaen(&mut self) -> JDMAEN_W<'_>[src]

Bit 5 - DMA channel enabled to read data for the injected channel group

pub fn jscan(&mut self) -> JSCAN_W<'_>[src]

Bit 4 - Scanning conversion mode for injected conversions

pub fn jsync(&mut self) -> JSYNC_W<'_>[src]

Bit 3 - Launch an injected conversion synchronously with the DFSDM0 JSWSTART trigger

pub fn jswstart(&mut self) -> JSWSTART_W<'_>[src]

Bit 1 - Start a conversion of the injected group of channels

pub fn dfen(&mut self) -> DFEN_W<'_>[src]

Bit 0 - DFSDM enable

impl W<u32, Reg<u32, _FLT0CR2>>[src]

pub fn awdch(&mut self) -> AWDCH_W<'_>[src]

Bits 16:23 - Analog watchdog channel selection

pub fn exch(&mut self) -> EXCH_W<'_>[src]

Bits 8:15 - Extremes detector channel selection

pub fn ckabie(&mut self) -> CKABIE_W<'_>[src]

Bit 6 - Clock absence interrupt enable

pub fn scdie(&mut self) -> SCDIE_W<'_>[src]

Bit 5 - Short-circuit detector interrupt enable

pub fn awdie(&mut self) -> AWDIE_W<'_>[src]

Bit 4 - Analog watchdog interrupt enable

pub fn rovrie(&mut self) -> ROVRIE_W<'_>[src]

Bit 3 - Regular data overrun interrupt enable

pub fn jovrie(&mut self) -> JOVRIE_W<'_>[src]

Bit 2 - Injected data overrun interrupt enable

pub fn reocie(&mut self) -> REOCIE_W<'_>[src]

Bit 1 - Regular end of conversion interrupt enable

pub fn jeocie(&mut self) -> JEOCIE_W<'_>[src]

Bit 0 - Injected end of conversion interrupt enable

impl W<u32, Reg<u32, _FLT0ICR>>[src]

pub fn clrscdf(&mut self) -> CLRSCDF_W<'_>[src]

Bits 24:31 - Clear the short-circuit detector flag

pub fn clrckabf(&mut self) -> CLRCKABF_W<'_>[src]

Bits 16:23 - Clear the clock absence flag

pub fn clrrovrf(&mut self) -> CLRROVRF_W<'_>[src]

Bit 3 - Clear the regular conversion overrun flag

pub fn clrjovrf(&mut self) -> CLRJOVRF_W<'_>[src]

Bit 2 - Clear the injected conversion overrun flag

impl W<u32, Reg<u32, _FLT0JCHGR>>[src]

pub fn jchg(&mut self) -> JCHG_W<'_>[src]

Bits 0:7 - Injected channel group selection

impl W<u32, Reg<u32, _FLT0FCR>>[src]

pub fn ford(&mut self) -> FORD_W<'_>[src]

Bits 29:31 - Sinc filter order

pub fn fosr(&mut self) -> FOSR_W<'_>[src]

Bits 16:25 - Sinc filter oversampling ratio (decimation rate)

pub fn iosr(&mut self) -> IOSR_W<'_>[src]

Bits 0:7 - Integrator oversampling ratio (averaging length)

impl W<u32, Reg<u32, _FLT0AWHTR>>[src]

pub fn awht(&mut self) -> AWHT_W<'_>[src]

Bits 8:31 - Analog watchdog high threshold

pub fn bkawh(&mut self) -> BKAWH_W<'_>[src]

Bits 0:3 - Break signal assignment to analog watchdog high threshold event

impl W<u32, Reg<u32, _FLT0AWLTR>>[src]

pub fn awlt(&mut self) -> AWLT_W<'_>[src]

Bits 8:31 - Analog watchdog low threshold

pub fn bkawl(&mut self) -> BKAWL_W<'_>[src]

Bits 0:3 - Break signal assignment to analog watchdog low threshold event

impl W<u32, Reg<u32, _FLT0AWCFR>>[src]

pub fn clrawhtf(&mut self) -> CLRAWHTF_W<'_>[src]

Bits 8:15 - Clear the analog watchdog high threshold flag

pub fn clrawltf(&mut self) -> CLRAWLTF_W<'_>[src]

Bits 0:7 - Clear the analog watchdog low threshold flag

impl W<u32, Reg<u32, _FLT1CR1>>[src]

pub fn awfsel(&mut self) -> AWFSEL_W<'_>[src]

Bit 30 - Analog watchdog fast mode select

pub fn fast(&mut self) -> FAST_W<'_>[src]

Bit 29 - Fast conversion mode selection for regular conversions

pub fn rch(&mut self) -> RCH_W<'_>[src]

Bits 24:26 - Regular channel selection

pub fn rdmaen(&mut self) -> RDMAEN_W<'_>[src]

Bit 21 - DMA channel enabled to read data for the regular conversion

pub fn rsync(&mut self) -> RSYNC_W<'_>[src]

Bit 19 - Launch regular conversion synchronously with DFSDM0

pub fn rcont(&mut self) -> RCONT_W<'_>[src]

Bit 18 - Continuous mode selection for regular conversions

pub fn rswstart(&mut self) -> RSWSTART_W<'_>[src]

Bit 17 - Software start of a conversion on the regular channel

pub fn jexten(&mut self) -> JEXTEN_W<'_>[src]

Bits 13:14 - Trigger enable and trigger edge selection for injected conversions

pub fn jextsel(&mut self) -> JEXTSEL_W<'_>[src]

Bits 8:10 - Trigger signal selection for launching injected conversions

pub fn jdmaen(&mut self) -> JDMAEN_W<'_>[src]

Bit 5 - DMA channel enabled to read data for the injected channel group

pub fn jscan(&mut self) -> JSCAN_W<'_>[src]

Bit 4 - Scanning conversion mode for injected conversions

pub fn jsync(&mut self) -> JSYNC_W<'_>[src]

Bit 3 - Launch an injected conversion synchronously with the DFSDM0 JSWSTART trigger

pub fn jswstart(&mut self) -> JSWSTART_W<'_>[src]

Bit 1 - Start a conversion of the injected group of channels

pub fn dfen(&mut self) -> DFEN_W<'_>[src]

Bit 0 - DFSDM enable

impl W<u32, Reg<u32, _FLT1CR2>>[src]

pub fn awdch(&mut self) -> AWDCH_W<'_>[src]

Bits 16:23 - Analog watchdog channel selection

pub fn exch(&mut self) -> EXCH_W<'_>[src]

Bits 8:15 - Extremes detector channel selection

pub fn ckabie(&mut self) -> CKABIE_W<'_>[src]

Bit 6 - Clock absence interrupt enable

pub fn scdie(&mut self) -> SCDIE_W<'_>[src]

Bit 5 - Short-circuit detector interrupt enable

pub fn awdie(&mut self) -> AWDIE_W<'_>[src]

Bit 4 - Analog watchdog interrupt enable

pub fn rovrie(&mut self) -> ROVRIE_W<'_>[src]

Bit 3 - Regular data overrun interrupt enable

pub fn jovrie(&mut self) -> JOVRIE_W<'_>[src]

Bit 2 - Injected data overrun interrupt enable

pub fn reocie(&mut self) -> REOCIE_W<'_>[src]

Bit 1 - Regular end of conversion interrupt enable

pub fn jeocie(&mut self) -> JEOCIE_W<'_>[src]

Bit 0 - Injected end of conversion interrupt enable

impl W<u32, Reg<u32, _FLT1ICR>>[src]

pub fn clrscdf(&mut self) -> CLRSCDF_W<'_>[src]

Bits 24:31 - Clear the short-circuit detector flag

pub fn clrckabf(&mut self) -> CLRCKABF_W<'_>[src]

Bits 16:23 - Clear the clock absence flag

pub fn clrrovrf(&mut self) -> CLRROVRF_W<'_>[src]

Bit 3 - Clear the regular conversion overrun flag

pub fn clrjovrf(&mut self) -> CLRJOVRF_W<'_>[src]

Bit 2 - Clear the injected conversion overrun flag

impl W<u32, Reg<u32, _FLT1JCHGR>>[src]

pub fn jchg(&mut self) -> JCHG_W<'_>[src]

Bits 0:7 - Injected channel group selection

impl W<u32, Reg<u32, _FLT1FCR>>[src]

pub fn ford(&mut self) -> FORD_W<'_>[src]

Bits 29:31 - Sinc filter order

pub fn fosr(&mut self) -> FOSR_W<'_>[src]

Bits 16:25 - Sinc filter oversampling ratio (decimation rate)

pub fn iosr(&mut self) -> IOSR_W<'_>[src]

Bits 0:7 - Integrator oversampling ratio (averaging length)

impl W<u32, Reg<u32, _FLT1AWHTR>>[src]

pub fn awht(&mut self) -> AWHT_W<'_>[src]

Bits 8:31 - Analog watchdog high threshold

pub fn bkawh(&mut self) -> BKAWH_W<'_>[src]

Bits 0:3 - Break signal assignment to analog watchdog high threshold event

impl W<u32, Reg<u32, _FLT1AWLTR>>[src]

pub fn awlt(&mut self) -> AWLT_W<'_>[src]

Bits 8:31 - Analog watchdog low threshold

pub fn bkawl(&mut self) -> BKAWL_W<'_>[src]

Bits 0:3 - Break signal assignment to analog watchdog low threshold event

impl W<u32, Reg<u32, _FLT1AWCFR>>[src]

pub fn clrawhtf(&mut self) -> CLRAWHTF_W<'_>[src]

Bits 8:15 - Clear the analog watchdog high threshold flag

pub fn clrawltf(&mut self) -> CLRAWLTF_W<'_>[src]

Bits 0:7 - Clear the analog watchdog low threshold flag

impl W<u32, Reg<u32, _FLT2CR1>>[src]

pub fn awfsel(&mut self) -> AWFSEL_W<'_>[src]

Bit 30 - Analog watchdog fast mode select

pub fn fast(&mut self) -> FAST_W<'_>[src]

Bit 29 - Fast conversion mode selection for regular conversions

pub fn rch(&mut self) -> RCH_W<'_>[src]

Bits 24:26 - Regular channel selection

pub fn rdmaen(&mut self) -> RDMAEN_W<'_>[src]

Bit 21 - DMA channel enabled to read data for the regular conversion

pub fn rsync(&mut self) -> RSYNC_W<'_>[src]

Bit 19 - Launch regular conversion synchronously with DFSDM0

pub fn rcont(&mut self) -> RCONT_W<'_>[src]

Bit 18 - Continuous mode selection for regular conversions

pub fn rswstart(&mut self) -> RSWSTART_W<'_>[src]

Bit 17 - Software start of a conversion on the regular channel

pub fn jexten(&mut self) -> JEXTEN_W<'_>[src]

Bits 13:14 - Trigger enable and trigger edge selection for injected conversions

pub fn jextsel(&mut self) -> JEXTSEL_W<'_>[src]

Bits 8:10 - Trigger signal selection for launching injected conversions

pub fn jdmaen(&mut self) -> JDMAEN_W<'_>[src]

Bit 5 - DMA channel enabled to read data for the injected channel group

pub fn jscan(&mut self) -> JSCAN_W<'_>[src]

Bit 4 - Scanning conversion mode for injected conversions

pub fn jsync(&mut self) -> JSYNC_W<'_>[src]

Bit 3 - Launch an injected conversion synchronously with the DFSDM0 JSWSTART trigger

pub fn jswstart(&mut self) -> JSWSTART_W<'_>[src]

Bit 1 - Start a conversion of the injected group of channels

pub fn dfen(&mut self) -> DFEN_W<'_>[src]

Bit 0 - DFSDM enable

impl W<u32, Reg<u32, _FLT2CR2>>[src]

pub fn awdch(&mut self) -> AWDCH_W<'_>[src]

Bits 16:23 - Analog watchdog channel selection

pub fn exch(&mut self) -> EXCH_W<'_>[src]

Bits 8:15 - Extremes detector channel selection

pub fn ckabie(&mut self) -> CKABIE_W<'_>[src]

Bit 6 - Clock absence interrupt enable

pub fn scdie(&mut self) -> SCDIE_W<'_>[src]

Bit 5 - Short-circuit detector interrupt enable

pub fn awdie(&mut self) -> AWDIE_W<'_>[src]

Bit 4 - Analog watchdog interrupt enable

pub fn rovrie(&mut self) -> ROVRIE_W<'_>[src]

Bit 3 - Regular data overrun interrupt enable

pub fn jovrie(&mut self) -> JOVRIE_W<'_>[src]

Bit 2 - Injected data overrun interrupt enable

pub fn reocie(&mut self) -> REOCIE_W<'_>[src]

Bit 1 - Regular end of conversion interrupt enable

pub fn jeocie(&mut self) -> JEOCIE_W<'_>[src]

Bit 0 - Injected end of conversion interrupt enable

impl W<u32, Reg<u32, _FLT2ICR>>[src]

pub fn clrscdf(&mut self) -> CLRSCDF_W<'_>[src]

Bits 24:31 - Clear the short-circuit detector flag

pub fn clrckabf(&mut self) -> CLRCKABF_W<'_>[src]

Bits 16:23 - Clear the clock absence flag

pub fn clrrovrf(&mut self) -> CLRROVRF_W<'_>[src]

Bit 3 - Clear the regular conversion overrun flag

pub fn clrjovrf(&mut self) -> CLRJOVRF_W<'_>[src]

Bit 2 - Clear the injected conversion overrun flag

impl W<u32, Reg<u32, _FLT2JCHGR>>[src]

pub fn jchg(&mut self) -> JCHG_W<'_>[src]

Bits 0:7 - Injected channel group selection

impl W<u32, Reg<u32, _FLT2FCR>>[src]

pub fn ford(&mut self) -> FORD_W<'_>[src]

Bits 29:31 - Sinc filter order

pub fn fosr(&mut self) -> FOSR_W<'_>[src]

Bits 16:25 - Sinc filter oversampling ratio (decimation rate)

pub fn iosr(&mut self) -> IOSR_W<'_>[src]

Bits 0:7 - Integrator oversampling ratio (averaging length)

impl W<u32, Reg<u32, _FLT2AWHTR>>[src]

pub fn awht(&mut self) -> AWHT_W<'_>[src]

Bits 8:31 - Analog watchdog high threshold

pub fn bkawh(&mut self) -> BKAWH_W<'_>[src]

Bits 0:3 - Break signal assignment to analog watchdog high threshold event

impl W<u32, Reg<u32, _FLT2AWLTR>>[src]

pub fn awlt(&mut self) -> AWLT_W<'_>[src]

Bits 8:31 - Analog watchdog low threshold

pub fn bkawl(&mut self) -> BKAWL_W<'_>[src]

Bits 0:3 - Break signal assignment to analog watchdog low threshold event

impl W<u32, Reg<u32, _FLT2AWCFR>>[src]

pub fn clrawhtf(&mut self) -> CLRAWHTF_W<'_>[src]

Bits 8:15 - Clear the analog watchdog high threshold flag

pub fn clrawltf(&mut self) -> CLRAWLTF_W<'_>[src]

Bits 0:7 - Clear the analog watchdog low threshold flag

impl W<u32, Reg<u32, _FLT3CR1>>[src]

pub fn awfsel(&mut self) -> AWFSEL_W<'_>[src]

Bit 30 - Analog watchdog fast mode select

pub fn fast(&mut self) -> FAST_W<'_>[src]

Bit 29 - Fast conversion mode selection for regular conversions

pub fn rch(&mut self) -> RCH_W<'_>[src]

Bits 24:26 - Regular channel selection

pub fn rdmaen(&mut self) -> RDMAEN_W<'_>[src]

Bit 21 - DMA channel enabled to read data for the regular conversion

pub fn rsync(&mut self) -> RSYNC_W<'_>[src]

Bit 19 - Launch regular conversion synchronously with DFSDM0

pub fn rcont(&mut self) -> RCONT_W<'_>[src]

Bit 18 - Continuous mode selection for regular conversions

pub fn rswstart(&mut self) -> RSWSTART_W<'_>[src]

Bit 17 - Software start of a conversion on the regular channel

pub fn jexten(&mut self) -> JEXTEN_W<'_>[src]

Bits 13:14 - Trigger enable and trigger edge selection for injected conversions

pub fn jextsel(&mut self) -> JEXTSEL_W<'_>[src]

Bits 8:10 - Trigger signal selection for launching injected conversions

pub fn jdmaen(&mut self) -> JDMAEN_W<'_>[src]

Bit 5 - DMA channel enabled to read data for the injected channel group

pub fn jscan(&mut self) -> JSCAN_W<'_>[src]

Bit 4 - Scanning conversion mode for injected conversions

pub fn jsync(&mut self) -> JSYNC_W<'_>[src]

Bit 3 - Launch an injected conversion synchronously with the DFSDM0 JSWSTART trigger

pub fn jswstart(&mut self) -> JSWSTART_W<'_>[src]

Bit 1 - Start a conversion of the injected group of channels

pub fn dfen(&mut self) -> DFEN_W<'_>[src]

Bit 0 - DFSDM enable

impl W<u32, Reg<u32, _FLT3CR2>>[src]

pub fn awdch(&mut self) -> AWDCH_W<'_>[src]

Bits 16:23 - Analog watchdog channel selection

pub fn exch(&mut self) -> EXCH_W<'_>[src]

Bits 8:15 - Extremes detector channel selection

pub fn ckabie(&mut self) -> CKABIE_W<'_>[src]

Bit 6 - Clock absence interrupt enable

pub fn scdie(&mut self) -> SCDIE_W<'_>[src]

Bit 5 - Short-circuit detector interrupt enable

pub fn awdie(&mut self) -> AWDIE_W<'_>[src]

Bit 4 - Analog watchdog interrupt enable

pub fn rovrie(&mut self) -> ROVRIE_W<'_>[src]

Bit 3 - Regular data overrun interrupt enable

pub fn jovrie(&mut self) -> JOVRIE_W<'_>[src]

Bit 2 - Injected data overrun interrupt enable

pub fn reocie(&mut self) -> REOCIE_W<'_>[src]

Bit 1 - Regular end of conversion interrupt enable

pub fn jeocie(&mut self) -> JEOCIE_W<'_>[src]

Bit 0 - Injected end of conversion interrupt enable

impl W<u32, Reg<u32, _FLT3ICR>>[src]

pub fn clrscdf(&mut self) -> CLRSCDF_W<'_>[src]

Bits 24:31 - Clear the short-circuit detector flag

pub fn clrckabf(&mut self) -> CLRCKABF_W<'_>[src]

Bits 16:23 - Clear the clock absence flag

pub fn clrrovrf(&mut self) -> CLRROVRF_W<'_>[src]

Bit 3 - Clear the regular conversion overrun flag

pub fn clrjovrf(&mut self) -> CLRJOVRF_W<'_>[src]

Bit 2 - Clear the injected conversion overrun flag

impl W<u32, Reg<u32, _FLT3JCHGR>>[src]

pub fn jchg(&mut self) -> JCHG_W<'_>[src]

Bits 0:7 - Injected channel group selection

impl W<u32, Reg<u32, _FLT3FCR>>[src]

pub fn ford(&mut self) -> FORD_W<'_>[src]

Bits 29:31 - Sinc filter order

pub fn fosr(&mut self) -> FOSR_W<'_>[src]

Bits 16:25 - Sinc filter oversampling ratio (decimation rate)

pub fn iosr(&mut self) -> IOSR_W<'_>[src]

Bits 0:7 - Integrator oversampling ratio (averaging length)

impl W<u32, Reg<u32, _FLT3AWHTR>>[src]

pub fn awht(&mut self) -> AWHT_W<'_>[src]

Bits 8:31 - Analog watchdog high threshold

pub fn bkawh(&mut self) -> BKAWH_W<'_>[src]

Bits 0:3 - Break signal assignment to analog watchdog high threshold event

impl W<u32, Reg<u32, _FLT3AWLTR>>[src]

pub fn awlt(&mut self) -> AWLT_W<'_>[src]

Bits 8:31 - Analog watchdog low threshold

pub fn bkawl(&mut self) -> BKAWL_W<'_>[src]

Bits 0:3 - Break signal assignment to analog watchdog low threshold event

impl W<u32, Reg<u32, _FLT3AWCFR>>[src]

pub fn clrawhtf(&mut self) -> CLRAWHTF_W<'_>[src]

Bits 8:15 - Clear the analog watchdog high threshold flag

pub fn clrawltf(&mut self) -> CLRAWLTF_W<'_>[src]

Bits 0:7 - Clear the analog watchdog low threshold flag

impl W<u32, Reg<u32, _CH0DLYR>>[src]

pub fn plsskp(&mut self) -> PLSSKP_W<'_>[src]

Bits 0:5 - Pulses to skip for input data skipping function

impl W<u32, Reg<u32, _CH1DLYR>>[src]

pub fn plsskp(&mut self) -> PLSSKP_W<'_>[src]

Bits 0:5 - PLSSKP

impl W<u32, Reg<u32, _CH2DLYR>>[src]

pub fn plsskp(&mut self) -> PLSSKP_W<'_>[src]

Bits 0:5 - PLSSKP

impl W<u32, Reg<u32, _CH3DLYR>>[src]

pub fn plsskp(&mut self) -> PLSSKP_W<'_>[src]

Bits 0:5 - PLSSKP

impl W<u32, Reg<u32, _CH4DLYR>>[src]

pub fn plsskp(&mut self) -> PLSSKP_W<'_>[src]

Bits 0:5 - PLSSKP

impl W<u32, Reg<u32, _CH5DLYR>>[src]

pub fn plsskp(&mut self) -> PLSSKP_W<'_>[src]

Bits 0:5 - read-only

impl W<u32, Reg<u32, _CH6DLYR>>[src]

pub fn plsskp(&mut self) -> PLSSKP_W<'_>[src]

Bits 0:5 - PLSSKP

impl W<u32, Reg<u32, _CH7DLYR>>[src]

pub fn plsskp(&mut self) -> PLSSKP_W<'_>[src]

Bits 0:5 - PLSSKP

impl W<u32, Reg<u32, _C0CR>>[src]

pub fn sync_id(&mut self) -> SYNC_ID_W<'_>[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&mut self) -> NBREQ_W<'_>[src]

Bits 19:23 - Nb request

pub fn spol(&mut self) -> SPOL_W<'_>[src]

Bits 17:18 - Sync polarity

pub fn se(&mut self) -> SE_W<'_>[src]

Bit 16 - Synchronization enable

pub fn ege(&mut self) -> EGE_W<'_>[src]

Bit 9 - Event Generation Enable

pub fn soie(&mut self) -> SOIE_W<'_>[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&mut self) -> DMAREQ_ID_W<'_>[src]

Bits 0:6 - DMA Request ID

impl W<u32, Reg<u32, _C1CR>>[src]

pub fn sync_id(&mut self) -> SYNC_ID_W<'_>[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&mut self) -> NBREQ_W<'_>[src]

Bits 19:23 - Nb request

pub fn spol(&mut self) -> SPOL_W<'_>[src]

Bits 17:18 - Sync polarity

pub fn se(&mut self) -> SE_W<'_>[src]

Bit 16 - Synchronization enable

pub fn ege(&mut self) -> EGE_W<'_>[src]

Bit 9 - Event Generation Enable

pub fn soie(&mut self) -> SOIE_W<'_>[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&mut self) -> DMAREQ_ID_W<'_>[src]

Bits 0:6 - DMA Request ID

impl W<u32, Reg<u32, _C2CR>>[src]

pub fn sync_id(&mut self) -> SYNC_ID_W<'_>[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&mut self) -> NBREQ_W<'_>[src]

Bits 19:23 - Nb request

pub fn spol(&mut self) -> SPOL_W<'_>[src]

Bits 17:18 - Sync polarity

pub fn se(&mut self) -> SE_W<'_>[src]

Bit 16 - Synchronization enable

pub fn ege(&mut self) -> EGE_W<'_>[src]

Bit 9 - Event Generation Enable

pub fn soie(&mut self) -> SOIE_W<'_>[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&mut self) -> DMAREQ_ID_W<'_>[src]

Bits 0:6 - DMA Request ID

impl W<u32, Reg<u32, _C3CR>>[src]

pub fn sync_id(&mut self) -> SYNC_ID_W<'_>[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&mut self) -> NBREQ_W<'_>[src]

Bits 19:23 - Nb request

pub fn spol(&mut self) -> SPOL_W<'_>[src]

Bits 17:18 - Sync polarity

pub fn se(&mut self) -> SE_W<'_>[src]

Bit 16 - Synchronization enable

pub fn ege(&mut self) -> EGE_W<'_>[src]

Bit 9 - Event Generation Enable

pub fn soie(&mut self) -> SOIE_W<'_>[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&mut self) -> DMAREQ_ID_W<'_>[src]

Bits 0:6 - DMA Request ID

impl W<u32, Reg<u32, _C4CR>>[src]

pub fn sync_id(&mut self) -> SYNC_ID_W<'_>[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&mut self) -> NBREQ_W<'_>[src]

Bits 19:23 - Nb request

pub fn spol(&mut self) -> SPOL_W<'_>[src]

Bits 17:18 - Sync polarity

pub fn se(&mut self) -> SE_W<'_>[src]

Bit 16 - Synchronization enable

pub fn ege(&mut self) -> EGE_W<'_>[src]

Bit 9 - Event Generation Enable

pub fn soie(&mut self) -> SOIE_W<'_>[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&mut self) -> DMAREQ_ID_W<'_>[src]

Bits 0:6 - DMA Request ID

impl W<u32, Reg<u32, _C5CR>>[src]

pub fn sync_id(&mut self) -> SYNC_ID_W<'_>[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&mut self) -> NBREQ_W<'_>[src]

Bits 19:23 - Nb request

pub fn spol(&mut self) -> SPOL_W<'_>[src]

Bits 17:18 - Sync polarity

pub fn se(&mut self) -> SE_W<'_>[src]

Bit 16 - Synchronization enable

pub fn ege(&mut self) -> EGE_W<'_>[src]

Bit 9 - Event Generation Enable

pub fn oie(&mut self) -> OIE_W<'_>[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&mut self) -> DMAREQ_ID_W<'_>[src]

Bits 0:6 - DMA Request ID

impl W<u32, Reg<u32, _C6CR>>[src]

pub fn sync_id(&mut self) -> SYNC_ID_W<'_>[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&mut self) -> NBREQ_W<'_>[src]

Bits 19:23 - Nb request

pub fn spol(&mut self) -> SPOL_W<'_>[src]

Bits 17:18 - Sync polarity

pub fn se(&mut self) -> SE_W<'_>[src]

Bit 16 - Synchronization enable

pub fn ege(&mut self) -> EGE_W<'_>[src]

Bit 9 - Event Generation Enable

pub fn soie(&mut self) -> SOIE_W<'_>[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&mut self) -> DMAREQ_ID_W<'_>[src]

Bits 0:6 - DMA Request ID

impl W<u32, Reg<u32, _C7CR>>[src]

pub fn sync_id(&mut self) -> SYNC_ID_W<'_>[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&mut self) -> NBREQ_W<'_>[src]

Bits 19:23 - Nb request

pub fn spol(&mut self) -> SPOL_W<'_>[src]

Bits 17:18 - Sync polarity

pub fn se(&mut self) -> SE_W<'_>[src]

Bit 16 - Synchronization enable

pub fn ege(&mut self) -> EGE_W<'_>[src]

Bit 9 - Event Generation Enable

pub fn soie(&mut self) -> SOIE_W<'_>[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&mut self) -> DMAREQ_ID_W<'_>[src]

Bits 0:6 - DMA Request ID

impl W<u32, Reg<u32, _C8CR>>[src]

pub fn sync_id(&mut self) -> SYNC_ID_W<'_>[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&mut self) -> NBREQ_W<'_>[src]

Bits 19:23 - Nb request

pub fn spol(&mut self) -> SPOL_W<'_>[src]

Bits 17:18 - Sync polarity

pub fn se(&mut self) -> SE_W<'_>[src]

Bit 16 - Synchronization enable

pub fn ege(&mut self) -> EGE_W<'_>[src]

Bit 9 - Event Generation Enable

pub fn soie(&mut self) -> SOIE_W<'_>[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&mut self) -> DMAREQ_ID_W<'_>[src]

Bits 0:6 - DMA Request ID

impl W<u32, Reg<u32, _C9CR>>[src]

pub fn sync_id(&mut self) -> SYNC_ID_W<'_>[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&mut self) -> NBREQ_W<'_>[src]

Bits 19:23 - Nb request

pub fn spol(&mut self) -> SPOL_W<'_>[src]

Bits 17:18 - Sync polarity

pub fn se(&mut self) -> SE_W<'_>[src]

Bit 16 - Synchronization enable

pub fn ege(&mut self) -> EGE_W<'_>[src]

Bit 9 - Event Generation Enable

pub fn soie(&mut self) -> SOIE_W<'_>[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&mut self) -> DMAREQ_ID_W<'_>[src]

Bits 0:6 - DMA Request ID

impl W<u32, Reg<u32, _C10CR>>[src]

pub fn sync_id(&mut self) -> SYNC_ID_W<'_>[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&mut self) -> NBREQ_W<'_>[src]

Bits 19:23 - Nb request

pub fn spol(&mut self) -> SPOL_W<'_>[src]

Bits 17:18 - Sync polarity

pub fn se(&mut self) -> SE_W<'_>[src]

Bit 16 - Synchronization enable

pub fn ege(&mut self) -> EGE_W<'_>[src]

Bit 9 - Event Generation Enable

pub fn soie(&mut self) -> SOIE_W<'_>[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&mut self) -> DMAREQ_ID_W<'_>[src]

Bits 0:6 - DMA Request ID

impl W<u32, Reg<u32, _C11CR>>[src]

pub fn sync_id(&mut self) -> SYNC_ID_W<'_>[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&mut self) -> NBREQ_W<'_>[src]

Bits 19:23 - Nb request

pub fn spol(&mut self) -> SPOL_W<'_>[src]

Bits 17:18 - Sync polarity

pub fn se(&mut self) -> SE_W<'_>[src]

Bit 16 - Synchronization enable

pub fn ege(&mut self) -> EGE_W<'_>[src]

Bit 9 - Event Generation Enable

pub fn soie(&mut self) -> SOIE_W<'_>[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&mut self) -> DMAREQ_ID_W<'_>[src]

Bits 0:6 - DMA Request ID

impl W<u32, Reg<u32, _C12CR>>[src]

pub fn sync_id(&mut self) -> SYNC_ID_W<'_>[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&mut self) -> NBREQ_W<'_>[src]

Bits 19:23 - Nb request

pub fn spol(&mut self) -> SPOL_W<'_>[src]

Bits 17:18 - Sync polarity

pub fn se(&mut self) -> SE_W<'_>[src]

Bit 16 - Synchronization enable

pub fn ege(&mut self) -> EGE_W<'_>[src]

Bit 9 - Event Generation Enable

pub fn soie(&mut self) -> SOIE_W<'_>[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&mut self) -> DMAREQ_ID_W<'_>[src]

Bits 0:6 - DMA Request ID

impl W<u32, Reg<u32, _C13CR>>[src]

pub fn sync_id(&mut self) -> SYNC_ID_W<'_>[src]

Bits 24:28 - SYNC_ID

pub fn nbreq(&mut self) -> NBREQ_W<'_>[src]

Bits 19:23 - Nb request

pub fn spol(&mut self) -> SPOL_W<'_>[src]

Bits 17:18 - Sync polarity

pub fn se(&mut self) -> SE_W<'_>[src]

Bit 16 - Synchronization enable

pub fn ege(&mut self) -> EGE_W<'_>[src]

Bit 9 - Event Generation Enable

pub fn soie(&mut self) -> SOIE_W<'_>[src]

Bit 8 - Synchronization Overrun Interrupt Enable

pub fn dmareq_id(&mut self) -> DMAREQ_ID_W<'_>[src]

Bits 0:6 - DMA Request ID

impl W<u32, Reg<u32, _CSR>>[src]

pub fn sof0(&mut self) -> SOF0_W<'_>[src]

Bit 0 - Synchronization Overrun Flag 0

pub fn sof1(&mut self) -> SOF1_W<'_>[src]

Bit 1 - Synchronization Overrun Flag 1

pub fn sof2(&mut self) -> SOF2_W<'_>[src]

Bit 2 - Synchronization Overrun Flag 2

pub fn sof3(&mut self) -> SOF3_W<'_>[src]

Bit 3 - Synchronization Overrun Flag 3

pub fn sof4(&mut self) -> SOF4_W<'_>[src]

Bit 4 - Synchronization Overrun Flag 4

pub fn sof5(&mut self) -> SOF5_W<'_>[src]

Bit 5 - Synchronization Overrun Flag 5

pub fn sof6(&mut self) -> SOF6_W<'_>[src]

Bit 6 - Synchronization Overrun Flag 6

pub fn sof7(&mut self) -> SOF7_W<'_>[src]

Bit 7 - Synchronization Overrun Flag 7

pub fn sof8(&mut self) -> SOF8_W<'_>[src]

Bit 8 - Synchronization Overrun Flag 8

pub fn sof9(&mut self) -> SOF9_W<'_>[src]

Bit 9 - Synchronization Overrun Flag 9

pub fn sof10(&mut self) -> SOF10_W<'_>[src]

Bit 10 - Synchronization Overrun Flag 10

pub fn sof11(&mut self) -> SOF11_W<'_>[src]

Bit 11 - Synchronization Overrun Flag 11

pub fn sof12(&mut self) -> SOF12_W<'_>[src]

Bit 12 - Synchronization Overrun Flag 12

pub fn sof13(&mut self) -> SOF13_W<'_>[src]

Bit 13 - Synchronization Overrun Flag 13

pub fn sof14(&mut self) -> SOF14_W<'_>[src]

Bit 14 - Synchronization Overrun Flag 13

pub fn sof15(&mut self) -> SOF15_W<'_>[src]

Bit 15 - Synchronization Overrun Flag 13

impl W<u32, Reg<u32, _CCFR>>[src]

pub fn csof0(&mut self) -> CSOF0_W<'_>[src]

Bit 0 - Synchronization Clear Overrun Flag 0

pub fn csof1(&mut self) -> CSOF1_W<'_>[src]

Bit 1 - Synchronization Clear Overrun Flag 1

pub fn csof2(&mut self) -> CSOF2_W<'_>[src]

Bit 2 - Synchronization Clear Overrun Flag 2

pub fn csof3(&mut self) -> CSOF3_W<'_>[src]

Bit 3 - Synchronization Clear Overrun Flag 3

pub fn csof4(&mut self) -> CSOF4_W<'_>[src]

Bit 4 - Synchronization Clear Overrun Flag 4

pub fn csof5(&mut self) -> CSOF5_W<'_>[src]

Bit 5 - Synchronization Clear Overrun Flag 5

pub fn csof6(&mut self) -> CSOF6_W<'_>[src]

Bit 6 - Synchronization Clear Overrun Flag 6

pub fn csof7(&mut self) -> CSOF7_W<'_>[src]

Bit 7 - Synchronization Clear Overrun Flag 7

pub fn csof8(&mut self) -> CSOF8_W<'_>[src]

Bit 8 - Synchronization Clear Overrun Flag 8

pub fn csof9(&mut self) -> CSOF9_W<'_>[src]

Bit 9 - Synchronization Clear Overrun Flag 9

pub fn csof10(&mut self) -> CSOF10_W<'_>[src]

Bit 10 - Synchronization Clear Overrun Flag 10

pub fn csof11(&mut self) -> CSOF11_W<'_>[src]

Bit 11 - Synchronization Clear Overrun Flag 11

pub fn csof12(&mut self) -> CSOF12_W<'_>[src]

Bit 12 - Synchronization Clear Overrun Flag 12

pub fn csof13(&mut self) -> CSOF13_W<'_>[src]

Bit 13 - Synchronization Clear Overrun Flag 13

pub fn csof14(&mut self) -> CSOF14_W<'_>[src]

Bit 14 - Synchronization Clear Overrun Flag 13

pub fn csof15(&mut self) -> CSOF15_W<'_>[src]

Bit 15 - Synchronization Clear Overrun Flag 13

impl W<u32, Reg<u32, _RG0CR>>[src]

pub fn gnbreq(&mut self) -> GNBREQ_W<'_>[src]

Bits 19:23 - Number of Request

pub fn gpol(&mut self) -> GPOL_W<'_>[src]

Bits 17:18 - Generation Polarity

pub fn ge(&mut self) -> GE_W<'_>[src]

Bit 16 - Generation Enable

pub fn oie(&mut self) -> OIE_W<'_>[src]

Bit 8 - Overrun Interrupt Enable

pub fn sig_id(&mut self) -> SIG_ID_W<'_>[src]

Bits 0:4 - Signal ID

impl W<u32, Reg<u32, _RG1CR>>[src]

pub fn gnbreq(&mut self) -> GNBREQ_W<'_>[src]

Bits 19:23 - Number of Request

pub fn gpol(&mut self) -> GPOL_W<'_>[src]

Bits 17:18 - Generation Polarity

pub fn ge(&mut self) -> GE_W<'_>[src]

Bit 16 - Generation Enable

pub fn oie(&mut self) -> OIE_W<'_>[src]

Bit 8 - Overrun Interrupt Enable

pub fn sig_id(&mut self) -> SIG_ID_W<'_>[src]

Bits 0:4 - Signal ID

impl W<u32, Reg<u32, _RG2CR>>[src]

pub fn gnbreq(&mut self) -> GNBREQ_W<'_>[src]

Bits 19:23 - Number of Request

pub fn gpol(&mut self) -> GPOL_W<'_>[src]

Bits 17:18 - Generation Polarity

pub fn ge(&mut self) -> GE_W<'_>[src]

Bit 16 - Generation Enable

pub fn oie(&mut self) -> OIE_W<'_>[src]

Bit 8 - Overrun Interrupt Enable

pub fn sig_id(&mut self) -> SIG_ID_W<'_>[src]

Bits 0:4 - Signal ID

impl W<u32, Reg<u32, _RG3CR>>[src]

pub fn gnbreq(&mut self) -> GNBREQ_W<'_>[src]

Bits 19:23 - Number of Request

pub fn gpol(&mut self) -> GPOL_W<'_>[src]

Bits 17:18 - Generation Polarity

pub fn ge(&mut self) -> GE_W<'_>[src]

Bit 16 - Generation Enable

pub fn oie(&mut self) -> OIE_W<'_>[src]

Bit 8 - Overrun Interrupt Enable

pub fn sig_id(&mut self) -> SIG_ID_W<'_>[src]

Bits 0:4 - Signal ID

impl W<u32, Reg<u32, _RGCFR>>[src]

pub fn csof0(&mut self) -> CSOF0_W<'_>[src]

Bit 0 - Generator Clear Overrun Flag 0

pub fn csof1(&mut self) -> CSOF1_W<'_>[src]

Bit 1 - Generator Clear Overrun Flag 1

pub fn csof2(&mut self) -> CSOF2_W<'_>[src]

Bit 2 - Generator Clear Overrun Flag 2

pub fn csof3(&mut self) -> CSOF3_W<'_>[src]

Bit 3 - Generator Clear Overrun Flag 3

impl W<u32, Reg<u32, _C14CR>>[src]

pub fn sync_id(&mut self) -> SYNC_ID_W<'_>[src]

Bits 24:28 - Synchronization identification

pub fn nbreq(&mut self) -> NBREQ_W<'_>[src]

Bits 19:23 - Number of DMA requests minus 1 to forward

pub fn spol(&mut self) -> SPOL_W<'_>[src]

Bits 17:18 - Synchronization polarity

pub fn se(&mut self) -> SE_W<'_>[src]

Bit 16 - Synchronization enable

pub fn ege(&mut self) -> EGE_W<'_>[src]

Bit 9 - Event generation enable

pub fn soie(&mut self) -> SOIE_W<'_>[src]

Bit 8 - Synchronization overrun interrupt enable

pub fn dmareq_id(&mut self) -> DMAREQ_ID_W<'_>[src]

Bits 0:6 - DMA request identification

impl W<u32, Reg<u32, _C15CR>>[src]

pub fn sync_id(&mut self) -> SYNC_ID_W<'_>[src]

Bits 24:28 - Synchronization identification

pub fn nbreq(&mut self) -> NBREQ_W<'_>[src]

Bits 19:23 - Number of DMA requests minus 1 to forward

pub fn spol(&mut self) -> SPOL_W<'_>[src]

Bits 17:18 - Synchronization polarity

pub fn se(&mut self) -> SE_W<'_>[src]

Bit 16 - Synchronization enable

pub fn ege(&mut self) -> EGE_W<'_>[src]

Bit 9 - Event generation enable

pub fn soie(&mut self) -> SOIE_W<'_>[src]

Bit 8 - Synchronization overrun interrupt enable

pub fn dmareq_id(&mut self) -> DMAREQ_ID_W<'_>[src]

Bits 0:6 - DMA request identification

impl W<u32, Reg<u32, _RTSR1>>[src]

pub fn rt0(&mut self) -> RT0_W<'_>[src]

Bit 0 - Rising trigger event configuration bit of configurable event input x

pub fn rt1(&mut self) -> RT1_W<'_>[src]

Bit 1 - Rising trigger event configuration bit of configurable event input x

pub fn rt2(&mut self) -> RT2_W<'_>[src]

Bit 2 - Rising trigger event configuration bit of configurable event input x

pub fn rt3(&mut self) -> RT3_W<'_>[src]

Bit 3 - Rising trigger event configuration bit of configurable event input x

pub fn rt4(&mut self) -> RT4_W<'_>[src]

Bit 4 - Rising trigger event configuration bit of configurable event input x

pub fn rt5(&mut self) -> RT5_W<'_>[src]

Bit 5 - Rising trigger event configuration bit of configurable event input x

pub fn rt6(&mut self) -> RT6_W<'_>[src]

Bit 6 - Rising trigger event configuration bit of configurable event input x

pub fn rt7(&mut self) -> RT7_W<'_>[src]

Bit 7 - Rising trigger event configuration bit of configurable event input x

pub fn rt8(&mut self) -> RT8_W<'_>[src]

Bit 8 - Rising trigger event configuration bit of configurable event input x

pub fn rt9(&mut self) -> RT9_W<'_>[src]

Bit 9 - Rising trigger event configuration bit of configurable event input x

pub fn rt10(&mut self) -> RT10_W<'_>[src]

Bit 10 - Rising trigger event configuration bit of configurable event input x

pub fn rt11(&mut self) -> RT11_W<'_>[src]

Bit 11 - Rising trigger event configuration bit of configurable event input x

pub fn rt12(&mut self) -> RT12_W<'_>[src]

Bit 12 - Rising trigger event configuration bit of configurable event input x

pub fn rt13(&mut self) -> RT13_W<'_>[src]

Bit 13 - Rising trigger event configuration bit of configurable event input x

pub fn rt14(&mut self) -> RT14_W<'_>[src]

Bit 14 - Rising trigger event configuration bit of configurable event input x

pub fn rt15(&mut self) -> RT15_W<'_>[src]

Bit 15 - Rising trigger event configuration bit of configurable event input x

pub fn rt16(&mut self) -> RT16_W<'_>[src]

Bit 16 - Rising trigger event configuration bit of configurable event input x

pub fn rt21(&mut self) -> RT21_W<'_>[src]

Bit 21 - Rising trigger event configuration bit of configurable event input x

pub fn rt22(&mut self) -> RT22_W<'_>[src]

Bit 22 - Rising trigger event configuration bit of configurable event input x

impl W<u32, Reg<u32, _FTSR1>>[src]

pub fn ft0(&mut self) -> FT0_W<'_>[src]

Bit 0 - Falling trigger event configuration bit of configurable event input x

pub fn ft1(&mut self) -> FT1_W<'_>[src]

Bit 1 - Falling trigger event configuration bit of configurable event input x

pub fn ft2(&mut self) -> FT2_W<'_>[src]

Bit 2 - Falling trigger event configuration bit of configurable event input x

pub fn ft3(&mut self) -> FT3_W<'_>[src]

Bit 3 - Falling trigger event configuration bit of configurable event input x

pub fn ft4(&mut self) -> FT4_W<'_>[src]

Bit 4 - Falling trigger event configuration bit of configurable event input x

pub fn ft5(&mut self) -> FT5_W<'_>[src]

Bit 5 - Falling trigger event configuration bit of configurable event input x

pub fn ft6(&mut self) -> FT6_W<'_>[src]

Bit 6 - Falling trigger event configuration bit of configurable event input x

pub fn ft7(&mut self) -> FT7_W<'_>[src]

Bit 7 - Falling trigger event configuration bit of configurable event input x

pub fn ft8(&mut self) -> FT8_W<'_>[src]

Bit 8 - Falling trigger event configuration bit of configurable event input x

pub fn ft9(&mut self) -> FT9_W<'_>[src]

Bit 9 - Falling trigger event configuration bit of configurable event input x

pub fn ft10(&mut self) -> FT10_W<'_>[src]

Bit 10 - Falling trigger event configuration bit of configurable event input x

pub fn ft11(&mut self) -> FT11_W<'_>[src]

Bit 11 - Falling trigger event configuration bit of configurable event input x

pub fn ft12(&mut self) -> FT12_W<'_>[src]

Bit 12 - Falling trigger event configuration bit of configurable event input x

pub fn ft13(&mut self) -> FT13_W<'_>[src]

Bit 13 - Falling trigger event configuration bit of configurable event input x

pub fn ft14(&mut self) -> FT14_W<'_>[src]

Bit 14 - Falling trigger event configuration bit of configurable event input x

pub fn ft15(&mut self) -> FT15_W<'_>[src]

Bit 15 - Falling trigger event configuration bit of configurable event input x

pub fn ft16(&mut self) -> FT16_W<'_>[src]

Bit 16 - Falling trigger event configuration bit of configurable event input x

pub fn ft21(&mut self) -> FT21_W<'_>[src]

Bit 21 - Falling trigger event configuration bit of configurable event input x

pub fn ft22(&mut self) -> FT22_W<'_>[src]

Bit 22 - Falling trigger event configuration bit of configurable event input x

impl W<u32, Reg<u32, _SWIER1>>[src]

pub fn swi0(&mut self) -> SWI0_W<'_>[src]

Bit 0 - Software interrupt on event x

pub fn swi1(&mut self) -> SWI1_W<'_>[src]

Bit 1 - Software interrupt on event x

pub fn swi2(&mut self) -> SWI2_W<'_>[src]

Bit 2 - Software interrupt on event x

pub fn swi3(&mut self) -> SWI3_W<'_>[src]

Bit 3 - Software interrupt on event x

pub fn swi4(&mut self) -> SWI4_W<'_>[src]

Bit 4 - Software interrupt on event x

pub fn swi5(&mut self) -> SWI5_W<'_>[src]

Bit 5 - Software interrupt on event x

pub fn swi6(&mut self) -> SWI6_W<'_>[src]

Bit 6 - Software interrupt on event x

pub fn swi7(&mut self) -> SWI7_W<'_>[src]

Bit 7 - Software interrupt on event x

pub fn swi8(&mut self) -> SWI8_W<'_>[src]

Bit 8 - Software interrupt on event x

pub fn swi9(&mut self) -> SWI9_W<'_>[src]

Bit 9 - Software interrupt on event x

pub fn swi10(&mut self) -> SWI10_W<'_>[src]

Bit 10 - Software interrupt on event x

pub fn swi11(&mut self) -> SWI11_W<'_>[src]

Bit 11 - Software interrupt on event x

pub fn swi12(&mut self) -> SWI12_W<'_>[src]

Bit 12 - Software interrupt on event x

pub fn swi13(&mut self) -> SWI13_W<'_>[src]

Bit 13 - Software interrupt on event x

pub fn swi14(&mut self) -> SWI14_W<'_>[src]

Bit 14 - Software interrupt on event x

pub fn swi15(&mut self) -> SWI15_W<'_>[src]

Bit 15 - Software interrupt on event x

pub fn swi16(&mut self) -> SWI16_W<'_>[src]

Bit 16 - Software interrupt on event x

pub fn swi21(&mut self) -> SWI21_W<'_>[src]

Bit 21 - Software interrupt on event x

pub fn swi22(&mut self) -> SWI22_W<'_>[src]

Bit 22 - Software interrupt on event x

impl W<u32, Reg<u32, _RPR1>>[src]

pub fn rpif0(&mut self) -> RPIF0_W<'_>[src]

Bit 0 - configurable event inputs x rising edge pending bit

pub fn rpif1(&mut self) -> RPIF1_W<'_>[src]

Bit 1 - configurable event inputs x rising edge pending bit

pub fn rpif2(&mut self) -> RPIF2_W<'_>[src]

Bit 2 - configurable event inputs x rising edge pending bit

pub fn rpif3(&mut self) -> RPIF3_W<'_>[src]

Bit 3 - configurable event inputs x rising edge pending bit

pub fn rpif4(&mut self) -> RPIF4_W<'_>[src]

Bit 4 - configurable event inputs x rising edge pending bit

pub fn rpif5(&mut self) -> RPIF5_W<'_>[src]

Bit 5 - configurable event inputs x rising edge pending bit

pub fn rpif6(&mut self) -> RPIF6_W<'_>[src]

Bit 6 - configurable event inputs x rising edge pending bit

pub fn rpif7(&mut self) -> RPIF7_W<'_>[src]

Bit 7 - configurable event inputs x rising edge pending bit

pub fn rpif8(&mut self) -> RPIF8_W<'_>[src]

Bit 8 - configurable event inputs x rising edge pending bit

pub fn rpif9(&mut self) -> RPIF9_W<'_>[src]

Bit 9 - configurable event inputs x rising edge pending bit

pub fn rpif10(&mut self) -> RPIF10_W<'_>[src]

Bit 10 - configurable event inputs x rising edge pending bit

pub fn rpif11(&mut self) -> RPIF11_W<'_>[src]

Bit 11 - configurable event inputs x rising edge pending bit

pub fn rpif12(&mut self) -> RPIF12_W<'_>[src]

Bit 12 - configurable event inputs x rising edge pending bit

pub fn rpif13(&mut self) -> RPIF13_W<'_>[src]

Bit 13 - configurable event inputs x rising edge pending bit

pub fn rpif14(&mut self) -> RPIF14_W<'_>[src]

Bit 14 - configurable event inputs x rising edge pending bit

pub fn rpif15(&mut self) -> RPIF15_W<'_>[src]

Bit 15 - configurable event inputs x rising edge pending bit

pub fn rpif16(&mut self) -> RPIF16_W<'_>[src]

Bit 16 - configurable event inputs x rising edge pending bit

pub fn rpif21(&mut self) -> RPIF21_W<'_>[src]

Bit 21 - configurable event inputs x rising edge pending bit

pub fn rpif22(&mut self) -> RPIF22_W<'_>[src]

Bit 22 - configurable event inputs x rising edge pending bit

impl W<u32, Reg<u32, _FPR1>>[src]

pub fn fpif0(&mut self) -> FPIF0_W<'_>[src]

Bit 0 - configurable event inputs x falling edge pending bit.

pub fn fpif1(&mut self) -> FPIF1_W<'_>[src]

Bit 1 - configurable event inputs x falling edge pending bit.

pub fn fpif2(&mut self) -> FPIF2_W<'_>[src]

Bit 2 - configurable event inputs x falling edge pending bit.

pub fn fpif3(&mut self) -> FPIF3_W<'_>[src]

Bit 3 - configurable event inputs x falling edge pending bit.

pub fn fpif4(&mut self) -> FPIF4_W<'_>[src]

Bit 4 - configurable event inputs x falling edge pending bit.

pub fn fpif5(&mut self) -> FPIF5_W<'_>[src]

Bit 5 - configurable event inputs x falling edge pending bit.

pub fn fpif6(&mut self) -> FPIF6_W<'_>[src]

Bit 6 - configurable event inputs x falling edge pending bit.

pub fn fpif7(&mut self) -> FPIF7_W<'_>[src]

Bit 7 - configurable event inputs x falling edge pending bit.

pub fn fpif8(&mut self) -> FPIF8_W<'_>[src]

Bit 8 - configurable event inputs x falling edge pending bit.

pub fn fpif9(&mut self) -> FPIF9_W<'_>[src]

Bit 9 - configurable event inputs x falling edge pending bit.

pub fn fpif10(&mut self) -> FPIF10_W<'_>[src]

Bit 10 - configurable event inputs x falling edge pending bit.

pub fn fpif11(&mut self) -> FPIF11_W<'_>[src]

Bit 11 - configurable event inputs x falling edge pending bit.

pub fn fpif12(&mut self) -> FPIF12_W<'_>[src]

Bit 12 - configurable event inputs x falling edge pending bit.

pub fn fpif13(&mut self) -> FPIF13_W<'_>[src]

Bit 13 - configurable event inputs x falling edge pending bit.

pub fn fpif14(&mut self) -> FPIF14_W<'_>[src]

Bit 14 - configurable event inputs x falling edge pending bit.

pub fn fpif15(&mut self) -> FPIF15_W<'_>[src]

Bit 15 - configurable event inputs x falling edge pending bit.

pub fn fpif16(&mut self) -> FPIF16_W<'_>[src]

Bit 16 - configurable event inputs x falling edge pending bit.

pub fn fpif21(&mut self) -> FPIF21_W<'_>[src]

Bit 21 - configurable event inputs x falling edge pending bit.

pub fn fpif22(&mut self) -> FPIF22_W<'_>[src]

Bit 22 - configurable event inputs x falling edge pending bit.

impl W<u32, Reg<u32, _SECCFGR1>>[src]

pub fn sec0(&mut self) -> SEC0_W<'_>[src]

Bit 0 - Security enable on event input x

pub fn sec1(&mut self) -> SEC1_W<'_>[src]

Bit 1 - Security enable on event input x

pub fn sec2(&mut self) -> SEC2_W<'_>[src]

Bit 2 - Security enable on event input x

pub fn sec3(&mut self) -> SEC3_W<'_>[src]

Bit 3 - Security enable on event input x

pub fn sec4(&mut self) -> SEC4_W<'_>[src]

Bit 4 - Security enable on event input x

pub fn sec5(&mut self) -> SEC5_W<'_>[src]

Bit 5 - Security enable on event input x

pub fn sec6(&mut self) -> SEC6_W<'_>[src]

Bit 6 - Security enable on event input x

pub fn sec7(&mut self) -> SEC7_W<'_>[src]

Bit 7 - Security enable on event input x

pub fn sec8(&mut self) -> SEC8_W<'_>[src]

Bit 8 - Security enable on event input x

pub fn sec9(&mut self) -> SEC9_W<'_>[src]

Bit 9 - Security enable on event input x

pub fn sec10(&mut self) -> SEC10_W<'_>[src]

Bit 10 - Security enable on event input x

pub fn sec11(&mut self) -> SEC11_W<'_>[src]

Bit 11 - Security enable on event input x

pub fn sec12(&mut self) -> SEC12_W<'_>[src]

Bit 12 - Security enable on event input x

pub fn sec13(&mut self) -> SEC13_W<'_>[src]

Bit 13 - Security enable on event input x

pub fn sec14(&mut self) -> SEC14_W<'_>[src]

Bit 14 - Security enable on event input x

pub fn sec15(&mut self) -> SEC15_W<'_>[src]

Bit 15 - Security enable on event input x

pub fn sec16(&mut self) -> SEC16_W<'_>[src]

Bit 16 - Security enable on event input x

pub fn sec17(&mut self) -> SEC17_W<'_>[src]

Bit 17 - Security enable on event input x

pub fn sec18(&mut self) -> SEC18_W<'_>[src]

Bit 18 - Security enable on event input x

pub fn sec19(&mut self) -> SEC19_W<'_>[src]

Bit 19 - Security enable on event input x

pub fn sec20(&mut self) -> SEC20_W<'_>[src]

Bit 20 - Security enable on event input x

pub fn sec21(&mut self) -> SEC21_W<'_>[src]

Bit 21 - Security enable on event input x

pub fn sec22(&mut self) -> SEC22_W<'_>[src]

Bit 22 - Security enable on event input x

pub fn sec23(&mut self) -> SEC23_W<'_>[src]

Bit 23 - Security enable on event input x

pub fn sec24(&mut self) -> SEC24_W<'_>[src]

Bit 24 - Security enable on event input x

pub fn sec25(&mut self) -> SEC25_W<'_>[src]

Bit 25 - Security enable on event input x

pub fn sec26(&mut self) -> SEC26_W<'_>[src]

Bit 26 - Security enable on event input x

pub fn sec27(&mut self) -> SEC27_W<'_>[src]

Bit 27 - Security enable on event input x

pub fn sec28(&mut self) -> SEC28_W<'_>[src]

Bit 28 - Security enable on event input x

pub fn sec29(&mut self) -> SEC29_W<'_>[src]

Bit 29 - Security enable on event input x

pub fn sec30(&mut self) -> SEC30_W<'_>[src]

Bit 30 - Security enable on event input x

pub fn sec31(&mut self) -> SEC31_W<'_>[src]

Bit 31 - Security enable on event input x

impl W<u32, Reg<u32, _PRIVCFGR1>>[src]

pub fn priv0(&mut self) -> PRIV0_W<'_>[src]

Bit 0 - Security enable on event input x

pub fn priv1(&mut self) -> PRIV1_W<'_>[src]

Bit 1 - Security enable on event input x

pub fn priv2(&mut self) -> PRIV2_W<'_>[src]

Bit 2 - Security enable on event input x

pub fn priv3(&mut self) -> PRIV3_W<'_>[src]

Bit 3 - Security enable on event input x

pub fn priv4(&mut self) -> PRIV4_W<'_>[src]

Bit 4 - Security enable on event input x

pub fn priv5(&mut self) -> PRIV5_W<'_>[src]

Bit 5 - Security enable on event input x

pub fn priv6(&mut self) -> PRIV6_W<'_>[src]

Bit 6 - Security enable on event input x

pub fn priv7(&mut self) -> PRIV7_W<'_>[src]

Bit 7 - Security enable on event input x

pub fn priv8(&mut self) -> PRIV8_W<'_>[src]

Bit 8 - Security enable on event input x

pub fn priv9(&mut self) -> PRIV9_W<'_>[src]

Bit 9 - Security enable on event input x

pub fn priv10(&mut self) -> PRIV10_W<'_>[src]

Bit 10 - Security enable on event input x

pub fn priv11(&mut self) -> PRIV11_W<'_>[src]

Bit 11 - Security enable on event input x

pub fn priv12(&mut self) -> PRIV12_W<'_>[src]

Bit 12 - Security enable on event input x

pub fn priv13(&mut self) -> PRIV13_W<'_>[src]

Bit 13 - Security enable on event input x

pub fn priv14(&mut self) -> PRIV14_W<'_>[src]

Bit 14 - Security enable on event input x

pub fn priv15(&mut self) -> PRIV15_W<'_>[src]

Bit 15 - Security enable on event input x

pub fn priv16(&mut self) -> PRIV16_W<'_>[src]

Bit 16 - Security enable on event input x

pub fn priv17(&mut self) -> PRIV17_W<'_>[src]

Bit 17 - Security enable on event input x

pub fn priv18(&mut self) -> PRIV18_W<'_>[src]

Bit 18 - Security enable on event input x

pub fn priv19(&mut self) -> PRIV19_W<'_>[src]

Bit 19 - Security enable on event input x

pub fn priv20(&mut self) -> PRIV20_W<'_>[src]

Bit 20 - Security enable on event input x

pub fn priv21(&mut self) -> PRIV21_W<'_>[src]

Bit 21 - Security enable on event input x

pub fn priv22(&mut self) -> PRIV22_W<'_>[src]

Bit 22 - Security enable on event input x

pub fn priv23(&mut self) -> PRIV23_W<'_>[src]

Bit 23 - Security enable on event input x

pub fn priv24(&mut self) -> PRIV24_W<'_>[src]

Bit 24 - Security enable on event input x

pub fn priv25(&mut self) -> PRIV25_W<'_>[src]

Bit 25 - Security enable on event input x

pub fn priv26(&mut self) -> PRIV26_W<'_>[src]

Bit 26 - Security enable on event input x

pub fn priv27(&mut self) -> PRIV27_W<'_>[src]

Bit 27 - Security enable on event input x

pub fn priv28(&mut self) -> PRIV28_W<'_>[src]

Bit 28 - Security enable on event input x

pub fn priv29(&mut self) -> PRIV29_W<'_>[src]

Bit 29 - Security enable on event input x

pub fn priv30(&mut self) -> PRIV30_W<'_>[src]

Bit 30 - Security enable on event input x

pub fn priv31(&mut self) -> PRIV31_W<'_>[src]

Bit 31 - Security enable on event input x

impl W<u32, Reg<u32, _RTSR2>>[src]

pub fn rt35(&mut self) -> RT35_W<'_>[src]

Bit 3 - Rising trigger event configuration bit of configurable event input x

pub fn rt36(&mut self) -> RT36_W<'_>[src]

Bit 4 - Rising trigger event configuration bit of configurable event input x

pub fn rt37(&mut self) -> RT37_W<'_>[src]

Bit 5 - Rising trigger event configuration bit of configurable event input x

pub fn rt38(&mut self) -> RT38_W<'_>[src]

Bit 6 - Rising trigger event configuration bit of configurable event input x

impl W<u32, Reg<u32, _FTSR2>>[src]

pub fn ft35(&mut self) -> FT35_W<'_>[src]

Bit 3 - FT35

pub fn ft36(&mut self) -> FT36_W<'_>[src]

Bit 4 - FT36

pub fn ft37(&mut self) -> FT37_W<'_>[src]

Bit 5 - FT37

pub fn ft38(&mut self) -> FT38_W<'_>[src]

Bit 6 - FT38

impl W<u32, Reg<u32, _SWIER2>>[src]

pub fn swi35(&mut self) -> SWI35_W<'_>[src]

Bit 3 - SWI35

pub fn swi36(&mut self) -> SWI36_W<'_>[src]

Bit 4 - SWI36

pub fn swi37(&mut self) -> SWI37_W<'_>[src]

Bit 5 - SWI37

pub fn swi38(&mut self) -> SWI38_W<'_>[src]

Bit 6 - SWI38

impl W<u32, Reg<u32, _RPR2>>[src]

pub fn rpif35(&mut self) -> RPIF35_W<'_>[src]

Bit 3 - RPIF35

pub fn rpif36(&mut self) -> RPIF36_W<'_>[src]

Bit 4 - RPIF36

pub fn rpif37(&mut self) -> RPIF37_W<'_>[src]

Bit 5 - RPIF37

pub fn rpif38(&mut self) -> RPIF38_W<'_>[src]

Bit 6 - RPIF38

impl W<u32, Reg<u32, _FPR2>>[src]

pub fn fpif35(&mut self) -> FPIF35_W<'_>[src]

Bit 3 - FPIF35

pub fn fpif36(&mut self) -> FPIF36_W<'_>[src]

Bit 4 - FPIF36

pub fn fpif37(&mut self) -> FPIF37_W<'_>[src]

Bit 5 - FPIF37

pub fn fpif38(&mut self) -> FPIF38_W<'_>[src]

Bit 6 - FPIF38

impl W<u32, Reg<u32, _SECCFGR2>>[src]

pub fn sec32(&mut self) -> SEC32_W<'_>[src]

Bit 0 - SEC32

pub fn sec33(&mut self) -> SEC33_W<'_>[src]

Bit 1 - SEC33

pub fn sec34(&mut self) -> SEC34_W<'_>[src]

Bit 2 - SEC34

pub fn sec35(&mut self) -> SEC35_W<'_>[src]

Bit 3 - SEC35

pub fn sec36(&mut self) -> SEC36_W<'_>[src]

Bit 4 - SEC36

pub fn sec37(&mut self) -> SEC37_W<'_>[src]

Bit 5 - SEC37

pub fn sec38(&mut self) -> SEC38_W<'_>[src]

Bit 6 - SEC38

pub fn sec39(&mut self) -> SEC39_W<'_>[src]

Bit 7 - SEC39

pub fn sec40(&mut self) -> SEC40_W<'_>[src]

Bit 8 - SEC40

pub fn sec41(&mut self) -> SEC41_W<'_>[src]

Bit 9 - SEC41

pub fn sec42(&mut self) -> SEC42_W<'_>[src]

Bit 10 - SEC42

impl W<u32, Reg<u32, _PRIVCFGR2>>[src]

pub fn priv32(&mut self) -> PRIV32_W<'_>[src]

Bit 0 - PRIV32

pub fn priv33(&mut self) -> PRIV33_W<'_>[src]

Bit 1 - PRIV33

pub fn priv34(&mut self) -> PRIV34_W<'_>[src]

Bit 2 - PRIV34

pub fn priv35(&mut self) -> PRIV35_W<'_>[src]

Bit 3 - PRIV35

pub fn priv36(&mut self) -> PRIV36_W<'_>[src]

Bit 4 - PRIV36

pub fn priv37(&mut self) -> PRIV37_W<'_>[src]

Bit 5 - PRIV37

pub fn priv38(&mut self) -> PRIV38_W<'_>[src]

Bit 6 - PRIV38

pub fn priv39(&mut self) -> PRIV39_W<'_>[src]

Bit 7 - PRIV39

pub fn priv40(&mut self) -> PRIV40_W<'_>[src]

Bit 8 - PRIV40

pub fn priv41(&mut self) -> PRIV41_W<'_>[src]

Bit 9 - PRIV41

pub fn priv42(&mut self) -> PRIV42_W<'_>[src]

Bit 10 - PRIV42

impl W<u32, Reg<u32, _EXTICR1>>[src]

pub fn exti0_7(&mut self) -> EXTI0_7_W<'_>[src]

Bits 0:7 - EXTIm GPIO port selection

pub fn exti8_15(&mut self) -> EXTI8_15_W<'_>[src]

Bits 8:15 - EXTIm+1 GPIO port selection

pub fn exti16_23(&mut self) -> EXTI16_23_W<'_>[src]

Bits 16:23 - EXTIm+2 GPIO port selection

pub fn exti24_31(&mut self) -> EXTI24_31_W<'_>[src]

Bits 24:31 - EXTIm+3 GPIO port selection

impl W<u32, Reg<u32, _EXTICR2>>[src]

pub fn exti0_7(&mut self) -> EXTI0_7_W<'_>[src]

Bits 0:7 - EXTIm GPIO port selection

pub fn exti8_15(&mut self) -> EXTI8_15_W<'_>[src]

Bits 8:15 - EXTIm+1 GPIO port selection

pub fn exti16_23(&mut self) -> EXTI16_23_W<'_>[src]

Bits 16:23 - EXTIm+2 GPIO port selection

pub fn exti24_31(&mut self) -> EXTI24_31_W<'_>[src]

Bits 24:31 - EXTIm+3 GPIO port selection

impl W<u32, Reg<u32, _EXTICR3>>[src]

pub fn exti0_7(&mut self) -> EXTI0_7_W<'_>[src]

Bits 0:7 - EXTIm GPIO port selection

pub fn exti8_15(&mut self) -> EXTI8_15_W<'_>[src]

Bits 8:15 - EXTIm+1 GPIO port selection

pub fn exti16_23(&mut self) -> EXTI16_23_W<'_>[src]

Bits 16:23 - EXTIm+2 GPIO port selection

pub fn exti24_31(&mut self) -> EXTI24_31_W<'_>[src]

Bits 24:31 - EXTIm+3 GPIO port selection

impl W<u32, Reg<u32, _EXTICR4>>[src]

pub fn exti0_7(&mut self) -> EXTI0_7_W<'_>[src]

Bits 0:7 - EXTIm GPIO port selection

pub fn exti8_15(&mut self) -> EXTI8_15_W<'_>[src]

Bits 8:15 - EXTIm+1 GPIO port selection

pub fn exti16_23(&mut self) -> EXTI16_23_W<'_>[src]

Bits 16:23 - EXTIm+2 GPIO port selection

pub fn exti24_31(&mut self) -> EXTI24_31_W<'_>[src]

Bits 24:31 - EXTIm+3 GPIO port selection

impl W<u32, Reg<u32, _LOCKRG>>[src]

pub fn lock(&mut self) -> LOCK_W<'_>[src]

Bit 0 - LOCK

impl W<u32, Reg<u32, _IMR1>>[src]

pub fn im0(&mut self) -> IM0_W<'_>[src]

Bit 0 - CPU wakeup with interrupt mask on event input

pub fn im1(&mut self) -> IM1_W<'_>[src]

Bit 1 - CPU wakeup with interrupt mask on event input

pub fn im2(&mut self) -> IM2_W<'_>[src]

Bit 2 - CPU wakeup with interrupt mask on event input

pub fn im3(&mut self) -> IM3_W<'_>[src]

Bit 3 - CPU wakeup with interrupt mask on event input

pub fn im4(&mut self) -> IM4_W<'_>[src]

Bit 4 - CPU wakeup with interrupt mask on event input

pub fn im5(&mut self) -> IM5_W<'_>[src]

Bit 5 - CPU wakeup with interrupt mask on event input

pub fn im6(&mut self) -> IM6_W<'_>[src]

Bit 6 - CPU wakeup with interrupt mask on event input

pub fn im7(&mut self) -> IM7_W<'_>[src]

Bit 7 - CPU wakeup with interrupt mask on event input

pub fn im8(&mut self) -> IM8_W<'_>[src]

Bit 8 - CPU wakeup with interrupt mask on event input

pub fn im9(&mut self) -> IM9_W<'_>[src]

Bit 9 - CPU wakeup with interrupt mask on event input

pub fn im10(&mut self) -> IM10_W<'_>[src]

Bit 10 - CPU wakeup with interrupt mask on event input

pub fn im11(&mut self) -> IM11_W<'_>[src]

Bit 11 - CPU wakeup with interrupt mask on event input

pub fn im12(&mut self) -> IM12_W<'_>[src]

Bit 12 - CPU wakeup with interrupt mask on event input

pub fn im13(&mut self) -> IM13_W<'_>[src]

Bit 13 - CPU wakeup with interrupt mask on event input

pub fn im14(&mut self) -> IM14_W<'_>[src]

Bit 14 - CPU wakeup with interrupt mask on event input

pub fn im15(&mut self) -> IM15_W<'_>[src]

Bit 15 - CPU wakeup with interrupt mask on event input

pub fn im16(&mut self) -> IM16_W<'_>[src]

Bit 16 - CPU wakeup with interrupt mask on event input

pub fn im17(&mut self) -> IM17_W<'_>[src]

Bit 17 - CPU wakeup with interrupt mask on event input

pub fn im18(&mut self) -> IM18_W<'_>[src]

Bit 18 - CPU wakeup with interrupt mask on event input

pub fn im19(&mut self) -> IM19_W<'_>[src]

Bit 19 - CPU wakeup with interrupt mask on event input

pub fn im20(&mut self) -> IM20_W<'_>[src]

Bit 20 - CPU wakeup with interrupt mask on event input

pub fn im21(&mut self) -> IM21_W<'_>[src]

Bit 21 - CPU wakeup with interrupt mask on event input

pub fn im22(&mut self) -> IM22_W<'_>[src]

Bit 22 - CPU wakeup with interrupt mask on event input

pub fn im23(&mut self) -> IM23_W<'_>[src]

Bit 23 - CPU wakeup with interrupt mask on event input

pub fn im24(&mut self) -> IM24_W<'_>[src]

Bit 24 - CPU wakeup with interrupt mask on event input

pub fn im25(&mut self) -> IM25_W<'_>[src]

Bit 25 - CPU wakeup with interrupt mask on event input

pub fn im26(&mut self) -> IM26_W<'_>[src]

Bit 26 - CPU wakeup with interrupt mask on event input

pub fn im27(&mut self) -> IM27_W<'_>[src]

Bit 27 - CPU wakeup with interrupt mask on event input

pub fn im28(&mut self) -> IM28_W<'_>[src]

Bit 28 - CPU wakeup with interrupt mask on event input

pub fn im29(&mut self) -> IM29_W<'_>[src]

Bit 29 - CPU wakeup with interrupt mask on event input

pub fn im30(&mut self) -> IM30_W<'_>[src]

Bit 30 - CPU wakeup with interrupt mask on event input

pub fn im31(&mut self) -> IM31_W<'_>[src]

Bit 31 - CPU wakeup with interrupt mask on event input

impl W<u32, Reg<u32, _EMR1>>[src]

pub fn em0(&mut self) -> EM0_W<'_>[src]

Bit 0 - CPU wakeup with interrupt mask on event input

pub fn em1(&mut self) -> EM1_W<'_>[src]

Bit 1 - CPU wakeup with interrupt mask on event input

pub fn em2(&mut self) -> EM2_W<'_>[src]

Bit 2 - CPU wakeup with interrupt mask on event input

pub fn em3(&mut self) -> EM3_W<'_>[src]

Bit 3 - CPU wakeup with interrupt mask on event input

pub fn em4(&mut self) -> EM4_W<'_>[src]

Bit 4 - CPU wakeup with interrupt mask on event input

pub fn em5(&mut self) -> EM5_W<'_>[src]

Bit 5 - CPU wakeup with interrupt mask on event input

pub fn em6(&mut self) -> EM6_W<'_>[src]

Bit 6 - CPU wakeup with interrupt mask on event input

pub fn em7(&mut self) -> EM7_W<'_>[src]

Bit 7 - CPU wakeup with interrupt mask on event input

pub fn em8(&mut self) -> EM8_W<'_>[src]

Bit 8 - CPU wakeup with interrupt mask on event input

pub fn em9(&mut self) -> EM9_W<'_>[src]

Bit 9 - CPU wakeup with interrupt mask on event input

pub fn em10(&mut self) -> EM10_W<'_>[src]

Bit 10 - CPU wakeup with interrupt mask on event input

pub fn em11(&mut self) -> EM11_W<'_>[src]

Bit 11 - CPU wakeup with interrupt mask on event input

pub fn em12(&mut self) -> EM12_W<'_>[src]

Bit 12 - CPU wakeup with interrupt mask on event input

pub fn em13(&mut self) -> EM13_W<'_>[src]

Bit 13 - CPU wakeup with interrupt mask on event input

pub fn em14(&mut self) -> EM14_W<'_>[src]

Bit 14 - CPU wakeup with interrupt mask on event input

pub fn em15(&mut self) -> EM15_W<'_>[src]

Bit 15 - CPU wakeup with interrupt mask on event input

pub fn em16(&mut self) -> EM16_W<'_>[src]

Bit 16 - CPU wakeup with interrupt mask on event input

pub fn em17(&mut self) -> EM17_W<'_>[src]

Bit 17 - CPU wakeup with interrupt mask on event input

pub fn em18(&mut self) -> EM18_W<'_>[src]

Bit 18 - CPU wakeup with interrupt mask on event input

pub fn em19(&mut self) -> EM19_W<'_>[src]

Bit 19 - CPU wakeup with interrupt mask on event input

pub fn em20(&mut self) -> EM20_W<'_>[src]

Bit 20 - CPU wakeup with interrupt mask on event input

pub fn em21(&mut self) -> EM21_W<'_>[src]

Bit 21 - CPU wakeup with interrupt mask on event input

pub fn em22(&mut self) -> EM22_W<'_>[src]

Bit 22 - CPU wakeup with interrupt mask on event input

pub fn em23(&mut self) -> EM23_W<'_>[src]

Bit 23 - CPU wakeup with interrupt mask on event input

pub fn em24(&mut self) -> EM24_W<'_>[src]

Bit 24 - CPU wakeup with interrupt mask on event input

pub fn em25(&mut self) -> EM25_W<'_>[src]

Bit 25 - CPU wakeup with interrupt mask on event input

pub fn em26(&mut self) -> EM26_W<'_>[src]

Bit 26 - CPU wakeup with interrupt mask on event input

pub fn em27(&mut self) -> EM27_W<'_>[src]

Bit 27 - CPU wakeup with interrupt mask on event input

pub fn em28(&mut self) -> EM28_W<'_>[src]

Bit 28 - CPU wakeup with interrupt mask on event input

pub fn em29(&mut self) -> EM29_W<'_>[src]

Bit 29 - CPU wakeup with interrupt mask on event input

pub fn em30(&mut self) -> EM30_W<'_>[src]

Bit 30 - CPU wakeup with interrupt mask on event input

pub fn em31(&mut self) -> EM31_W<'_>[src]

Bit 31 - CPU wakeup with interrupt mask on event input

impl W<u32, Reg<u32, _IMR2>>[src]

pub fn im32(&mut self) -> IM32_W<'_>[src]

Bit 0 - CPU wakeup with interrupt mask on event input

pub fn im33(&mut self) -> IM33_W<'_>[src]

Bit 1 - CPU wakeup with interrupt mask on event input

pub fn im34(&mut self) -> IM34_W<'_>[src]

Bit 2 - CPU wakeup with interrupt mask on event input

pub fn im35(&mut self) -> IM35_W<'_>[src]

Bit 3 - CPU wakeup with interrupt mask on event input

pub fn im36(&mut self) -> IM36_W<'_>[src]

Bit 4 - CPU wakeup with interrupt mask on event input

pub fn im37(&mut self) -> IM37_W<'_>[src]

Bit 5 - CPU wakeup with interrupt mask on event input

pub fn im38(&mut self) -> IM38_W<'_>[src]

Bit 6 - CPU wakeup with interrupt mask on event input

pub fn im40(&mut self) -> IM40_W<'_>[src]

Bit 8 - CPU wakeup with interrupt mask on event input

pub fn im41(&mut self) -> IM41_W<'_>[src]

Bit 9 - CPU wakeup with interrupt mask on event input

pub fn im42(&mut self) -> IM42_W<'_>[src]

Bit 10 - CPU wakeup with interrupt mask on event input

impl W<u32, Reg<u32, _EMR2>>[src]

pub fn em32(&mut self) -> EM32_W<'_>[src]

Bit 0 - CPU wakeup with interrupt mask on event input

pub fn em33(&mut self) -> EM33_W<'_>[src]

Bit 1 - CPU wakeup with interrupt mask on event input

pub fn em34(&mut self) -> EM34_W<'_>[src]

Bit 2 - CPU wakeup with interrupt mask on event input

pub fn em35(&mut self) -> EM35_W<'_>[src]

Bit 3 - CPU wakeup with interrupt mask on event input

pub fn em36(&mut self) -> EM36_W<'_>[src]

Bit 4 - CPU wakeup with interrupt mask on event input

pub fn em37(&mut self) -> EM37_W<'_>[src]

Bit 5 - CPU wakeup with interrupt mask on event input

pub fn em38(&mut self) -> EM38_W<'_>[src]

Bit 6 - CPU wakeup with interrupt mask on event input

pub fn em40(&mut self) -> EM40_W<'_>[src]

Bit 8 - CPU wakeup with interrupt mask on event input

pub fn em41(&mut self) -> EM41_W<'_>[src]

Bit 9 - CPU wakeup with interrupt mask on event input

pub fn em42(&mut self) -> EM42_W<'_>[src]

Bit 10 - CPU wakeup with interrupt mask on event input

impl W<u32, Reg<u32, _ACR>>[src]

pub fn latency(&mut self) -> LATENCY_W<'_>[src]

Bits 0:3 - Latency

pub fn run_pd(&mut self) -> RUN_PD_W<'_>[src]

Bit 13 - Flash Power-down mode during Low-power run mode

pub fn sleep_pd(&mut self) -> SLEEP_PD_W<'_>[src]

Bit 14 - Flash Power-down mode during Low-power sleep mode

pub fn lven(&mut self) -> LVEN_W<'_>[src]

Bit 15 - LVEN

impl W<u32, Reg<u32, _PDKEYR>>[src]

pub fn pdkeyr(&mut self) -> PDKEYR_W<'_>[src]

Bits 0:31 - RUN_PD in FLASH_ACR key

impl W<u32, Reg<u32, _NSKEYR>>[src]

pub fn nskeyr(&mut self) -> NSKEYR_W<'_>[src]

Bits 0:31 - NSKEYR

impl W<u32, Reg<u32, _SECKEYR>>[src]

pub fn seckeyr(&mut self) -> SECKEYR_W<'_>[src]

Bits 0:31 - SECKEYR

impl W<u32, Reg<u32, _OPTKEYR>>[src]

pub fn optkeyr(&mut self) -> OPTKEYR_W<'_>[src]

Bits 0:31 - OPTKEYR

impl W<u32, Reg<u32, _LVEKEYR>>[src]

pub fn lvekeyr(&mut self) -> LVEKEYR_W<'_>[src]

Bits 0:31 - LVEKEYR

impl W<u32, Reg<u32, _NSSR>>[src]

pub fn nseop(&mut self) -> NSEOP_W<'_>[src]

Bit 0 - NSEOP

pub fn nsoperr(&mut self) -> NSOPERR_W<'_>[src]

Bit 1 - NSOPERR

pub fn nsprogerr(&mut self) -> NSPROGERR_W<'_>[src]

Bit 3 - NSPROGERR

pub fn nswrperr(&mut self) -> NSWRPERR_W<'_>[src]

Bit 4 - NSWRPERR

pub fn nspgaerr(&mut self) -> NSPGAERR_W<'_>[src]

Bit 5 - NSPGAERR

pub fn nssizerr(&mut self) -> NSSIZERR_W<'_>[src]

Bit 6 - NSSIZERR

pub fn nspgserr(&mut self) -> NSPGSERR_W<'_>[src]

Bit 7 - NSPGSERR

pub fn optwerr(&mut self) -> OPTWERR_W<'_>[src]

Bit 13 - OPTWERR

pub fn optverr(&mut self) -> OPTVERR_W<'_>[src]

Bit 15 - OPTVERR

impl W<u32, Reg<u32, _SECSR>>[src]

pub fn seceop(&mut self) -> SECEOP_W<'_>[src]

Bit 0 - SECEOP

pub fn secoperr(&mut self) -> SECOPERR_W<'_>[src]

Bit 1 - SECOPERR

pub fn secprogerr(&mut self) -> SECPROGERR_W<'_>[src]

Bit 3 - SECPROGERR

pub fn secwrperr(&mut self) -> SECWRPERR_W<'_>[src]

Bit 4 - SECWRPERR

pub fn secpgaerr(&mut self) -> SECPGAERR_W<'_>[src]

Bit 5 - SECPGAERR

pub fn secsizerr(&mut self) -> SECSIZERR_W<'_>[src]

Bit 6 - SECSIZERR

pub fn secpgserr(&mut self) -> SECPGSERR_W<'_>[src]

Bit 7 - SECPGSERR

pub fn secrderr(&mut self) -> SECRDERR_W<'_>[src]

Bit 14 - Secure read protection error

impl W<u32, Reg<u32, _NSCR>>[src]

pub fn nspg(&mut self) -> NSPG_W<'_>[src]

Bit 0 - NSPG

pub fn nsper(&mut self) -> NSPER_W<'_>[src]

Bit 1 - NSPER

pub fn nsmer1(&mut self) -> NSMER1_W<'_>[src]

Bit 2 - NSMER1

pub fn nspnb(&mut self) -> NSPNB_W<'_>[src]

Bits 3:9 - NSPNB

pub fn nsbker(&mut self) -> NSBKER_W<'_>[src]

Bit 11 - NSBKER

pub fn nsmer2(&mut self) -> NSMER2_W<'_>[src]

Bit 15 - NSMER2

pub fn nsstrt(&mut self) -> NSSTRT_W<'_>[src]

Bit 16 - Options modification start

pub fn optstrt(&mut self) -> OPTSTRT_W<'_>[src]

Bit 17 - Options modification start

pub fn nseopie(&mut self) -> NSEOPIE_W<'_>[src]

Bit 24 - NSEOPIE

pub fn nserrie(&mut self) -> NSERRIE_W<'_>[src]

Bit 25 - NSERRIE

pub fn obl_launch(&mut self) -> OBL_LAUNCH_W<'_>[src]

Bit 27 - Force the option byte loading

pub fn optlock(&mut self) -> OPTLOCK_W<'_>[src]

Bit 30 - Options Lock

pub fn nslock(&mut self) -> NSLOCK_W<'_>[src]

Bit 31 - NSLOCK

impl W<u32, Reg<u32, _SECCR>>[src]

pub fn secpg(&mut self) -> SECPG_W<'_>[src]

Bit 0 - SECPG

pub fn secper(&mut self) -> SECPER_W<'_>[src]

Bit 1 - SECPER

pub fn secmer1(&mut self) -> SECMER1_W<'_>[src]

Bit 2 - SECMER1

pub fn secpnb(&mut self) -> SECPNB_W<'_>[src]

Bits 3:9 - SECPNB

pub fn secbker(&mut self) -> SECBKER_W<'_>[src]

Bit 11 - SECBKER

pub fn secmer2(&mut self) -> SECMER2_W<'_>[src]

Bit 15 - SECMER2

pub fn secstrt(&mut self) -> SECSTRT_W<'_>[src]

Bit 16 - SECSTRT

pub fn seceopie(&mut self) -> SECEOPIE_W<'_>[src]

Bit 24 - SECEOPIE

pub fn secerrie(&mut self) -> SECERRIE_W<'_>[src]

Bit 25 - SECERRIE

pub fn secrderrie(&mut self) -> SECRDERRIE_W<'_>[src]

Bit 26 - SECRDERRIE

pub fn secinv(&mut self) -> SECINV_W<'_>[src]

Bit 29 - SECINV

pub fn seclock(&mut self) -> SECLOCK_W<'_>[src]

Bit 31 - SECLOCK

impl W<u32, Reg<u32, _ECCR>>[src]

pub fn eccie(&mut self) -> ECCIE_W<'_>[src]

Bit 24 - ECC correction interrupt enable

pub fn eccc2(&mut self) -> ECCC2_W<'_>[src]

Bit 28 - ECCC2

pub fn eccd2(&mut self) -> ECCD2_W<'_>[src]

Bit 29 - ECCD2

pub fn eccc(&mut self) -> ECCC_W<'_>[src]

Bit 30 - ECC correction

pub fn eccd(&mut self) -> ECCD_W<'_>[src]

Bit 31 - ECC detection

impl W<u32, Reg<u32, _OPTR>>[src]

pub fn rdp(&mut self) -> RDP_W<'_>[src]

Bits 0:7 - Read protection level

pub fn bor_lev(&mut self) -> BOR_LEV_W<'_>[src]

Bits 8:10 - BOR reset Level

pub fn n_rst_stop(&mut self) -> NRST_STOP_W<'_>[src]

Bit 12 - nRST_STOP

pub fn n_rst_stdby(&mut self) -> NRST_STDBY_W<'_>[src]

Bit 13 - nRST_STDBY

pub fn n_rst_shdw(&mut self) -> NRST_SHDW_W<'_>[src]

Bit 14 - nRST_SHDW

pub fn iwdg_sw(&mut self) -> IWDG_SW_W<'_>[src]

Bit 16 - Independent watchdog selection

pub fn iwdg_stop(&mut self) -> IWDG_STOP_W<'_>[src]

Bit 17 - Independent watchdog counter freeze in Stop mode

pub fn iwdg_stdby(&mut self) -> IWDG_STDBY_W<'_>[src]

Bit 18 - Independent watchdog counter freeze in Standby mode

pub fn wwdg_sw(&mut self) -> WWDG_SW_W<'_>[src]

Bit 19 - Window watchdog selection

pub fn swap_bank(&mut self) -> SWAP_BANK_W<'_>[src]

Bit 20 - SWAP_BANK

pub fn db256k(&mut self) -> DB256K_W<'_>[src]

Bit 21 - DB256K

pub fn dbank(&mut self) -> DBANK_W<'_>[src]

Bit 22 - DBANK

pub fn sram2_pe(&mut self) -> SRAM2_PE_W<'_>[src]

Bit 24 - SRAM2 parity check enable

pub fn sram2_rst(&mut self) -> SRAM2_RST_W<'_>[src]

Bit 25 - SRAM2 Erase when system reset

pub fn n_swboot0(&mut self) -> NSWBOOT0_W<'_>[src]

Bit 26 - nSWBOOT0

pub fn n_boot0(&mut self) -> NBOOT0_W<'_>[src]

Bit 27 - nBOOT0

pub fn pa15_pupen(&mut self) -> PA15_PUPEN_W<'_>[src]

Bit 28 - PA15_PUPEN

pub fn tzen(&mut self) -> TZEN_W<'_>[src]

Bit 31 - TZEN

impl W<u32, Reg<u32, _NSBOOTADD0R>>[src]

pub fn nsbootadd0(&mut self) -> NSBOOTADD0_W<'_>[src]

Bits 7:31 - NSBOOTADD0

impl W<u32, Reg<u32, _NSBOOTADD1R>>[src]

pub fn nsbootadd1(&mut self) -> NSBOOTADD1_W<'_>[src]

Bits 7:31 - NSBOOTADD1

impl W<u32, Reg<u32, _SECBOOTADD0R>>[src]

pub fn boot_lock(&mut self) -> BOOT_LOCK_W<'_>[src]

Bit 0 - BOOT_LOCK

pub fn secbootadd0(&mut self) -> SECBOOTADD0_W<'_>[src]

Bits 7:31 - SECBOOTADD0

impl W<u32, Reg<u32, _SECWM1R1>>[src]

pub fn secwm1_pstrt(&mut self) -> SECWM1_PSTRT_W<'_>[src]

Bits 0:6 - SECWM1_PSTRT

pub fn secwm1_pend(&mut self) -> SECWM1_PEND_W<'_>[src]

Bits 16:22 - SECWM1_PEND

impl W<u32, Reg<u32, _SECWM1R2>>[src]

pub fn pcrop1_pstrt(&mut self) -> PCROP1_PSTRT_W<'_>[src]

Bits 0:6 - PCROP1_PSTRT

pub fn pcrop1en(&mut self) -> PCROP1EN_W<'_>[src]

Bit 15 - PCROP1EN

pub fn hdp1_pend(&mut self) -> HDP1_PEND_W<'_>[src]

Bits 16:22 - HDP1_PEND

pub fn hdp1en(&mut self) -> HDP1EN_W<'_>[src]

Bit 31 - HDP1EN

impl W<u32, Reg<u32, _WRP1AR>>[src]

pub fn wrp1a_pstrt(&mut self) -> WRP1A_PSTRT_W<'_>[src]

Bits 0:6 - WRP1A_PSTRT

pub fn wrp1a_pend(&mut self) -> WRP1A_PEND_W<'_>[src]

Bits 16:22 - WRP1A_PEND

impl W<u32, Reg<u32, _WRP1BR>>[src]

pub fn wrp1b_pstrt(&mut self) -> WRP1B_PSTRT_W<'_>[src]

Bits 0:6 - WRP1B_PSTRT

pub fn wrp1b_pend(&mut self) -> WRP1B_PEND_W<'_>[src]

Bits 16:22 - WRP1B_PEND

impl W<u32, Reg<u32, _SECWM2R1>>[src]

pub fn secwm2_pstrt(&mut self) -> SECWM2_PSTRT_W<'_>[src]

Bits 0:6 - SECWM2_PSTRT

pub fn secwm2_pend(&mut self) -> SECWM2_PEND_W<'_>[src]

Bits 16:22 - SECWM2_PEND

impl W<u32, Reg<u32, _SECWM2R2>>[src]

pub fn pcrop2_pstrt(&mut self) -> PCROP2_PSTRT_W<'_>[src]

Bits 0:6 - PCROP2_PSTRT

pub fn pcrop2en(&mut self) -> PCROP2EN_W<'_>[src]

Bit 15 - PCROP2EN

pub fn hdp2_pend(&mut self) -> HDP2_PEND_W<'_>[src]

Bits 16:22 - HDP2_PEND

pub fn hdp2en(&mut self) -> HDP2EN_W<'_>[src]

Bit 31 - HDP2EN

impl W<u32, Reg<u32, _WRP2AR>>[src]

pub fn wrp2a_pstrt(&mut self) -> WRP2A_PSTRT_W<'_>[src]

Bits 0:6 - WRP2A_PSTRT

pub fn wrp2a_pend(&mut self) -> WRP2A_PEND_W<'_>[src]

Bits 16:22 - WRP2A_PEND

impl W<u32, Reg<u32, _WRP2BR>>[src]

pub fn wrp2b_pstrt(&mut self) -> WRP2B_PSTRT_W<'_>[src]

Bits 0:6 - WRP2B_PSTRT

pub fn wrp2b_pend(&mut self) -> WRP2B_PEND_W<'_>[src]

Bits 16:22 - WRP2B_PEND

impl W<u32, Reg<u32, _SECBB1R1>>[src]

pub fn secbb1(&mut self) -> SECBB1_W<'_>[src]

Bits 0:31 - SECBB1

impl W<u32, Reg<u32, _SECBB1R2>>[src]

pub fn secbb1(&mut self) -> SECBB1_W<'_>[src]

Bits 0:31 - SECBB1

impl W<u32, Reg<u32, _SECBB1R3>>[src]

pub fn secbb1(&mut self) -> SECBB1_W<'_>[src]

Bits 0:31 - SECBB1

impl W<u32, Reg<u32, _SECBB1R4>>[src]

pub fn secbb1(&mut self) -> SECBB1_W<'_>[src]

Bits 0:31 - SECBB1

impl W<u32, Reg<u32, _SECBB2R1>>[src]

pub fn secbb2(&mut self) -> SECBB2_W<'_>[src]

Bits 0:31 - SECBB2

impl W<u32, Reg<u32, _SECBB2R2>>[src]

pub fn secbb2(&mut self) -> SECBB2_W<'_>[src]

Bits 0:31 - SECBB2

impl W<u32, Reg<u32, _SECBB2R3>>[src]

pub fn secbb2(&mut self) -> SECBB2_W<'_>[src]

Bits 0:31 - SECBB2

impl W<u32, Reg<u32, _SECBB2R4>>[src]

pub fn secbb2(&mut self) -> SECBB2_W<'_>[src]

Bits 0:31 - SECBB2

impl W<u32, Reg<u32, _SECHDPCR>>[src]

pub fn hdp1_accdis(&mut self) -> HDP1_ACCDIS_W<'_>[src]

Bit 0 - HDP1_ACCDIS

pub fn hdp2_accdis(&mut self) -> HDP2_ACCDIS_W<'_>[src]

Bit 1 - HDP2_ACCDIS

impl W<u32, Reg<u32, _PRIVCFGR>>[src]

pub fn priv_(&mut self) -> PRIV_W<'_>[src]

Bit 0 - PRIV

impl W<u32, Reg<u32, _MODER>>[src]

pub fn moder15(&mut self) -> MODER15_W<'_>[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn moder14(&mut self) -> MODER14_W<'_>[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn moder13(&mut self) -> MODER13_W<'_>[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn moder12(&mut self) -> MODER12_W<'_>[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn moder11(&mut self) -> MODER11_W<'_>[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn moder10(&mut self) -> MODER10_W<'_>[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn moder9(&mut self) -> MODER9_W<'_>[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn moder8(&mut self) -> MODER8_W<'_>[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn moder7(&mut self) -> MODER7_W<'_>[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn moder6(&mut self) -> MODER6_W<'_>[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn moder5(&mut self) -> MODER5_W<'_>[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn moder4(&mut self) -> MODER4_W<'_>[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn moder3(&mut self) -> MODER3_W<'_>[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn moder2(&mut self) -> MODER2_W<'_>[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn moder1(&mut self) -> MODER1_W<'_>[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn moder0(&mut self) -> MODER0_W<'_>[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _OTYPER>>[src]

pub fn ot15(&mut self) -> OT15_W<'_>[src]

Bit 15 - Port x configuration bits (y = 0..15)

pub fn ot14(&mut self) -> OT14_W<'_>[src]

Bit 14 - Port x configuration bits (y = 0..15)

pub fn ot13(&mut self) -> OT13_W<'_>[src]

Bit 13 - Port x configuration bits (y = 0..15)

pub fn ot12(&mut self) -> OT12_W<'_>[src]

Bit 12 - Port x configuration bits (y = 0..15)

pub fn ot11(&mut self) -> OT11_W<'_>[src]

Bit 11 - Port x configuration bits (y = 0..15)

pub fn ot10(&mut self) -> OT10_W<'_>[src]

Bit 10 - Port x configuration bits (y = 0..15)

pub fn ot9(&mut self) -> OT9_W<'_>[src]

Bit 9 - Port x configuration bits (y = 0..15)

pub fn ot8(&mut self) -> OT8_W<'_>[src]

Bit 8 - Port x configuration bits (y = 0..15)

pub fn ot7(&mut self) -> OT7_W<'_>[src]

Bit 7 - Port x configuration bits (y = 0..15)

pub fn ot6(&mut self) -> OT6_W<'_>[src]

Bit 6 - Port x configuration bits (y = 0..15)

pub fn ot5(&mut self) -> OT5_W<'_>[src]

Bit 5 - Port x configuration bits (y = 0..15)

pub fn ot4(&mut self) -> OT4_W<'_>[src]

Bit 4 - Port x configuration bits (y = 0..15)

pub fn ot3(&mut self) -> OT3_W<'_>[src]

Bit 3 - Port x configuration bits (y = 0..15)

pub fn ot2(&mut self) -> OT2_W<'_>[src]

Bit 2 - Port x configuration bits (y = 0..15)

pub fn ot1(&mut self) -> OT1_W<'_>[src]

Bit 1 - Port x configuration bits (y = 0..15)

pub fn ot0(&mut self) -> OT0_W<'_>[src]

Bit 0 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _OSPEEDR>>[src]

pub fn ospeedr15(&mut self) -> OSPEEDR15_W<'_>[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn ospeedr14(&mut self) -> OSPEEDR14_W<'_>[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn ospeedr13(&mut self) -> OSPEEDR13_W<'_>[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn ospeedr12(&mut self) -> OSPEEDR12_W<'_>[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn ospeedr11(&mut self) -> OSPEEDR11_W<'_>[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn ospeedr10(&mut self) -> OSPEEDR10_W<'_>[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn ospeedr9(&mut self) -> OSPEEDR9_W<'_>[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn ospeedr8(&mut self) -> OSPEEDR8_W<'_>[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn ospeedr7(&mut self) -> OSPEEDR7_W<'_>[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn ospeedr6(&mut self) -> OSPEEDR6_W<'_>[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn ospeedr5(&mut self) -> OSPEEDR5_W<'_>[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn ospeedr4(&mut self) -> OSPEEDR4_W<'_>[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn ospeedr3(&mut self) -> OSPEEDR3_W<'_>[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn ospeedr2(&mut self) -> OSPEEDR2_W<'_>[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn ospeedr1(&mut self) -> OSPEEDR1_W<'_>[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn ospeedr0(&mut self) -> OSPEEDR0_W<'_>[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _PUPDR>>[src]

pub fn pupdr15(&mut self) -> PUPDR15_W<'_>[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn pupdr14(&mut self) -> PUPDR14_W<'_>[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn pupdr13(&mut self) -> PUPDR13_W<'_>[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn pupdr12(&mut self) -> PUPDR12_W<'_>[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn pupdr11(&mut self) -> PUPDR11_W<'_>[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn pupdr10(&mut self) -> PUPDR10_W<'_>[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn pupdr9(&mut self) -> PUPDR9_W<'_>[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn pupdr8(&mut self) -> PUPDR8_W<'_>[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn pupdr7(&mut self) -> PUPDR7_W<'_>[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn pupdr6(&mut self) -> PUPDR6_W<'_>[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn pupdr5(&mut self) -> PUPDR5_W<'_>[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn pupdr4(&mut self) -> PUPDR4_W<'_>[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn pupdr3(&mut self) -> PUPDR3_W<'_>[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn pupdr2(&mut self) -> PUPDR2_W<'_>[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn pupdr1(&mut self) -> PUPDR1_W<'_>[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn pupdr0(&mut self) -> PUPDR0_W<'_>[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _ODR>>[src]

pub fn odr15(&mut self) -> ODR15_W<'_>[src]

Bit 15 - Port output data (y = 0..15)

pub fn odr14(&mut self) -> ODR14_W<'_>[src]

Bit 14 - Port output data (y = 0..15)

pub fn odr13(&mut self) -> ODR13_W<'_>[src]

Bit 13 - Port output data (y = 0..15)

pub fn odr12(&mut self) -> ODR12_W<'_>[src]

Bit 12 - Port output data (y = 0..15)

pub fn odr11(&mut self) -> ODR11_W<'_>[src]

Bit 11 - Port output data (y = 0..15)

pub fn odr10(&mut self) -> ODR10_W<'_>[src]

Bit 10 - Port output data (y = 0..15)

pub fn odr9(&mut self) -> ODR9_W<'_>[src]

Bit 9 - Port output data (y = 0..15)

pub fn odr8(&mut self) -> ODR8_W<'_>[src]

Bit 8 - Port output data (y = 0..15)

pub fn odr7(&mut self) -> ODR7_W<'_>[src]

Bit 7 - Port output data (y = 0..15)

pub fn odr6(&mut self) -> ODR6_W<'_>[src]

Bit 6 - Port output data (y = 0..15)

pub fn odr5(&mut self) -> ODR5_W<'_>[src]

Bit 5 - Port output data (y = 0..15)

pub fn odr4(&mut self) -> ODR4_W<'_>[src]

Bit 4 - Port output data (y = 0..15)

pub fn odr3(&mut self) -> ODR3_W<'_>[src]

Bit 3 - Port output data (y = 0..15)

pub fn odr2(&mut self) -> ODR2_W<'_>[src]

Bit 2 - Port output data (y = 0..15)

pub fn odr1(&mut self) -> ODR1_W<'_>[src]

Bit 1 - Port output data (y = 0..15)

pub fn odr0(&mut self) -> ODR0_W<'_>[src]

Bit 0 - Port output data (y = 0..15)

impl W<u32, Reg<u32, _BSRR>>[src]

pub fn br15(&mut self) -> BR15_W<'_>[src]

Bit 31 - Port x reset bit y (y = 0..15)

pub fn br14(&mut self) -> BR14_W<'_>[src]

Bit 30 - Port x reset bit y (y = 0..15)

pub fn br13(&mut self) -> BR13_W<'_>[src]

Bit 29 - Port x reset bit y (y = 0..15)

pub fn br12(&mut self) -> BR12_W<'_>[src]

Bit 28 - Port x reset bit y (y = 0..15)

pub fn br11(&mut self) -> BR11_W<'_>[src]

Bit 27 - Port x reset bit y (y = 0..15)

pub fn br10(&mut self) -> BR10_W<'_>[src]

Bit 26 - Port x reset bit y (y = 0..15)

pub fn br9(&mut self) -> BR9_W<'_>[src]

Bit 25 - Port x reset bit y (y = 0..15)

pub fn br8(&mut self) -> BR8_W<'_>[src]

Bit 24 - Port x reset bit y (y = 0..15)

pub fn br7(&mut self) -> BR7_W<'_>[src]

Bit 23 - Port x reset bit y (y = 0..15)

pub fn br6(&mut self) -> BR6_W<'_>[src]

Bit 22 - Port x reset bit y (y = 0..15)

pub fn br5(&mut self) -> BR5_W<'_>[src]

Bit 21 - Port x reset bit y (y = 0..15)

pub fn br4(&mut self) -> BR4_W<'_>[src]

Bit 20 - Port x reset bit y (y = 0..15)

pub fn br3(&mut self) -> BR3_W<'_>[src]

Bit 19 - Port x reset bit y (y = 0..15)

pub fn br2(&mut self) -> BR2_W<'_>[src]

Bit 18 - Port x reset bit y (y = 0..15)

pub fn br1(&mut self) -> BR1_W<'_>[src]

Bit 17 - Port x reset bit y (y = 0..15)

pub fn br0(&mut self) -> BR0_W<'_>[src]

Bit 16 - Port x set bit y (y= 0..15)

pub fn bs15(&mut self) -> BS15_W<'_>[src]

Bit 15 - Port x set bit y (y= 0..15)

pub fn bs14(&mut self) -> BS14_W<'_>[src]

Bit 14 - Port x set bit y (y= 0..15)

pub fn bs13(&mut self) -> BS13_W<'_>[src]

Bit 13 - Port x set bit y (y= 0..15)

pub fn bs12(&mut self) -> BS12_W<'_>[src]

Bit 12 - Port x set bit y (y= 0..15)

pub fn bs11(&mut self) -> BS11_W<'_>[src]

Bit 11 - Port x set bit y (y= 0..15)

pub fn bs10(&mut self) -> BS10_W<'_>[src]

Bit 10 - Port x set bit y (y= 0..15)

pub fn bs9(&mut self) -> BS9_W<'_>[src]

Bit 9 - Port x set bit y (y= 0..15)

pub fn bs8(&mut self) -> BS8_W<'_>[src]

Bit 8 - Port x set bit y (y= 0..15)

pub fn bs7(&mut self) -> BS7_W<'_>[src]

Bit 7 - Port x set bit y (y= 0..15)

pub fn bs6(&mut self) -> BS6_W<'_>[src]

Bit 6 - Port x set bit y (y= 0..15)

pub fn bs5(&mut self) -> BS5_W<'_>[src]

Bit 5 - Port x set bit y (y= 0..15)

pub fn bs4(&mut self) -> BS4_W<'_>[src]

Bit 4 - Port x set bit y (y= 0..15)

pub fn bs3(&mut self) -> BS3_W<'_>[src]

Bit 3 - Port x set bit y (y= 0..15)

pub fn bs2(&mut self) -> BS2_W<'_>[src]

Bit 2 - Port x set bit y (y= 0..15)

pub fn bs1(&mut self) -> BS1_W<'_>[src]

Bit 1 - Port x set bit y (y= 0..15)

pub fn bs0(&mut self) -> BS0_W<'_>[src]

Bit 0 - Port x set bit y (y= 0..15)

impl W<u32, Reg<u32, _LCKR>>[src]

pub fn lckk(&mut self) -> LCKK_W<'_>[src]

Bit 16 - Port x lock bit y (y= 0..15)

pub fn lck15(&mut self) -> LCK15_W<'_>[src]

Bit 15 - Port x lock bit y (y= 0..15)

pub fn lck14(&mut self) -> LCK14_W<'_>[src]

Bit 14 - Port x lock bit y (y= 0..15)

pub fn lck13(&mut self) -> LCK13_W<'_>[src]

Bit 13 - Port x lock bit y (y= 0..15)

pub fn lck12(&mut self) -> LCK12_W<'_>[src]

Bit 12 - Port x lock bit y (y= 0..15)

pub fn lck11(&mut self) -> LCK11_W<'_>[src]

Bit 11 - Port x lock bit y (y= 0..15)

pub fn lck10(&mut self) -> LCK10_W<'_>[src]

Bit 10 - Port x lock bit y (y= 0..15)

pub fn lck9(&mut self) -> LCK9_W<'_>[src]

Bit 9 - Port x lock bit y (y= 0..15)

pub fn lck8(&mut self) -> LCK8_W<'_>[src]

Bit 8 - Port x lock bit y (y= 0..15)

pub fn lck7(&mut self) -> LCK7_W<'_>[src]

Bit 7 - Port x lock bit y (y= 0..15)

pub fn lck6(&mut self) -> LCK6_W<'_>[src]

Bit 6 - Port x lock bit y (y= 0..15)

pub fn lck5(&mut self) -> LCK5_W<'_>[src]

Bit 5 - Port x lock bit y (y= 0..15)

pub fn lck4(&mut self) -> LCK4_W<'_>[src]

Bit 4 - Port x lock bit y (y= 0..15)

pub fn lck3(&mut self) -> LCK3_W<'_>[src]

Bit 3 - Port x lock bit y (y= 0..15)

pub fn lck2(&mut self) -> LCK2_W<'_>[src]

Bit 2 - Port x lock bit y (y= 0..15)

pub fn lck1(&mut self) -> LCK1_W<'_>[src]

Bit 1 - Port x lock bit y (y= 0..15)

pub fn lck0(&mut self) -> LCK0_W<'_>[src]

Bit 0 - Port x lock bit y (y= 0..15)

impl W<u32, Reg<u32, _AFRL>>[src]

pub fn afsel7(&mut self) -> AFSEL7_W<'_>[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel6(&mut self) -> AFSEL6_W<'_>[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel5(&mut self) -> AFSEL5_W<'_>[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel4(&mut self) -> AFSEL4_W<'_>[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel3(&mut self) -> AFSEL3_W<'_>[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel2(&mut self) -> AFSEL2_W<'_>[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel1(&mut self) -> AFSEL1_W<'_>[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel0(&mut self) -> AFSEL0_W<'_>[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)

impl W<u32, Reg<u32, _AFRH>>[src]

pub fn afsel15(&mut self) -> AFSEL15_W<'_>[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel14(&mut self) -> AFSEL14_W<'_>[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel13(&mut self) -> AFSEL13_W<'_>[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel12(&mut self) -> AFSEL12_W<'_>[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel11(&mut self) -> AFSEL11_W<'_>[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel10(&mut self) -> AFSEL10_W<'_>[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel9(&mut self) -> AFSEL9_W<'_>[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel8(&mut self) -> AFSEL8_W<'_>[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)

impl W<u32, Reg<u32, _BRR>>[src]

pub fn br0(&mut self) -> BR0_W<'_>[src]

Bit 0 - Port x reset IO pin y

pub fn br1(&mut self) -> BR1_W<'_>[src]

Bit 1 - Port x reset IO pin y

pub fn br2(&mut self) -> BR2_W<'_>[src]

Bit 2 - Port x reset IO pin y

pub fn br3(&mut self) -> BR3_W<'_>[src]

Bit 3 - Port x reset IO pin y

pub fn br4(&mut self) -> BR4_W<'_>[src]

Bit 4 - Port x reset IO pin y

pub fn br5(&mut self) -> BR5_W<'_>[src]

Bit 5 - Port x reset IO pin y

pub fn br6(&mut self) -> BR6_W<'_>[src]

Bit 6 - Port x reset IO pin y

pub fn br7(&mut self) -> BR7_W<'_>[src]

Bit 7 - Port x reset IO pin y

pub fn br8(&mut self) -> BR8_W<'_>[src]

Bit 8 - Port x reset IO pin y

pub fn br9(&mut self) -> BR9_W<'_>[src]

Bit 9 - Port x reset IO pin y

pub fn br10(&mut self) -> BR10_W<'_>[src]

Bit 10 - Port x reset IO pin y

pub fn br11(&mut self) -> BR11_W<'_>[src]

Bit 11 - Port x reset IO pin y

pub fn br12(&mut self) -> BR12_W<'_>[src]

Bit 12 - Port x reset IO pin y

pub fn br13(&mut self) -> BR13_W<'_>[src]

Bit 13 - Port x reset IO pin y

pub fn br14(&mut self) -> BR14_W<'_>[src]

Bit 14 - Port x reset IO pin y

pub fn br15(&mut self) -> BR15_W<'_>[src]

Bit 15 - Port x reset IO pin y

impl W<u32, Reg<u32, _SECCFGR>>[src]

pub fn sec0(&mut self) -> SEC0_W<'_>[src]

Bit 0 - I/O pin of Port x secure bit enable

pub fn sec1(&mut self) -> SEC1_W<'_>[src]

Bit 1 - I/O pin of Port x secure bit enable

pub fn sec2(&mut self) -> SEC2_W<'_>[src]

Bit 2 - I/O pin of Port x secure bit enable

pub fn sec3(&mut self) -> SEC3_W<'_>[src]

Bit 3 - I/O pin of Port x secure bit enable

pub fn sec4(&mut self) -> SEC4_W<'_>[src]

Bit 4 - I/O pin of Port x secure bit enable

pub fn sec5(&mut self) -> SEC5_W<'_>[src]

Bit 5 - I/O pin of Port x secure bit enable

pub fn sec6(&mut self) -> SEC6_W<'_>[src]

Bit 6 - I/O pin of Port x secure bit enable

pub fn sec7(&mut self) -> SEC7_W<'_>[src]

Bit 7 - I/O pin of Port x secure bit enable

pub fn sec8(&mut self) -> SEC8_W<'_>[src]

Bit 8 - I/O pin of Port x secure bit enable

pub fn sec9(&mut self) -> SEC9_W<'_>[src]

Bit 9 - I/O pin of Port x secure bit enable

pub fn sec10(&mut self) -> SEC10_W<'_>[src]

Bit 10 - I/O pin of Port x secure bit enable

pub fn sec11(&mut self) -> SEC11_W<'_>[src]

Bit 11 - I/O pin of Port x secure bit enable

pub fn sec12(&mut self) -> SEC12_W<'_>[src]

Bit 12 - I/O pin of Port x secure bit enable

pub fn sec13(&mut self) -> SEC13_W<'_>[src]

Bit 13 - I/O pin of Port x secure bit enable

pub fn sec14(&mut self) -> SEC14_W<'_>[src]

Bit 14 - I/O pin of Port x secure bit enable

pub fn sec15(&mut self) -> SEC15_W<'_>[src]

Bit 15 - I/O pin of Port x secure bit enable

impl W<u32, Reg<u32, _MODER>>[src]

pub fn moder15(&mut self) -> MODER15_W<'_>[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn moder14(&mut self) -> MODER14_W<'_>[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn moder13(&mut self) -> MODER13_W<'_>[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn moder12(&mut self) -> MODER12_W<'_>[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn moder11(&mut self) -> MODER11_W<'_>[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn moder10(&mut self) -> MODER10_W<'_>[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn moder9(&mut self) -> MODER9_W<'_>[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn moder8(&mut self) -> MODER8_W<'_>[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn moder7(&mut self) -> MODER7_W<'_>[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn moder6(&mut self) -> MODER6_W<'_>[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn moder5(&mut self) -> MODER5_W<'_>[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn moder4(&mut self) -> MODER4_W<'_>[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn moder3(&mut self) -> MODER3_W<'_>[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn moder2(&mut self) -> MODER2_W<'_>[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn moder1(&mut self) -> MODER1_W<'_>[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn moder0(&mut self) -> MODER0_W<'_>[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _OTYPER>>[src]

pub fn ot15(&mut self) -> OT15_W<'_>[src]

Bit 15 - Port x configuration bits (y = 0..15)

pub fn ot14(&mut self) -> OT14_W<'_>[src]

Bit 14 - Port x configuration bits (y = 0..15)

pub fn ot13(&mut self) -> OT13_W<'_>[src]

Bit 13 - Port x configuration bits (y = 0..15)

pub fn ot12(&mut self) -> OT12_W<'_>[src]

Bit 12 - Port x configuration bits (y = 0..15)

pub fn ot11(&mut self) -> OT11_W<'_>[src]

Bit 11 - Port x configuration bits (y = 0..15)

pub fn ot10(&mut self) -> OT10_W<'_>[src]

Bit 10 - Port x configuration bits (y = 0..15)

pub fn ot9(&mut self) -> OT9_W<'_>[src]

Bit 9 - Port x configuration bits (y = 0..15)

pub fn ot8(&mut self) -> OT8_W<'_>[src]

Bit 8 - Port x configuration bits (y = 0..15)

pub fn ot7(&mut self) -> OT7_W<'_>[src]

Bit 7 - Port x configuration bits (y = 0..15)

pub fn ot6(&mut self) -> OT6_W<'_>[src]

Bit 6 - Port x configuration bits (y = 0..15)

pub fn ot5(&mut self) -> OT5_W<'_>[src]

Bit 5 - Port x configuration bits (y = 0..15)

pub fn ot4(&mut self) -> OT4_W<'_>[src]

Bit 4 - Port x configuration bits (y = 0..15)

pub fn ot3(&mut self) -> OT3_W<'_>[src]

Bit 3 - Port x configuration bits (y = 0..15)

pub fn ot2(&mut self) -> OT2_W<'_>[src]

Bit 2 - Port x configuration bits (y = 0..15)

pub fn ot1(&mut self) -> OT1_W<'_>[src]

Bit 1 - Port x configuration bits (y = 0..15)

pub fn ot0(&mut self) -> OT0_W<'_>[src]

Bit 0 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _OSPEEDR>>[src]

pub fn ospeedr15(&mut self) -> OSPEEDR15_W<'_>[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn ospeedr14(&mut self) -> OSPEEDR14_W<'_>[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn ospeedr13(&mut self) -> OSPEEDR13_W<'_>[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn ospeedr12(&mut self) -> OSPEEDR12_W<'_>[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn ospeedr11(&mut self) -> OSPEEDR11_W<'_>[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn ospeedr10(&mut self) -> OSPEEDR10_W<'_>[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn ospeedr9(&mut self) -> OSPEEDR9_W<'_>[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn ospeedr8(&mut self) -> OSPEEDR8_W<'_>[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn ospeedr7(&mut self) -> OSPEEDR7_W<'_>[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn ospeedr6(&mut self) -> OSPEEDR6_W<'_>[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn ospeedr5(&mut self) -> OSPEEDR5_W<'_>[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn ospeedr4(&mut self) -> OSPEEDR4_W<'_>[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn ospeedr3(&mut self) -> OSPEEDR3_W<'_>[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn ospeedr2(&mut self) -> OSPEEDR2_W<'_>[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn ospeedr1(&mut self) -> OSPEEDR1_W<'_>[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn ospeedr0(&mut self) -> OSPEEDR0_W<'_>[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _PUPDR>>[src]

pub fn pupdr15(&mut self) -> PUPDR15_W<'_>[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn pupdr14(&mut self) -> PUPDR14_W<'_>[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn pupdr13(&mut self) -> PUPDR13_W<'_>[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn pupdr12(&mut self) -> PUPDR12_W<'_>[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn pupdr11(&mut self) -> PUPDR11_W<'_>[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn pupdr10(&mut self) -> PUPDR10_W<'_>[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn pupdr9(&mut self) -> PUPDR9_W<'_>[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn pupdr8(&mut self) -> PUPDR8_W<'_>[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn pupdr7(&mut self) -> PUPDR7_W<'_>[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn pupdr6(&mut self) -> PUPDR6_W<'_>[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn pupdr5(&mut self) -> PUPDR5_W<'_>[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn pupdr4(&mut self) -> PUPDR4_W<'_>[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn pupdr3(&mut self) -> PUPDR3_W<'_>[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn pupdr2(&mut self) -> PUPDR2_W<'_>[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn pupdr1(&mut self) -> PUPDR1_W<'_>[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn pupdr0(&mut self) -> PUPDR0_W<'_>[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _ODR>>[src]

pub fn odr15(&mut self) -> ODR15_W<'_>[src]

Bit 15 - Port output data (y = 0..15)

pub fn odr14(&mut self) -> ODR14_W<'_>[src]

Bit 14 - Port output data (y = 0..15)

pub fn odr13(&mut self) -> ODR13_W<'_>[src]

Bit 13 - Port output data (y = 0..15)

pub fn odr12(&mut self) -> ODR12_W<'_>[src]

Bit 12 - Port output data (y = 0..15)

pub fn odr11(&mut self) -> ODR11_W<'_>[src]

Bit 11 - Port output data (y = 0..15)

pub fn odr10(&mut self) -> ODR10_W<'_>[src]

Bit 10 - Port output data (y = 0..15)

pub fn odr9(&mut self) -> ODR9_W<'_>[src]

Bit 9 - Port output data (y = 0..15)

pub fn odr8(&mut self) -> ODR8_W<'_>[src]

Bit 8 - Port output data (y = 0..15)

pub fn odr7(&mut self) -> ODR7_W<'_>[src]

Bit 7 - Port output data (y = 0..15)

pub fn odr6(&mut self) -> ODR6_W<'_>[src]

Bit 6 - Port output data (y = 0..15)

pub fn odr5(&mut self) -> ODR5_W<'_>[src]

Bit 5 - Port output data (y = 0..15)

pub fn odr4(&mut self) -> ODR4_W<'_>[src]

Bit 4 - Port output data (y = 0..15)

pub fn odr3(&mut self) -> ODR3_W<'_>[src]

Bit 3 - Port output data (y = 0..15)

pub fn odr2(&mut self) -> ODR2_W<'_>[src]

Bit 2 - Port output data (y = 0..15)

pub fn odr1(&mut self) -> ODR1_W<'_>[src]

Bit 1 - Port output data (y = 0..15)

pub fn odr0(&mut self) -> ODR0_W<'_>[src]

Bit 0 - Port output data (y = 0..15)

impl W<u32, Reg<u32, _BSRR>>[src]

pub fn br15(&mut self) -> BR15_W<'_>[src]

Bit 31 - Port x reset bit y (y = 0..15)

pub fn br14(&mut self) -> BR14_W<'_>[src]

Bit 30 - Port x reset bit y (y = 0..15)

pub fn br13(&mut self) -> BR13_W<'_>[src]

Bit 29 - Port x reset bit y (y = 0..15)

pub fn br12(&mut self) -> BR12_W<'_>[src]

Bit 28 - Port x reset bit y (y = 0..15)

pub fn br11(&mut self) -> BR11_W<'_>[src]

Bit 27 - Port x reset bit y (y = 0..15)

pub fn br10(&mut self) -> BR10_W<'_>[src]

Bit 26 - Port x reset bit y (y = 0..15)

pub fn br9(&mut self) -> BR9_W<'_>[src]

Bit 25 - Port x reset bit y (y = 0..15)

pub fn br8(&mut self) -> BR8_W<'_>[src]

Bit 24 - Port x reset bit y (y = 0..15)

pub fn br7(&mut self) -> BR7_W<'_>[src]

Bit 23 - Port x reset bit y (y = 0..15)

pub fn br6(&mut self) -> BR6_W<'_>[src]

Bit 22 - Port x reset bit y (y = 0..15)

pub fn br5(&mut self) -> BR5_W<'_>[src]

Bit 21 - Port x reset bit y (y = 0..15)

pub fn br4(&mut self) -> BR4_W<'_>[src]

Bit 20 - Port x reset bit y (y = 0..15)

pub fn br3(&mut self) -> BR3_W<'_>[src]

Bit 19 - Port x reset bit y (y = 0..15)

pub fn br2(&mut self) -> BR2_W<'_>[src]

Bit 18 - Port x reset bit y (y = 0..15)

pub fn br1(&mut self) -> BR1_W<'_>[src]

Bit 17 - Port x reset bit y (y = 0..15)

pub fn br0(&mut self) -> BR0_W<'_>[src]

Bit 16 - Port x set bit y (y= 0..15)

pub fn bs15(&mut self) -> BS15_W<'_>[src]

Bit 15 - Port x set bit y (y= 0..15)

pub fn bs14(&mut self) -> BS14_W<'_>[src]

Bit 14 - Port x set bit y (y= 0..15)

pub fn bs13(&mut self) -> BS13_W<'_>[src]

Bit 13 - Port x set bit y (y= 0..15)

pub fn bs12(&mut self) -> BS12_W<'_>[src]

Bit 12 - Port x set bit y (y= 0..15)

pub fn bs11(&mut self) -> BS11_W<'_>[src]

Bit 11 - Port x set bit y (y= 0..15)

pub fn bs10(&mut self) -> BS10_W<'_>[src]

Bit 10 - Port x set bit y (y= 0..15)

pub fn bs9(&mut self) -> BS9_W<'_>[src]

Bit 9 - Port x set bit y (y= 0..15)

pub fn bs8(&mut self) -> BS8_W<'_>[src]

Bit 8 - Port x set bit y (y= 0..15)

pub fn bs7(&mut self) -> BS7_W<'_>[src]

Bit 7 - Port x set bit y (y= 0..15)

pub fn bs6(&mut self) -> BS6_W<'_>[src]

Bit 6 - Port x set bit y (y= 0..15)

pub fn bs5(&mut self) -> BS5_W<'_>[src]

Bit 5 - Port x set bit y (y= 0..15)

pub fn bs4(&mut self) -> BS4_W<'_>[src]

Bit 4 - Port x set bit y (y= 0..15)

pub fn bs3(&mut self) -> BS3_W<'_>[src]

Bit 3 - Port x set bit y (y= 0..15)

pub fn bs2(&mut self) -> BS2_W<'_>[src]

Bit 2 - Port x set bit y (y= 0..15)

pub fn bs1(&mut self) -> BS1_W<'_>[src]

Bit 1 - Port x set bit y (y= 0..15)

pub fn bs0(&mut self) -> BS0_W<'_>[src]

Bit 0 - Port x set bit y (y= 0..15)

impl W<u32, Reg<u32, _LCKR>>[src]

pub fn lckk(&mut self) -> LCKK_W<'_>[src]

Bit 16 - Port x lock bit y (y= 0..15)

pub fn lck15(&mut self) -> LCK15_W<'_>[src]

Bit 15 - Port x lock bit y (y= 0..15)

pub fn lck14(&mut self) -> LCK14_W<'_>[src]

Bit 14 - Port x lock bit y (y= 0..15)

pub fn lck13(&mut self) -> LCK13_W<'_>[src]

Bit 13 - Port x lock bit y (y= 0..15)

pub fn lck12(&mut self) -> LCK12_W<'_>[src]

Bit 12 - Port x lock bit y (y= 0..15)

pub fn lck11(&mut self) -> LCK11_W<'_>[src]

Bit 11 - Port x lock bit y (y= 0..15)

pub fn lck10(&mut self) -> LCK10_W<'_>[src]

Bit 10 - Port x lock bit y (y= 0..15)

pub fn lck9(&mut self) -> LCK9_W<'_>[src]

Bit 9 - Port x lock bit y (y= 0..15)

pub fn lck8(&mut self) -> LCK8_W<'_>[src]

Bit 8 - Port x lock bit y (y= 0..15)

pub fn lck7(&mut self) -> LCK7_W<'_>[src]

Bit 7 - Port x lock bit y (y= 0..15)

pub fn lck6(&mut self) -> LCK6_W<'_>[src]

Bit 6 - Port x lock bit y (y= 0..15)

pub fn lck5(&mut self) -> LCK5_W<'_>[src]

Bit 5 - Port x lock bit y (y= 0..15)

pub fn lck4(&mut self) -> LCK4_W<'_>[src]

Bit 4 - Port x lock bit y (y= 0..15)

pub fn lck3(&mut self) -> LCK3_W<'_>[src]

Bit 3 - Port x lock bit y (y= 0..15)

pub fn lck2(&mut self) -> LCK2_W<'_>[src]

Bit 2 - Port x lock bit y (y= 0..15)

pub fn lck1(&mut self) -> LCK1_W<'_>[src]

Bit 1 - Port x lock bit y (y= 0..15)

pub fn lck0(&mut self) -> LCK0_W<'_>[src]

Bit 0 - Port x lock bit y (y= 0..15)

impl W<u32, Reg<u32, _AFRL>>[src]

pub fn afsel7(&mut self) -> AFSEL7_W<'_>[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel6(&mut self) -> AFSEL6_W<'_>[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel5(&mut self) -> AFSEL5_W<'_>[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel4(&mut self) -> AFSEL4_W<'_>[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel3(&mut self) -> AFSEL3_W<'_>[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel2(&mut self) -> AFSEL2_W<'_>[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel1(&mut self) -> AFSEL1_W<'_>[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel0(&mut self) -> AFSEL0_W<'_>[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)

impl W<u32, Reg<u32, _AFRH>>[src]

pub fn afsel15(&mut self) -> AFSEL15_W<'_>[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel14(&mut self) -> AFSEL14_W<'_>[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel13(&mut self) -> AFSEL13_W<'_>[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel12(&mut self) -> AFSEL12_W<'_>[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel11(&mut self) -> AFSEL11_W<'_>[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel10(&mut self) -> AFSEL10_W<'_>[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel9(&mut self) -> AFSEL9_W<'_>[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel8(&mut self) -> AFSEL8_W<'_>[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)

impl W<u32, Reg<u32, _BRR>>[src]

pub fn br0(&mut self) -> BR0_W<'_>[src]

Bit 0 - Port x reset IO pin y

pub fn br1(&mut self) -> BR1_W<'_>[src]

Bit 1 - Port x reset IO pin y

pub fn br2(&mut self) -> BR2_W<'_>[src]

Bit 2 - Port x reset IO pin y

pub fn br3(&mut self) -> BR3_W<'_>[src]

Bit 3 - Port x reset IO pin y

pub fn br4(&mut self) -> BR4_W<'_>[src]

Bit 4 - Port x reset IO pin y

pub fn br5(&mut self) -> BR5_W<'_>[src]

Bit 5 - Port x reset IO pin y

pub fn br6(&mut self) -> BR6_W<'_>[src]

Bit 6 - Port x reset IO pin y

pub fn br7(&mut self) -> BR7_W<'_>[src]

Bit 7 - Port x reset IO pin y

pub fn br8(&mut self) -> BR8_W<'_>[src]

Bit 8 - Port x reset IO pin y

pub fn br9(&mut self) -> BR9_W<'_>[src]

Bit 9 - Port x reset IO pin y

pub fn br10(&mut self) -> BR10_W<'_>[src]

Bit 10 - Port x reset IO pin y

pub fn br11(&mut self) -> BR11_W<'_>[src]

Bit 11 - Port x reset IO pin y

pub fn br12(&mut self) -> BR12_W<'_>[src]

Bit 12 - Port x reset IO pin y

pub fn br13(&mut self) -> BR13_W<'_>[src]

Bit 13 - Port x reset IO pin y

pub fn br14(&mut self) -> BR14_W<'_>[src]

Bit 14 - Port x reset IO pin y

pub fn br15(&mut self) -> BR15_W<'_>[src]

Bit 15 - Port x reset IO pin y

impl W<u32, Reg<u32, _SECCFGR>>[src]

pub fn sec0(&mut self) -> SEC0_W<'_>[src]

Bit 0 - I/O pin of Port x secure bit enable

pub fn sec1(&mut self) -> SEC1_W<'_>[src]

Bit 1 - I/O pin of Port x secure bit enable

pub fn sec2(&mut self) -> SEC2_W<'_>[src]

Bit 2 - I/O pin of Port x secure bit enable

pub fn sec3(&mut self) -> SEC3_W<'_>[src]

Bit 3 - I/O pin of Port x secure bit enable

pub fn sec4(&mut self) -> SEC4_W<'_>[src]

Bit 4 - I/O pin of Port x secure bit enable

pub fn sec5(&mut self) -> SEC5_W<'_>[src]

Bit 5 - I/O pin of Port x secure bit enable

pub fn sec6(&mut self) -> SEC6_W<'_>[src]

Bit 6 - I/O pin of Port x secure bit enable

pub fn sec7(&mut self) -> SEC7_W<'_>[src]

Bit 7 - I/O pin of Port x secure bit enable

pub fn sec8(&mut self) -> SEC8_W<'_>[src]

Bit 8 - I/O pin of Port x secure bit enable

pub fn sec9(&mut self) -> SEC9_W<'_>[src]

Bit 9 - I/O pin of Port x secure bit enable

pub fn sec10(&mut self) -> SEC10_W<'_>[src]

Bit 10 - I/O pin of Port x secure bit enable

pub fn sec11(&mut self) -> SEC11_W<'_>[src]

Bit 11 - I/O pin of Port x secure bit enable

pub fn sec12(&mut self) -> SEC12_W<'_>[src]

Bit 12 - I/O pin of Port x secure bit enable

pub fn sec13(&mut self) -> SEC13_W<'_>[src]

Bit 13 - I/O pin of Port x secure bit enable

pub fn sec14(&mut self) -> SEC14_W<'_>[src]

Bit 14 - I/O pin of Port x secure bit enable

pub fn sec15(&mut self) -> SEC15_W<'_>[src]

Bit 15 - I/O pin of Port x secure bit enable

impl W<u32, Reg<u32, _MODER>>[src]

pub fn moder15(&mut self) -> MODER15_W<'_>[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn moder14(&mut self) -> MODER14_W<'_>[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn moder13(&mut self) -> MODER13_W<'_>[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn moder12(&mut self) -> MODER12_W<'_>[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn moder11(&mut self) -> MODER11_W<'_>[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn moder10(&mut self) -> MODER10_W<'_>[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn moder9(&mut self) -> MODER9_W<'_>[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn moder8(&mut self) -> MODER8_W<'_>[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn moder7(&mut self) -> MODER7_W<'_>[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn moder6(&mut self) -> MODER6_W<'_>[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn moder5(&mut self) -> MODER5_W<'_>[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn moder4(&mut self) -> MODER4_W<'_>[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn moder3(&mut self) -> MODER3_W<'_>[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn moder2(&mut self) -> MODER2_W<'_>[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn moder1(&mut self) -> MODER1_W<'_>[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn moder0(&mut self) -> MODER0_W<'_>[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _OTYPER>>[src]

pub fn ot15(&mut self) -> OT15_W<'_>[src]

Bit 15 - Port x configuration bits (y = 0..15)

pub fn ot14(&mut self) -> OT14_W<'_>[src]

Bit 14 - Port x configuration bits (y = 0..15)

pub fn ot13(&mut self) -> OT13_W<'_>[src]

Bit 13 - Port x configuration bits (y = 0..15)

pub fn ot12(&mut self) -> OT12_W<'_>[src]

Bit 12 - Port x configuration bits (y = 0..15)

pub fn ot11(&mut self) -> OT11_W<'_>[src]

Bit 11 - Port x configuration bits (y = 0..15)

pub fn ot10(&mut self) -> OT10_W<'_>[src]

Bit 10 - Port x configuration bits (y = 0..15)

pub fn ot9(&mut self) -> OT9_W<'_>[src]

Bit 9 - Port x configuration bits (y = 0..15)

pub fn ot8(&mut self) -> OT8_W<'_>[src]

Bit 8 - Port x configuration bits (y = 0..15)

pub fn ot7(&mut self) -> OT7_W<'_>[src]

Bit 7 - Port x configuration bits (y = 0..15)

pub fn ot6(&mut self) -> OT6_W<'_>[src]

Bit 6 - Port x configuration bits (y = 0..15)

pub fn ot5(&mut self) -> OT5_W<'_>[src]

Bit 5 - Port x configuration bits (y = 0..15)

pub fn ot4(&mut self) -> OT4_W<'_>[src]

Bit 4 - Port x configuration bits (y = 0..15)

pub fn ot3(&mut self) -> OT3_W<'_>[src]

Bit 3 - Port x configuration bits (y = 0..15)

pub fn ot2(&mut self) -> OT2_W<'_>[src]

Bit 2 - Port x configuration bits (y = 0..15)

pub fn ot1(&mut self) -> OT1_W<'_>[src]

Bit 1 - Port x configuration bits (y = 0..15)

pub fn ot0(&mut self) -> OT0_W<'_>[src]

Bit 0 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _OSPEEDR>>[src]

pub fn ospeedr15(&mut self) -> OSPEEDR15_W<'_>[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn ospeedr14(&mut self) -> OSPEEDR14_W<'_>[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn ospeedr13(&mut self) -> OSPEEDR13_W<'_>[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn ospeedr12(&mut self) -> OSPEEDR12_W<'_>[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn ospeedr11(&mut self) -> OSPEEDR11_W<'_>[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn ospeedr10(&mut self) -> OSPEEDR10_W<'_>[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn ospeedr9(&mut self) -> OSPEEDR9_W<'_>[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn ospeedr8(&mut self) -> OSPEEDR8_W<'_>[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn ospeedr7(&mut self) -> OSPEEDR7_W<'_>[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn ospeedr6(&mut self) -> OSPEEDR6_W<'_>[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn ospeedr5(&mut self) -> OSPEEDR5_W<'_>[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn ospeedr4(&mut self) -> OSPEEDR4_W<'_>[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn ospeedr3(&mut self) -> OSPEEDR3_W<'_>[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn ospeedr2(&mut self) -> OSPEEDR2_W<'_>[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn ospeedr1(&mut self) -> OSPEEDR1_W<'_>[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn ospeedr0(&mut self) -> OSPEEDR0_W<'_>[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _PUPDR>>[src]

pub fn pupdr15(&mut self) -> PUPDR15_W<'_>[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn pupdr14(&mut self) -> PUPDR14_W<'_>[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn pupdr13(&mut self) -> PUPDR13_W<'_>[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn pupdr12(&mut self) -> PUPDR12_W<'_>[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn pupdr11(&mut self) -> PUPDR11_W<'_>[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn pupdr10(&mut self) -> PUPDR10_W<'_>[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn pupdr9(&mut self) -> PUPDR9_W<'_>[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn pupdr8(&mut self) -> PUPDR8_W<'_>[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn pupdr7(&mut self) -> PUPDR7_W<'_>[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn pupdr6(&mut self) -> PUPDR6_W<'_>[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn pupdr5(&mut self) -> PUPDR5_W<'_>[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn pupdr4(&mut self) -> PUPDR4_W<'_>[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn pupdr3(&mut self) -> PUPDR3_W<'_>[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn pupdr2(&mut self) -> PUPDR2_W<'_>[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn pupdr1(&mut self) -> PUPDR1_W<'_>[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn pupdr0(&mut self) -> PUPDR0_W<'_>[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _ODR>>[src]

pub fn odr15(&mut self) -> ODR15_W<'_>[src]

Bit 15 - Port output data (y = 0..15)

pub fn odr14(&mut self) -> ODR14_W<'_>[src]

Bit 14 - Port output data (y = 0..15)

pub fn odr13(&mut self) -> ODR13_W<'_>[src]

Bit 13 - Port output data (y = 0..15)

pub fn odr12(&mut self) -> ODR12_W<'_>[src]

Bit 12 - Port output data (y = 0..15)

pub fn odr11(&mut self) -> ODR11_W<'_>[src]

Bit 11 - Port output data (y = 0..15)

pub fn odr10(&mut self) -> ODR10_W<'_>[src]

Bit 10 - Port output data (y = 0..15)

pub fn odr9(&mut self) -> ODR9_W<'_>[src]

Bit 9 - Port output data (y = 0..15)

pub fn odr8(&mut self) -> ODR8_W<'_>[src]

Bit 8 - Port output data (y = 0..15)

pub fn odr7(&mut self) -> ODR7_W<'_>[src]

Bit 7 - Port output data (y = 0..15)

pub fn odr6(&mut self) -> ODR6_W<'_>[src]

Bit 6 - Port output data (y = 0..15)

pub fn odr5(&mut self) -> ODR5_W<'_>[src]

Bit 5 - Port output data (y = 0..15)

pub fn odr4(&mut self) -> ODR4_W<'_>[src]

Bit 4 - Port output data (y = 0..15)

pub fn odr3(&mut self) -> ODR3_W<'_>[src]

Bit 3 - Port output data (y = 0..15)

pub fn odr2(&mut self) -> ODR2_W<'_>[src]

Bit 2 - Port output data (y = 0..15)

pub fn odr1(&mut self) -> ODR1_W<'_>[src]

Bit 1 - Port output data (y = 0..15)

pub fn odr0(&mut self) -> ODR0_W<'_>[src]

Bit 0 - Port output data (y = 0..15)

impl W<u32, Reg<u32, _BSRR>>[src]

pub fn br15(&mut self) -> BR15_W<'_>[src]

Bit 31 - Port x reset bit y (y = 0..15)

pub fn br14(&mut self) -> BR14_W<'_>[src]

Bit 30 - Port x reset bit y (y = 0..15)

pub fn br13(&mut self) -> BR13_W<'_>[src]

Bit 29 - Port x reset bit y (y = 0..15)

pub fn br12(&mut self) -> BR12_W<'_>[src]

Bit 28 - Port x reset bit y (y = 0..15)

pub fn br11(&mut self) -> BR11_W<'_>[src]

Bit 27 - Port x reset bit y (y = 0..15)

pub fn br10(&mut self) -> BR10_W<'_>[src]

Bit 26 - Port x reset bit y (y = 0..15)

pub fn br9(&mut self) -> BR9_W<'_>[src]

Bit 25 - Port x reset bit y (y = 0..15)

pub fn br8(&mut self) -> BR8_W<'_>[src]

Bit 24 - Port x reset bit y (y = 0..15)

pub fn br7(&mut self) -> BR7_W<'_>[src]

Bit 23 - Port x reset bit y (y = 0..15)

pub fn br6(&mut self) -> BR6_W<'_>[src]

Bit 22 - Port x reset bit y (y = 0..15)

pub fn br5(&mut self) -> BR5_W<'_>[src]

Bit 21 - Port x reset bit y (y = 0..15)

pub fn br4(&mut self) -> BR4_W<'_>[src]

Bit 20 - Port x reset bit y (y = 0..15)

pub fn br3(&mut self) -> BR3_W<'_>[src]

Bit 19 - Port x reset bit y (y = 0..15)

pub fn br2(&mut self) -> BR2_W<'_>[src]

Bit 18 - Port x reset bit y (y = 0..15)

pub fn br1(&mut self) -> BR1_W<'_>[src]

Bit 17 - Port x reset bit y (y = 0..15)

pub fn br0(&mut self) -> BR0_W<'_>[src]

Bit 16 - Port x set bit y (y= 0..15)

pub fn bs15(&mut self) -> BS15_W<'_>[src]

Bit 15 - Port x set bit y (y= 0..15)

pub fn bs14(&mut self) -> BS14_W<'_>[src]

Bit 14 - Port x set bit y (y= 0..15)

pub fn bs13(&mut self) -> BS13_W<'_>[src]

Bit 13 - Port x set bit y (y= 0..15)

pub fn bs12(&mut self) -> BS12_W<'_>[src]

Bit 12 - Port x set bit y (y= 0..15)

pub fn bs11(&mut self) -> BS11_W<'_>[src]

Bit 11 - Port x set bit y (y= 0..15)

pub fn bs10(&mut self) -> BS10_W<'_>[src]

Bit 10 - Port x set bit y (y= 0..15)

pub fn bs9(&mut self) -> BS9_W<'_>[src]

Bit 9 - Port x set bit y (y= 0..15)

pub fn bs8(&mut self) -> BS8_W<'_>[src]

Bit 8 - Port x set bit y (y= 0..15)

pub fn bs7(&mut self) -> BS7_W<'_>[src]

Bit 7 - Port x set bit y (y= 0..15)

pub fn bs6(&mut self) -> BS6_W<'_>[src]

Bit 6 - Port x set bit y (y= 0..15)

pub fn bs5(&mut self) -> BS5_W<'_>[src]

Bit 5 - Port x set bit y (y= 0..15)

pub fn bs4(&mut self) -> BS4_W<'_>[src]

Bit 4 - Port x set bit y (y= 0..15)

pub fn bs3(&mut self) -> BS3_W<'_>[src]

Bit 3 - Port x set bit y (y= 0..15)

pub fn bs2(&mut self) -> BS2_W<'_>[src]

Bit 2 - Port x set bit y (y= 0..15)

pub fn bs1(&mut self) -> BS1_W<'_>[src]

Bit 1 - Port x set bit y (y= 0..15)

pub fn bs0(&mut self) -> BS0_W<'_>[src]

Bit 0 - Port x set bit y (y= 0..15)

impl W<u32, Reg<u32, _LCKR>>[src]

pub fn lckk(&mut self) -> LCKK_W<'_>[src]

Bit 16 - Port x lock bit y (y= 0..15)

pub fn lck15(&mut self) -> LCK15_W<'_>[src]

Bit 15 - Port x lock bit y (y= 0..15)

pub fn lck14(&mut self) -> LCK14_W<'_>[src]

Bit 14 - Port x lock bit y (y= 0..15)

pub fn lck13(&mut self) -> LCK13_W<'_>[src]

Bit 13 - Port x lock bit y (y= 0..15)

pub fn lck12(&mut self) -> LCK12_W<'_>[src]

Bit 12 - Port x lock bit y (y= 0..15)

pub fn lck11(&mut self) -> LCK11_W<'_>[src]

Bit 11 - Port x lock bit y (y= 0..15)

pub fn lck10(&mut self) -> LCK10_W<'_>[src]

Bit 10 - Port x lock bit y (y= 0..15)

pub fn lck9(&mut self) -> LCK9_W<'_>[src]

Bit 9 - Port x lock bit y (y= 0..15)

pub fn lck8(&mut self) -> LCK8_W<'_>[src]

Bit 8 - Port x lock bit y (y= 0..15)

pub fn lck7(&mut self) -> LCK7_W<'_>[src]

Bit 7 - Port x lock bit y (y= 0..15)

pub fn lck6(&mut self) -> LCK6_W<'_>[src]

Bit 6 - Port x lock bit y (y= 0..15)

pub fn lck5(&mut self) -> LCK5_W<'_>[src]

Bit 5 - Port x lock bit y (y= 0..15)

pub fn lck4(&mut self) -> LCK4_W<'_>[src]

Bit 4 - Port x lock bit y (y= 0..15)

pub fn lck3(&mut self) -> LCK3_W<'_>[src]

Bit 3 - Port x lock bit y (y= 0..15)

pub fn lck2(&mut self) -> LCK2_W<'_>[src]

Bit 2 - Port x lock bit y (y= 0..15)

pub fn lck1(&mut self) -> LCK1_W<'_>[src]

Bit 1 - Port x lock bit y (y= 0..15)

pub fn lck0(&mut self) -> LCK0_W<'_>[src]

Bit 0 - Port x lock bit y (y= 0..15)

impl W<u32, Reg<u32, _AFRL>>[src]

pub fn afsel7(&mut self) -> AFSEL7_W<'_>[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel6(&mut self) -> AFSEL6_W<'_>[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel5(&mut self) -> AFSEL5_W<'_>[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel4(&mut self) -> AFSEL4_W<'_>[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel3(&mut self) -> AFSEL3_W<'_>[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel2(&mut self) -> AFSEL2_W<'_>[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel1(&mut self) -> AFSEL1_W<'_>[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel0(&mut self) -> AFSEL0_W<'_>[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)

impl W<u32, Reg<u32, _AFRH>>[src]

pub fn afsel15(&mut self) -> AFSEL15_W<'_>[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel14(&mut self) -> AFSEL14_W<'_>[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel13(&mut self) -> AFSEL13_W<'_>[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel12(&mut self) -> AFSEL12_W<'_>[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel11(&mut self) -> AFSEL11_W<'_>[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel10(&mut self) -> AFSEL10_W<'_>[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel9(&mut self) -> AFSEL9_W<'_>[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel8(&mut self) -> AFSEL8_W<'_>[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)

impl W<u32, Reg<u32, _BRR>>[src]

pub fn br0(&mut self) -> BR0_W<'_>[src]

Bit 0 - Port x reset IO pin y

pub fn br1(&mut self) -> BR1_W<'_>[src]

Bit 1 - Port x reset IO pin y

pub fn br2(&mut self) -> BR2_W<'_>[src]

Bit 2 - Port x reset IO pin y

pub fn br3(&mut self) -> BR3_W<'_>[src]

Bit 3 - Port x reset IO pin y

pub fn br4(&mut self) -> BR4_W<'_>[src]

Bit 4 - Port x reset IO pin y

pub fn br5(&mut self) -> BR5_W<'_>[src]

Bit 5 - Port x reset IO pin y

pub fn br6(&mut self) -> BR6_W<'_>[src]

Bit 6 - Port x reset IO pin y

pub fn br7(&mut self) -> BR7_W<'_>[src]

Bit 7 - Port x reset IO pin y

pub fn br8(&mut self) -> BR8_W<'_>[src]

Bit 8 - Port x reset IO pin y

pub fn br9(&mut self) -> BR9_W<'_>[src]

Bit 9 - Port x reset IO pin y

pub fn br10(&mut self) -> BR10_W<'_>[src]

Bit 10 - Port x reset IO pin y

pub fn br11(&mut self) -> BR11_W<'_>[src]

Bit 11 - Port x reset IO pin y

pub fn br12(&mut self) -> BR12_W<'_>[src]

Bit 12 - Port x reset IO pin y

pub fn br13(&mut self) -> BR13_W<'_>[src]

Bit 13 - Port x reset IO pin y

pub fn br14(&mut self) -> BR14_W<'_>[src]

Bit 14 - Port x reset IO pin y

pub fn br15(&mut self) -> BR15_W<'_>[src]

Bit 15 - Port x reset IO pin y

impl W<u32, Reg<u32, _SECCFGR>>[src]

pub fn sec0(&mut self) -> SEC0_W<'_>[src]

Bit 0 - I/O pin of Port x secure bit enable

pub fn sec1(&mut self) -> SEC1_W<'_>[src]

Bit 1 - I/O pin of Port x secure bit enable

pub fn sec2(&mut self) -> SEC2_W<'_>[src]

Bit 2 - I/O pin of Port x secure bit enable

pub fn sec3(&mut self) -> SEC3_W<'_>[src]

Bit 3 - I/O pin of Port x secure bit enable

pub fn sec4(&mut self) -> SEC4_W<'_>[src]

Bit 4 - I/O pin of Port x secure bit enable

pub fn sec5(&mut self) -> SEC5_W<'_>[src]

Bit 5 - I/O pin of Port x secure bit enable

pub fn sec6(&mut self) -> SEC6_W<'_>[src]

Bit 6 - I/O pin of Port x secure bit enable

pub fn sec7(&mut self) -> SEC7_W<'_>[src]

Bit 7 - I/O pin of Port x secure bit enable

pub fn sec8(&mut self) -> SEC8_W<'_>[src]

Bit 8 - I/O pin of Port x secure bit enable

pub fn sec9(&mut self) -> SEC9_W<'_>[src]

Bit 9 - I/O pin of Port x secure bit enable

pub fn sec10(&mut self) -> SEC10_W<'_>[src]

Bit 10 - I/O pin of Port x secure bit enable

pub fn sec11(&mut self) -> SEC11_W<'_>[src]

Bit 11 - I/O pin of Port x secure bit enable

pub fn sec12(&mut self) -> SEC12_W<'_>[src]

Bit 12 - I/O pin of Port x secure bit enable

pub fn sec13(&mut self) -> SEC13_W<'_>[src]

Bit 13 - I/O pin of Port x secure bit enable

pub fn sec14(&mut self) -> SEC14_W<'_>[src]

Bit 14 - I/O pin of Port x secure bit enable

pub fn sec15(&mut self) -> SEC15_W<'_>[src]

Bit 15 - I/O pin of Port x secure bit enable

impl W<u32, Reg<u32, _MODER>>[src]

pub fn moder15(&mut self) -> MODER15_W<'_>[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn moder14(&mut self) -> MODER14_W<'_>[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn moder13(&mut self) -> MODER13_W<'_>[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn moder12(&mut self) -> MODER12_W<'_>[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn moder11(&mut self) -> MODER11_W<'_>[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn moder10(&mut self) -> MODER10_W<'_>[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn moder9(&mut self) -> MODER9_W<'_>[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn moder8(&mut self) -> MODER8_W<'_>[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn moder7(&mut self) -> MODER7_W<'_>[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn moder6(&mut self) -> MODER6_W<'_>[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn moder5(&mut self) -> MODER5_W<'_>[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn moder4(&mut self) -> MODER4_W<'_>[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn moder3(&mut self) -> MODER3_W<'_>[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn moder2(&mut self) -> MODER2_W<'_>[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn moder1(&mut self) -> MODER1_W<'_>[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn moder0(&mut self) -> MODER0_W<'_>[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _OTYPER>>[src]

pub fn ot15(&mut self) -> OT15_W<'_>[src]

Bit 15 - Port x configuration bits (y = 0..15)

pub fn ot14(&mut self) -> OT14_W<'_>[src]

Bit 14 - Port x configuration bits (y = 0..15)

pub fn ot13(&mut self) -> OT13_W<'_>[src]

Bit 13 - Port x configuration bits (y = 0..15)

pub fn ot12(&mut self) -> OT12_W<'_>[src]

Bit 12 - Port x configuration bits (y = 0..15)

pub fn ot11(&mut self) -> OT11_W<'_>[src]

Bit 11 - Port x configuration bits (y = 0..15)

pub fn ot10(&mut self) -> OT10_W<'_>[src]

Bit 10 - Port x configuration bits (y = 0..15)

pub fn ot9(&mut self) -> OT9_W<'_>[src]

Bit 9 - Port x configuration bits (y = 0..15)

pub fn ot8(&mut self) -> OT8_W<'_>[src]

Bit 8 - Port x configuration bits (y = 0..15)

pub fn ot7(&mut self) -> OT7_W<'_>[src]

Bit 7 - Port x configuration bits (y = 0..15)

pub fn ot6(&mut self) -> OT6_W<'_>[src]

Bit 6 - Port x configuration bits (y = 0..15)

pub fn ot5(&mut self) -> OT5_W<'_>[src]

Bit 5 - Port x configuration bits (y = 0..15)

pub fn ot4(&mut self) -> OT4_W<'_>[src]

Bit 4 - Port x configuration bits (y = 0..15)

pub fn ot3(&mut self) -> OT3_W<'_>[src]

Bit 3 - Port x configuration bits (y = 0..15)

pub fn ot2(&mut self) -> OT2_W<'_>[src]

Bit 2 - Port x configuration bits (y = 0..15)

pub fn ot1(&mut self) -> OT1_W<'_>[src]

Bit 1 - Port x configuration bits (y = 0..15)

pub fn ot0(&mut self) -> OT0_W<'_>[src]

Bit 0 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _OSPEEDR>>[src]

pub fn ospeedr15(&mut self) -> OSPEEDR15_W<'_>[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn ospeedr14(&mut self) -> OSPEEDR14_W<'_>[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn ospeedr13(&mut self) -> OSPEEDR13_W<'_>[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn ospeedr12(&mut self) -> OSPEEDR12_W<'_>[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn ospeedr11(&mut self) -> OSPEEDR11_W<'_>[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn ospeedr10(&mut self) -> OSPEEDR10_W<'_>[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn ospeedr9(&mut self) -> OSPEEDR9_W<'_>[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn ospeedr8(&mut self) -> OSPEEDR8_W<'_>[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn ospeedr7(&mut self) -> OSPEEDR7_W<'_>[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn ospeedr6(&mut self) -> OSPEEDR6_W<'_>[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn ospeedr5(&mut self) -> OSPEEDR5_W<'_>[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn ospeedr4(&mut self) -> OSPEEDR4_W<'_>[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn ospeedr3(&mut self) -> OSPEEDR3_W<'_>[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn ospeedr2(&mut self) -> OSPEEDR2_W<'_>[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn ospeedr1(&mut self) -> OSPEEDR1_W<'_>[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn ospeedr0(&mut self) -> OSPEEDR0_W<'_>[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _PUPDR>>[src]

pub fn pupdr15(&mut self) -> PUPDR15_W<'_>[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn pupdr14(&mut self) -> PUPDR14_W<'_>[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn pupdr13(&mut self) -> PUPDR13_W<'_>[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn pupdr12(&mut self) -> PUPDR12_W<'_>[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn pupdr11(&mut self) -> PUPDR11_W<'_>[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn pupdr10(&mut self) -> PUPDR10_W<'_>[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn pupdr9(&mut self) -> PUPDR9_W<'_>[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn pupdr8(&mut self) -> PUPDR8_W<'_>[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn pupdr7(&mut self) -> PUPDR7_W<'_>[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn pupdr6(&mut self) -> PUPDR6_W<'_>[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn pupdr5(&mut self) -> PUPDR5_W<'_>[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn pupdr4(&mut self) -> PUPDR4_W<'_>[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn pupdr3(&mut self) -> PUPDR3_W<'_>[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn pupdr2(&mut self) -> PUPDR2_W<'_>[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn pupdr1(&mut self) -> PUPDR1_W<'_>[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn pupdr0(&mut self) -> PUPDR0_W<'_>[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl W<u32, Reg<u32, _ODR>>[src]

pub fn odr15(&mut self) -> ODR15_W<'_>[src]

Bit 15 - Port output data (y = 0..15)

pub fn odr14(&mut self) -> ODR14_W<'_>[src]

Bit 14 - Port output data (y = 0..15)

pub fn odr13(&mut self) -> ODR13_W<'_>[src]

Bit 13 - Port output data (y = 0..15)

pub fn odr12(&mut self) -> ODR12_W<'_>[src]

Bit 12 - Port output data (y = 0..15)

pub fn odr11(&mut self) -> ODR11_W<'_>[src]

Bit 11 - Port output data (y = 0..15)

pub fn odr10(&mut self) -> ODR10_W<'_>[src]

Bit 10 - Port output data (y = 0..15)

pub fn odr9(&mut self) -> ODR9_W<'_>[src]

Bit 9 - Port output data (y = 0..15)

pub fn odr8(&mut self) -> ODR8_W<'_>[src]

Bit 8 - Port output data (y = 0..15)

pub fn odr7(&mut self) -> ODR7_W<'_>[src]

Bit 7 - Port output data (y = 0..15)

pub fn odr6(&mut self) -> ODR6_W<'_>[src]

Bit 6 - Port output data (y = 0..15)

pub fn odr5(&mut self) -> ODR5_W<'_>[src]

Bit 5 - Port output data (y = 0..15)

pub fn odr4(&mut self) -> ODR4_W<'_>[src]

Bit 4 - Port output data (y = 0..15)

pub fn odr3(&mut self) -> ODR3_W<'_>[src]

Bit 3 - Port output data (y = 0..15)

pub fn odr2(&mut self) -> ODR2_W<'_>[src]

Bit 2 - Port output data (y = 0..15)

pub fn odr1(&mut self) -> ODR1_W<'_>[src]

Bit 1 - Port output data (y = 0..15)

pub fn odr0(&mut self) -> ODR0_W<'_>[src]

Bit 0 - Port output data (y = 0..15)

impl W<u32, Reg<u32, _BSRR>>[src]

pub fn br15(&mut self) -> BR15_W<'_>[src]

Bit 31 - Port x reset bit y (y = 0..15)

pub fn br14(&mut self) -> BR14_W<'_>[src]

Bit 30 - Port x reset bit y (y = 0..15)

pub fn br13(&mut self) -> BR13_W<'_>[src]

Bit 29 - Port x reset bit y (y = 0..15)

pub fn br12(&mut self) -> BR12_W<'_>[src]

Bit 28 - Port x reset bit y (y = 0..15)

pub fn br11(&mut self) -> BR11_W<'_>[src]

Bit 27 - Port x reset bit y (y = 0..15)

pub fn br10(&mut self) -> BR10_W<'_>[src]

Bit 26 - Port x reset bit y (y = 0..15)

pub fn br9(&mut self) -> BR9_W<'_>[src]

Bit 25 - Port x reset bit y (y = 0..15)

pub fn br8(&mut self) -> BR8_W<'_>[src]

Bit 24 - Port x reset bit y (y = 0..15)

pub fn br7(&mut self) -> BR7_W<'_>[src]

Bit 23 - Port x reset bit y (y = 0..15)

pub fn br6(&mut self) -> BR6_W<'_>[src]

Bit 22 - Port x reset bit y (y = 0..15)

pub fn br5(&mut self) -> BR5_W<'_>[src]

Bit 21 - Port x reset bit y (y = 0..15)

pub fn br4(&mut self) -> BR4_W<'_>[src]

Bit 20 - Port x reset bit y (y = 0..15)

pub fn br3(&mut self) -> BR3_W<'_>[src]

Bit 19 - Port x reset bit y (y = 0..15)

pub fn br2(&mut self) -> BR2_W<'_>[src]

Bit 18 - Port x reset bit y (y = 0..15)

pub fn br1(&mut self) -> BR1_W<'_>[src]

Bit 17 - Port x reset bit y (y = 0..15)

pub fn br0(&mut self) -> BR0_W<'_>[src]

Bit 16 - Port x set bit y (y= 0..15)

pub fn bs15(&mut self) -> BS15_W<'_>[src]

Bit 15 - Port x set bit y (y= 0..15)

pub fn bs14(&mut self) -> BS14_W<'_>[src]

Bit 14 - Port x set bit y (y= 0..15)

pub fn bs13(&mut self) -> BS13_W<'_>[src]

Bit 13 - Port x set bit y (y= 0..15)

pub fn bs12(&mut self) -> BS12_W<'_>[src]

Bit 12 - Port x set bit y (y= 0..15)

pub fn bs11(&mut self) -> BS11_W<'_>[src]

Bit 11 - Port x set bit y (y= 0..15)

pub fn bs10(&mut self) -> BS10_W<'_>[src]

Bit 10 - Port x set bit y (y= 0..15)

pub fn bs9(&mut self) -> BS9_W<'_>[src]

Bit 9 - Port x set bit y (y= 0..15)

pub fn bs8(&mut self) -> BS8_W<'_>[src]

Bit 8 - Port x set bit y (y= 0..15)

pub fn bs7(&mut self) -> BS7_W<'_>[src]

Bit 7 - Port x set bit y (y= 0..15)

pub fn bs6(&mut self) -> BS6_W<'_>[src]

Bit 6 - Port x set bit y (y= 0..15)

pub fn bs5(&mut self) -> BS5_W<'_>[src]

Bit 5 - Port x set bit y (y= 0..15)

pub fn bs4(&mut self) -> BS4_W<'_>[src]

Bit 4 - Port x set bit y (y= 0..15)

pub fn bs3(&mut self) -> BS3_W<'_>[src]

Bit 3 - Port x set bit y (y= 0..15)

pub fn bs2(&mut self) -> BS2_W<'_>[src]

Bit 2 - Port x set bit y (y= 0..15)

pub fn bs1(&mut self) -> BS1_W<'_>[src]

Bit 1 - Port x set bit y (y= 0..15)

pub fn bs0(&mut self) -> BS0_W<'_>[src]

Bit 0 - Port x set bit y (y= 0..15)

impl W<u32, Reg<u32, _LCKR>>[src]

pub fn lckk(&mut self) -> LCKK_W<'_>[src]

Bit 16 - Port x lock bit y (y= 0..15)

pub fn lck15(&mut self) -> LCK15_W<'_>[src]

Bit 15 - Port x lock bit y (y= 0..15)

pub fn lck14(&mut self) -> LCK14_W<'_>[src]

Bit 14 - Port x lock bit y (y= 0..15)

pub fn lck13(&mut self) -> LCK13_W<'_>[src]

Bit 13 - Port x lock bit y (y= 0..15)

pub fn lck12(&mut self) -> LCK12_W<'_>[src]

Bit 12 - Port x lock bit y (y= 0..15)

pub fn lck11(&mut self) -> LCK11_W<'_>[src]

Bit 11 - Port x lock bit y (y= 0..15)

pub fn lck10(&mut self) -> LCK10_W<'_>[src]

Bit 10 - Port x lock bit y (y= 0..15)

pub fn lck9(&mut self) -> LCK9_W<'_>[src]

Bit 9 - Port x lock bit y (y= 0..15)

pub fn lck8(&mut self) -> LCK8_W<'_>[src]

Bit 8 - Port x lock bit y (y= 0..15)

pub fn lck7(&mut self) -> LCK7_W<'_>[src]

Bit 7 - Port x lock bit y (y= 0..15)

pub fn lck6(&mut self) -> LCK6_W<'_>[src]

Bit 6 - Port x lock bit y (y= 0..15)

pub fn lck5(&mut self) -> LCK5_W<'_>[src]

Bit 5 - Port x lock bit y (y= 0..15)

pub fn lck4(&mut self) -> LCK4_W<'_>[src]

Bit 4 - Port x lock bit y (y= 0..15)

pub fn lck3(&mut self) -> LCK3_W<'_>[src]

Bit 3 - Port x lock bit y (y= 0..15)

pub fn lck2(&mut self) -> LCK2_W<'_>[src]

Bit 2 - Port x lock bit y (y= 0..15)

pub fn lck1(&mut self) -> LCK1_W<'_>[src]

Bit 1 - Port x lock bit y (y= 0..15)

pub fn lck0(&mut self) -> LCK0_W<'_>[src]

Bit 0 - Port x lock bit y (y= 0..15)

impl W<u32, Reg<u32, _AFRL>>[src]

pub fn afsel7(&mut self) -> AFSEL7_W<'_>[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel6(&mut self) -> AFSEL6_W<'_>[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel5(&mut self) -> AFSEL5_W<'_>[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel4(&mut self) -> AFSEL4_W<'_>[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel3(&mut self) -> AFSEL3_W<'_>[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel2(&mut self) -> AFSEL2_W<'_>[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel1(&mut self) -> AFSEL1_W<'_>[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)

pub fn afsel0(&mut self) -> AFSEL0_W<'_>[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)

impl W<u32, Reg<u32, _AFRH>>[src]

pub fn afsel15(&mut self) -> AFSEL15_W<'_>[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel14(&mut self) -> AFSEL14_W<'_>[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel13(&mut self) -> AFSEL13_W<'_>[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel12(&mut self) -> AFSEL12_W<'_>[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel11(&mut self) -> AFSEL11_W<'_>[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel10(&mut self) -> AFSEL10_W<'_>[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel9(&mut self) -> AFSEL9_W<'_>[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)

pub fn afsel8(&mut self) -> AFSEL8_W<'_>[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)

impl W<u32, Reg<u32, _BRR>>[src]

pub fn br0(&mut self) -> BR0_W<'_>[src]

Bit 0 - Port x reset IO pin y

pub fn br1(&mut self) -> BR1_W<'_>[src]

Bit 1 - Port x reset IO pin y

pub fn br2(&mut self) -> BR2_W<'_>[src]

Bit 2 - Port x reset IO pin y

pub fn br3(&mut self) -> BR3_W<'_>[src]

Bit 3 - Port x reset IO pin y

pub fn br4(&mut self) -> BR4_W<'_>[src]

Bit 4 - Port x reset IO pin y

pub fn br5(&mut self) -> BR5_W<'_>[src]

Bit 5 - Port x reset IO pin y

pub fn br6(&mut self) -> BR6_W<'_>[src]

Bit 6 - Port x reset IO pin y

pub fn br7(&mut self) -> BR7_W<'_>[src]

Bit 7 - Port x reset IO pin y

pub fn br8(&mut self) -> BR8_W<'_>[src]

Bit 8 - Port x reset IO pin y

pub fn br9(&mut self) -> BR9_W<'_>[src]

Bit 9 - Port x reset IO pin y

pub fn br10(&mut self) -> BR10_W<'_>[src]

Bit 10 - Port x reset IO pin y

pub fn br11(&mut self) -> BR11_W<'_>[src]

Bit 11 - Port x reset IO pin y

pub fn br12(&mut self) -> BR12_W<'_>[src]

Bit 12 - Port x reset IO pin y

pub fn br13(&mut self) -> BR13_W<'_>[src]

Bit 13 - Port x reset IO pin y

pub fn br14(&mut self) -> BR14_W<'_>[src]

Bit 14 - Port x reset IO pin y

pub fn br15(&mut self) -> BR15_W<'_>[src]

Bit 15 - Port x reset IO pin y

impl W<u32, Reg<u32, _SECCFGR>>[src]

pub fn sec0(&mut self) -> SEC0_W<'_>[src]

Bit 0 - I/O pin of Port x secure bit enable

pub fn sec1(&mut self) -> SEC1_W<'_>[src]

Bit 1 - I/O pin of Port x secure bit enable

pub fn sec2(&mut self) -> SEC2_W<'_>[src]

Bit 2 - I/O pin of Port x secure bit enable

pub fn sec3(&mut self) -> SEC3_W<'_>[src]

Bit 3 - I/O pin of Port x secure bit enable

pub fn sec4(&mut self) -> SEC4_W<'_>[src]

Bit 4 - I/O pin of Port x secure bit enable

pub fn sec5(&mut self) -> SEC5_W<'_>[src]

Bit 5 - I/O pin of Port x secure bit enable

pub fn sec6(&mut self) -> SEC6_W<'_>[src]

Bit 6 - I/O pin of Port x secure bit enable

pub fn sec7(&mut self) -> SEC7_W<'_>[src]

Bit 7 - I/O pin of Port x secure bit enable

pub fn sec8(&mut self) -> SEC8_W<'_>[src]

Bit 8 - I/O pin of Port x secure bit enable

pub fn sec9(&mut self) -> SEC9_W<'_>[src]

Bit 9 - I/O pin of Port x secure bit enable

pub fn sec10(&mut self) -> SEC10_W<'_>[src]

Bit 10 - I/O pin of Port x secure bit enable

pub fn sec11(&mut self) -> SEC11_W<'_>[src]

Bit 11 - I/O pin of Port x secure bit enable

pub fn sec12(&mut self) -> SEC12_W<'_>[src]

Bit 12 - I/O pin of Port x secure bit enable

pub fn sec13(&mut self) -> SEC13_W<'_>[src]

Bit 13 - I/O pin of Port x secure bit enable

pub fn sec14(&mut self) -> SEC14_W<'_>[src]

Bit 14 - I/O pin of Port x secure bit enable

pub fn sec15(&mut self) -> SEC15_W<'_>[src]

Bit 15 - I/O pin of Port x secure bit enable

impl W<u32, Reg<u32, _CR1>>[src]

pub fn tamp1e(&mut self) -> TAMP1E_W<'_>[src]

Bit 0 - TAMP1E

pub fn tamp2e(&mut self) -> TAMP2E_W<'_>[src]

Bit 1 - TAMP2E

pub fn tamp3e(&mut self) -> TAMP3E_W<'_>[src]

Bit 2 - TAMP3E

pub fn tamp4e(&mut self) -> TAMP4E_W<'_>[src]

Bit 3 - TAMP4E

pub fn tamp5e(&mut self) -> TAMP5E_W<'_>[src]

Bit 4 - TAMP5E

pub fn tamp6e(&mut self) -> TAMP6E_W<'_>[src]

Bit 5 - TAMP6E

pub fn tamp7e(&mut self) -> TAMP7E_W<'_>[src]

Bit 6 - TAMP7E

pub fn tamp8e(&mut self) -> TAMP8E_W<'_>[src]

Bit 7 - TAMP8E

pub fn itamp1e(&mut self) -> ITAMP1E_W<'_>[src]

Bit 16 - ITAMP1E

pub fn itamp2e(&mut self) -> ITAMP2E_W<'_>[src]

Bit 17 - ITAMP2E

pub fn itamp3e(&mut self) -> ITAMP3E_W<'_>[src]

Bit 18 - ITAMP3E

pub fn itamp5e(&mut self) -> ITAMP5E_W<'_>[src]

Bit 20 - ITAMP5E

pub fn itamp8e(&mut self) -> ITAMP8E_W<'_>[src]

Bit 23 - ITAMP5E

impl W<u32, Reg<u32, _CR2>>[src]

pub fn tamp1noer(&mut self) -> TAMP1NOER_W<'_>[src]

Bit 0 - TAMP1NOER

pub fn tamp2noer(&mut self) -> TAMP2NOER_W<'_>[src]

Bit 1 - TAMP2NOER

pub fn tamp3noer(&mut self) -> TAMP3NOER_W<'_>[src]

Bit 2 - TAMP3NOER

pub fn tamp4noer(&mut self) -> TAMP4NOER_W<'_>[src]

Bit 3 - TAMP4NOER

pub fn tamp5noer(&mut self) -> TAMP5NOER_W<'_>[src]

Bit 4 - TAMP5NOER

pub fn tamp6noer(&mut self) -> TAMP6NOER_W<'_>[src]

Bit 5 - TAMP6NOER

pub fn tamp7noer(&mut self) -> TAMP7NOER_W<'_>[src]

Bit 6 - TAMP7NOER

pub fn tamp8noer(&mut self) -> TAMP8NOER_W<'_>[src]

Bit 7 - TAMP8NOER

pub fn tamp1msk(&mut self) -> TAMP1MSK_W<'_>[src]

Bit 16 - TAMP1MSK

pub fn tamp2msk(&mut self) -> TAMP2MSK_W<'_>[src]

Bit 17 - TAMP2MSK

pub fn tamp3msk(&mut self) -> TAMP3MSK_W<'_>[src]

Bit 18 - TAMP3MSK

pub fn bkerase(&mut self) -> BKERASE_W<'_>[src]

Bit 23 - BKERASE

pub fn tamp1trg(&mut self) -> TAMP1TRG_W<'_>[src]

Bit 24 - TAMP1TRG

pub fn tamp2trg(&mut self) -> TAMP2TRG_W<'_>[src]

Bit 25 - TAMP2TRG

pub fn tamp3trg(&mut self) -> TAMP3TRG_W<'_>[src]

Bit 26 - TAMP3TRG

pub fn tamp4trg(&mut self) -> TAMP4TRG_W<'_>[src]

Bit 27 - TAMP4TRG

pub fn tamp5trg(&mut self) -> TAMP5TRG_W<'_>[src]

Bit 28 - TAMP5TRG

pub fn tamp6trg(&mut self) -> TAMP6TRG_W<'_>[src]

Bit 29 - TAMP6TRG

pub fn tamp7trg(&mut self) -> TAMP7TRG_W<'_>[src]

Bit 30 - TAMP7TRG

pub fn tamp8trg(&mut self) -> TAMP8TRG_W<'_>[src]

Bit 31 - TAMP8TRG

impl W<u32, Reg<u32, _CR3>>[src]

pub fn itamp1noer(&mut self) -> ITAMP1NOER_W<'_>[src]

Bit 0 - ITAMP1NOER

pub fn itamp2noer(&mut self) -> ITAMP2NOER_W<'_>[src]

Bit 1 - ITAMP2NOER

pub fn itamp3noer(&mut self) -> ITAMP3NOER_W<'_>[src]

Bit 2 - ITAMP3NOER

pub fn itamp5noer(&mut self) -> ITAMP5NOER_W<'_>[src]

Bit 4 - ITAMP5NOER

pub fn itamp8noer(&mut self) -> ITAMP8NOER_W<'_>[src]

Bit 7 - ITAMP8NOER

impl W<u32, Reg<u32, _FLTCR>>[src]

pub fn tampfreq(&mut self) -> TAMPFREQ_W<'_>[src]

Bits 0:2 - TAMPFREQ

pub fn tampflt(&mut self) -> TAMPFLT_W<'_>[src]

Bits 3:4 - TAMPFLT

pub fn tampprch(&mut self) -> TAMPPRCH_W<'_>[src]

Bits 5:6 - TAMPPRCH

pub fn tamppudis(&mut self) -> TAMPPUDIS_W<'_>[src]

Bit 7 - TAMPPUDIS

impl W<u32, Reg<u32, _ATCR1>>[src]

pub fn tamp1am(&mut self) -> TAMP1AM_W<'_>[src]

Bit 0 - TAMP1AM

pub fn tamp2am(&mut self) -> TAMP2AM_W<'_>[src]

Bit 1 - TAMP2AM

pub fn tamp3am(&mut self) -> TAMP3AM_W<'_>[src]

Bit 2 - TAMP3AM

pub fn tamp4am(&mut self) -> TAMP4AM_W<'_>[src]

Bit 3 - TAMP4AM

pub fn tamp5am(&mut self) -> TAMP5AM_W<'_>[src]

Bit 4 - TAMP5AM

pub fn tamp6am(&mut self) -> TAMP6AM_W<'_>[src]

Bit 5 - TAMP6AM

pub fn tamp7am(&mut self) -> TAMP7AM_W<'_>[src]

Bit 6 - TAMP7AM

pub fn tamp8am(&mut self) -> TAMP8AM_W<'_>[src]

Bit 7 - TAMP8AM

pub fn atosel1(&mut self) -> ATOSEL1_W<'_>[src]

Bits 8:9 - ATOSEL1

pub fn atosel2(&mut self) -> ATOSEL2_W<'_>[src]

Bits 10:11 - ATOSEL2

pub fn atosel3(&mut self) -> ATOSEL3_W<'_>[src]

Bits 12:13 - ATOSEL3

pub fn atosel4(&mut self) -> ATOSEL4_W<'_>[src]

Bits 14:15 - ATOSEL4

pub fn atcksel(&mut self) -> ATCKSEL_W<'_>[src]

Bits 16:17 - ATCKSEL

pub fn atper(&mut self) -> ATPER_W<'_>[src]

Bits 24:25 - ATPER

pub fn atoshare(&mut self) -> ATOSHARE_W<'_>[src]

Bit 30 - ATOSHARE

pub fn flten(&mut self) -> FLTEN_W<'_>[src]

Bit 31 - FLTEN

impl W<u32, Reg<u32, _ATSEEDR>>[src]

pub fn seed(&mut self) -> SEED_W<'_>[src]

Bits 0:31 - Pseudo-random generator seed value

impl W<u32, Reg<u32, _ATCR2>>[src]

pub fn atosel1(&mut self) -> ATOSEL1_W<'_>[src]

Bits 8:10 - ATOSEL1

pub fn atosel2(&mut self) -> ATOSEL2_W<'_>[src]

Bits 11:13 - ATOSEL2

pub fn atosel3(&mut self) -> ATOSEL3_W<'_>[src]

Bits 14:16 - ATOSEL3

pub fn atosel4(&mut self) -> ATOSEL4_W<'_>[src]

Bits 17:19 - ATOSEL4

pub fn atosel5(&mut self) -> ATOSEL5_W<'_>[src]

Bits 20:22 - ATOSEL5

pub fn atosel6(&mut self) -> ATOSEL6_W<'_>[src]

Bits 23:25 - ATOSEL6

pub fn atosel7(&mut self) -> ATOSEL7_W<'_>[src]

Bits 26:28 - ATOSEL7

pub fn atosel8(&mut self) -> ATOSEL8_W<'_>[src]

Bits 29:31 - ATOSEL8

impl W<u32, Reg<u32, _SMCR>>[src]

pub fn bkprwdprot(&mut self) -> BKPRWDPROT_W<'_>[src]

Bits 0:7 - Backup registers read/write protection offset

pub fn bkpwdprot(&mut self) -> BKPWDPROT_W<'_>[src]

Bits 16:23 - Backup registers write protection offset

pub fn tampdprot(&mut self) -> TAMPDPROT_W<'_>[src]

Bit 31 - Tamper protection

impl W<u32, Reg<u32, _PRIVCR>>[src]

pub fn bkprwpriv(&mut self) -> BKPRWPRIV_W<'_>[src]

Bit 29 - Backup registers zone 1 privilege protection

pub fn bkpwpriv(&mut self) -> BKPWPRIV_W<'_>[src]

Bit 30 - Backup registers zone 2 privilege protection

pub fn tamppriv(&mut self) -> TAMPPRIV_W<'_>[src]

Bit 31 - Tamper privilege protection

impl W<u32, Reg<u32, _IER>>[src]

pub fn tamp1ie(&mut self) -> TAMP1IE_W<'_>[src]

Bit 0 - TAMP1IE

pub fn tamp2ie(&mut self) -> TAMP2IE_W<'_>[src]

Bit 1 - TAMP2IE

pub fn tamp3ie(&mut self) -> TAMP3IE_W<'_>[src]

Bit 2 - TAMP3IE

pub fn tamp4ie(&mut self) -> TAMP4IE_W<'_>[src]

Bit 3 - TAMP4IE

pub fn tamp5ie(&mut self) -> TAMP5IE_W<'_>[src]

Bit 4 - TAMP5IE

pub fn tamp6ie(&mut self) -> TAMP6IE_W<'_>[src]

Bit 5 - TAMP6IE

pub fn tamp7ie(&mut self) -> TAMP7IE_W<'_>[src]

Bit 6 - TAMP7IE

pub fn tamp8ie(&mut self) -> TAMP8IE_W<'_>[src]

Bit 7 - TAMP8IE

pub fn itamp1ie(&mut self) -> ITAMP1IE_W<'_>[src]

Bit 16 - ITAMP1IE

pub fn itamp2ie(&mut self) -> ITAMP2IE_W<'_>[src]

Bit 17 - ITAMP2IE

pub fn itamp3ie(&mut self) -> ITAMP3IE_W<'_>[src]

Bit 18 - ITAMP3IE

pub fn itamp5ie(&mut self) -> ITAMP5IE_W<'_>[src]

Bit 20 - ITAMP5IE

pub fn itamp8ie(&mut self) -> ITAMP8IE_W<'_>[src]

Bit 23 - ITAMP8IE

impl W<u32, Reg<u32, _SCR>>[src]

pub fn ctamp1f(&mut self) -> CTAMP1F_W<'_>[src]

Bit 0 - CTAMP1F

pub fn ctamp2f(&mut self) -> CTAMP2F_W<'_>[src]

Bit 1 - CTAMP2F

pub fn ctamp3f(&mut self) -> CTAMP3F_W<'_>[src]

Bit 2 - CTAMP3F

pub fn ctamp4f(&mut self) -> CTAMP4F_W<'_>[src]

Bit 3 - CTAMP4F

pub fn ctamp5f(&mut self) -> CTAMP5F_W<'_>[src]

Bit 4 - CTAMP5F

pub fn ctamp6f(&mut self) -> CTAMP6F_W<'_>[src]

Bit 5 - CTAMP6F

pub fn ctamp7f(&mut self) -> CTAMP7F_W<'_>[src]

Bit 6 - CTAMP7F

pub fn ctamp8f(&mut self) -> CTAMP8F_W<'_>[src]

Bit 7 - CTAMP8F

pub fn citamp1f(&mut self) -> CITAMP1F_W<'_>[src]

Bit 16 - CITAMP1F

pub fn citamp2f(&mut self) -> CITAMP2F_W<'_>[src]

Bit 17 - CITAMP2F

pub fn citamp3f(&mut self) -> CITAMP3F_W<'_>[src]

Bit 18 - CITAMP3F

pub fn citamp5f(&mut self) -> CITAMP5F_W<'_>[src]

Bit 20 - CITAMP5F

pub fn citamp8f(&mut self) -> CITAMP8F_W<'_>[src]

Bit 23 - CITAMP8F

impl W<u32, Reg<u32, _CFGR>>[src]

pub fn tmonen(&mut self) -> TMONEN_W<'_>[src]

Bit 1 - TMONEN

pub fn vmonen(&mut self) -> VMONEN_W<'_>[src]

Bit 2 - VMONEN

pub fn wutmonen(&mut self) -> WUTMONEN_W<'_>[src]

Bit 3 - WUTMONEN

impl W<u32, Reg<u32, _BKP0R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP1R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP2R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP3R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP4R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP5R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP6R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP7R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP8R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP9R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP10R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP11R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP12R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP13R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP14R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP15R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP16R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP17R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP18R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP19R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP20R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP21R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP22R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP23R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP24R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP25R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP26R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP27R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP28R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP29R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP30R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _BKP31R>>[src]

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bits 0:31 - BKP

impl W<u32, Reg<u32, _CR1>>[src]

pub fn pe(&mut self) -> PE_W<'_>[src]

Bit 0 - Peripheral enable

pub fn txie(&mut self) -> TXIE_W<'_>[src]

Bit 1 - TX Interrupt enable

pub fn rxie(&mut self) -> RXIE_W<'_>[src]

Bit 2 - RX Interrupt enable

pub fn addrie(&mut self) -> ADDRIE_W<'_>[src]

Bit 3 - Address match interrupt enable (slave only)

pub fn nackie(&mut self) -> NACKIE_W<'_>[src]

Bit 4 - Not acknowledge received interrupt enable

pub fn stopie(&mut self) -> STOPIE_W<'_>[src]

Bit 5 - STOP detection Interrupt enable

pub fn tcie(&mut self) -> TCIE_W<'_>[src]

Bit 6 - Transfer Complete interrupt enable

pub fn errie(&mut self) -> ERRIE_W<'_>[src]

Bit 7 - Error interrupts enable

pub fn dnf(&mut self) -> DNF_W<'_>[src]

Bits 8:11 - Digital noise filter

pub fn anfoff(&mut self) -> ANFOFF_W<'_>[src]

Bit 12 - Analog noise filter OFF

pub fn txdmaen(&mut self) -> TXDMAEN_W<'_>[src]

Bit 14 - DMA transmission requests enable

pub fn rxdmaen(&mut self) -> RXDMAEN_W<'_>[src]

Bit 15 - DMA reception requests enable

pub fn sbc(&mut self) -> SBC_W<'_>[src]

Bit 16 - Slave byte control

pub fn nostretch(&mut self) -> NOSTRETCH_W<'_>[src]

Bit 17 - Clock stretching disable

pub fn wupen(&mut self) -> WUPEN_W<'_>[src]

Bit 18 - Wakeup from STOP enable

pub fn gcen(&mut self) -> GCEN_W<'_>[src]

Bit 19 - General call enable

pub fn smbhen(&mut self) -> SMBHEN_W<'_>[src]

Bit 20 - SMBus Host address enable

pub fn smbden(&mut self) -> SMBDEN_W<'_>[src]

Bit 21 - SMBus Device Default address enable

pub fn alerten(&mut self) -> ALERTEN_W<'_>[src]

Bit 22 - SMBUS alert enable

pub fn pecen(&mut self) -> PECEN_W<'_>[src]

Bit 23 - PEC enable

impl W<u32, Reg<u32, _CR2>>[src]

pub fn pecbyte(&mut self) -> PECBYTE_W<'_>[src]

Bit 26 - Packet error checking byte

pub fn autoend(&mut self) -> AUTOEND_W<'_>[src]

Bit 25 - Automatic end mode (master mode)

pub fn reload(&mut self) -> RELOAD_W<'_>[src]

Bit 24 - NBYTES reload mode

pub fn nbytes(&mut self) -> NBYTES_W<'_>[src]

Bits 16:23 - Number of bytes

pub fn nack(&mut self) -> NACK_W<'_>[src]

Bit 15 - NACK generation (slave mode)

pub fn stop(&mut self) -> STOP_W<'_>[src]

Bit 14 - Stop generation (master mode)

pub fn start(&mut self) -> START_W<'_>[src]

Bit 13 - Start generation

pub fn head10r(&mut self) -> HEAD10R_W<'_>[src]

Bit 12 - 10-bit address header only read direction (master receiver mode)

pub fn add10(&mut self) -> ADD10_W<'_>[src]

Bit 11 - 10-bit addressing mode (master mode)

pub fn rd_wrn(&mut self) -> RD_WRN_W<'_>[src]

Bit 10 - Transfer direction (master mode)

pub fn sadd(&mut self) -> SADD_W<'_>[src]

Bits 0:9 - Slave address bit (master mode)

impl W<u32, Reg<u32, _OAR1>>[src]

pub fn oa1(&mut self) -> OA1_W<'_>[src]

Bits 0:9 - Interface address

pub fn oa1mode(&mut self) -> OA1MODE_W<'_>[src]

Bit 10 - Own Address 1 10-bit mode

pub fn oa1en(&mut self) -> OA1EN_W<'_>[src]

Bit 15 - Own Address 1 enable

impl W<u32, Reg<u32, _OAR2>>[src]

pub fn oa2(&mut self) -> OA2_W<'_>[src]

Bits 1:7 - Interface address

pub fn oa2msk(&mut self) -> OA2MSK_W<'_>[src]

Bits 8:10 - Own Address 2 masks

pub fn oa2en(&mut self) -> OA2EN_W<'_>[src]

Bit 15 - Own Address 2 enable

impl W<u32, Reg<u32, _TIMINGR>>[src]

pub fn scll(&mut self) -> SCLL_W<'_>[src]

Bits 0:7 - SCL low period (master mode)

pub fn sclh(&mut self) -> SCLH_W<'_>[src]

Bits 8:15 - SCL high period (master mode)

pub fn sdadel(&mut self) -> SDADEL_W<'_>[src]

Bits 16:19 - Data hold time

pub fn scldel(&mut self) -> SCLDEL_W<'_>[src]

Bits 20:23 - Data setup time

pub fn presc(&mut self) -> PRESC_W<'_>[src]

Bits 28:31 - Timing prescaler

impl W<u32, Reg<u32, _TIMEOUTR>>[src]

pub fn timeouta(&mut self) -> TIMEOUTA_W<'_>[src]

Bits 0:11 - Bus timeout A

pub fn tidle(&mut self) -> TIDLE_W<'_>[src]

Bit 12 - Idle clock timeout detection

pub fn timouten(&mut self) -> TIMOUTEN_W<'_>[src]

Bit 15 - Clock timeout enable

pub fn timeoutb(&mut self) -> TIMEOUTB_W<'_>[src]

Bits 16:27 - Bus timeout B

pub fn texten(&mut self) -> TEXTEN_W<'_>[src]

Bit 31 - Extended clock timeout enable

impl W<u32, Reg<u32, _ISR>>[src]

pub fn txis(&mut self) -> TXIS_W<'_>[src]

Bit 1 - Transmit interrupt status (transmitters)

pub fn txe(&mut self) -> TXE_W<'_>[src]

Bit 0 - Transmit data register empty (transmitters)

impl W<u32, Reg<u32, _ICR>>[src]

pub fn alertcf(&mut self) -> ALERTCF_W<'_>[src]

Bit 13 - Alert flag clear

pub fn timoutcf(&mut self) -> TIMOUTCF_W<'_>[src]

Bit 12 - Timeout detection flag clear

pub fn peccf(&mut self) -> PECCF_W<'_>[src]

Bit 11 - PEC Error flag clear

pub fn ovrcf(&mut self) -> OVRCF_W<'_>[src]

Bit 10 - Overrun/Underrun flag clear

pub fn arlocf(&mut self) -> ARLOCF_W<'_>[src]

Bit 9 - Arbitration lost flag clear

pub fn berrcf(&mut self) -> BERRCF_W<'_>[src]

Bit 8 - Bus error flag clear

pub fn stopcf(&mut self) -> STOPCF_W<'_>[src]

Bit 5 - Stop detection flag clear

pub fn nackcf(&mut self) -> NACKCF_W<'_>[src]

Bit 4 - Not Acknowledge flag clear

pub fn addrcf(&mut self) -> ADDRCF_W<'_>[src]

Bit 3 - Address Matched flag clear

impl W<u32, Reg<u32, _TXDR>>[src]

pub fn txdata(&mut self) -> TXDATA_W<'_>[src]

Bits 0:7 - 8-bit transmit data

impl W<u32, Reg<u32, _ICACHE_CR>>[src]

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - EN

pub fn cacheinv(&mut self) -> CACHEINV_W<'_>[src]

Bit 1 - CACHEINV

pub fn waysel(&mut self) -> WAYSEL_W<'_>[src]

Bit 2 - WAYSEL

pub fn hitmen(&mut self) -> HITMEN_W<'_>[src]

Bit 16 - HITMEN

pub fn missmen(&mut self) -> MISSMEN_W<'_>[src]

Bit 17 - MISSMEN

pub fn hitmrst(&mut self) -> HITMRST_W<'_>[src]

Bit 18 - HITMRST

pub fn missmrst(&mut self) -> MISSMRST_W<'_>[src]

Bit 19 - MISSMRST

impl W<u32, Reg<u32, _ICACHE_IER>>[src]

pub fn bsyendie(&mut self) -> BSYENDIE_W<'_>[src]

Bit 1 - BSYENDIE

pub fn errie(&mut self) -> ERRIE_W<'_>[src]

Bit 2 - ERRIE

impl W<u32, Reg<u32, _ICACHE_FCR>>[src]

pub fn cbsyendf(&mut self) -> CBSYENDF_W<'_>[src]

Bit 1 - CBSYENDF

pub fn cerrf(&mut self) -> CERRF_W<'_>[src]

Bit 2 - CERRF

impl W<u32, Reg<u32, _ICACHE_CRR0>>[src]

pub fn baseaddr(&mut self) -> BASEADDR_W<'_>[src]

Bits 0:7 - BASEADDR

pub fn rsize(&mut self) -> RSIZE_W<'_>[src]

Bits 9:11 - RSIZE

pub fn ren(&mut self) -> REN_W<'_>[src]

Bit 15 - REN

pub fn remapaddr(&mut self) -> REMAPADDR_W<'_>[src]

Bits 16:26 - REMAPADDR

pub fn mstsel(&mut self) -> MSTSEL_W<'_>[src]

Bit 28 - MSTSEL

pub fn hburst(&mut self) -> HBURST_W<'_>[src]

Bit 31 - HBURST

impl W<u32, Reg<u32, _ICACHE_CRR1>>[src]

pub fn baseaddr(&mut self) -> BASEADDR_W<'_>[src]

Bits 0:7 - BASEADDR

pub fn rsize(&mut self) -> RSIZE_W<'_>[src]

Bits 9:11 - RSIZE

pub fn ren(&mut self) -> REN_W<'_>[src]

Bit 15 - REN

pub fn remapaddr(&mut self) -> REMAPADDR_W<'_>[src]

Bits 16:26 - REMAPADDR

pub fn mstsel(&mut self) -> MSTSEL_W<'_>[src]

Bit 28 - MSTSEL

pub fn hburst(&mut self) -> HBURST_W<'_>[src]

Bit 31 - HBURST

impl W<u32, Reg<u32, _ICACHE_CRR2>>[src]

pub fn baseaddr(&mut self) -> BASEADDR_W<'_>[src]

Bits 0:7 - BASEADDR

pub fn rsize(&mut self) -> RSIZE_W<'_>[src]

Bits 9:11 - RSIZE

pub fn ren(&mut self) -> REN_W<'_>[src]

Bit 15 - REN

pub fn remapaddr(&mut self) -> REMAPADDR_W<'_>[src]

Bits 16:26 - REMAPADDR

pub fn mstsel(&mut self) -> MSTSEL_W<'_>[src]

Bit 28 - MSTSEL

pub fn hburst(&mut self) -> HBURST_W<'_>[src]

Bit 31 - HBURST

impl W<u32, Reg<u32, _ICACHE_CRR3>>[src]

pub fn baseaddr(&mut self) -> BASEADDR_W<'_>[src]

Bits 0:7 - BASEADDR

pub fn rsize(&mut self) -> RSIZE_W<'_>[src]

Bits 9:11 - RSIZE

pub fn ren(&mut self) -> REN_W<'_>[src]

Bit 15 - REN

pub fn remapaddr(&mut self) -> REMAPADDR_W<'_>[src]

Bits 16:26 - REMAPADDR

pub fn mstsel(&mut self) -> MSTSEL_W<'_>[src]

Bit 28 - MSTSEL

pub fn hburst(&mut self) -> HBURST_W<'_>[src]

Bit 31 - HBURST

impl W<u32, Reg<u32, _KR>>[src]

pub fn key(&mut self) -> KEY_W<'_>[src]

Bits 0:15 - Key value (write only, read 0x0000)

impl W<u32, Reg<u32, _PR>>[src]

pub fn pr(&mut self) -> PR_W<'_>[src]

Bits 0:2 - Prescaler divider

impl W<u32, Reg<u32, _RLR>>[src]

pub fn rl(&mut self) -> RL_W<'_>[src]

Bits 0:11 - Watchdog counter reload value

impl W<u32, Reg<u32, _WINR>>[src]

pub fn win(&mut self) -> WIN_W<'_>[src]

Bits 0:11 - Watchdog counter window value

impl W<u32, Reg<u32, _ICR>>[src]

pub fn downcf(&mut self) -> DOWNCF_W<'_>[src]

Bit 6 - Direction change to down Clear Flag

pub fn upcf(&mut self) -> UPCF_W<'_>[src]

Bit 5 - Direction change to UP Clear Flag

pub fn arrokcf(&mut self) -> ARROKCF_W<'_>[src]

Bit 4 - Autoreload register update OK Clear Flag

pub fn cmpokcf(&mut self) -> CMPOKCF_W<'_>[src]

Bit 3 - Compare register update OK Clear Flag

pub fn exttrigcf(&mut self) -> EXTTRIGCF_W<'_>[src]

Bit 2 - External trigger valid edge Clear Flag

pub fn arrmcf(&mut self) -> ARRMCF_W<'_>[src]

Bit 1 - Autoreload match Clear Flag

pub fn cmpmcf(&mut self) -> CMPMCF_W<'_>[src]

Bit 0 - compare match Clear Flag

pub fn uecf(&mut self) -> UECF_W<'_>[src]

Bit 7 - Update event clear flag

pub fn repokcf(&mut self) -> REPOKCF_W<'_>[src]

Bit 8 - Repetition register update OK clear flag

impl W<u32, Reg<u32, _IER>>[src]

pub fn downie(&mut self) -> DOWNIE_W<'_>[src]

Bit 6 - Direction change to down Interrupt Enable

pub fn upie(&mut self) -> UPIE_W<'_>[src]

Bit 5 - Direction change to UP Interrupt Enable

pub fn arrokie(&mut self) -> ARROKIE_W<'_>[src]

Bit 4 - Autoreload register update OK Interrupt Enable

pub fn cmpokie(&mut self) -> CMPOKIE_W<'_>[src]

Bit 3 - Compare register update OK Interrupt Enable

pub fn exttrigie(&mut self) -> EXTTRIGIE_W<'_>[src]

Bit 2 - External trigger valid edge Interrupt Enable

pub fn arrmie(&mut self) -> ARRMIE_W<'_>[src]

Bit 1 - Autoreload match Interrupt Enable

pub fn cmpmie(&mut self) -> CMPMIE_W<'_>[src]

Bit 0 - Compare match Interrupt Enable

pub fn ueie(&mut self) -> UEIE_W<'_>[src]

Bit 7 - Update event interrupt enable

pub fn repokie(&mut self) -> REPOKIE_W<'_>[src]

Bit 8 - REPOKIE

impl W<u32, Reg<u32, _CFGR>>[src]

pub fn enc(&mut self) -> ENC_W<'_>[src]

Bit 24 - Encoder mode enable

pub fn countmode(&mut self) -> COUNTMODE_W<'_>[src]

Bit 23 - counter mode enabled

pub fn preload(&mut self) -> PRELOAD_W<'_>[src]

Bit 22 - Registers update mode

pub fn wavpol(&mut self) -> WAVPOL_W<'_>[src]

Bit 21 - Waveform shape polarity

pub fn wave(&mut self) -> WAVE_W<'_>[src]

Bit 20 - Waveform shape

pub fn timout(&mut self) -> TIMOUT_W<'_>[src]

Bit 19 - Timeout enable

pub fn trigen(&mut self) -> TRIGEN_W<'_>[src]

Bits 17:18 - Trigger enable and polarity

pub fn trigsel(&mut self) -> TRIGSEL_W<'_>[src]

Bits 13:15 - Trigger selector

pub fn presc(&mut self) -> PRESC_W<'_>[src]

Bits 9:11 - Clock prescaler

pub fn trgflt(&mut self) -> TRGFLT_W<'_>[src]

Bits 6:7 - Configurable digital filter for trigger

pub fn ckflt(&mut self) -> CKFLT_W<'_>[src]

Bits 3:4 - Configurable digital filter for external clock

pub fn ckpol(&mut self) -> CKPOL_W<'_>[src]

Bits 1:2 - Clock Polarity

pub fn cksel(&mut self) -> CKSEL_W<'_>[src]

Bit 0 - Clock selector

impl W<u32, Reg<u32, _CR>>[src]

pub fn cntstrt(&mut self) -> CNTSTRT_W<'_>[src]

Bit 2 - Timer start in continuous mode

pub fn sngstrt(&mut self) -> SNGSTRT_W<'_>[src]

Bit 1 - LPTIM start in single mode

pub fn enable(&mut self) -> ENABLE_W<'_>[src]

Bit 0 - LPTIM Enable

pub fn countrst(&mut self) -> COUNTRST_W<'_>[src]

Bit 4 - Counter reset

pub fn rstare(&mut self) -> RSTARE_W<'_>[src]

Bit 3 - Reset after read enable

impl W<u32, Reg<u32, _CMP>>[src]

pub fn cmp(&mut self) -> CMP_W<'_>[src]

Bits 0:15 - Compare value

impl W<u32, Reg<u32, _ARR>>[src]

pub fn arr(&mut self) -> ARR_W<'_>[src]

Bits 0:15 - Auto reload value

impl W<u32, Reg<u32, _OR>>[src]

pub fn or_0(&mut self) -> OR_0_W<'_>[src]

Bit 0 - Option register bit 0

pub fn or_1(&mut self) -> OR_1_W<'_>[src]

Bit 1 - Option register bit 1

impl W<u32, Reg<u32, _RCR>>[src]

pub fn rep(&mut self) -> REP_W<'_>[src]

Bits 0:7 - Repetition register value

impl W<u32, Reg<u32, _MPCBB1_CR>>[src]

pub fn lck(&mut self) -> LCK_W<'_>[src]

Bit 0 - LCK

pub fn invsecstate(&mut self) -> INVSECSTATE_W<'_>[src]

Bit 30 - INVSECSTATE

pub fn srwiladis(&mut self) -> SRWILADIS_W<'_>[src]

Bit 31 - SRWILADIS

impl W<u32, Reg<u32, _MPCBB1_LCKVTR1>>[src]

pub fn lcksb0(&mut self) -> LCKSB0_W<'_>[src]

Bit 0 - LCKSB0

pub fn lcksb1(&mut self) -> LCKSB1_W<'_>[src]

Bit 1 - LCKSB1

pub fn lcksb2(&mut self) -> LCKSB2_W<'_>[src]

Bit 2 - LCKSB2

pub fn lcksb3(&mut self) -> LCKSB3_W<'_>[src]

Bit 3 - LCKSB3

pub fn lcksb4(&mut self) -> LCKSB4_W<'_>[src]

Bit 4 - LCKSB4

pub fn lcksb5(&mut self) -> LCKSB5_W<'_>[src]

Bit 5 - LCKSB5

pub fn lcksb6(&mut self) -> LCKSB6_W<'_>[src]

Bit 6 - LCKSB6

pub fn lcksb7(&mut self) -> LCKSB7_W<'_>[src]

Bit 7 - LCKSB7

pub fn lcksb8(&mut self) -> LCKSB8_W<'_>[src]

Bit 8 - LCKSB8

pub fn lcksb9(&mut self) -> LCKSB9_W<'_>[src]

Bit 9 - LCKSB9

pub fn lcksb10(&mut self) -> LCKSB10_W<'_>[src]

Bit 10 - LCKSB10

pub fn lcksb11(&mut self) -> LCKSB11_W<'_>[src]

Bit 11 - LCKSB11

pub fn lcksb12(&mut self) -> LCKSB12_W<'_>[src]

Bit 12 - LCKSB12

pub fn lcksb13(&mut self) -> LCKSB13_W<'_>[src]

Bit 13 - LCKSB13

pub fn lcksb14(&mut self) -> LCKSB14_W<'_>[src]

Bit 14 - LCKSB14

pub fn lcksb15(&mut self) -> LCKSB15_W<'_>[src]

Bit 15 - LCKSB15

pub fn lcksb16(&mut self) -> LCKSB16_W<'_>[src]

Bit 16 - LCKSB16

pub fn lcksb17(&mut self) -> LCKSB17_W<'_>[src]

Bit 17 - LCKSB17

pub fn lcksb18(&mut self) -> LCKSB18_W<'_>[src]

Bit 18 - LCKSB18

pub fn lcksb19(&mut self) -> LCKSB19_W<'_>[src]

Bit 19 - LCKSB19

pub fn lcksb20(&mut self) -> LCKSB20_W<'_>[src]

Bit 20 - LCKSB20

pub fn lcksb21(&mut self) -> LCKSB21_W<'_>[src]

Bit 21 - LCKSB21

pub fn lcksb22(&mut self) -> LCKSB22_W<'_>[src]

Bit 22 - LCKSB22

pub fn lcksb23(&mut self) -> LCKSB23_W<'_>[src]

Bit 23 - LCKSB23

pub fn lcksb24(&mut self) -> LCKSB24_W<'_>[src]

Bit 24 - LCKSB24

pub fn lcksb25(&mut self) -> LCKSB25_W<'_>[src]

Bit 25 - LCKSB25

pub fn lcksb26(&mut self) -> LCKSB26_W<'_>[src]

Bit 26 - LCKSB26

pub fn lcksb27(&mut self) -> LCKSB27_W<'_>[src]

Bit 27 - LCKSB27

pub fn lcksb28(&mut self) -> LCKSB28_W<'_>[src]

Bit 28 - LCKSB28

pub fn lcksb29(&mut self) -> LCKSB29_W<'_>[src]

Bit 29 - LCKSB29

pub fn lcksb30(&mut self) -> LCKSB30_W<'_>[src]

Bit 30 - LCKSB30

pub fn lcksb31(&mut self) -> LCKSB31_W<'_>[src]

Bit 31 - LCKSB31

impl W<u32, Reg<u32, _MPCBB1_LCKVTR2>>[src]

pub fn lcksb32(&mut self) -> LCKSB32_W<'_>[src]

Bit 0 - LCKSB32

pub fn lcksb33(&mut self) -> LCKSB33_W<'_>[src]

Bit 1 - LCKSB33

pub fn lcksb34(&mut self) -> LCKSB34_W<'_>[src]

Bit 2 - LCKSB34

pub fn lcksb35(&mut self) -> LCKSB35_W<'_>[src]

Bit 3 - LCKSB35

pub fn lcksb36(&mut self) -> LCKSB36_W<'_>[src]

Bit 4 - LCKSB36

pub fn lcksb37(&mut self) -> LCKSB37_W<'_>[src]

Bit 5 - LCKSB37

pub fn lcksb38(&mut self) -> LCKSB38_W<'_>[src]

Bit 6 - LCKSB38

pub fn lcksb39(&mut self) -> LCKSB39_W<'_>[src]

Bit 7 - LCKSB39

pub fn lcksb40(&mut self) -> LCKSB40_W<'_>[src]

Bit 8 - LCKSB40

pub fn lcksb41(&mut self) -> LCKSB41_W<'_>[src]

Bit 9 - LCKSB41

pub fn lcksb42(&mut self) -> LCKSB42_W<'_>[src]

Bit 10 - LCKSB42

pub fn lcksb43(&mut self) -> LCKSB43_W<'_>[src]

Bit 11 - LCKSB43

pub fn lcksb44(&mut self) -> LCKSB44_W<'_>[src]

Bit 12 - LCKSB44

pub fn lcksb45(&mut self) -> LCKSB45_W<'_>[src]

Bit 13 - LCKSB45

pub fn lcksb46(&mut self) -> LCKSB46_W<'_>[src]

Bit 14 - LCKSB46

pub fn lcksb47(&mut self) -> LCKSB47_W<'_>[src]

Bit 15 - LCKSB47

pub fn lcksb48(&mut self) -> LCKSB48_W<'_>[src]

Bit 16 - LCKSB48

pub fn lcksb49(&mut self) -> LCKSB49_W<'_>[src]

Bit 17 - LCKSB49

pub fn lcksb50(&mut self) -> LCKSB50_W<'_>[src]

Bit 18 - LCKSB50

pub fn lcksb51(&mut self) -> LCKSB51_W<'_>[src]

Bit 19 - LCKSB51

pub fn lcksb52(&mut self) -> LCKSB52_W<'_>[src]

Bit 20 - LCKSB52

pub fn lcksb53(&mut self) -> LCKSB53_W<'_>[src]

Bit 21 - LCKSB53

pub fn lcksb54(&mut self) -> LCKSB54_W<'_>[src]

Bit 22 - LCKSB54

pub fn lcksb55(&mut self) -> LCKSB55_W<'_>[src]

Bit 23 - LCKSB55

pub fn lcksb56(&mut self) -> LCKSB56_W<'_>[src]

Bit 24 - LCKSB56

pub fn lcksb57(&mut self) -> LCKSB57_W<'_>[src]

Bit 25 - LCKSB57

pub fn lcksb58(&mut self) -> LCKSB58_W<'_>[src]

Bit 26 - LCKSB58

pub fn lcksb59(&mut self) -> LCKSB59_W<'_>[src]

Bit 27 - LCKSB59

pub fn lcksb60(&mut self) -> LCKSB60_W<'_>[src]

Bit 28 - LCKSB60

pub fn lcksb61(&mut self) -> LCKSB61_W<'_>[src]

Bit 29 - LCKSB61

pub fn lcksb62(&mut self) -> LCKSB62_W<'_>[src]

Bit 30 - LCKSB62

pub fn lcksb63(&mut self) -> LCKSB63_W<'_>[src]

Bit 31 - LCKSB63

impl W<u32, Reg<u32, _MPCBB1_VCTR0>>[src]

pub fn b0(&mut self) -> B0_W<'_>[src]

Bit 0 - B0

pub fn b1(&mut self) -> B1_W<'_>[src]

Bit 1 - B1

pub fn b2(&mut self) -> B2_W<'_>[src]

Bit 2 - B2

pub fn b3(&mut self) -> B3_W<'_>[src]

Bit 3 - B3

pub fn b4(&mut self) -> B4_W<'_>[src]

Bit 4 - B4

pub fn b5(&mut self) -> B5_W<'_>[src]

Bit 5 - B5

pub fn b6(&mut self) -> B6_W<'_>[src]

Bit 6 - B6

pub fn b7(&mut self) -> B7_W<'_>[src]

Bit 7 - B7

pub fn b8(&mut self) -> B8_W<'_>[src]

Bit 8 - B8

pub fn b9(&mut self) -> B9_W<'_>[src]

Bit 9 - B9

pub fn b10(&mut self) -> B10_W<'_>[src]

Bit 10 - B10

pub fn b11(&mut self) -> B11_W<'_>[src]

Bit 11 - B11

pub fn b12(&mut self) -> B12_W<'_>[src]

Bit 12 - B12

pub fn b13(&mut self) -> B13_W<'_>[src]

Bit 13 - B13

pub fn b14(&mut self) -> B14_W<'_>[src]

Bit 14 - B14

pub fn b15(&mut self) -> B15_W<'_>[src]

Bit 15 - B15

pub fn b16(&mut self) -> B16_W<'_>[src]

Bit 16 - B16

pub fn b17(&mut self) -> B17_W<'_>[src]

Bit 17 - B17

pub fn b18(&mut self) -> B18_W<'_>[src]

Bit 18 - B18

pub fn b19(&mut self) -> B19_W<'_>[src]

Bit 19 - B19

pub fn b20(&mut self) -> B20_W<'_>[src]

Bit 20 - B20

pub fn b21(&mut self) -> B21_W<'_>[src]

Bit 21 - B21

pub fn b22(&mut self) -> B22_W<'_>[src]

Bit 22 - B22

pub fn b23(&mut self) -> B23_W<'_>[src]

Bit 23 - B23

pub fn b24(&mut self) -> B24_W<'_>[src]

Bit 24 - B24

pub fn b25(&mut self) -> B25_W<'_>[src]

Bit 25 - B25

pub fn b26(&mut self) -> B26_W<'_>[src]

Bit 26 - B26

pub fn b27(&mut self) -> B27_W<'_>[src]

Bit 27 - B27

pub fn b28(&mut self) -> B28_W<'_>[src]

Bit 28 - B28

pub fn b29(&mut self) -> B29_W<'_>[src]

Bit 29 - B29

pub fn b30(&mut self) -> B30_W<'_>[src]

Bit 30 - B30

pub fn b31(&mut self) -> B31_W<'_>[src]

Bit 31 - B31

impl W<u32, Reg<u32, _MPCBB1_VCTR1>>[src]

pub fn b32(&mut self) -> B32_W<'_>[src]

Bit 0 - B32

pub fn b33(&mut self) -> B33_W<'_>[src]

Bit 1 - B33

pub fn b34(&mut self) -> B34_W<'_>[src]

Bit 2 - B34

pub fn b35(&mut self) -> B35_W<'_>[src]

Bit 3 - B35

pub fn b36(&mut self) -> B36_W<'_>[src]

Bit 4 - B36

pub fn b37(&mut self) -> B37_W<'_>[src]

Bit 5 - B37

pub fn b38(&mut self) -> B38_W<'_>[src]

Bit 6 - B38

pub fn b39(&mut self) -> B39_W<'_>[src]

Bit 7 - B39

pub fn b40(&mut self) -> B40_W<'_>[src]

Bit 8 - B40

pub fn b41(&mut self) -> B41_W<'_>[src]

Bit 9 - B41

pub fn b42(&mut self) -> B42_W<'_>[src]

Bit 10 - B42

pub fn b43(&mut self) -> B43_W<'_>[src]

Bit 11 - B43

pub fn b44(&mut self) -> B44_W<'_>[src]

Bit 12 - B44

pub fn b45(&mut self) -> B45_W<'_>[src]

Bit 13 - B45

pub fn b46(&mut self) -> B46_W<'_>[src]

Bit 14 - B46

pub fn b47(&mut self) -> B47_W<'_>[src]

Bit 15 - B47

pub fn b48(&mut self) -> B48_W<'_>[src]

Bit 16 - B48

pub fn b49(&mut self) -> B49_W<'_>[src]

Bit 17 - B49

pub fn b50(&mut self) -> B50_W<'_>[src]

Bit 18 - B50

pub fn b51(&mut self) -> B51_W<'_>[src]

Bit 19 - B51

pub fn b52(&mut self) -> B52_W<'_>[src]

Bit 20 - B52

pub fn b53(&mut self) -> B53_W<'_>[src]

Bit 21 - B53

pub fn b54(&mut self) -> B54_W<'_>[src]

Bit 22 - B54

pub fn b55(&mut self) -> B55_W<'_>[src]

Bit 23 - B55

pub fn b56(&mut self) -> B56_W<'_>[src]

Bit 24 - B56

pub fn b57(&mut self) -> B57_W<'_>[src]

Bit 25 - B57

pub fn b58(&mut self) -> B58_W<'_>[src]

Bit 26 - B58

pub fn b59(&mut self) -> B59_W<'_>[src]

Bit 27 - B59

pub fn b60(&mut self) -> B60_W<'_>[src]

Bit 28 - B60

pub fn b61(&mut self) -> B61_W<'_>[src]

Bit 29 - B61

pub fn b62(&mut self) -> B62_W<'_>[src]

Bit 30 - B62

pub fn b63(&mut self) -> B63_W<'_>[src]

Bit 31 - B63

impl W<u32, Reg<u32, _MPCBB1_VCTR2>>[src]

pub fn b64(&mut self) -> B64_W<'_>[src]

Bit 0 - B64

pub fn b65(&mut self) -> B65_W<'_>[src]

Bit 1 - B65

pub fn b66(&mut self) -> B66_W<'_>[src]

Bit 2 - B66

pub fn b67(&mut self) -> B67_W<'_>[src]

Bit 3 - B67

pub fn b68(&mut self) -> B68_W<'_>[src]

Bit 4 - B68

pub fn b69(&mut self) -> B69_W<'_>[src]

Bit 5 - B69

pub fn b70(&mut self) -> B70_W<'_>[src]

Bit 6 - B70

pub fn b71(&mut self) -> B71_W<'_>[src]

Bit 7 - B71

pub fn b72(&mut self) -> B72_W<'_>[src]

Bit 8 - B72

pub fn b73(&mut self) -> B73_W<'_>[src]

Bit 9 - B73

pub fn b74(&mut self) -> B74_W<'_>[src]

Bit 10 - B74

pub fn b75(&mut self) -> B75_W<'_>[src]

Bit 11 - B75

pub fn b76(&mut self) -> B76_W<'_>[src]

Bit 12 - B76

pub fn b77(&mut self) -> B77_W<'_>[src]

Bit 13 - B77

pub fn b78(&mut self) -> B78_W<'_>[src]

Bit 14 - B78

pub fn b79(&mut self) -> B79_W<'_>[src]

Bit 15 - B79

pub fn b80(&mut self) -> B80_W<'_>[src]

Bit 16 - B80

pub fn b81(&mut self) -> B81_W<'_>[src]

Bit 17 - B81

pub fn b82(&mut self) -> B82_W<'_>[src]

Bit 18 - B82

pub fn b83(&mut self) -> B83_W<'_>[src]

Bit 19 - B83

pub fn b84(&mut self) -> B84_W<'_>[src]

Bit 20 - B84

pub fn b85(&mut self) -> B85_W<'_>[src]

Bit 21 - B85

pub fn b86(&mut self) -> B86_W<'_>[src]

Bit 22 - B86

pub fn b87(&mut self) -> B87_W<'_>[src]

Bit 23 - B87

pub fn b88(&mut self) -> B88_W<'_>[src]

Bit 24 - B88

pub fn b89(&mut self) -> B89_W<'_>[src]

Bit 25 - B89

pub fn b90(&mut self) -> B90_W<'_>[src]

Bit 26 - B90

pub fn b91(&mut self) -> B91_W<'_>[src]

Bit 27 - B91

pub fn b92(&mut self) -> B92_W<'_>[src]

Bit 28 - B92

pub fn b93(&mut self) -> B93_W<'_>[src]

Bit 29 - B93

pub fn b94(&mut self) -> B94_W<'_>[src]

Bit 30 - B94

pub fn b95(&mut self) -> B95_W<'_>[src]

Bit 31 - B95

impl W<u32, Reg<u32, _MPCBB1_VCTR3>>[src]

pub fn b96(&mut self) -> B96_W<'_>[src]

Bit 0 - B96

pub fn b97(&mut self) -> B97_W<'_>[src]

Bit 1 - B97

pub fn b98(&mut self) -> B98_W<'_>[src]

Bit 2 - B98

pub fn b99(&mut self) -> B99_W<'_>[src]

Bit 3 - B99

pub fn b100(&mut self) -> B100_W<'_>[src]

Bit 4 - B100

pub fn b101(&mut self) -> B101_W<'_>[src]

Bit 5 - B101

pub fn b102(&mut self) -> B102_W<'_>[src]

Bit 6 - B102

pub fn b103(&mut self) -> B103_W<'_>[src]

Bit 7 - B103

pub fn b104(&mut self) -> B104_W<'_>[src]

Bit 8 - B104

pub fn b105(&mut self) -> B105_W<'_>[src]

Bit 9 - B105

pub fn b106(&mut self) -> B106_W<'_>[src]

Bit 10 - B106

pub fn b107(&mut self) -> B107_W<'_>[src]

Bit 11 - B107

pub fn b108(&mut self) -> B108_W<'_>[src]

Bit 12 - B108

pub fn b109(&mut self) -> B109_W<'_>[src]

Bit 13 - B109

pub fn b110(&mut self) -> B110_W<'_>[src]

Bit 14 - B110

pub fn b111(&mut self) -> B111_W<'_>[src]

Bit 15 - B111

pub fn b112(&mut self) -> B112_W<'_>[src]

Bit 16 - B112

pub fn b113(&mut self) -> B113_W<'_>[src]

Bit 17 - B113

pub fn b114(&mut self) -> B114_W<'_>[src]

Bit 18 - B114

pub fn b115(&mut self) -> B115_W<'_>[src]

Bit 19 - B115

pub fn b116(&mut self) -> B116_W<'_>[src]

Bit 20 - B116

pub fn b117(&mut self) -> B117_W<'_>[src]

Bit 21 - B117

pub fn b118(&mut self) -> B118_W<'_>[src]

Bit 22 - B118

pub fn b119(&mut self) -> B119_W<'_>[src]

Bit 23 - B119

pub fn b120(&mut self) -> B120_W<'_>[src]

Bit 24 - B120

pub fn b121(&mut self) -> B121_W<'_>[src]

Bit 25 - B121

pub fn b122(&mut self) -> B122_W<'_>[src]

Bit 26 - B122

pub fn b123(&mut self) -> B123_W<'_>[src]

Bit 27 - B123

pub fn b124(&mut self) -> B124_W<'_>[src]

Bit 28 - B124

pub fn b125(&mut self) -> B125_W<'_>[src]

Bit 29 - B125

pub fn b126(&mut self) -> B126_W<'_>[src]

Bit 30 - B126

pub fn b127(&mut self) -> B127_W<'_>[src]

Bit 31 - B127

impl W<u32, Reg<u32, _MPCBB1_VCTR4>>[src]

pub fn b128(&mut self) -> B128_W<'_>[src]

Bit 0 - B128

pub fn b129(&mut self) -> B129_W<'_>[src]

Bit 1 - B129

pub fn b130(&mut self) -> B130_W<'_>[src]

Bit 2 - B130

pub fn b131(&mut self) -> B131_W<'_>[src]

Bit 3 - B131

pub fn b132(&mut self) -> B132_W<'_>[src]

Bit 4 - B132

pub fn b133(&mut self) -> B133_W<'_>[src]

Bit 5 - B133

pub fn b134(&mut self) -> B134_W<'_>[src]

Bit 6 - B134

pub fn b135(&mut self) -> B135_W<'_>[src]

Bit 7 - B135

pub fn b136(&mut self) -> B136_W<'_>[src]

Bit 8 - B136

pub fn b137(&mut self) -> B137_W<'_>[src]

Bit 9 - B137

pub fn b138(&mut self) -> B138_W<'_>[src]

Bit 10 - B138

pub fn b139(&mut self) -> B139_W<'_>[src]

Bit 11 - B139

pub fn b140(&mut self) -> B140_W<'_>[src]

Bit 12 - B140

pub fn b141(&mut self) -> B141_W<'_>[src]

Bit 13 - B141

pub fn b142(&mut self) -> B142_W<'_>[src]

Bit 14 - B142

pub fn b143(&mut self) -> B143_W<'_>[src]

Bit 15 - B143

pub fn b144(&mut self) -> B144_W<'_>[src]

Bit 16 - B144

pub fn b145(&mut self) -> B145_W<'_>[src]

Bit 17 - B145

pub fn b146(&mut self) -> B146_W<'_>[src]

Bit 18 - B146

pub fn b147(&mut self) -> B147_W<'_>[src]

Bit 19 - B147

pub fn b148(&mut self) -> B148_W<'_>[src]

Bit 20 - B148

pub fn b149(&mut self) -> B149_W<'_>[src]

Bit 21 - B149

pub fn b150(&mut self) -> B150_W<'_>[src]

Bit 22 - B150

pub fn b151(&mut self) -> B151_W<'_>[src]

Bit 23 - B151

pub fn b152(&mut self) -> B152_W<'_>[src]

Bit 24 - B152

pub fn b153(&mut self) -> B153_W<'_>[src]

Bit 25 - B153

pub fn b154(&mut self) -> B154_W<'_>[src]

Bit 26 - B154

pub fn b155(&mut self) -> B155_W<'_>[src]

Bit 27 - B155

pub fn b156(&mut self) -> B156_W<'_>[src]

Bit 28 - B156

pub fn b157(&mut self) -> B157_W<'_>[src]

Bit 29 - B157

pub fn b158(&mut self) -> B158_W<'_>[src]

Bit 30 - B158

pub fn b159(&mut self) -> B159_W<'_>[src]

Bit 31 - B159

impl W<u32, Reg<u32, _MPCBB1_VCTR5>>[src]

pub fn b160(&mut self) -> B160_W<'_>[src]

Bit 0 - B160

pub fn b161(&mut self) -> B161_W<'_>[src]

Bit 1 - B161

pub fn b162(&mut self) -> B162_W<'_>[src]

Bit 2 - B162

pub fn b163(&mut self) -> B163_W<'_>[src]

Bit 3 - B163

pub fn b164(&mut self) -> B164_W<'_>[src]

Bit 4 - B164

pub fn b165(&mut self) -> B165_W<'_>[src]

Bit 5 - B165

pub fn b166(&mut self) -> B166_W<'_>[src]

Bit 6 - B166

pub fn b167(&mut self) -> B167_W<'_>[src]

Bit 7 - B167

pub fn b168(&mut self) -> B168_W<'_>[src]

Bit 8 - B168

pub fn b169(&mut self) -> B169_W<'_>[src]

Bit 9 - B169

pub fn b170(&mut self) -> B170_W<'_>[src]

Bit 10 - B170

pub fn b171(&mut self) -> B171_W<'_>[src]

Bit 11 - B171

pub fn b172(&mut self) -> B172_W<'_>[src]

Bit 12 - B172

pub fn b173(&mut self) -> B173_W<'_>[src]

Bit 13 - B173

pub fn b174(&mut self) -> B174_W<'_>[src]

Bit 14 - B174

pub fn b175(&mut self) -> B175_W<'_>[src]

Bit 15 - B175

pub fn b176(&mut self) -> B176_W<'_>[src]

Bit 16 - B176

pub fn b177(&mut self) -> B177_W<'_>[src]

Bit 17 - B177

pub fn b178(&mut self) -> B178_W<'_>[src]

Bit 18 - B178

pub fn b179(&mut self) -> B179_W<'_>[src]

Bit 19 - B179

pub fn b180(&mut self) -> B180_W<'_>[src]

Bit 20 - B180

pub fn b181(&mut self) -> B181_W<'_>[src]

Bit 21 - B181

pub fn b182(&mut self) -> B182_W<'_>[src]

Bit 22 - B182

pub fn b183(&mut self) -> B183_W<'_>[src]

Bit 23 - B183

pub fn b184(&mut self) -> B184_W<'_>[src]

Bit 24 - B184

pub fn b185(&mut self) -> B185_W<'_>[src]

Bit 25 - B185

pub fn b186(&mut self) -> B186_W<'_>[src]

Bit 26 - B186

pub fn b187(&mut self) -> B187_W<'_>[src]

Bit 27 - B187

pub fn b188(&mut self) -> B188_W<'_>[src]

Bit 28 - B188

pub fn b189(&mut self) -> B189_W<'_>[src]

Bit 29 - B189

pub fn b190(&mut self) -> B190_W<'_>[src]

Bit 30 - B190

pub fn b191(&mut self) -> B191_W<'_>[src]

Bit 31 - B191

impl W<u32, Reg<u32, _MPCBB1_VCTR6>>[src]

pub fn b192(&mut self) -> B192_W<'_>[src]

Bit 0 - B192

pub fn b193(&mut self) -> B193_W<'_>[src]

Bit 1 - B193

pub fn b194(&mut self) -> B194_W<'_>[src]

Bit 2 - B194

pub fn b195(&mut self) -> B195_W<'_>[src]

Bit 3 - B195

pub fn b196(&mut self) -> B196_W<'_>[src]

Bit 4 - B196

pub fn b197(&mut self) -> B197_W<'_>[src]

Bit 5 - B197

pub fn b198(&mut self) -> B198_W<'_>[src]

Bit 6 - B198

pub fn b199(&mut self) -> B199_W<'_>[src]

Bit 7 - B199

pub fn b200(&mut self) -> B200_W<'_>[src]

Bit 8 - B200

pub fn b201(&mut self) -> B201_W<'_>[src]

Bit 9 - B201

pub fn b202(&mut self) -> B202_W<'_>[src]

Bit 10 - B202

pub fn b203(&mut self) -> B203_W<'_>[src]

Bit 11 - B203

pub fn b204(&mut self) -> B204_W<'_>[src]

Bit 12 - B204

pub fn b205(&mut self) -> B205_W<'_>[src]

Bit 13 - B205

pub fn b206(&mut self) -> B206_W<'_>[src]

Bit 14 - B206

pub fn b207(&mut self) -> B207_W<'_>[src]

Bit 15 - B207

pub fn b208(&mut self) -> B208_W<'_>[src]

Bit 16 - B208

pub fn b209(&mut self) -> B209_W<'_>[src]

Bit 17 - B209

pub fn b210(&mut self) -> B210_W<'_>[src]

Bit 18 - B210

pub fn b211(&mut self) -> B211_W<'_>[src]

Bit 19 - B211

pub fn b212(&mut self) -> B212_W<'_>[src]

Bit 20 - B212

pub fn b213(&mut self) -> B213_W<'_>[src]

Bit 21 - B213

pub fn b214(&mut self) -> B214_W<'_>[src]

Bit 22 - B214

pub fn b215(&mut self) -> B215_W<'_>[src]

Bit 23 - B215

pub fn b216(&mut self) -> B216_W<'_>[src]

Bit 24 - B216

pub fn b217(&mut self) -> B217_W<'_>[src]

Bit 25 - B217

pub fn b218(&mut self) -> B218_W<'_>[src]

Bit 26 - B218

pub fn b219(&mut self) -> B219_W<'_>[src]

Bit 27 - B219

pub fn b220(&mut self) -> B220_W<'_>[src]

Bit 28 - B220

pub fn b221(&mut self) -> B221_W<'_>[src]

Bit 29 - B221

pub fn b222(&mut self) -> B222_W<'_>[src]

Bit 30 - B222

pub fn b223(&mut self) -> B223_W<'_>[src]

Bit 31 - B223

impl W<u32, Reg<u32, _MPCBB1_VCTR7>>[src]

pub fn b224(&mut self) -> B224_W<'_>[src]

Bit 0 - B224

pub fn b225(&mut self) -> B225_W<'_>[src]

Bit 1 - B225

pub fn b226(&mut self) -> B226_W<'_>[src]

Bit 2 - B226

pub fn b227(&mut self) -> B227_W<'_>[src]

Bit 3 - B227

pub fn b228(&mut self) -> B228_W<'_>[src]

Bit 4 - B228

pub fn b229(&mut self) -> B229_W<'_>[src]

Bit 5 - B229

pub fn b230(&mut self) -> B230_W<'_>[src]

Bit 6 - B230

pub fn b231(&mut self) -> B231_W<'_>[src]

Bit 7 - B231

pub fn b232(&mut self) -> B232_W<'_>[src]

Bit 8 - B232

pub fn b233(&mut self) -> B233_W<'_>[src]

Bit 9 - B233

pub fn b234(&mut self) -> B234_W<'_>[src]

Bit 10 - B234

pub fn b235(&mut self) -> B235_W<'_>[src]

Bit 11 - B235

pub fn b236(&mut self) -> B236_W<'_>[src]

Bit 12 - B236

pub fn b237(&mut self) -> B237_W<'_>[src]

Bit 13 - B237

pub fn b238(&mut self) -> B238_W<'_>[src]

Bit 14 - B238

pub fn b239(&mut self) -> B239_W<'_>[src]

Bit 15 - B239

pub fn b240(&mut self) -> B240_W<'_>[src]

Bit 16 - B240

pub fn b241(&mut self) -> B241_W<'_>[src]

Bit 17 - B241

pub fn b242(&mut self) -> B242_W<'_>[src]

Bit 18 - B242

pub fn b243(&mut self) -> B243_W<'_>[src]

Bit 19 - B243

pub fn b244(&mut self) -> B244_W<'_>[src]

Bit 20 - B244

pub fn b245(&mut self) -> B245_W<'_>[src]

Bit 21 - B245

pub fn b246(&mut self) -> B246_W<'_>[src]

Bit 22 - B246

pub fn b247(&mut self) -> B247_W<'_>[src]

Bit 23 - B247

pub fn b248(&mut self) -> B248_W<'_>[src]

Bit 24 - B248

pub fn b249(&mut self) -> B249_W<'_>[src]

Bit 25 - B249

pub fn b250(&mut self) -> B250_W<'_>[src]

Bit 26 - B250

pub fn b251(&mut self) -> B251_W<'_>[src]

Bit 27 - B251

pub fn b252(&mut self) -> B252_W<'_>[src]

Bit 28 - B252

pub fn b253(&mut self) -> B253_W<'_>[src]

Bit 29 - B253

pub fn b254(&mut self) -> B254_W<'_>[src]

Bit 30 - B254

pub fn b255(&mut self) -> B255_W<'_>[src]

Bit 31 - B255

impl W<u32, Reg<u32, _MPCBB1_VCTR8>>[src]

pub fn b256(&mut self) -> B256_W<'_>[src]

Bit 0 - B256

pub fn b257(&mut self) -> B257_W<'_>[src]

Bit 1 - B257

pub fn b258(&mut self) -> B258_W<'_>[src]

Bit 2 - B258

pub fn b259(&mut self) -> B259_W<'_>[src]

Bit 3 - B259

pub fn b260(&mut self) -> B260_W<'_>[src]

Bit 4 - B260

pub fn b261(&mut self) -> B261_W<'_>[src]

Bit 5 - B261

pub fn b262(&mut self) -> B262_W<'_>[src]

Bit 6 - B262

pub fn b263(&mut self) -> B263_W<'_>[src]

Bit 7 - B263

pub fn b264(&mut self) -> B264_W<'_>[src]

Bit 8 - B264

pub fn b265(&mut self) -> B265_W<'_>[src]

Bit 9 - B265

pub fn b266(&mut self) -> B266_W<'_>[src]

Bit 10 - B266

pub fn b267(&mut self) -> B267_W<'_>[src]

Bit 11 - B267

pub fn b268(&mut self) -> B268_W<'_>[src]

Bit 12 - B268

pub fn b269(&mut self) -> B269_W<'_>[src]

Bit 13 - B269

pub fn b270(&mut self) -> B270_W<'_>[src]

Bit 14 - B270

pub fn b271(&mut self) -> B271_W<'_>[src]

Bit 15 - B271

pub fn b272(&mut self) -> B272_W<'_>[src]

Bit 16 - B272

pub fn b273(&mut self) -> B273_W<'_>[src]

Bit 17 - B273

pub fn b274(&mut self) -> B274_W<'_>[src]

Bit 18 - B274

pub fn b275(&mut self) -> B275_W<'_>[src]

Bit 19 - B275

pub fn b276(&mut self) -> B276_W<'_>[src]

Bit 20 - B276

pub fn b277(&mut self) -> B277_W<'_>[src]

Bit 21 - B277

pub fn b278(&mut self) -> B278_W<'_>[src]

Bit 22 - B278

pub fn b279(&mut self) -> B279_W<'_>[src]

Bit 23 - B279

pub fn b280(&mut self) -> B280_W<'_>[src]

Bit 24 - B280

pub fn b281(&mut self) -> B281_W<'_>[src]

Bit 25 - B281

pub fn b282(&mut self) -> B282_W<'_>[src]

Bit 26 - B282

pub fn b283(&mut self) -> B283_W<'_>[src]

Bit 27 - B283

pub fn b284(&mut self) -> B284_W<'_>[src]

Bit 28 - B284

pub fn b285(&mut self) -> B285_W<'_>[src]

Bit 29 - B285

pub fn b286(&mut self) -> B286_W<'_>[src]

Bit 30 - B286

pub fn b287(&mut self) -> B287_W<'_>[src]

Bit 31 - B287

impl W<u32, Reg<u32, _MPCBB1_VCTR9>>[src]

pub fn b288(&mut self) -> B288_W<'_>[src]

Bit 0 - B288

pub fn b289(&mut self) -> B289_W<'_>[src]

Bit 1 - B289

pub fn b290(&mut self) -> B290_W<'_>[src]

Bit 2 - B290

pub fn b291(&mut self) -> B291_W<'_>[src]

Bit 3 - B291

pub fn b292(&mut self) -> B292_W<'_>[src]

Bit 4 - B292

pub fn b293(&mut self) -> B293_W<'_>[src]

Bit 5 - B293

pub fn b294(&mut self) -> B294_W<'_>[src]

Bit 6 - B294

pub fn b295(&mut self) -> B295_W<'_>[src]

Bit 7 - B295

pub fn b296(&mut self) -> B296_W<'_>[src]

Bit 8 - B296

pub fn b297(&mut self) -> B297_W<'_>[src]

Bit 9 - B297

pub fn b298(&mut self) -> B298_W<'_>[src]

Bit 10 - B298

pub fn b299(&mut self) -> B299_W<'_>[src]

Bit 11 - B299

pub fn b300(&mut self) -> B300_W<'_>[src]

Bit 12 - B300

pub fn b301(&mut self) -> B301_W<'_>[src]

Bit 13 - B301

pub fn b302(&mut self) -> B302_W<'_>[src]

Bit 14 - B302

pub fn b303(&mut self) -> B303_W<'_>[src]

Bit 15 - B303

pub fn b304(&mut self) -> B304_W<'_>[src]

Bit 16 - B304

pub fn b305(&mut self) -> B305_W<'_>[src]

Bit 17 - B305

pub fn b306(&mut self) -> B306_W<'_>[src]

Bit 18 - B306

pub fn b307(&mut self) -> B307_W<'_>[src]

Bit 19 - B307

pub fn b308(&mut self) -> B308_W<'_>[src]

Bit 20 - B308

pub fn b309(&mut self) -> B309_W<'_>[src]

Bit 21 - B309

pub fn b310(&mut self) -> B310_W<'_>[src]

Bit 22 - B310

pub fn b311(&mut self) -> B311_W<'_>[src]

Bit 23 - B311

pub fn b312(&mut self) -> B312_W<'_>[src]

Bit 24 - B312

pub fn b313(&mut self) -> B313_W<'_>[src]

Bit 25 - B313

pub fn b314(&mut self) -> B314_W<'_>[src]

Bit 26 - B314

pub fn b315(&mut self) -> B315_W<'_>[src]

Bit 27 - B315

pub fn b316(&mut self) -> B316_W<'_>[src]

Bit 28 - B316

pub fn b317(&mut self) -> B317_W<'_>[src]

Bit 29 - B317

pub fn b318(&mut self) -> B318_W<'_>[src]

Bit 30 - B318

pub fn b319(&mut self) -> B319_W<'_>[src]

Bit 31 - B319

impl W<u32, Reg<u32, _MPCBB1_VCTR10>>[src]

pub fn b320(&mut self) -> B320_W<'_>[src]

Bit 0 - B320

pub fn b321(&mut self) -> B321_W<'_>[src]

Bit 1 - B321

pub fn b322(&mut self) -> B322_W<'_>[src]

Bit 2 - B322

pub fn b323(&mut self) -> B323_W<'_>[src]

Bit 3 - B323

pub fn b324(&mut self) -> B324_W<'_>[src]

Bit 4 - B324

pub fn b325(&mut self) -> B325_W<'_>[src]

Bit 5 - B325

pub fn b326(&mut self) -> B326_W<'_>[src]

Bit 6 - B326

pub fn b327(&mut self) -> B327_W<'_>[src]

Bit 7 - B327

pub fn b328(&mut self) -> B328_W<'_>[src]

Bit 8 - B328

pub fn b329(&mut self) -> B329_W<'_>[src]

Bit 9 - B329

pub fn b330(&mut self) -> B330_W<'_>[src]

Bit 10 - B330

pub fn b331(&mut self) -> B331_W<'_>[src]

Bit 11 - B331

pub fn b332(&mut self) -> B332_W<'_>[src]

Bit 12 - B332

pub fn b333(&mut self) -> B333_W<'_>[src]

Bit 13 - B333

pub fn b334(&mut self) -> B334_W<'_>[src]

Bit 14 - B334

pub fn b335(&mut self) -> B335_W<'_>[src]

Bit 15 - B335

pub fn b336(&mut self) -> B336_W<'_>[src]

Bit 16 - B336

pub fn b337(&mut self) -> B337_W<'_>[src]

Bit 17 - B337

pub fn b338(&mut self) -> B338_W<'_>[src]

Bit 18 - B338

pub fn b339(&mut self) -> B339_W<'_>[src]

Bit 19 - B339

pub fn b340(&mut self) -> B340_W<'_>[src]

Bit 20 - B340

pub fn b341(&mut self) -> B341_W<'_>[src]

Bit 21 - B341

pub fn b342(&mut self) -> B342_W<'_>[src]

Bit 22 - B342

pub fn b343(&mut self) -> B343_W<'_>[src]

Bit 23 - B343

pub fn b344(&mut self) -> B344_W<'_>[src]

Bit 24 - B344

pub fn b345(&mut self) -> B345_W<'_>[src]

Bit 25 - B345

pub fn b346(&mut self) -> B346_W<'_>[src]

Bit 26 - B346

pub fn b347(&mut self) -> B347_W<'_>[src]

Bit 27 - B347

pub fn b348(&mut self) -> B348_W<'_>[src]

Bit 28 - B348

pub fn b349(&mut self) -> B349_W<'_>[src]

Bit 29 - B349

pub fn b350(&mut self) -> B350_W<'_>[src]

Bit 30 - B350

pub fn b351(&mut self) -> B351_W<'_>[src]

Bit 31 - B351

impl W<u32, Reg<u32, _MPCBB1_VCTR11>>[src]

pub fn b352(&mut self) -> B352_W<'_>[src]

Bit 0 - B352

pub fn b353(&mut self) -> B353_W<'_>[src]

Bit 1 - B353

pub fn b354(&mut self) -> B354_W<'_>[src]

Bit 2 - B354

pub fn b355(&mut self) -> B355_W<'_>[src]

Bit 3 - B355

pub fn b356(&mut self) -> B356_W<'_>[src]

Bit 4 - B356

pub fn b357(&mut self) -> B357_W<'_>[src]

Bit 5 - B357

pub fn b358(&mut self) -> B358_W<'_>[src]

Bit 6 - B358

pub fn b359(&mut self) -> B359_W<'_>[src]

Bit 7 - B359

pub fn b360(&mut self) -> B360_W<'_>[src]

Bit 8 - B360

pub fn b361(&mut self) -> B361_W<'_>[src]

Bit 9 - B361

pub fn b362(&mut self) -> B362_W<'_>[src]

Bit 10 - B362

pub fn b363(&mut self) -> B363_W<'_>[src]

Bit 11 - B363

pub fn b364(&mut self) -> B364_W<'_>[src]

Bit 12 - B364

pub fn b365(&mut self) -> B365_W<'_>[src]

Bit 13 - B365

pub fn b366(&mut self) -> B366_W<'_>[src]

Bit 14 - B366

pub fn b367(&mut self) -> B367_W<'_>[src]

Bit 15 - B367

pub fn b368(&mut self) -> B368_W<'_>[src]

Bit 16 - B368

pub fn b369(&mut self) -> B369_W<'_>[src]

Bit 17 - B369

pub fn b370(&mut self) -> B370_W<'_>[src]

Bit 18 - B370

pub fn b371(&mut self) -> B371_W<'_>[src]

Bit 19 - B371

pub fn b372(&mut self) -> B372_W<'_>[src]

Bit 20 - B372

pub fn b373(&mut self) -> B373_W<'_>[src]

Bit 21 - B373

pub fn b374(&mut self) -> B374_W<'_>[src]

Bit 22 - B374

pub fn b375(&mut self) -> B375_W<'_>[src]

Bit 23 - B375

pub fn b376(&mut self) -> B376_W<'_>[src]

Bit 24 - B376

pub fn b377(&mut self) -> B377_W<'_>[src]

Bit 25 - B377

pub fn b378(&mut self) -> B378_W<'_>[src]

Bit 26 - B378

pub fn b379(&mut self) -> B379_W<'_>[src]

Bit 27 - B379

pub fn b380(&mut self) -> B380_W<'_>[src]

Bit 28 - B380

pub fn b381(&mut self) -> B381_W<'_>[src]

Bit 29 - B381

pub fn b382(&mut self) -> B382_W<'_>[src]

Bit 30 - B382

pub fn b383(&mut self) -> B383_W<'_>[src]

Bit 31 - B383

impl W<u32, Reg<u32, _MPCBB1_VCTR12>>[src]

pub fn b384(&mut self) -> B384_W<'_>[src]

Bit 0 - B384

pub fn b385(&mut self) -> B385_W<'_>[src]

Bit 1 - B385

pub fn b386(&mut self) -> B386_W<'_>[src]

Bit 2 - B386

pub fn b387(&mut self) -> B387_W<'_>[src]

Bit 3 - B387

pub fn b388(&mut self) -> B388_W<'_>[src]

Bit 4 - B388

pub fn b389(&mut self) -> B389_W<'_>[src]

Bit 5 - B389

pub fn b390(&mut self) -> B390_W<'_>[src]

Bit 6 - B390

pub fn b391(&mut self) -> B391_W<'_>[src]

Bit 7 - B391

pub fn b392(&mut self) -> B392_W<'_>[src]

Bit 8 - B392

pub fn b393(&mut self) -> B393_W<'_>[src]

Bit 9 - B393

pub fn b394(&mut self) -> B394_W<'_>[src]

Bit 10 - B394

pub fn b395(&mut self) -> B395_W<'_>[src]

Bit 11 - B395

pub fn b396(&mut self) -> B396_W<'_>[src]

Bit 12 - B396

pub fn b397(&mut self) -> B397_W<'_>[src]

Bit 13 - B397

pub fn b398(&mut self) -> B398_W<'_>[src]

Bit 14 - B398

pub fn b399(&mut self) -> B399_W<'_>[src]

Bit 15 - B399

pub fn b400(&mut self) -> B400_W<'_>[src]

Bit 16 - B400

pub fn b401(&mut self) -> B401_W<'_>[src]

Bit 17 - B401

pub fn b402(&mut self) -> B402_W<'_>[src]

Bit 18 - B402

pub fn b403(&mut self) -> B403_W<'_>[src]

Bit 19 - B403

pub fn b404(&mut self) -> B404_W<'_>[src]

Bit 20 - B404

pub fn b405(&mut self) -> B405_W<'_>[src]

Bit 21 - B405

pub fn b406(&mut self) -> B406_W<'_>[src]

Bit 22 - B406

pub fn b407(&mut self) -> B407_W<'_>[src]

Bit 23 - B407

pub fn b408(&mut self) -> B408_W<'_>[src]

Bit 24 - B408

pub fn b409(&mut self) -> B409_W<'_>[src]

Bit 25 - B409

pub fn b410(&mut self) -> B410_W<'_>[src]

Bit 26 - B410

pub fn b411(&mut self) -> B411_W<'_>[src]

Bit 27 - B411

pub fn b412(&mut self) -> B412_W<'_>[src]

Bit 28 - B412

pub fn b413(&mut self) -> B413_W<'_>[src]

Bit 29 - B413

pub fn b414(&mut self) -> B414_W<'_>[src]

Bit 30 - B414

pub fn b415(&mut self) -> B415_W<'_>[src]

Bit 31 - B415

impl W<u32, Reg<u32, _MPCBB1_VCTR13>>[src]

pub fn b416(&mut self) -> B416_W<'_>[src]

Bit 0 - B416

pub fn b417(&mut self) -> B417_W<'_>[src]

Bit 1 - B417

pub fn b418(&mut self) -> B418_W<'_>[src]

Bit 2 - B418

pub fn b419(&mut self) -> B419_W<'_>[src]

Bit 3 - B419

pub fn b420(&mut self) -> B420_W<'_>[src]

Bit 4 - B420

pub fn b421(&mut self) -> B421_W<'_>[src]

Bit 5 - B421

pub fn b422(&mut self) -> B422_W<'_>[src]

Bit 6 - B422

pub fn b423(&mut self) -> B423_W<'_>[src]

Bit 7 - B423

pub fn b424(&mut self) -> B424_W<'_>[src]

Bit 8 - B424

pub fn b425(&mut self) -> B425_W<'_>[src]

Bit 9 - B425

pub fn b426(&mut self) -> B426_W<'_>[src]

Bit 10 - B426

pub fn b427(&mut self) -> B427_W<'_>[src]

Bit 11 - B427

pub fn b428(&mut self) -> B428_W<'_>[src]

Bit 12 - B428

pub fn b429(&mut self) -> B429_W<'_>[src]

Bit 13 - B429

pub fn b430(&mut self) -> B430_W<'_>[src]

Bit 14 - B430

pub fn b431(&mut self) -> B431_W<'_>[src]

Bit 15 - B431

pub fn b432(&mut self) -> B432_W<'_>[src]

Bit 16 - B432

pub fn b433(&mut self) -> B433_W<'_>[src]

Bit 17 - B433

pub fn b434(&mut self) -> B434_W<'_>[src]

Bit 18 - B434

pub fn b435(&mut self) -> B435_W<'_>[src]

Bit 19 - B435

pub fn b436(&mut self) -> B436_W<'_>[src]

Bit 20 - B436

pub fn b437(&mut self) -> B437_W<'_>[src]

Bit 21 - B437

pub fn b438(&mut self) -> B438_W<'_>[src]

Bit 22 - B438

pub fn b439(&mut self) -> B439_W<'_>[src]

Bit 23 - B439

pub fn b440(&mut self) -> B440_W<'_>[src]

Bit 24 - B440

pub fn b441(&mut self) -> B441_W<'_>[src]

Bit 25 - B441

pub fn b442(&mut self) -> B442_W<'_>[src]

Bit 26 - B442

pub fn b443(&mut self) -> B443_W<'_>[src]

Bit 27 - B443

pub fn b444(&mut self) -> B444_W<'_>[src]

Bit 28 - B444

pub fn b445(&mut self) -> B445_W<'_>[src]

Bit 29 - B445

pub fn b446(&mut self) -> B446_W<'_>[src]

Bit 30 - B446

pub fn b447(&mut self) -> B447_W<'_>[src]

Bit 31 - B447

impl W<u32, Reg<u32, _MPCBB1_VCTR14>>[src]

pub fn b448(&mut self) -> B448_W<'_>[src]

Bit 0 - B448

pub fn b449(&mut self) -> B449_W<'_>[src]

Bit 1 - B449

pub fn b450(&mut self) -> B450_W<'_>[src]

Bit 2 - B450

pub fn b451(&mut self) -> B451_W<'_>[src]

Bit 3 - B451

pub fn b452(&mut self) -> B452_W<'_>[src]

Bit 4 - B452

pub fn b453(&mut self) -> B453_W<'_>[src]

Bit 5 - B453

pub fn b454(&mut self) -> B454_W<'_>[src]

Bit 6 - B454

pub fn b455(&mut self) -> B455_W<'_>[src]

Bit 7 - B455

pub fn b456(&mut self) -> B456_W<'_>[src]

Bit 8 - B456

pub fn b457(&mut self) -> B457_W<'_>[src]

Bit 9 - B457

pub fn b458(&mut self) -> B458_W<'_>[src]

Bit 10 - B458

pub fn b459(&mut self) -> B459_W<'_>[src]

Bit 11 - B459

pub fn b460(&mut self) -> B460_W<'_>[src]

Bit 12 - B460

pub fn b461(&mut self) -> B461_W<'_>[src]

Bit 13 - B461

pub fn b462(&mut self) -> B462_W<'_>[src]

Bit 14 - B462

pub fn b463(&mut self) -> B463_W<'_>[src]

Bit 15 - B463

pub fn b464(&mut self) -> B464_W<'_>[src]

Bit 16 - B464

pub fn b465(&mut self) -> B465_W<'_>[src]

Bit 17 - B465

pub fn b466(&mut self) -> B466_W<'_>[src]

Bit 18 - B466

pub fn b467(&mut self) -> B467_W<'_>[src]

Bit 19 - B467

pub fn b468(&mut self) -> B468_W<'_>[src]

Bit 20 - B468

pub fn b469(&mut self) -> B469_W<'_>[src]

Bit 21 - B469

pub fn b470(&mut self) -> B470_W<'_>[src]

Bit 22 - B470

pub fn b471(&mut self) -> B471_W<'_>[src]

Bit 23 - B471

pub fn b472(&mut self) -> B472_W<'_>[src]

Bit 24 - B472

pub fn b473(&mut self) -> B473_W<'_>[src]

Bit 25 - B473

pub fn b474(&mut self) -> B474_W<'_>[src]

Bit 26 - B474

pub fn b475(&mut self) -> B475_W<'_>[src]

Bit 27 - B475

pub fn b476(&mut self) -> B476_W<'_>[src]

Bit 28 - B476

pub fn b477(&mut self) -> B477_W<'_>[src]

Bit 29 - B477

pub fn b478(&mut self) -> B478_W<'_>[src]

Bit 30 - B478

pub fn b479(&mut self) -> B479_W<'_>[src]

Bit 31 - B479

impl W<u32, Reg<u32, _MPCBB1_VCTR15>>[src]

pub fn b480(&mut self) -> B480_W<'_>[src]

Bit 0 - B480

pub fn b481(&mut self) -> B481_W<'_>[src]

Bit 1 - B481

pub fn b482(&mut self) -> B482_W<'_>[src]

Bit 2 - B482

pub fn b483(&mut self) -> B483_W<'_>[src]

Bit 3 - B483

pub fn b484(&mut self) -> B484_W<'_>[src]

Bit 4 - B484

pub fn b485(&mut self) -> B485_W<'_>[src]

Bit 5 - B485

pub fn b486(&mut self) -> B486_W<'_>[src]

Bit 6 - B486

pub fn b487(&mut self) -> B487_W<'_>[src]

Bit 7 - B487

pub fn b488(&mut self) -> B488_W<'_>[src]

Bit 8 - B488

pub fn b489(&mut self) -> B489_W<'_>[src]

Bit 9 - B489

pub fn b490(&mut self) -> B490_W<'_>[src]

Bit 10 - B490

pub fn b491(&mut self) -> B491_W<'_>[src]

Bit 11 - B491

pub fn b492(&mut self) -> B492_W<'_>[src]

Bit 12 - B492

pub fn b493(&mut self) -> B493_W<'_>[src]

Bit 13 - B493

pub fn b494(&mut self) -> B494_W<'_>[src]

Bit 14 - B494

pub fn b495(&mut self) -> B495_W<'_>[src]

Bit 15 - B495

pub fn b496(&mut self) -> B496_W<'_>[src]

Bit 16 - B496

pub fn b497(&mut self) -> B497_W<'_>[src]

Bit 17 - B497

pub fn b498(&mut self) -> B498_W<'_>[src]

Bit 18 - B498

pub fn b499(&mut self) -> B499_W<'_>[src]

Bit 19 - B499

pub fn b500(&mut self) -> B500_W<'_>[src]

Bit 20 - B500

pub fn b501(&mut self) -> B501_W<'_>[src]

Bit 21 - B501

pub fn b502(&mut self) -> B502_W<'_>[src]

Bit 22 - B502

pub fn b503(&mut self) -> B503_W<'_>[src]

Bit 23 - B503

pub fn b504(&mut self) -> B504_W<'_>[src]

Bit 24 - B504

pub fn b505(&mut self) -> B505_W<'_>[src]

Bit 25 - B505

pub fn b506(&mut self) -> B506_W<'_>[src]

Bit 26 - B506

pub fn b507(&mut self) -> B507_W<'_>[src]

Bit 27 - B507

pub fn b508(&mut self) -> B508_W<'_>[src]

Bit 28 - B508

pub fn b509(&mut self) -> B509_W<'_>[src]

Bit 29 - B509

pub fn b510(&mut self) -> B510_W<'_>[src]

Bit 30 - B510

pub fn b511(&mut self) -> B511_W<'_>[src]

Bit 31 - B511

impl W<u32, Reg<u32, _MPCBB1_VCTR16>>[src]

pub fn b512(&mut self) -> B512_W<'_>[src]

Bit 0 - B512

pub fn b513(&mut self) -> B513_W<'_>[src]

Bit 1 - B513

pub fn b514(&mut self) -> B514_W<'_>[src]

Bit 2 - B514

pub fn b515(&mut self) -> B515_W<'_>[src]

Bit 3 - B515

pub fn b516(&mut self) -> B516_W<'_>[src]

Bit 4 - B516

pub fn b517(&mut self) -> B517_W<'_>[src]

Bit 5 - B517

pub fn b518(&mut self) -> B518_W<'_>[src]

Bit 6 - B518

pub fn b519(&mut self) -> B519_W<'_>[src]

Bit 7 - B519

pub fn b520(&mut self) -> B520_W<'_>[src]

Bit 8 - B520

pub fn b521(&mut self) -> B521_W<'_>[src]

Bit 9 - B521

pub fn b522(&mut self) -> B522_W<'_>[src]

Bit 10 - B522

pub fn b523(&mut self) -> B523_W<'_>[src]

Bit 11 - B523

pub fn b524(&mut self) -> B524_W<'_>[src]

Bit 12 - B524

pub fn b525(&mut self) -> B525_W<'_>[src]

Bit 13 - B525

pub fn b526(&mut self) -> B526_W<'_>[src]

Bit 14 - B526

pub fn b527(&mut self) -> B527_W<'_>[src]

Bit 15 - B527

pub fn b528(&mut self) -> B528_W<'_>[src]

Bit 16 - B528

pub fn b529(&mut self) -> B529_W<'_>[src]

Bit 17 - B529

pub fn b530(&mut self) -> B530_W<'_>[src]

Bit 18 - B530

pub fn b531(&mut self) -> B531_W<'_>[src]

Bit 19 - B531

pub fn b532(&mut self) -> B532_W<'_>[src]

Bit 20 - B532

pub fn b533(&mut self) -> B533_W<'_>[src]

Bit 21 - B533

pub fn b534(&mut self) -> B534_W<'_>[src]

Bit 22 - B534

pub fn b535(&mut self) -> B535_W<'_>[src]

Bit 23 - B535

pub fn b536(&mut self) -> B536_W<'_>[src]

Bit 24 - B536

pub fn b537(&mut self) -> B537_W<'_>[src]

Bit 25 - B537

pub fn b538(&mut self) -> B538_W<'_>[src]

Bit 26 - B538

pub fn b539(&mut self) -> B539_W<'_>[src]

Bit 27 - B539

pub fn b540(&mut self) -> B540_W<'_>[src]

Bit 28 - B540

pub fn b541(&mut self) -> B541_W<'_>[src]

Bit 29 - B541

pub fn b542(&mut self) -> B542_W<'_>[src]

Bit 30 - B542

pub fn b543(&mut self) -> B543_W<'_>[src]

Bit 31 - B543

impl W<u32, Reg<u32, _MPCBB1_VCTR17>>[src]

pub fn b544(&mut self) -> B544_W<'_>[src]

Bit 0 - B544

pub fn b545(&mut self) -> B545_W<'_>[src]

Bit 1 - B545

pub fn b546(&mut self) -> B546_W<'_>[src]

Bit 2 - B546

pub fn b547(&mut self) -> B547_W<'_>[src]

Bit 3 - B547

pub fn b548(&mut self) -> B548_W<'_>[src]

Bit 4 - B548

pub fn b549(&mut self) -> B549_W<'_>[src]

Bit 5 - B549

pub fn b550(&mut self) -> B550_W<'_>[src]

Bit 6 - B550

pub fn b551(&mut self) -> B551_W<'_>[src]

Bit 7 - B551

pub fn b552(&mut self) -> B552_W<'_>[src]

Bit 8 - B552

pub fn b553(&mut self) -> B553_W<'_>[src]

Bit 9 - B553

pub fn b554(&mut self) -> B554_W<'_>[src]

Bit 10 - B554

pub fn b555(&mut self) -> B555_W<'_>[src]

Bit 11 - B555

pub fn b556(&mut self) -> B556_W<'_>[src]

Bit 12 - B556

pub fn b557(&mut self) -> B557_W<'_>[src]

Bit 13 - B557

pub fn b558(&mut self) -> B558_W<'_>[src]

Bit 14 - B558

pub fn b559(&mut self) -> B559_W<'_>[src]

Bit 15 - B559

pub fn b560(&mut self) -> B560_W<'_>[src]

Bit 16 - B560

pub fn b561(&mut self) -> B561_W<'_>[src]

Bit 17 - B561

pub fn b562(&mut self) -> B562_W<'_>[src]

Bit 18 - B562

pub fn b563(&mut self) -> B563_W<'_>[src]

Bit 19 - B563

pub fn b564(&mut self) -> B564_W<'_>[src]

Bit 20 - B564

pub fn b565(&mut self) -> B565_W<'_>[src]

Bit 21 - B565

pub fn b566(&mut self) -> B566_W<'_>[src]

Bit 22 - B566

pub fn b567(&mut self) -> B567_W<'_>[src]

Bit 23 - B567

pub fn b568(&mut self) -> B568_W<'_>[src]

Bit 24 - B568

pub fn b569(&mut self) -> B569_W<'_>[src]

Bit 25 - B569

pub fn b570(&mut self) -> B570_W<'_>[src]

Bit 26 - B570

pub fn b571(&mut self) -> B571_W<'_>[src]

Bit 27 - B571

pub fn b572(&mut self) -> B572_W<'_>[src]

Bit 28 - B572

pub fn b573(&mut self) -> B573_W<'_>[src]

Bit 29 - B573

pub fn b574(&mut self) -> B574_W<'_>[src]

Bit 30 - B574

pub fn b575(&mut self) -> B575_W<'_>[src]

Bit 31 - B575

impl W<u32, Reg<u32, _MPCBB1_VCTR18>>[src]

pub fn b576(&mut self) -> B576_W<'_>[src]

Bit 0 - B576

pub fn b577(&mut self) -> B577_W<'_>[src]

Bit 1 - B577

pub fn b578(&mut self) -> B578_W<'_>[src]

Bit 2 - B578

pub fn b579(&mut self) -> B579_W<'_>[src]

Bit 3 - B579

pub fn b580(&mut self) -> B580_W<'_>[src]

Bit 4 - B580

pub fn b581(&mut self) -> B581_W<'_>[src]

Bit 5 - B581

pub fn b582(&mut self) -> B582_W<'_>[src]

Bit 6 - B582

pub fn b583(&mut self) -> B583_W<'_>[src]

Bit 7 - B583

pub fn b584(&mut self) -> B584_W<'_>[src]

Bit 8 - B584

pub fn b585(&mut self) -> B585_W<'_>[src]

Bit 9 - B585

pub fn b586(&mut self) -> B586_W<'_>[src]

Bit 10 - B586

pub fn b587(&mut self) -> B587_W<'_>[src]

Bit 11 - B587

pub fn b588(&mut self) -> B588_W<'_>[src]

Bit 12 - B588

pub fn b589(&mut self) -> B589_W<'_>[src]

Bit 13 - B589

pub fn b590(&mut self) -> B590_W<'_>[src]

Bit 14 - B590

pub fn b591(&mut self) -> B591_W<'_>[src]

Bit 15 - B591

pub fn b592(&mut self) -> B592_W<'_>[src]

Bit 16 - B592

pub fn b593(&mut self) -> B593_W<'_>[src]

Bit 17 - B593

pub fn b594(&mut self) -> B594_W<'_>[src]

Bit 18 - B594

pub fn b595(&mut self) -> B595_W<'_>[src]

Bit 19 - B595

pub fn b596(&mut self) -> B596_W<'_>[src]

Bit 20 - B596

pub fn b597(&mut self) -> B597_W<'_>[src]

Bit 21 - B597

pub fn b598(&mut self) -> B598_W<'_>[src]

Bit 22 - B598

pub fn b599(&mut self) -> B599_W<'_>[src]

Bit 23 - B599

pub fn b600(&mut self) -> B600_W<'_>[src]

Bit 24 - B600

pub fn b601(&mut self) -> B601_W<'_>[src]

Bit 25 - B601

pub fn b602(&mut self) -> B602_W<'_>[src]

Bit 26 - B602

pub fn b603(&mut self) -> B603_W<'_>[src]

Bit 27 - B603

pub fn b604(&mut self) -> B604_W<'_>[src]

Bit 28 - B604

pub fn b605(&mut self) -> B605_W<'_>[src]

Bit 29 - B605

pub fn b606(&mut self) -> B606_W<'_>[src]

Bit 30 - B606

pub fn b607(&mut self) -> B607_W<'_>[src]

Bit 31 - B607

impl W<u32, Reg<u32, _MPCBB1_VCTR19>>[src]

pub fn b608(&mut self) -> B608_W<'_>[src]

Bit 0 - B608

pub fn b609(&mut self) -> B609_W<'_>[src]

Bit 1 - B609

pub fn b610(&mut self) -> B610_W<'_>[src]

Bit 2 - B610

pub fn b611(&mut self) -> B611_W<'_>[src]

Bit 3 - B611

pub fn b612(&mut self) -> B612_W<'_>[src]

Bit 4 - B612

pub fn b613(&mut self) -> B613_W<'_>[src]

Bit 5 - B613

pub fn b614(&mut self) -> B614_W<'_>[src]

Bit 6 - B614

pub fn b615(&mut self) -> B615_W<'_>[src]

Bit 7 - B615

pub fn b616(&mut self) -> B616_W<'_>[src]

Bit 8 - B616

pub fn b617(&mut self) -> B617_W<'_>[src]

Bit 9 - B617

pub fn b618(&mut self) -> B618_W<'_>[src]

Bit 10 - B618

pub fn b619(&mut self) -> B619_W<'_>[src]

Bit 11 - B619

pub fn b620(&mut self) -> B620_W<'_>[src]

Bit 12 - B620

pub fn b621(&mut self) -> B621_W<'_>[src]

Bit 13 - B621

pub fn b622(&mut self) -> B622_W<'_>[src]

Bit 14 - B622

pub fn b623(&mut self) -> B623_W<'_>[src]

Bit 15 - B623

pub fn b624(&mut self) -> B624_W<'_>[src]

Bit 16 - B624

pub fn b625(&mut self) -> B625_W<'_>[src]

Bit 17 - B625

pub fn b626(&mut self) -> B626_W<'_>[src]

Bit 18 - B626

pub fn b627(&mut self) -> B627_W<'_>[src]

Bit 19 - B627

pub fn b628(&mut self) -> B628_W<'_>[src]

Bit 20 - B628

pub fn b629(&mut self) -> B629_W<'_>[src]

Bit 21 - B629

pub fn b630(&mut self) -> B630_W<'_>[src]

Bit 22 - B630

pub fn b631(&mut self) -> B631_W<'_>[src]

Bit 23 - B631

pub fn b632(&mut self) -> B632_W<'_>[src]

Bit 24 - B632

pub fn b633(&mut self) -> B633_W<'_>[src]

Bit 25 - B633

pub fn b634(&mut self) -> B634_W<'_>[src]

Bit 26 - B634

pub fn b635(&mut self) -> B635_W<'_>[src]

Bit 27 - B635

pub fn b636(&mut self) -> B636_W<'_>[src]

Bit 28 - B636

pub fn b637(&mut self) -> B637_W<'_>[src]

Bit 29 - B637

pub fn b638(&mut self) -> B638_W<'_>[src]

Bit 30 - B638

pub fn b639(&mut self) -> B639_W<'_>[src]

Bit 31 - B639

impl W<u32, Reg<u32, _MPCBB1_VCTR20>>[src]

pub fn b640(&mut self) -> B640_W<'_>[src]

Bit 0 - B640

pub fn b641(&mut self) -> B641_W<'_>[src]

Bit 1 - B641

pub fn b642(&mut self) -> B642_W<'_>[src]

Bit 2 - B642

pub fn b643(&mut self) -> B643_W<'_>[src]

Bit 3 - B643

pub fn b644(&mut self) -> B644_W<'_>[src]

Bit 4 - B644

pub fn b645(&mut self) -> B645_W<'_>[src]

Bit 5 - B645

pub fn b646(&mut self) -> B646_W<'_>[src]

Bit 6 - B646

pub fn b647(&mut self) -> B647_W<'_>[src]

Bit 7 - B647

pub fn b648(&mut self) -> B648_W<'_>[src]

Bit 8 - B648

pub fn b649(&mut self) -> B649_W<'_>[src]

Bit 9 - B649

pub fn b650(&mut self) -> B650_W<'_>[src]

Bit 10 - B650

pub fn b651(&mut self) -> B651_W<'_>[src]

Bit 11 - B651

pub fn b652(&mut self) -> B652_W<'_>[src]

Bit 12 - B652

pub fn b653(&mut self) -> B653_W<'_>[src]

Bit 13 - B653

pub fn b654(&mut self) -> B654_W<'_>[src]

Bit 14 - B654

pub fn b655(&mut self) -> B655_W<'_>[src]

Bit 15 - B655

pub fn b656(&mut self) -> B656_W<'_>[src]

Bit 16 - B656

pub fn b657(&mut self) -> B657_W<'_>[src]

Bit 17 - B657

pub fn b658(&mut self) -> B658_W<'_>[src]

Bit 18 - B658

pub fn b659(&mut self) -> B659_W<'_>[src]

Bit 19 - B659

pub fn b660(&mut self) -> B660_W<'_>[src]

Bit 20 - B660

pub fn b661(&mut self) -> B661_W<'_>[src]

Bit 21 - B661

pub fn b662(&mut self) -> B662_W<'_>[src]

Bit 22 - B662

pub fn b663(&mut self) -> B663_W<'_>[src]

Bit 23 - B663

pub fn b664(&mut self) -> B664_W<'_>[src]

Bit 24 - B664

pub fn b665(&mut self) -> B665_W<'_>[src]

Bit 25 - B665

pub fn b666(&mut self) -> B666_W<'_>[src]

Bit 26 - B666

pub fn b667(&mut self) -> B667_W<'_>[src]

Bit 27 - B667

pub fn b668(&mut self) -> B668_W<'_>[src]

Bit 28 - B668

pub fn b669(&mut self) -> B669_W<'_>[src]

Bit 29 - B669

pub fn b670(&mut self) -> B670_W<'_>[src]

Bit 30 - B670

pub fn b671(&mut self) -> B671_W<'_>[src]

Bit 31 - B671

impl W<u32, Reg<u32, _MPCBB1_VCTR21>>[src]

pub fn b672(&mut self) -> B672_W<'_>[src]

Bit 0 - B672

pub fn b673(&mut self) -> B673_W<'_>[src]

Bit 1 - B673

pub fn b674(&mut self) -> B674_W<'_>[src]

Bit 2 - B674

pub fn b675(&mut self) -> B675_W<'_>[src]

Bit 3 - B675

pub fn b676(&mut self) -> B676_W<'_>[src]

Bit 4 - B676

pub fn b677(&mut self) -> B677_W<'_>[src]

Bit 5 - B677

pub fn b678(&mut self) -> B678_W<'_>[src]

Bit 6 - B678

pub fn b679(&mut self) -> B679_W<'_>[src]

Bit 7 - B679

pub fn b680(&mut self) -> B680_W<'_>[src]

Bit 8 - B680

pub fn b681(&mut self) -> B681_W<'_>[src]

Bit 9 - B681

pub fn b682(&mut self) -> B682_W<'_>[src]

Bit 10 - B682

pub fn b683(&mut self) -> B683_W<'_>[src]

Bit 11 - B683

pub fn b684(&mut self) -> B684_W<'_>[src]

Bit 12 - B684

pub fn b685(&mut self) -> B685_W<'_>[src]

Bit 13 - B685

pub fn b686(&mut self) -> B686_W<'_>[src]

Bit 14 - B686

pub fn b687(&mut self) -> B687_W<'_>[src]

Bit 15 - B687

pub fn b688(&mut self) -> B688_W<'_>[src]

Bit 16 - B688

pub fn b689(&mut self) -> B689_W<'_>[src]

Bit 17 - B689

pub fn b690(&mut self) -> B690_W<'_>[src]

Bit 18 - B690

pub fn b691(&mut self) -> B691_W<'_>[src]

Bit 19 - B691

pub fn b692(&mut self) -> B692_W<'_>[src]

Bit 20 - B692

pub fn b693(&mut self) -> B693_W<'_>[src]

Bit 21 - B693

pub fn b694(&mut self) -> B694_W<'_>[src]

Bit 22 - B694

pub fn b695(&mut self) -> B695_W<'_>[src]

Bit 23 - B695

pub fn b696(&mut self) -> B696_W<'_>[src]

Bit 24 - B696

pub fn b697(&mut self) -> B697_W<'_>[src]

Bit 25 - B697

pub fn b698(&mut self) -> B698_W<'_>[src]

Bit 26 - B698

pub fn b699(&mut self) -> B699_W<'_>[src]

Bit 27 - B699

pub fn b700(&mut self) -> B700_W<'_>[src]

Bit 28 - B700

pub fn b701(&mut self) -> B701_W<'_>[src]

Bit 29 - B701

pub fn b702(&mut self) -> B702_W<'_>[src]

Bit 30 - B702

pub fn b703(&mut self) -> B703_W<'_>[src]

Bit 31 - B703

impl W<u32, Reg<u32, _MPCBB1_VCTR22>>[src]

pub fn b704(&mut self) -> B704_W<'_>[src]

Bit 0 - B704

pub fn b705(&mut self) -> B705_W<'_>[src]

Bit 1 - B705

pub fn b706(&mut self) -> B706_W<'_>[src]

Bit 2 - B706

pub fn b707(&mut self) -> B707_W<'_>[src]

Bit 3 - B707

pub fn b708(&mut self) -> B708_W<'_>[src]

Bit 4 - B708

pub fn b709(&mut self) -> B709_W<'_>[src]

Bit 5 - B709

pub fn b710(&mut self) -> B710_W<'_>[src]

Bit 6 - B710

pub fn b711(&mut self) -> B711_W<'_>[src]

Bit 7 - B711

pub fn b712(&mut self) -> B712_W<'_>[src]

Bit 8 - B712

pub fn b713(&mut self) -> B713_W<'_>[src]

Bit 9 - B713

pub fn b714(&mut self) -> B714_W<'_>[src]

Bit 10 - B714

pub fn b715(&mut self) -> B715_W<'_>[src]

Bit 11 - B715

pub fn b716(&mut self) -> B716_W<'_>[src]

Bit 12 - B716

pub fn b717(&mut self) -> B717_W<'_>[src]

Bit 13 - B717

pub fn b718(&mut self) -> B718_W<'_>[src]

Bit 14 - B718

pub fn b719(&mut self) -> B719_W<'_>[src]

Bit 15 - B719

pub fn b720(&mut self) -> B720_W<'_>[src]

Bit 16 - B720

pub fn b721(&mut self) -> B721_W<'_>[src]

Bit 17 - B721

pub fn b722(&mut self) -> B722_W<'_>[src]

Bit 18 - B722

pub fn b723(&mut self) -> B723_W<'_>[src]

Bit 19 - B723

pub fn b724(&mut self) -> B724_W<'_>[src]

Bit 20 - B724

pub fn b725(&mut self) -> B725_W<'_>[src]

Bit 21 - B725

pub fn b726(&mut self) -> B726_W<'_>[src]

Bit 22 - B726

pub fn b727(&mut self) -> B727_W<'_>[src]

Bit 23 - B727

pub fn b728(&mut self) -> B728_W<'_>[src]

Bit 24 - B728

pub fn b729(&mut self) -> B729_W<'_>[src]

Bit 25 - B729

pub fn b730(&mut self) -> B730_W<'_>[src]

Bit 26 - B730

pub fn b731(&mut self) -> B731_W<'_>[src]

Bit 27 - B731

pub fn b732(&mut self) -> B732_W<'_>[src]

Bit 28 - B732

pub fn b733(&mut self) -> B733_W<'_>[src]

Bit 29 - B733

pub fn b734(&mut self) -> B734_W<'_>[src]

Bit 30 - B734

pub fn b735(&mut self) -> B735_W<'_>[src]

Bit 31 - B735

impl W<u32, Reg<u32, _MPCBB1_VCTR23>>[src]

pub fn b736(&mut self) -> B736_W<'_>[src]

Bit 0 - B736

pub fn b737(&mut self) -> B737_W<'_>[src]

Bit 1 - B737

pub fn b738(&mut self) -> B738_W<'_>[src]

Bit 2 - B738

pub fn b739(&mut self) -> B739_W<'_>[src]

Bit 3 - B739

pub fn b740(&mut self) -> B740_W<'_>[src]

Bit 4 - B740

pub fn b741(&mut self) -> B741_W<'_>[src]

Bit 5 - B741

pub fn b742(&mut self) -> B742_W<'_>[src]

Bit 6 - B742

pub fn b743(&mut self) -> B743_W<'_>[src]

Bit 7 - B743

pub fn b744(&mut self) -> B744_W<'_>[src]

Bit 8 - B744

pub fn b745(&mut self) -> B745_W<'_>[src]

Bit 9 - B745

pub fn b746(&mut self) -> B746_W<'_>[src]

Bit 10 - B746

pub fn b747(&mut self) -> B747_W<'_>[src]

Bit 11 - B747

pub fn b748(&mut self) -> B748_W<'_>[src]

Bit 12 - B748

pub fn b749(&mut self) -> B749_W<'_>[src]

Bit 13 - B749

pub fn b750(&mut self) -> B750_W<'_>[src]

Bit 14 - B750

pub fn b751(&mut self) -> B751_W<'_>[src]

Bit 15 - B751

pub fn b752(&mut self) -> B752_W<'_>[src]

Bit 16 - B752

pub fn b753(&mut self) -> B753_W<'_>[src]

Bit 17 - B753

pub fn b754(&mut self) -> B754_W<'_>[src]

Bit 18 - B754

pub fn b755(&mut self) -> B755_W<'_>[src]

Bit 19 - B755

pub fn b756(&mut self) -> B756_W<'_>[src]

Bit 20 - B756

pub fn b757(&mut self) -> B757_W<'_>[src]

Bit 21 - B757

pub fn b758(&mut self) -> B758_W<'_>[src]

Bit 22 - B758

pub fn b759(&mut self) -> B759_W<'_>[src]

Bit 23 - B759

pub fn b760(&mut self) -> B760_W<'_>[src]

Bit 24 - B760

pub fn b761(&mut self) -> B761_W<'_>[src]

Bit 25 - B761

pub fn b762(&mut self) -> B762_W<'_>[src]

Bit 26 - B762

pub fn b763(&mut self) -> B763_W<'_>[src]

Bit 27 - B763

pub fn b764(&mut self) -> B764_W<'_>[src]

Bit 28 - B764

pub fn b765(&mut self) -> B765_W<'_>[src]

Bit 29 - B765

pub fn b766(&mut self) -> B766_W<'_>[src]

Bit 30 - B766

pub fn b767(&mut self) -> B767_W<'_>[src]

Bit 31 - B767

impl W<u32, Reg<u32, _MPCBB1_VCTR24>>[src]

pub fn b768(&mut self) -> B768_W<'_>[src]

Bit 0 - B768

pub fn b769(&mut self) -> B769_W<'_>[src]

Bit 1 - B769

pub fn b770(&mut self) -> B770_W<'_>[src]

Bit 2 - B770

pub fn b771(&mut self) -> B771_W<'_>[src]

Bit 3 - B771

pub fn b772(&mut self) -> B772_W<'_>[src]

Bit 4 - B772

pub fn b773(&mut self) -> B773_W<'_>[src]

Bit 5 - B773

pub fn b774(&mut self) -> B774_W<'_>[src]

Bit 6 - B774

pub fn b775(&mut self) -> B775_W<'_>[src]

Bit 7 - B775

pub fn b776(&mut self) -> B776_W<'_>[src]

Bit 8 - B776

pub fn b777(&mut self) -> B777_W<'_>[src]

Bit 9 - B777

pub fn b778(&mut self) -> B778_W<'_>[src]

Bit 10 - B778

pub fn b779(&mut self) -> B779_W<'_>[src]

Bit 11 - B779

pub fn b780(&mut self) -> B780_W<'_>[src]

Bit 12 - B780

pub fn b781(&mut self) -> B781_W<'_>[src]

Bit 13 - B781

pub fn b782(&mut self) -> B782_W<'_>[src]

Bit 14 - B782

pub fn b783(&mut self) -> B783_W<'_>[src]

Bit 15 - B783

pub fn b784(&mut self) -> B784_W<'_>[src]

Bit 16 - B784

pub fn b785(&mut self) -> B785_W<'_>[src]

Bit 17 - B785

pub fn b786(&mut self) -> B786_W<'_>[src]

Bit 18 - B786

pub fn b787(&mut self) -> B787_W<'_>[src]

Bit 19 - B787

pub fn b788(&mut self) -> B788_W<'_>[src]

Bit 20 - B788

pub fn b789(&mut self) -> B789_W<'_>[src]

Bit 21 - B789

pub fn b790(&mut self) -> B790_W<'_>[src]

Bit 22 - B790

pub fn b791(&mut self) -> B791_W<'_>[src]

Bit 23 - B791

pub fn b792(&mut self) -> B792_W<'_>[src]

Bit 24 - B792

pub fn b793(&mut self) -> B793_W<'_>[src]

Bit 25 - B793

pub fn b794(&mut self) -> B794_W<'_>[src]

Bit 26 - B794

pub fn b795(&mut self) -> B795_W<'_>[src]

Bit 27 - B795

pub fn b796(&mut self) -> B796_W<'_>[src]

Bit 28 - B796

pub fn b797(&mut self) -> B797_W<'_>[src]

Bit 29 - B797

pub fn b798(&mut self) -> B798_W<'_>[src]

Bit 30 - B798

pub fn b799(&mut self) -> B799_W<'_>[src]

Bit 31 - B799

impl W<u32, Reg<u32, _MPCBB1_VCTR25>>[src]

pub fn b800(&mut self) -> B800_W<'_>[src]

Bit 0 - B800

pub fn b801(&mut self) -> B801_W<'_>[src]

Bit 1 - B801

pub fn b802(&mut self) -> B802_W<'_>[src]

Bit 2 - B802

pub fn b803(&mut self) -> B803_W<'_>[src]

Bit 3 - B803

pub fn b804(&mut self) -> B804_W<'_>[src]

Bit 4 - B804

pub fn b805(&mut self) -> B805_W<'_>[src]

Bit 5 - B805

pub fn b806(&mut self) -> B806_W<'_>[src]

Bit 6 - B806

pub fn b807(&mut self) -> B807_W<'_>[src]

Bit 7 - B807

pub fn b808(&mut self) -> B808_W<'_>[src]

Bit 8 - B808

pub fn b809(&mut self) -> B809_W<'_>[src]

Bit 9 - B809

pub fn b810(&mut self) -> B810_W<'_>[src]

Bit 10 - B810

pub fn b811(&mut self) -> B811_W<'_>[src]

Bit 11 - B811

pub fn b812(&mut self) -> B812_W<'_>[src]

Bit 12 - B812

pub fn b813(&mut self) -> B813_W<'_>[src]

Bit 13 - B813

pub fn b814(&mut self) -> B814_W<'_>[src]

Bit 14 - B814

pub fn b815(&mut self) -> B815_W<'_>[src]

Bit 15 - B815

pub fn b816(&mut self) -> B816_W<'_>[src]

Bit 16 - B816

pub fn b817(&mut self) -> B817_W<'_>[src]

Bit 17 - B817

pub fn b818(&mut self) -> B818_W<'_>[src]

Bit 18 - B818

pub fn b819(&mut self) -> B819_W<'_>[src]

Bit 19 - B819

pub fn b820(&mut self) -> B820_W<'_>[src]

Bit 20 - B820

pub fn b821(&mut self) -> B821_W<'_>[src]

Bit 21 - B821

pub fn b822(&mut self) -> B822_W<'_>[src]

Bit 22 - B822

pub fn b823(&mut self) -> B823_W<'_>[src]

Bit 23 - B823

pub fn b824(&mut self) -> B824_W<'_>[src]

Bit 24 - B824

pub fn b825(&mut self) -> B825_W<'_>[src]

Bit 25 - B825

pub fn b826(&mut self) -> B826_W<'_>[src]

Bit 26 - B826

pub fn b827(&mut self) -> B827_W<'_>[src]

Bit 27 - B827

pub fn b828(&mut self) -> B828_W<'_>[src]

Bit 28 - B828

pub fn b829(&mut self) -> B829_W<'_>[src]

Bit 29 - B829

pub fn b830(&mut self) -> B830_W<'_>[src]

Bit 30 - B830

pub fn b831(&mut self) -> B831_W<'_>[src]

Bit 31 - B831

impl W<u32, Reg<u32, _MPCBB1_VCTR26>>[src]

pub fn b832(&mut self) -> B832_W<'_>[src]

Bit 0 - B832

pub fn b833(&mut self) -> B833_W<'_>[src]

Bit 1 - B833

pub fn b834(&mut self) -> B834_W<'_>[src]

Bit 2 - B834

pub fn b835(&mut self) -> B835_W<'_>[src]

Bit 3 - B835

pub fn b836(&mut self) -> B836_W<'_>[src]

Bit 4 - B836

pub fn b837(&mut self) -> B837_W<'_>[src]

Bit 5 - B837

pub fn b838(&mut self) -> B838_W<'_>[src]

Bit 6 - B838

pub fn b839(&mut self) -> B839_W<'_>[src]

Bit 7 - B839

pub fn b840(&mut self) -> B840_W<'_>[src]

Bit 8 - B840

pub fn b841(&mut self) -> B841_W<'_>[src]

Bit 9 - B841

pub fn b842(&mut self) -> B842_W<'_>[src]

Bit 10 - B842

pub fn b843(&mut self) -> B843_W<'_>[src]

Bit 11 - B843

pub fn b844(&mut self) -> B844_W<'_>[src]

Bit 12 - B844

pub fn b845(&mut self) -> B845_W<'_>[src]

Bit 13 - B845

pub fn b846(&mut self) -> B846_W<'_>[src]

Bit 14 - B846

pub fn b847(&mut self) -> B847_W<'_>[src]

Bit 15 - B847

pub fn b848(&mut self) -> B848_W<'_>[src]

Bit 16 - B848

pub fn b849(&mut self) -> B849_W<'_>[src]

Bit 17 - B849

pub fn b850(&mut self) -> B850_W<'_>[src]

Bit 18 - B850

pub fn b851(&mut self) -> B851_W<'_>[src]

Bit 19 - B851

pub fn b852(&mut self) -> B852_W<'_>[src]

Bit 20 - B852

pub fn b853(&mut self) -> B853_W<'_>[src]

Bit 21 - B853

pub fn b854(&mut self) -> B854_W<'_>[src]

Bit 22 - B854

pub fn b855(&mut self) -> B855_W<'_>[src]

Bit 23 - B855

pub fn b856(&mut self) -> B856_W<'_>[src]

Bit 24 - B856

pub fn b857(&mut self) -> B857_W<'_>[src]

Bit 25 - B857

pub fn b858(&mut self) -> B858_W<'_>[src]

Bit 26 - B858

pub fn b859(&mut self) -> B859_W<'_>[src]

Bit 27 - B859

pub fn b860(&mut self) -> B860_W<'_>[src]

Bit 28 - B860

pub fn b861(&mut self) -> B861_W<'_>[src]

Bit 29 - B861

pub fn b862(&mut self) -> B862_W<'_>[src]

Bit 30 - B862

pub fn b863(&mut self) -> B863_W<'_>[src]

Bit 31 - B863

impl W<u32, Reg<u32, _MPCBB1_VCTR27>>[src]

pub fn b864(&mut self) -> B864_W<'_>[src]

Bit 0 - B864

pub fn b865(&mut self) -> B865_W<'_>[src]

Bit 1 - B865

pub fn b866(&mut self) -> B866_W<'_>[src]

Bit 2 - B866

pub fn b867(&mut self) -> B867_W<'_>[src]

Bit 3 - B867

pub fn b868(&mut self) -> B868_W<'_>[src]

Bit 4 - B868

pub fn b869(&mut self) -> B869_W<'_>[src]

Bit 5 - B869

pub fn b870(&mut self) -> B870_W<'_>[src]

Bit 6 - B870

pub fn b871(&mut self) -> B871_W<'_>[src]

Bit 7 - B871

pub fn b872(&mut self) -> B872_W<'_>[src]

Bit 8 - B872

pub fn b873(&mut self) -> B873_W<'_>[src]

Bit 9 - B873

pub fn b874(&mut self) -> B874_W<'_>[src]

Bit 10 - B874

pub fn b875(&mut self) -> B875_W<'_>[src]

Bit 11 - B875

pub fn b876(&mut self) -> B876_W<'_>[src]

Bit 12 - B876

pub fn b877(&mut self) -> B877_W<'_>[src]

Bit 13 - B877

pub fn b878(&mut self) -> B878_W<'_>[src]

Bit 14 - B878

pub fn b879(&mut self) -> B879_W<'_>[src]

Bit 15 - B879

pub fn b880(&mut self) -> B880_W<'_>[src]

Bit 16 - B880

pub fn b881(&mut self) -> B881_W<'_>[src]

Bit 17 - B881

pub fn b882(&mut self) -> B882_W<'_>[src]

Bit 18 - B882

pub fn b883(&mut self) -> B883_W<'_>[src]

Bit 19 - B883

pub fn b884(&mut self) -> B884_W<'_>[src]

Bit 20 - B884

pub fn b885(&mut self) -> B885_W<'_>[src]

Bit 21 - B885

pub fn b886(&mut self) -> B886_W<'_>[src]

Bit 22 - B886

pub fn b887(&mut self) -> B887_W<'_>[src]

Bit 23 - B887

pub fn b888(&mut self) -> B888_W<'_>[src]

Bit 24 - B888

pub fn b889(&mut self) -> B889_W<'_>[src]

Bit 25 - B889

pub fn b890(&mut self) -> B890_W<'_>[src]

Bit 26 - B890

pub fn b891(&mut self) -> B891_W<'_>[src]

Bit 27 - B891

pub fn b892(&mut self) -> B892_W<'_>[src]

Bit 28 - B892

pub fn b893(&mut self) -> B893_W<'_>[src]

Bit 29 - B893

pub fn b894(&mut self) -> B894_W<'_>[src]

Bit 30 - B894

pub fn b895(&mut self) -> B895_W<'_>[src]

Bit 31 - B895

impl W<u32, Reg<u32, _MPCBB1_VCTR28>>[src]

pub fn b896(&mut self) -> B896_W<'_>[src]

Bit 0 - B896

pub fn b897(&mut self) -> B897_W<'_>[src]

Bit 1 - B897

pub fn b898(&mut self) -> B898_W<'_>[src]

Bit 2 - B898

pub fn b899(&mut self) -> B899_W<'_>[src]

Bit 3 - B899

pub fn b900(&mut self) -> B900_W<'_>[src]

Bit 4 - B900

pub fn b901(&mut self) -> B901_W<'_>[src]

Bit 5 - B901

pub fn b902(&mut self) -> B902_W<'_>[src]

Bit 6 - B902

pub fn b903(&mut self) -> B903_W<'_>[src]

Bit 7 - B903

pub fn b904(&mut self) -> B904_W<'_>[src]

Bit 8 - B904

pub fn b905(&mut self) -> B905_W<'_>[src]

Bit 9 - B905

pub fn b906(&mut self) -> B906_W<'_>[src]

Bit 10 - B906

pub fn b907(&mut self) -> B907_W<'_>[src]

Bit 11 - B907

pub fn b908(&mut self) -> B908_W<'_>[src]

Bit 12 - B908

pub fn b909(&mut self) -> B909_W<'_>[src]

Bit 13 - B909

pub fn b910(&mut self) -> B910_W<'_>[src]

Bit 14 - B910

pub fn b911(&mut self) -> B911_W<'_>[src]

Bit 15 - B911

pub fn b912(&mut self) -> B912_W<'_>[src]

Bit 16 - B912

pub fn b913(&mut self) -> B913_W<'_>[src]

Bit 17 - B913

pub fn b914(&mut self) -> B914_W<'_>[src]

Bit 18 - B914

pub fn b915(&mut self) -> B915_W<'_>[src]

Bit 19 - B915

pub fn b916(&mut self) -> B916_W<'_>[src]

Bit 20 - B916

pub fn b917(&mut self) -> B917_W<'_>[src]

Bit 21 - B917

pub fn b918(&mut self) -> B918_W<'_>[src]

Bit 22 - B918

pub fn b919(&mut self) -> B919_W<'_>[src]

Bit 23 - B919

pub fn b920(&mut self) -> B920_W<'_>[src]

Bit 24 - B920

pub fn b921(&mut self) -> B921_W<'_>[src]

Bit 25 - B921

pub fn b922(&mut self) -> B922_W<'_>[src]

Bit 26 - B922

pub fn b923(&mut self) -> B923_W<'_>[src]

Bit 27 - B923

pub fn b924(&mut self) -> B924_W<'_>[src]

Bit 28 - B924

pub fn b925(&mut self) -> B925_W<'_>[src]

Bit 29 - B925

pub fn b926(&mut self) -> B926_W<'_>[src]

Bit 30 - B926

pub fn b927(&mut self) -> B927_W<'_>[src]

Bit 31 - B927

impl W<u32, Reg<u32, _MPCBB1_VCTR29>>[src]

pub fn b928(&mut self) -> B928_W<'_>[src]

Bit 0 - B928

pub fn b929(&mut self) -> B929_W<'_>[src]

Bit 1 - B929

pub fn b930(&mut self) -> B930_W<'_>[src]

Bit 2 - B930

pub fn b931(&mut self) -> B931_W<'_>[src]

Bit 3 - B931

pub fn b932(&mut self) -> B932_W<'_>[src]

Bit 4 - B932

pub fn b933(&mut self) -> B933_W<'_>[src]

Bit 5 - B933

pub fn b934(&mut self) -> B934_W<'_>[src]

Bit 6 - B934

pub fn b935(&mut self) -> B935_W<'_>[src]

Bit 7 - B935

pub fn b936(&mut self) -> B936_W<'_>[src]

Bit 8 - B936

pub fn b937(&mut self) -> B937_W<'_>[src]

Bit 9 - B937

pub fn b938(&mut self) -> B938_W<'_>[src]

Bit 10 - B938

pub fn b939(&mut self) -> B939_W<'_>[src]

Bit 11 - B939

pub fn b940(&mut self) -> B940_W<'_>[src]

Bit 12 - B940

pub fn b941(&mut self) -> B941_W<'_>[src]

Bit 13 - B941

pub fn b942(&mut self) -> B942_W<'_>[src]

Bit 14 - B942

pub fn b943(&mut self) -> B943_W<'_>[src]

Bit 15 - B943

pub fn b944(&mut self) -> B944_W<'_>[src]

Bit 16 - B944

pub fn b945(&mut self) -> B945_W<'_>[src]

Bit 17 - B945

pub fn b946(&mut self) -> B946_W<'_>[src]

Bit 18 - B946

pub fn b947(&mut self) -> B947_W<'_>[src]

Bit 19 - B947

pub fn b948(&mut self) -> B948_W<'_>[src]

Bit 20 - B948

pub fn b949(&mut self) -> B949_W<'_>[src]

Bit 21 - B949

pub fn b950(&mut self) -> B950_W<'_>[src]

Bit 22 - B950

pub fn b951(&mut self) -> B951_W<'_>[src]

Bit 23 - B951

pub fn b952(&mut self) -> B952_W<'_>[src]

Bit 24 - B952

pub fn b953(&mut self) -> B953_W<'_>[src]

Bit 25 - B953

pub fn b954(&mut self) -> B954_W<'_>[src]

Bit 26 - B954

pub fn b955(&mut self) -> B955_W<'_>[src]

Bit 27 - B955

pub fn b956(&mut self) -> B956_W<'_>[src]

Bit 28 - B956

pub fn b957(&mut self) -> B957_W<'_>[src]

Bit 29 - B957

pub fn b958(&mut self) -> B958_W<'_>[src]

Bit 30 - B958

pub fn b959(&mut self) -> B959_W<'_>[src]

Bit 31 - B959

impl W<u32, Reg<u32, _MPCBB1_VCTR30>>[src]

pub fn b960(&mut self) -> B960_W<'_>[src]

Bit 0 - B960

pub fn b961(&mut self) -> B961_W<'_>[src]

Bit 1 - B961

pub fn b962(&mut self) -> B962_W<'_>[src]

Bit 2 - B962

pub fn b963(&mut self) -> B963_W<'_>[src]

Bit 3 - B963

pub fn b964(&mut self) -> B964_W<'_>[src]

Bit 4 - B964

pub fn b965(&mut self) -> B965_W<'_>[src]

Bit 5 - B965

pub fn b966(&mut self) -> B966_W<'_>[src]

Bit 6 - B966

pub fn b967(&mut self) -> B967_W<'_>[src]

Bit 7 - B967

pub fn b968(&mut self) -> B968_W<'_>[src]

Bit 8 - B968

pub fn b969(&mut self) -> B969_W<'_>[src]

Bit 9 - B969

pub fn b970(&mut self) -> B970_W<'_>[src]

Bit 10 - B970

pub fn b971(&mut self) -> B971_W<'_>[src]

Bit 11 - B971

pub fn b972(&mut self) -> B972_W<'_>[src]

Bit 12 - B972

pub fn b973(&mut self) -> B973_W<'_>[src]

Bit 13 - B973

pub fn b974(&mut self) -> B974_W<'_>[src]

Bit 14 - B974

pub fn b975(&mut self) -> B975_W<'_>[src]

Bit 15 - B975

pub fn b976(&mut self) -> B976_W<'_>[src]

Bit 16 - B976

pub fn b977(&mut self) -> B977_W<'_>[src]

Bit 17 - B977

pub fn b978(&mut self) -> B978_W<'_>[src]

Bit 18 - B978

pub fn b979(&mut self) -> B979_W<'_>[src]

Bit 19 - B979

pub fn b980(&mut self) -> B980_W<'_>[src]

Bit 20 - B980

pub fn b981(&mut self) -> B981_W<'_>[src]

Bit 21 - B981

pub fn b982(&mut self) -> B982_W<'_>[src]

Bit 22 - B982

pub fn b983(&mut self) -> B983_W<'_>[src]

Bit 23 - B983

pub fn b984(&mut self) -> B984_W<'_>[src]

Bit 24 - B984

pub fn b985(&mut self) -> B985_W<'_>[src]

Bit 25 - B985

pub fn b986(&mut self) -> B986_W<'_>[src]

Bit 26 - B986

pub fn b987(&mut self) -> B987_W<'_>[src]

Bit 27 - B987

pub fn b988(&mut self) -> B988_W<'_>[src]

Bit 28 - B988

pub fn b989(&mut self) -> B989_W<'_>[src]

Bit 29 - B989

pub fn b990(&mut self) -> B990_W<'_>[src]

Bit 30 - B990

pub fn b991(&mut self) -> B991_W<'_>[src]

Bit 31 - B991

impl W<u32, Reg<u32, _MPCBB1_VCTR31>>[src]

pub fn b992(&mut self) -> B992_W<'_>[src]

Bit 0 - B992

pub fn b993(&mut self) -> B993_W<'_>[src]

Bit 1 - B993

pub fn b994(&mut self) -> B994_W<'_>[src]

Bit 2 - B994

pub fn b995(&mut self) -> B995_W<'_>[src]

Bit 3 - B995

pub fn b996(&mut self) -> B996_W<'_>[src]

Bit 4 - B996

pub fn b997(&mut self) -> B997_W<'_>[src]

Bit 5 - B997

pub fn b998(&mut self) -> B998_W<'_>[src]

Bit 6 - B998

pub fn b999(&mut self) -> B999_W<'_>[src]

Bit 7 - B999

pub fn b1000(&mut self) -> B1000_W<'_>[src]

Bit 8 - B1000

pub fn b1001(&mut self) -> B1001_W<'_>[src]

Bit 9 - B1001

pub fn b1002(&mut self) -> B1002_W<'_>[src]

Bit 10 - B1002

pub fn b1003(&mut self) -> B1003_W<'_>[src]

Bit 11 - B1003

pub fn b1004(&mut self) -> B1004_W<'_>[src]

Bit 12 - B1004

pub fn b1005(&mut self) -> B1005_W<'_>[src]

Bit 13 - B1005

pub fn b1006(&mut self) -> B1006_W<'_>[src]

Bit 14 - B1006

pub fn b1007(&mut self) -> B1007_W<'_>[src]

Bit 15 - B1007

pub fn b1008(&mut self) -> B1008_W<'_>[src]

Bit 16 - B1008

pub fn b1009(&mut self) -> B1009_W<'_>[src]

Bit 17 - B1009

pub fn b1010(&mut self) -> B1010_W<'_>[src]

Bit 18 - B1010

pub fn b1011(&mut self) -> B1011_W<'_>[src]

Bit 19 - B1011

pub fn b1012(&mut self) -> B1012_W<'_>[src]

Bit 20 - B1012

pub fn b1013(&mut self) -> B1013_W<'_>[src]

Bit 21 - B1013

pub fn b1014(&mut self) -> B1014_W<'_>[src]

Bit 22 - B1014

pub fn b1015(&mut self) -> B1015_W<'_>[src]

Bit 23 - B1015

pub fn b1016(&mut self) -> B1016_W<'_>[src]

Bit 24 - B1016

pub fn b1017(&mut self) -> B1017_W<'_>[src]

Bit 25 - B1017

pub fn b1018(&mut self) -> B1018_W<'_>[src]

Bit 26 - B1018

pub fn b1019(&mut self) -> B1019_W<'_>[src]

Bit 27 - B1019

pub fn b1020(&mut self) -> B1020_W<'_>[src]

Bit 28 - B1020

pub fn b1021(&mut self) -> B1021_W<'_>[src]

Bit 29 - B1021

pub fn b1022(&mut self) -> B1022_W<'_>[src]

Bit 30 - B1022

pub fn b1023(&mut self) -> B1023_W<'_>[src]

Bit 31 - B1023

impl W<u32, Reg<u32, _MPCBB1_VCTR32>>[src]

pub fn b1024(&mut self) -> B1024_W<'_>[src]

Bit 0 - B1024

pub fn b1025(&mut self) -> B1025_W<'_>[src]

Bit 1 - B1025

pub fn b1026(&mut self) -> B1026_W<'_>[src]

Bit 2 - B1026

pub fn b1027(&mut self) -> B1027_W<'_>[src]

Bit 3 - B1027

pub fn b1028(&mut self) -> B1028_W<'_>[src]

Bit 4 - B1028

pub fn b1029(&mut self) -> B1029_W<'_>[src]

Bit 5 - B1029

pub fn b1030(&mut self) -> B1030_W<'_>[src]

Bit 6 - B1030

pub fn b1031(&mut self) -> B1031_W<'_>[src]

Bit 7 - B1031

pub fn b1032(&mut self) -> B1032_W<'_>[src]

Bit 8 - B1032

pub fn b1033(&mut self) -> B1033_W<'_>[src]

Bit 9 - B1033

pub fn b1034(&mut self) -> B1034_W<'_>[src]

Bit 10 - B1034

pub fn b1035(&mut self) -> B1035_W<'_>[src]

Bit 11 - B1035

pub fn b1036(&mut self) -> B1036_W<'_>[src]

Bit 12 - B1036

pub fn b1037(&mut self) -> B1037_W<'_>[src]

Bit 13 - B1037

pub fn b1038(&mut self) -> B1038_W<'_>[src]

Bit 14 - B1038

pub fn b1039(&mut self) -> B1039_W<'_>[src]

Bit 15 - B1039

pub fn b1040(&mut self) -> B1040_W<'_>[src]

Bit 16 - B1040

pub fn b1041(&mut self) -> B1041_W<'_>[src]

Bit 17 - B1041

pub fn b1042(&mut self) -> B1042_W<'_>[src]

Bit 18 - B1042

pub fn b1043(&mut self) -> B1043_W<'_>[src]

Bit 19 - B1043

pub fn b1044(&mut self) -> B1044_W<'_>[src]

Bit 20 - B1044

pub fn b1045(&mut self) -> B1045_W<'_>[src]

Bit 21 - B1045

pub fn b1046(&mut self) -> B1046_W<'_>[src]

Bit 22 - B1046

pub fn b1047(&mut self) -> B1047_W<'_>[src]

Bit 23 - B1047

pub fn b1048(&mut self) -> B1048_W<'_>[src]

Bit 24 - B1048

pub fn b1049(&mut self) -> B1049_W<'_>[src]

Bit 25 - B1049

pub fn b1050(&mut self) -> B1050_W<'_>[src]

Bit 26 - B1050

pub fn b1051(&mut self) -> B1051_W<'_>[src]

Bit 27 - B1051

pub fn b1052(&mut self) -> B1052_W<'_>[src]

Bit 28 - B1052

pub fn b1053(&mut self) -> B1053_W<'_>[src]

Bit 29 - B1053

pub fn b1054(&mut self) -> B1054_W<'_>[src]

Bit 30 - B1054

pub fn b1055(&mut self) -> B1055_W<'_>[src]

Bit 31 - B1055

impl W<u32, Reg<u32, _MPCBB1_VCTR33>>[src]

pub fn b1056(&mut self) -> B1056_W<'_>[src]

Bit 0 - B1056

pub fn b1057(&mut self) -> B1057_W<'_>[src]

Bit 1 - B1057

pub fn b1058(&mut self) -> B1058_W<'_>[src]

Bit 2 - B1058

pub fn b1059(&mut self) -> B1059_W<'_>[src]

Bit 3 - B1059

pub fn b1060(&mut self) -> B1060_W<'_>[src]

Bit 4 - B1060

pub fn b1061(&mut self) -> B1061_W<'_>[src]

Bit 5 - B1061

pub fn b1062(&mut self) -> B1062_W<'_>[src]

Bit 6 - B1062

pub fn b1063(&mut self) -> B1063_W<'_>[src]

Bit 7 - B1063

pub fn b1064(&mut self) -> B1064_W<'_>[src]

Bit 8 - B1064

pub fn b1065(&mut self) -> B1065_W<'_>[src]

Bit 9 - B1065

pub fn b1066(&mut self) -> B1066_W<'_>[src]

Bit 10 - B1066

pub fn b1067(&mut self) -> B1067_W<'_>[src]

Bit 11 - B1067

pub fn b1068(&mut self) -> B1068_W<'_>[src]

Bit 12 - B1068

pub fn b1069(&mut self) -> B1069_W<'_>[src]

Bit 13 - B1069

pub fn b1070(&mut self) -> B1070_W<'_>[src]

Bit 14 - B1070

pub fn b1071(&mut self) -> B1071_W<'_>[src]

Bit 15 - B1071

pub fn b1072(&mut self) -> B1072_W<'_>[src]

Bit 16 - B1072

pub fn b1073(&mut self) -> B1073_W<'_>[src]

Bit 17 - B1073

pub fn b1074(&mut self) -> B1074_W<'_>[src]

Bit 18 - B1074

pub fn b1075(&mut self) -> B1075_W<'_>[src]

Bit 19 - B1075

pub fn b1076(&mut self) -> B1076_W<'_>[src]

Bit 20 - B1076

pub fn b1077(&mut self) -> B1077_W<'_>[src]

Bit 21 - B1077

pub fn b1078(&mut self) -> B1078_W<'_>[src]

Bit 22 - B1078

pub fn b1079(&mut self) -> B1079_W<'_>[src]

Bit 23 - B1079

pub fn b1080(&mut self) -> B1080_W<'_>[src]

Bit 24 - B1080

pub fn b1081(&mut self) -> B1081_W<'_>[src]

Bit 25 - B1081

pub fn b1082(&mut self) -> B1082_W<'_>[src]

Bit 26 - B1082

pub fn b1083(&mut self) -> B1083_W<'_>[src]

Bit 27 - B1083

pub fn b1084(&mut self) -> B1084_W<'_>[src]

Bit 28 - B1084

pub fn b1085(&mut self) -> B1085_W<'_>[src]

Bit 29 - B1085

pub fn b1086(&mut self) -> B1086_W<'_>[src]

Bit 30 - B1086

pub fn b1087(&mut self) -> B1087_W<'_>[src]

Bit 31 - B1087

impl W<u32, Reg<u32, _MPCBB1_VCTR34>>[src]

pub fn b1088(&mut self) -> B1088_W<'_>[src]

Bit 0 - B1088

pub fn b1089(&mut self) -> B1089_W<'_>[src]

Bit 1 - B1089

pub fn b1090(&mut self) -> B1090_W<'_>[src]

Bit 2 - B1090

pub fn b1091(&mut self) -> B1091_W<'_>[src]

Bit 3 - B1091

pub fn b1092(&mut self) -> B1092_W<'_>[src]

Bit 4 - B1092

pub fn b1093(&mut self) -> B1093_W<'_>[src]

Bit 5 - B1093

pub fn b1094(&mut self) -> B1094_W<'_>[src]

Bit 6 - B1094

pub fn b1095(&mut self) -> B1095_W<'_>[src]

Bit 7 - B1095

pub fn b1096(&mut self) -> B1096_W<'_>[src]

Bit 8 - B1096

pub fn b1097(&mut self) -> B1097_W<'_>[src]

Bit 9 - B1097

pub fn b1098(&mut self) -> B1098_W<'_>[src]

Bit 10 - B1098

pub fn b1099(&mut self) -> B1099_W<'_>[src]

Bit 11 - B1099

pub fn b1100(&mut self) -> B1100_W<'_>[src]

Bit 12 - B1100

pub fn b1101(&mut self) -> B1101_W<'_>[src]

Bit 13 - B1101

pub fn b1102(&mut self) -> B1102_W<'_>[src]

Bit 14 - B1102

pub fn b1103(&mut self) -> B1103_W<'_>[src]

Bit 15 - B1103

pub fn b1104(&mut self) -> B1104_W<'_>[src]

Bit 16 - B1104

pub fn b1105(&mut self) -> B1105_W<'_>[src]

Bit 17 - B1105

pub fn b1106(&mut self) -> B1106_W<'_>[src]

Bit 18 - B1106

pub fn b1107(&mut self) -> B1107_W<'_>[src]

Bit 19 - B1107

pub fn b1108(&mut self) -> B1108_W<'_>[src]

Bit 20 - B1108

pub fn b1109(&mut self) -> B1109_W<'_>[src]

Bit 21 - B1109

pub fn b1110(&mut self) -> B1110_W<'_>[src]

Bit 22 - B1110

pub fn b1111(&mut self) -> B1111_W<'_>[src]

Bit 23 - B1111

pub fn b1112(&mut self) -> B1112_W<'_>[src]

Bit 24 - B1112

pub fn b1113(&mut self) -> B1113_W<'_>[src]

Bit 25 - B1113

pub fn b1114(&mut self) -> B1114_W<'_>[src]

Bit 26 - B1114

pub fn b1115(&mut self) -> B1115_W<'_>[src]

Bit 27 - B1115

pub fn b1116(&mut self) -> B1116_W<'_>[src]

Bit 28 - B1116

pub fn b1117(&mut self) -> B1117_W<'_>[src]

Bit 29 - B1117

pub fn b1118(&mut self) -> B1118_W<'_>[src]

Bit 30 - B1118

pub fn b1119(&mut self) -> B1119_W<'_>[src]

Bit 31 - B1119

impl W<u32, Reg<u32, _MPCBB1_VCTR35>>[src]

pub fn b1120(&mut self) -> B1120_W<'_>[src]

Bit 0 - B1120

pub fn b1121(&mut self) -> B1121_W<'_>[src]

Bit 1 - B1121

pub fn b1122(&mut self) -> B1122_W<'_>[src]

Bit 2 - B1122

pub fn b1123(&mut self) -> B1123_W<'_>[src]

Bit 3 - B1123

pub fn b1124(&mut self) -> B1124_W<'_>[src]

Bit 4 - B1124

pub fn b1125(&mut self) -> B1125_W<'_>[src]

Bit 5 - B1125

pub fn b1126(&mut self) -> B1126_W<'_>[src]

Bit 6 - B1126

pub fn b1127(&mut self) -> B1127_W<'_>[src]

Bit 7 - B1127

pub fn b1128(&mut self) -> B1128_W<'_>[src]

Bit 8 - B1128

pub fn b1129(&mut self) -> B1129_W<'_>[src]

Bit 9 - B1129

pub fn b1130(&mut self) -> B1130_W<'_>[src]

Bit 10 - B1130

pub fn b1131(&mut self) -> B1131_W<'_>[src]

Bit 11 - B1131

pub fn b1132(&mut self) -> B1132_W<'_>[src]

Bit 12 - B1132

pub fn b1133(&mut self) -> B1133_W<'_>[src]

Bit 13 - B1133

pub fn b1134(&mut self) -> B1134_W<'_>[src]

Bit 14 - B1134

pub fn b1135(&mut self) -> B1135_W<'_>[src]

Bit 15 - B1135

pub fn b1136(&mut self) -> B1136_W<'_>[src]

Bit 16 - B1136

pub fn b1137(&mut self) -> B1137_W<'_>[src]

Bit 17 - B1137

pub fn b1138(&mut self) -> B1138_W<'_>[src]

Bit 18 - B1138

pub fn b1139(&mut self) -> B1139_W<'_>[src]

Bit 19 - B1139

pub fn b1140(&mut self) -> B1140_W<'_>[src]

Bit 20 - B1140

pub fn b1141(&mut self) -> B1141_W<'_>[src]

Bit 21 - B1141

pub fn b1142(&mut self) -> B1142_W<'_>[src]

Bit 22 - B1142

pub fn b1143(&mut self) -> B1143_W<'_>[src]

Bit 23 - B1143

pub fn b1144(&mut self) -> B1144_W<'_>[src]

Bit 24 - B1144

pub fn b1145(&mut self) -> B1145_W<'_>[src]

Bit 25 - B1145

pub fn b1146(&mut self) -> B1146_W<'_>[src]

Bit 26 - B1146

pub fn b1147(&mut self) -> B1147_W<'_>[src]

Bit 27 - B1147

pub fn b1148(&mut self) -> B1148_W<'_>[src]

Bit 28 - B1148

pub fn b1149(&mut self) -> B1149_W<'_>[src]

Bit 29 - B1149

pub fn b1150(&mut self) -> B1150_W<'_>[src]

Bit 30 - B1150

pub fn b1151(&mut self) -> B1151_W<'_>[src]

Bit 31 - B1151

impl W<u32, Reg<u32, _MPCBB1_VCTR36>>[src]

pub fn b1152(&mut self) -> B1152_W<'_>[src]

Bit 0 - B1152

pub fn b1153(&mut self) -> B1153_W<'_>[src]

Bit 1 - B1153

pub fn b1154(&mut self) -> B1154_W<'_>[src]

Bit 2 - B1154

pub fn b1155(&mut self) -> B1155_W<'_>[src]

Bit 3 - B1155

pub fn b1156(&mut self) -> B1156_W<'_>[src]

Bit 4 - B1156

pub fn b1157(&mut self) -> B1157_W<'_>[src]

Bit 5 - B1157

pub fn b1158(&mut self) -> B1158_W<'_>[src]

Bit 6 - B1158

pub fn b1159(&mut self) -> B1159_W<'_>[src]

Bit 7 - B1159

pub fn b1160(&mut self) -> B1160_W<'_>[src]

Bit 8 - B1160

pub fn b1161(&mut self) -> B1161_W<'_>[src]

Bit 9 - B1161

pub fn b1162(&mut self) -> B1162_W<'_>[src]

Bit 10 - B1162

pub fn b1163(&mut self) -> B1163_W<'_>[src]

Bit 11 - B1163

pub fn b1164(&mut self) -> B1164_W<'_>[src]

Bit 12 - B1164

pub fn b1165(&mut self) -> B1165_W<'_>[src]

Bit 13 - B1165

pub fn b1166(&mut self) -> B1166_W<'_>[src]

Bit 14 - B1166

pub fn b1167(&mut self) -> B1167_W<'_>[src]

Bit 15 - B1167

pub fn b1168(&mut self) -> B1168_W<'_>[src]

Bit 16 - B1168

pub fn b1169(&mut self) -> B1169_W<'_>[src]

Bit 17 - B1169

pub fn b1170(&mut self) -> B1170_W<'_>[src]

Bit 18 - B1170

pub fn b1171(&mut self) -> B1171_W<'_>[src]

Bit 19 - B1171

pub fn b1172(&mut self) -> B1172_W<'_>[src]

Bit 20 - B1172

pub fn b1173(&mut self) -> B1173_W<'_>[src]

Bit 21 - B1173

pub fn b1174(&mut self) -> B1174_W<'_>[src]

Bit 22 - B1174

pub fn b1175(&mut self) -> B1175_W<'_>[src]

Bit 23 - B1175

pub fn b1176(&mut self) -> B1176_W<'_>[src]

Bit 24 - B1176

pub fn b1177(&mut self) -> B1177_W<'_>[src]

Bit 25 - B1177

pub fn b1178(&mut self) -> B1178_W<'_>[src]

Bit 26 - B1178

pub fn b1179(&mut self) -> B1179_W<'_>[src]

Bit 27 - B1179

pub fn b1180(&mut self) -> B1180_W<'_>[src]

Bit 28 - B1180

pub fn b1181(&mut self) -> B1181_W<'_>[src]

Bit 29 - B1181

pub fn b1182(&mut self) -> B1182_W<'_>[src]

Bit 30 - B1182

pub fn b1183(&mut self) -> B1183_W<'_>[src]

Bit 31 - B1183

impl W<u32, Reg<u32, _MPCBB1_VCTR37>>[src]

pub fn b1184(&mut self) -> B1184_W<'_>[src]

Bit 0 - B1184

pub fn b1185(&mut self) -> B1185_W<'_>[src]

Bit 1 - B1185

pub fn b1186(&mut self) -> B1186_W<'_>[src]

Bit 2 - B1186

pub fn b1187(&mut self) -> B1187_W<'_>[src]

Bit 3 - B1187

pub fn b1188(&mut self) -> B1188_W<'_>[src]

Bit 4 - B1188

pub fn b1189(&mut self) -> B1189_W<'_>[src]

Bit 5 - B1189

pub fn b1190(&mut self) -> B1190_W<'_>[src]

Bit 6 - B1190

pub fn b1191(&mut self) -> B1191_W<'_>[src]

Bit 7 - B1191

pub fn b1192(&mut self) -> B1192_W<'_>[src]

Bit 8 - B1192

pub fn b1193(&mut self) -> B1193_W<'_>[src]

Bit 9 - B1193

pub fn b1194(&mut self) -> B1194_W<'_>[src]

Bit 10 - B1194

pub fn b1195(&mut self) -> B1195_W<'_>[src]

Bit 11 - B1195

pub fn b1196(&mut self) -> B1196_W<'_>[src]

Bit 12 - B1196

pub fn b1197(&mut self) -> B1197_W<'_>[src]

Bit 13 - B1197

pub fn b1198(&mut self) -> B1198_W<'_>[src]

Bit 14 - B1198

pub fn b1199(&mut self) -> B1199_W<'_>[src]

Bit 15 - B1199

pub fn b1200(&mut self) -> B1200_W<'_>[src]

Bit 16 - B1200

pub fn b1201(&mut self) -> B1201_W<'_>[src]

Bit 17 - B1201

pub fn b1202(&mut self) -> B1202_W<'_>[src]

Bit 18 - B1202

pub fn b1203(&mut self) -> B1203_W<'_>[src]

Bit 19 - B1203

pub fn b1204(&mut self) -> B1204_W<'_>[src]

Bit 20 - B1204

pub fn b1205(&mut self) -> B1205_W<'_>[src]

Bit 21 - B1205

pub fn b1206(&mut self) -> B1206_W<'_>[src]

Bit 22 - B1206

pub fn b1207(&mut self) -> B1207_W<'_>[src]

Bit 23 - B1207

pub fn b1208(&mut self) -> B1208_W<'_>[src]

Bit 24 - B1208

pub fn b1209(&mut self) -> B1209_W<'_>[src]

Bit 25 - B1209

pub fn b1210(&mut self) -> B1210_W<'_>[src]

Bit 26 - B1210

pub fn b1211(&mut self) -> B1211_W<'_>[src]

Bit 27 - B1211

pub fn b1212(&mut self) -> B1212_W<'_>[src]

Bit 28 - B1212

pub fn b1213(&mut self) -> B1213_W<'_>[src]

Bit 29 - B1213

pub fn b1214(&mut self) -> B1214_W<'_>[src]

Bit 30 - B1214

pub fn b1215(&mut self) -> B1215_W<'_>[src]

Bit 31 - B1215

impl W<u32, Reg<u32, _MPCBB1_VCTR38>>[src]

pub fn b1216(&mut self) -> B1216_W<'_>[src]

Bit 0 - B1216

pub fn b1217(&mut self) -> B1217_W<'_>[src]

Bit 1 - B1217

pub fn b1218(&mut self) -> B1218_W<'_>[src]

Bit 2 - B1218

pub fn b1219(&mut self) -> B1219_W<'_>[src]

Bit 3 - B1219

pub fn b1220(&mut self) -> B1220_W<'_>[src]

Bit 4 - B1220

pub fn b1221(&mut self) -> B1221_W<'_>[src]

Bit 5 - B1221

pub fn b1222(&mut self) -> B1222_W<'_>[src]

Bit 6 - B1222

pub fn b1223(&mut self) -> B1223_W<'_>[src]

Bit 7 - B1223

pub fn b1224(&mut self) -> B1224_W<'_>[src]

Bit 8 - B1224

pub fn b1225(&mut self) -> B1225_W<'_>[src]

Bit 9 - B1225

pub fn b1226(&mut self) -> B1226_W<'_>[src]

Bit 10 - B1226

pub fn b1227(&mut self) -> B1227_W<'_>[src]

Bit 11 - B1227

pub fn b1228(&mut self) -> B1228_W<'_>[src]

Bit 12 - B1228

pub fn b1229(&mut self) -> B1229_W<'_>[src]

Bit 13 - B1229

pub fn b1230(&mut self) -> B1230_W<'_>[src]

Bit 14 - B1230

pub fn b1231(&mut self) -> B1231_W<'_>[src]

Bit 15 - B1231

pub fn b1232(&mut self) -> B1232_W<'_>[src]

Bit 16 - B1232

pub fn b1233(&mut self) -> B1233_W<'_>[src]

Bit 17 - B1233

pub fn b1234(&mut self) -> B1234_W<'_>[src]

Bit 18 - B1234

pub fn b1235(&mut self) -> B1235_W<'_>[src]

Bit 19 - B1235

pub fn b1236(&mut self) -> B1236_W<'_>[src]

Bit 20 - B1236

pub fn b1237(&mut self) -> B1237_W<'_>[src]

Bit 21 - B1237

pub fn b1238(&mut self) -> B1238_W<'_>[src]

Bit 22 - B1238

pub fn b1239(&mut self) -> B1239_W<'_>[src]

Bit 23 - B1239

pub fn b1240(&mut self) -> B1240_W<'_>[src]

Bit 24 - B1240

pub fn b1241(&mut self) -> B1241_W<'_>[src]

Bit 25 - B1241

pub fn b1242(&mut self) -> B1242_W<'_>[src]

Bit 26 - B1242

pub fn b1243(&mut self) -> B1243_W<'_>[src]

Bit 27 - B1243

pub fn b1244(&mut self) -> B1244_W<'_>[src]

Bit 28 - B1244

pub fn b1245(&mut self) -> B1245_W<'_>[src]

Bit 29 - B1245

pub fn b1246(&mut self) -> B1246_W<'_>[src]

Bit 30 - B1246

pub fn b1247(&mut self) -> B1247_W<'_>[src]

Bit 31 - B1247

impl W<u32, Reg<u32, _MPCBB1_VCTR39>>[src]

pub fn b1248(&mut self) -> B1248_W<'_>[src]

Bit 0 - B1248

pub fn b1249(&mut self) -> B1249_W<'_>[src]

Bit 1 - B1249

pub fn b1250(&mut self) -> B1250_W<'_>[src]

Bit 2 - B1250

pub fn b1251(&mut self) -> B1251_W<'_>[src]

Bit 3 - B1251

pub fn b1252(&mut self) -> B1252_W<'_>[src]

Bit 4 - B1252

pub fn b1253(&mut self) -> B1253_W<'_>[src]

Bit 5 - B1253

pub fn b1254(&mut self) -> B1254_W<'_>[src]

Bit 6 - B1254

pub fn b1255(&mut self) -> B1255_W<'_>[src]

Bit 7 - B1255

pub fn b1256(&mut self) -> B1256_W<'_>[src]

Bit 8 - B1256

pub fn b1257(&mut self) -> B1257_W<'_>[src]

Bit 9 - B1257

pub fn b1258(&mut self) -> B1258_W<'_>[src]

Bit 10 - B1258

pub fn b1259(&mut self) -> B1259_W<'_>[src]

Bit 11 - B1259

pub fn b1260(&mut self) -> B1260_W<'_>[src]

Bit 12 - B1260

pub fn b1261(&mut self) -> B1261_W<'_>[src]

Bit 13 - B1261

pub fn b1262(&mut self) -> B1262_W<'_>[src]

Bit 14 - B1262

pub fn b1263(&mut self) -> B1263_W<'_>[src]

Bit 15 - B1263

pub fn b1264(&mut self) -> B1264_W<'_>[src]

Bit 16 - B1264

pub fn b1265(&mut self) -> B1265_W<'_>[src]

Bit 17 - B1265

pub fn b1266(&mut self) -> B1266_W<'_>[src]

Bit 18 - B1266

pub fn b1267(&mut self) -> B1267_W<'_>[src]

Bit 19 - B1267

pub fn b1268(&mut self) -> B1268_W<'_>[src]

Bit 20 - B1268

pub fn b1269(&mut self) -> B1269_W<'_>[src]

Bit 21 - B1269

pub fn b1270(&mut self) -> B1270_W<'_>[src]

Bit 22 - B1270

pub fn b1271(&mut self) -> B1271_W<'_>[src]

Bit 23 - B1271

pub fn b1272(&mut self) -> B1272_W<'_>[src]

Bit 24 - B1272

pub fn b1273(&mut self) -> B1273_W<'_>[src]

Bit 25 - B1273

pub fn b1274(&mut self) -> B1274_W<'_>[src]

Bit 26 - B1274

pub fn b1275(&mut self) -> B1275_W<'_>[src]

Bit 27 - B1275

pub fn b1276(&mut self) -> B1276_W<'_>[src]

Bit 28 - B1276

pub fn b1277(&mut self) -> B1277_W<'_>[src]

Bit 29 - B1277

pub fn b1278(&mut self) -> B1278_W<'_>[src]

Bit 30 - B1278

pub fn b1279(&mut self) -> B1279_W<'_>[src]

Bit 31 - B1279

impl W<u32, Reg<u32, _MPCBB1_VCTR40>>[src]

pub fn b1280(&mut self) -> B1280_W<'_>[src]

Bit 0 - B1280

pub fn b1281(&mut self) -> B1281_W<'_>[src]

Bit 1 - B1281

pub fn b1282(&mut self) -> B1282_W<'_>[src]

Bit 2 - B1282

pub fn b1283(&mut self) -> B1283_W<'_>[src]

Bit 3 - B1283

pub fn b1284(&mut self) -> B1284_W<'_>[src]

Bit 4 - B1284

pub fn b1285(&mut self) -> B1285_W<'_>[src]

Bit 5 - B1285

pub fn b1286(&mut self) -> B1286_W<'_>[src]

Bit 6 - B1286

pub fn b1287(&mut self) -> B1287_W<'_>[src]

Bit 7 - B1287

pub fn b1288(&mut self) -> B1288_W<'_>[src]

Bit 8 - B1288

pub fn b1289(&mut self) -> B1289_W<'_>[src]

Bit 9 - B1289

pub fn b1290(&mut self) -> B1290_W<'_>[src]

Bit 10 - B1290

pub fn b1291(&mut self) -> B1291_W<'_>[src]

Bit 11 - B1291

pub fn b1292(&mut self) -> B1292_W<'_>[src]

Bit 12 - B1292

pub fn b1293(&mut self) -> B1293_W<'_>[src]

Bit 13 - B1293

pub fn b1294(&mut self) -> B1294_W<'_>[src]

Bit 14 - B1294

pub fn b1295(&mut self) -> B1295_W<'_>[src]

Bit 15 - B1295

pub fn b1296(&mut self) -> B1296_W<'_>[src]

Bit 16 - B1296

pub fn b1297(&mut self) -> B1297_W<'_>[src]

Bit 17 - B1297

pub fn b1298(&mut self) -> B1298_W<'_>[src]

Bit 18 - B1298

pub fn b1299(&mut self) -> B1299_W<'_>[src]

Bit 19 - B1299

pub fn b1300(&mut self) -> B1300_W<'_>[src]

Bit 20 - B1300

pub fn b1301(&mut self) -> B1301_W<'_>[src]

Bit 21 - B1301

pub fn b1302(&mut self) -> B1302_W<'_>[src]

Bit 22 - B1302

pub fn b1303(&mut self) -> B1303_W<'_>[src]

Bit 23 - B1303

pub fn b1304(&mut self) -> B1304_W<'_>[src]

Bit 24 - B1304

pub fn b1305(&mut self) -> B1305_W<'_>[src]

Bit 25 - B1305

pub fn b1306(&mut self) -> B1306_W<'_>[src]

Bit 26 - B1306

pub fn b1307(&mut self) -> B1307_W<'_>[src]

Bit 27 - B1307

pub fn b1308(&mut self) -> B1308_W<'_>[src]

Bit 28 - B1308

pub fn b1309(&mut self) -> B1309_W<'_>[src]

Bit 29 - B1309

pub fn b1310(&mut self) -> B1310_W<'_>[src]

Bit 30 - B1310

pub fn b1311(&mut self) -> B1311_W<'_>[src]

Bit 31 - B1311

impl W<u32, Reg<u32, _MPCBB1_VCTR41>>[src]

pub fn b1312(&mut self) -> B1312_W<'_>[src]

Bit 0 - B1312

pub fn b1313(&mut self) -> B1313_W<'_>[src]

Bit 1 - B1313

pub fn b1314(&mut self) -> B1314_W<'_>[src]

Bit 2 - B1314

pub fn b1315(&mut self) -> B1315_W<'_>[src]

Bit 3 - B1315

pub fn b1316(&mut self) -> B1316_W<'_>[src]

Bit 4 - B1316

pub fn b1317(&mut self) -> B1317_W<'_>[src]

Bit 5 - B1317

pub fn b1318(&mut self) -> B1318_W<'_>[src]

Bit 6 - B1318

pub fn b1319(&mut self) -> B1319_W<'_>[src]

Bit 7 - B1319

pub fn b1320(&mut self) -> B1320_W<'_>[src]

Bit 8 - B1320

pub fn b1321(&mut self) -> B1321_W<'_>[src]

Bit 9 - B1321

pub fn b1322(&mut self) -> B1322_W<'_>[src]

Bit 10 - B1322

pub fn b1323(&mut self) -> B1323_W<'_>[src]

Bit 11 - B1323

pub fn b1324(&mut self) -> B1324_W<'_>[src]

Bit 12 - B1324

pub fn b1325(&mut self) -> B1325_W<'_>[src]

Bit 13 - B1325

pub fn b1326(&mut self) -> B1326_W<'_>[src]

Bit 14 - B1326

pub fn b1327(&mut self) -> B1327_W<'_>[src]

Bit 15 - B1327

pub fn b1328(&mut self) -> B1328_W<'_>[src]

Bit 16 - B1328

pub fn b1329(&mut self) -> B1329_W<'_>[src]

Bit 17 - B1329

pub fn b1330(&mut self) -> B1330_W<'_>[src]

Bit 18 - B1330

pub fn b1331(&mut self) -> B1331_W<'_>[src]

Bit 19 - B1331

pub fn b1332(&mut self) -> B1332_W<'_>[src]

Bit 20 - B1332

pub fn b1333(&mut self) -> B1333_W<'_>[src]

Bit 21 - B1333

pub fn b1334(&mut self) -> B1334_W<'_>[src]

Bit 22 - B1334

pub fn b1335(&mut self) -> B1335_W<'_>[src]

Bit 23 - B1335

pub fn b1336(&mut self) -> B1336_W<'_>[src]

Bit 24 - B1336

pub fn b1337(&mut self) -> B1337_W<'_>[src]

Bit 25 - B1337

pub fn b1338(&mut self) -> B1338_W<'_>[src]

Bit 26 - B1338

pub fn b1339(&mut self) -> B1339_W<'_>[src]

Bit 27 - B1339

pub fn b1340(&mut self) -> B1340_W<'_>[src]

Bit 28 - B1340

pub fn b1341(&mut self) -> B1341_W<'_>[src]

Bit 29 - B1341

pub fn b1342(&mut self) -> B1342_W<'_>[src]

Bit 30 - B1342

pub fn b1343(&mut self) -> B1343_W<'_>[src]

Bit 31 - B1343

impl W<u32, Reg<u32, _MPCBB1_VCTR42>>[src]

pub fn b1344(&mut self) -> B1344_W<'_>[src]

Bit 0 - B1344

pub fn b1345(&mut self) -> B1345_W<'_>[src]

Bit 1 - B1345

pub fn b1346(&mut self) -> B1346_W<'_>[src]

Bit 2 - B1346

pub fn b1347(&mut self) -> B1347_W<'_>[src]

Bit 3 - B1347

pub fn b1348(&mut self) -> B1348_W<'_>[src]

Bit 4 - B1348

pub fn b1349(&mut self) -> B1349_W<'_>[src]

Bit 5 - B1349

pub fn b1350(&mut self) -> B1350_W<'_>[src]

Bit 6 - B1350

pub fn b1351(&mut self) -> B1351_W<'_>[src]

Bit 7 - B1351

pub fn b1352(&mut self) -> B1352_W<'_>[src]

Bit 8 - B1352

pub fn b1353(&mut self) -> B1353_W<'_>[src]

Bit 9 - B1353

pub fn b1354(&mut self) -> B1354_W<'_>[src]

Bit 10 - B1354

pub fn b1355(&mut self) -> B1355_W<'_>[src]

Bit 11 - B1355

pub fn b1356(&mut self) -> B1356_W<'_>[src]

Bit 12 - B1356

pub fn b1357(&mut self) -> B1357_W<'_>[src]

Bit 13 - B1357

pub fn b1358(&mut self) -> B1358_W<'_>[src]

Bit 14 - B1358

pub fn b1359(&mut self) -> B1359_W<'_>[src]

Bit 15 - B1359

pub fn b1360(&mut self) -> B1360_W<'_>[src]

Bit 16 - B1360

pub fn b1361(&mut self) -> B1361_W<'_>[src]

Bit 17 - B1361

pub fn b1362(&mut self) -> B1362_W<'_>[src]

Bit 18 - B1362

pub fn b1363(&mut self) -> B1363_W<'_>[src]

Bit 19 - B1363

pub fn b1364(&mut self) -> B1364_W<'_>[src]

Bit 20 - B1364

pub fn b1365(&mut self) -> B1365_W<'_>[src]

Bit 21 - B1365

pub fn b1366(&mut self) -> B1366_W<'_>[src]

Bit 22 - B1366

pub fn b1367(&mut self) -> B1367_W<'_>[src]

Bit 23 - B1367

pub fn b1368(&mut self) -> B1368_W<'_>[src]

Bit 24 - B1368

pub fn b1369(&mut self) -> B1369_W<'_>[src]

Bit 25 - B1369

pub fn b1370(&mut self) -> B1370_W<'_>[src]

Bit 26 - B1370

pub fn b1371(&mut self) -> B1371_W<'_>[src]

Bit 27 - B1371

pub fn b1372(&mut self) -> B1372_W<'_>[src]

Bit 28 - B1372

pub fn b1373(&mut self) -> B1373_W<'_>[src]

Bit 29 - B1373

pub fn b1374(&mut self) -> B1374_W<'_>[src]

Bit 30 - B1374

pub fn b1375(&mut self) -> B1375_W<'_>[src]

Bit 31 - B1375

impl W<u32, Reg<u32, _MPCBB1_VCTR43>>[src]

pub fn b1376(&mut self) -> B1376_W<'_>[src]

Bit 0 - B1376

pub fn b1377(&mut self) -> B1377_W<'_>[src]

Bit 1 - B1377

pub fn b1378(&mut self) -> B1378_W<'_>[src]

Bit 2 - B1378

pub fn b1379(&mut self) -> B1379_W<'_>[src]

Bit 3 - B1379

pub fn b1380(&mut self) -> B1380_W<'_>[src]

Bit 4 - B1380

pub fn b1381(&mut self) -> B1381_W<'_>[src]

Bit 5 - B1381

pub fn b1382(&mut self) -> B1382_W<'_>[src]

Bit 6 - B1382

pub fn b1383(&mut self) -> B1383_W<'_>[src]

Bit 7 - B1383

pub fn b1384(&mut self) -> B1384_W<'_>[src]

Bit 8 - B1384

pub fn b1385(&mut self) -> B1385_W<'_>[src]

Bit 9 - B1385

pub fn b1386(&mut self) -> B1386_W<'_>[src]

Bit 10 - B1386

pub fn b1387(&mut self) -> B1387_W<'_>[src]

Bit 11 - B1387

pub fn b1388(&mut self) -> B1388_W<'_>[src]

Bit 12 - B1388

pub fn b1389(&mut self) -> B1389_W<'_>[src]

Bit 13 - B1389

pub fn b1390(&mut self) -> B1390_W<'_>[src]

Bit 14 - B1390

pub fn b1391(&mut self) -> B1391_W<'_>[src]

Bit 15 - B1391

pub fn b1392(&mut self) -> B1392_W<'_>[src]

Bit 16 - B1392

pub fn b1393(&mut self) -> B1393_W<'_>[src]

Bit 17 - B1393

pub fn b1394(&mut self) -> B1394_W<'_>[src]

Bit 18 - B1394

pub fn b1395(&mut self) -> B1395_W<'_>[src]

Bit 19 - B1395

pub fn b1396(&mut self) -> B1396_W<'_>[src]

Bit 20 - B1396

pub fn b1397(&mut self) -> B1397_W<'_>[src]

Bit 21 - B1397

pub fn b1398(&mut self) -> B1398_W<'_>[src]

Bit 22 - B1398

pub fn b1399(&mut self) -> B1399_W<'_>[src]

Bit 23 - B1399

pub fn b1400(&mut self) -> B1400_W<'_>[src]

Bit 24 - B1400

pub fn b1401(&mut self) -> B1401_W<'_>[src]

Bit 25 - B1401

pub fn b1402(&mut self) -> B1402_W<'_>[src]

Bit 26 - B1402

pub fn b1403(&mut self) -> B1403_W<'_>[src]

Bit 27 - B1403

pub fn b1404(&mut self) -> B1404_W<'_>[src]

Bit 28 - B1404

pub fn b1405(&mut self) -> B1405_W<'_>[src]

Bit 29 - B1405

pub fn b1406(&mut self) -> B1406_W<'_>[src]

Bit 30 - B1406

pub fn b1407(&mut self) -> B1407_W<'_>[src]

Bit 31 - B1407

impl W<u32, Reg<u32, _MPCBB1_VCTR44>>[src]

pub fn b1408(&mut self) -> B1408_W<'_>[src]

Bit 0 - B1408

pub fn b1409(&mut self) -> B1409_W<'_>[src]

Bit 1 - B1409

pub fn b1410(&mut self) -> B1410_W<'_>[src]

Bit 2 - B1410

pub fn b1411(&mut self) -> B1411_W<'_>[src]

Bit 3 - B1411

pub fn b1412(&mut self) -> B1412_W<'_>[src]

Bit 4 - B1412

pub fn b1413(&mut self) -> B1413_W<'_>[src]

Bit 5 - B1413

pub fn b1414(&mut self) -> B1414_W<'_>[src]

Bit 6 - B1414

pub fn b1415(&mut self) -> B1415_W<'_>[src]

Bit 7 - B1415

pub fn b1416(&mut self) -> B1416_W<'_>[src]

Bit 8 - B1416

pub fn b1417(&mut self) -> B1417_W<'_>[src]

Bit 9 - B1417

pub fn b1418(&mut self) -> B1418_W<'_>[src]

Bit 10 - B1418

pub fn b1419(&mut self) -> B1419_W<'_>[src]

Bit 11 - B1419

pub fn b1420(&mut self) -> B1420_W<'_>[src]

Bit 12 - B1420

pub fn b1421(&mut self) -> B1421_W<'_>[src]

Bit 13 - B1421

pub fn b1422(&mut self) -> B1422_W<'_>[src]

Bit 14 - B1422

pub fn b1423(&mut self) -> B1423_W<'_>[src]

Bit 15 - B1423

pub fn b1424(&mut self) -> B1424_W<'_>[src]

Bit 16 - B1424

pub fn b1425(&mut self) -> B1425_W<'_>[src]

Bit 17 - B1425

pub fn b1426(&mut self) -> B1426_W<'_>[src]

Bit 18 - B1426

pub fn b1427(&mut self) -> B1427_W<'_>[src]

Bit 19 - B1427

pub fn b1428(&mut self) -> B1428_W<'_>[src]

Bit 20 - B1428

pub fn b1429(&mut self) -> B1429_W<'_>[src]

Bit 21 - B1429

pub fn b1430(&mut self) -> B1430_W<'_>[src]

Bit 22 - B1430

pub fn b1431(&mut self) -> B1431_W<'_>[src]

Bit 23 - B1431

pub fn b1432(&mut self) -> B1432_W<'_>[src]

Bit 24 - B1432

pub fn b1433(&mut self) -> B1433_W<'_>[src]

Bit 25 - B1433

pub fn b1434(&mut self) -> B1434_W<'_>[src]

Bit 26 - B1434

pub fn b1435(&mut self) -> B1435_W<'_>[src]

Bit 27 - B1435

pub fn b1436(&mut self) -> B1436_W<'_>[src]

Bit 28 - B1436

pub fn b1437(&mut self) -> B1437_W<'_>[src]

Bit 29 - B1437

pub fn b1438(&mut self) -> B1438_W<'_>[src]

Bit 30 - B1438

pub fn b1439(&mut self) -> B1439_W<'_>[src]

Bit 31 - B1439

impl W<u32, Reg<u32, _MPCBB1_VCTR45>>[src]

pub fn b1440(&mut self) -> B1440_W<'_>[src]

Bit 0 - B1440

pub fn b1441(&mut self) -> B1441_W<'_>[src]

Bit 1 - B1441

pub fn b1442(&mut self) -> B1442_W<'_>[src]

Bit 2 - B1442

pub fn b1443(&mut self) -> B1443_W<'_>[src]

Bit 3 - B1443

pub fn b1444(&mut self) -> B1444_W<'_>[src]

Bit 4 - B1444

pub fn b1445(&mut self) -> B1445_W<'_>[src]

Bit 5 - B1445

pub fn b1446(&mut self) -> B1446_W<'_>[src]

Bit 6 - B1446

pub fn b1447(&mut self) -> B1447_W<'_>[src]

Bit 7 - B1447

pub fn b1448(&mut self) -> B1448_W<'_>[src]

Bit 8 - B1448

pub fn b1449(&mut self) -> B1449_W<'_>[src]

Bit 9 - B1449

pub fn b1450(&mut self) -> B1450_W<'_>[src]

Bit 10 - B1450

pub fn b1451(&mut self) -> B1451_W<'_>[src]

Bit 11 - B1451

pub fn b1452(&mut self) -> B1452_W<'_>[src]

Bit 12 - B1452

pub fn b1453(&mut self) -> B1453_W<'_>[src]

Bit 13 - B1453

pub fn b1454(&mut self) -> B1454_W<'_>[src]

Bit 14 - B1454

pub fn b1455(&mut self) -> B1455_W<'_>[src]

Bit 15 - B1455

pub fn b1456(&mut self) -> B1456_W<'_>[src]

Bit 16 - B1456

pub fn b1457(&mut self) -> B1457_W<'_>[src]

Bit 17 - B1457

pub fn b1458(&mut self) -> B1458_W<'_>[src]

Bit 18 - B1458

pub fn b1459(&mut self) -> B1459_W<'_>[src]

Bit 19 - B1459

pub fn b1460(&mut self) -> B1460_W<'_>[src]

Bit 20 - B1460

pub fn b1461(&mut self) -> B1461_W<'_>[src]

Bit 21 - B1461

pub fn b1462(&mut self) -> B1462_W<'_>[src]

Bit 22 - B1462

pub fn b1463(&mut self) -> B1463_W<'_>[src]

Bit 23 - B1463

pub fn b1464(&mut self) -> B1464_W<'_>[src]

Bit 24 - B1464

pub fn b1465(&mut self) -> B1465_W<'_>[src]

Bit 25 - B1465

pub fn b1466(&mut self) -> B1466_W<'_>[src]

Bit 26 - B1466

pub fn b1467(&mut self) -> B1467_W<'_>[src]

Bit 27 - B1467

pub fn b1468(&mut self) -> B1468_W<'_>[src]

Bit 28 - B1468

pub fn b1469(&mut self) -> B1469_W<'_>[src]

Bit 29 - B1469

pub fn b1470(&mut self) -> B1470_W<'_>[src]

Bit 30 - B1470

pub fn b1471(&mut self) -> B1471_W<'_>[src]

Bit 31 - B1471

impl W<u32, Reg<u32, _MPCBB1_VCTR46>>[src]

pub fn b1472(&mut self) -> B1472_W<'_>[src]

Bit 0 - B1472

pub fn b1473(&mut self) -> B1473_W<'_>[src]

Bit 1 - B1473

pub fn b1474(&mut self) -> B1474_W<'_>[src]

Bit 2 - B1474

pub fn b1475(&mut self) -> B1475_W<'_>[src]

Bit 3 - B1475

pub fn b1476(&mut self) -> B1476_W<'_>[src]

Bit 4 - B1476

pub fn b1477(&mut self) -> B1477_W<'_>[src]

Bit 5 - B1477

pub fn b1478(&mut self) -> B1478_W<'_>[src]

Bit 6 - B1478

pub fn b1479(&mut self) -> B1479_W<'_>[src]

Bit 7 - B1479

pub fn b1480(&mut self) -> B1480_W<'_>[src]

Bit 8 - B1480

pub fn b1481(&mut self) -> B1481_W<'_>[src]

Bit 9 - B1481

pub fn b1482(&mut self) -> B1482_W<'_>[src]

Bit 10 - B1482

pub fn b1483(&mut self) -> B1483_W<'_>[src]

Bit 11 - B1483

pub fn b1484(&mut self) -> B1484_W<'_>[src]

Bit 12 - B1484

pub fn b1485(&mut self) -> B1485_W<'_>[src]

Bit 13 - B1485

pub fn b1486(&mut self) -> B1486_W<'_>[src]

Bit 14 - B1486

pub fn b1487(&mut self) -> B1487_W<'_>[src]

Bit 15 - B1487

pub fn b1488(&mut self) -> B1488_W<'_>[src]

Bit 16 - B1488

pub fn b1489(&mut self) -> B1489_W<'_>[src]

Bit 17 - B1489

pub fn b1490(&mut self) -> B1490_W<'_>[src]

Bit 18 - B1490

pub fn b1491(&mut self) -> B1491_W<'_>[src]

Bit 19 - B1491

pub fn b1492(&mut self) -> B1492_W<'_>[src]

Bit 20 - B1492

pub fn b1493(&mut self) -> B1493_W<'_>[src]

Bit 21 - B1493

pub fn b1494(&mut self) -> B1494_W<'_>[src]

Bit 22 - B1494

pub fn b1495(&mut self) -> B1495_W<'_>[src]

Bit 23 - B1495

pub fn b1496(&mut self) -> B1496_W<'_>[src]

Bit 24 - B1496

pub fn b1497(&mut self) -> B1497_W<'_>[src]

Bit 25 - B1497

pub fn b1498(&mut self) -> B1498_W<'_>[src]

Bit 26 - B1498

pub fn b1499(&mut self) -> B1499_W<'_>[src]

Bit 27 - B1499

pub fn b1500(&mut self) -> B1500_W<'_>[src]

Bit 28 - B1500

pub fn b1501(&mut self) -> B1501_W<'_>[src]

Bit 29 - B1501

pub fn b1502(&mut self) -> B1502_W<'_>[src]

Bit 30 - B1502

pub fn b1503(&mut self) -> B1503_W<'_>[src]

Bit 31 - B1503

impl W<u32, Reg<u32, _MPCBB1_VCTR47>>[src]

pub fn b1504(&mut self) -> B1504_W<'_>[src]

Bit 0 - B1504

pub fn b1505(&mut self) -> B1505_W<'_>[src]

Bit 1 - B1505

pub fn b1506(&mut self) -> B1506_W<'_>[src]

Bit 2 - B1506

pub fn b1507(&mut self) -> B1507_W<'_>[src]

Bit 3 - B1507

pub fn b1508(&mut self) -> B1508_W<'_>[src]

Bit 4 - B1508

pub fn b1509(&mut self) -> B1509_W<'_>[src]

Bit 5 - B1509

pub fn b1510(&mut self) -> B1510_W<'_>[src]

Bit 6 - B1510

pub fn b1511(&mut self) -> B1511_W<'_>[src]

Bit 7 - B1511

pub fn b1512(&mut self) -> B1512_W<'_>[src]

Bit 8 - B1512

pub fn b1513(&mut self) -> B1513_W<'_>[src]

Bit 9 - B1513

pub fn b1514(&mut self) -> B1514_W<'_>[src]

Bit 10 - B1514

pub fn b1515(&mut self) -> B1515_W<'_>[src]

Bit 11 - B1515

pub fn b1516(&mut self) -> B1516_W<'_>[src]

Bit 12 - B1516

pub fn b1517(&mut self) -> B1517_W<'_>[src]

Bit 13 - B1517

pub fn b1518(&mut self) -> B1518_W<'_>[src]

Bit 14 - B1518

pub fn b1519(&mut self) -> B1519_W<'_>[src]

Bit 15 - B1519

pub fn b1520(&mut self) -> B1520_W<'_>[src]

Bit 16 - B1520

pub fn b1521(&mut self) -> B1521_W<'_>[src]

Bit 17 - B1521

pub fn b1522(&mut self) -> B1522_W<'_>[src]

Bit 18 - B1522

pub fn b1523(&mut self) -> B1523_W<'_>[src]

Bit 19 - B1523

pub fn b1524(&mut self) -> B1524_W<'_>[src]

Bit 20 - B1524

pub fn b1525(&mut self) -> B1525_W<'_>[src]

Bit 21 - B1525

pub fn b1526(&mut self) -> B1526_W<'_>[src]

Bit 22 - B1526

pub fn b1527(&mut self) -> B1527_W<'_>[src]

Bit 23 - B1527

pub fn b1528(&mut self) -> B1528_W<'_>[src]

Bit 24 - B1528

pub fn b1529(&mut self) -> B1529_W<'_>[src]

Bit 25 - B1529

pub fn b1530(&mut self) -> B1530_W<'_>[src]

Bit 26 - B1530

pub fn b1531(&mut self) -> B1531_W<'_>[src]

Bit 27 - B1531

pub fn b1532(&mut self) -> B1532_W<'_>[src]

Bit 28 - B1532

pub fn b1533(&mut self) -> B1533_W<'_>[src]

Bit 29 - B1533

pub fn b1534(&mut self) -> B1534_W<'_>[src]

Bit 30 - B1534

pub fn b1535(&mut self) -> B1535_W<'_>[src]

Bit 31 - B1535

impl W<u32, Reg<u32, _MPCBB1_VCTR48>>[src]

pub fn b1536(&mut self) -> B1536_W<'_>[src]

Bit 0 - B1536

pub fn b1537(&mut self) -> B1537_W<'_>[src]

Bit 1 - B1537

pub fn b1538(&mut self) -> B1538_W<'_>[src]

Bit 2 - B1538

pub fn b1539(&mut self) -> B1539_W<'_>[src]

Bit 3 - B1539

pub fn b1540(&mut self) -> B1540_W<'_>[src]

Bit 4 - B1540

pub fn b1541(&mut self) -> B1541_W<'_>[src]

Bit 5 - B1541

pub fn b1542(&mut self) -> B1542_W<'_>[src]

Bit 6 - B1542

pub fn b1543(&mut self) -> B1543_W<'_>[src]

Bit 7 - B1543

pub fn b1544(&mut self) -> B1544_W<'_>[src]

Bit 8 - B1544

pub fn b1545(&mut self) -> B1545_W<'_>[src]

Bit 9 - B1545

pub fn b1546(&mut self) -> B1546_W<'_>[src]

Bit 10 - B1546

pub fn b1547(&mut self) -> B1547_W<'_>[src]

Bit 11 - B1547

pub fn b1548(&mut self) -> B1548_W<'_>[src]

Bit 12 - B1548

pub fn b1549(&mut self) -> B1549_W<'_>[src]

Bit 13 - B1549

pub fn b1550(&mut self) -> B1550_W<'_>[src]

Bit 14 - B1550

pub fn b1551(&mut self) -> B1551_W<'_>[src]

Bit 15 - B1551

pub fn b1552(&mut self) -> B1552_W<'_>[src]

Bit 16 - B1552

pub fn b1553(&mut self) -> B1553_W<'_>[src]

Bit 17 - B1553

pub fn b1554(&mut self) -> B1554_W<'_>[src]

Bit 18 - B1554

pub fn b1555(&mut self) -> B1555_W<'_>[src]

Bit 19 - B1555

pub fn b1556(&mut self) -> B1556_W<'_>[src]

Bit 20 - B1556

pub fn b1557(&mut self) -> B1557_W<'_>[src]

Bit 21 - B1557

pub fn b1558(&mut self) -> B1558_W<'_>[src]

Bit 22 - B1558

pub fn b1559(&mut self) -> B1559_W<'_>[src]

Bit 23 - B1559

pub fn b1560(&mut self) -> B1560_W<'_>[src]

Bit 24 - B1560

pub fn b1561(&mut self) -> B1561_W<'_>[src]

Bit 25 - B1561

pub fn b1562(&mut self) -> B1562_W<'_>[src]

Bit 26 - B1562

pub fn b1563(&mut self) -> B1563_W<'_>[src]

Bit 27 - B1563

pub fn b1564(&mut self) -> B1564_W<'_>[src]

Bit 28 - B1564

pub fn b1565(&mut self) -> B1565_W<'_>[src]

Bit 29 - B1565

pub fn b1566(&mut self) -> B1566_W<'_>[src]

Bit 30 - B1566

pub fn b1567(&mut self) -> B1567_W<'_>[src]

Bit 31 - B1567

impl W<u32, Reg<u32, _MPCBB1_VCTR49>>[src]

pub fn b1568(&mut self) -> B1568_W<'_>[src]

Bit 0 - B1568

pub fn b1569(&mut self) -> B1569_W<'_>[src]

Bit 1 - B1569

pub fn b1570(&mut self) -> B1570_W<'_>[src]

Bit 2 - B1570

pub fn b1571(&mut self) -> B1571_W<'_>[src]

Bit 3 - B1571

pub fn b1572(&mut self) -> B1572_W<'_>[src]

Bit 4 - B1572

pub fn b1573(&mut self) -> B1573_W<'_>[src]

Bit 5 - B1573

pub fn b1574(&mut self) -> B1574_W<'_>[src]

Bit 6 - B1574

pub fn b1575(&mut self) -> B1575_W<'_>[src]

Bit 7 - B1575

pub fn b1576(&mut self) -> B1576_W<'_>[src]

Bit 8 - B1576

pub fn b1577(&mut self) -> B1577_W<'_>[src]

Bit 9 - B1577

pub fn b1578(&mut self) -> B1578_W<'_>[src]

Bit 10 - B1578

pub fn b1579(&mut self) -> B1579_W<'_>[src]

Bit 11 - B1579

pub fn b1580(&mut self) -> B1580_W<'_>[src]

Bit 12 - B1580

pub fn b1581(&mut self) -> B1581_W<'_>[src]

Bit 13 - B1581

pub fn b1582(&mut self) -> B1582_W<'_>[src]

Bit 14 - B1582

pub fn b1583(&mut self) -> B1583_W<'_>[src]

Bit 15 - B1583

pub fn b1584(&mut self) -> B1584_W<'_>[src]

Bit 16 - B1584

pub fn b1585(&mut self) -> B1585_W<'_>[src]

Bit 17 - B1585

pub fn b1586(&mut self) -> B1586_W<'_>[src]

Bit 18 - B1586

pub fn b1587(&mut self) -> B1587_W<'_>[src]

Bit 19 - B1587

pub fn b1588(&mut self) -> B1588_W<'_>[src]

Bit 20 - B1588

pub fn b1589(&mut self) -> B1589_W<'_>[src]

Bit 21 - B1589

pub fn b1590(&mut self) -> B1590_W<'_>[src]

Bit 22 - B1590

pub fn b1591(&mut self) -> B1591_W<'_>[src]

Bit 23 - B1591

pub fn b1592(&mut self) -> B1592_W<'_>[src]

Bit 24 - B1592

pub fn b1593(&mut self) -> B1593_W<'_>[src]

Bit 25 - B1593

pub fn b1594(&mut self) -> B1594_W<'_>[src]

Bit 26 - B1594

pub fn b1595(&mut self) -> B1595_W<'_>[src]

Bit 27 - B1595

pub fn b1596(&mut self) -> B1596_W<'_>[src]

Bit 28 - B1596

pub fn b1597(&mut self) -> B1597_W<'_>[src]

Bit 29 - B1597

pub fn b1598(&mut self) -> B1598_W<'_>[src]

Bit 30 - B1598

pub fn b1599(&mut self) -> B1599_W<'_>[src]

Bit 31 - B1599

impl W<u32, Reg<u32, _MPCBB1_VCTR50>>[src]

pub fn b1600(&mut self) -> B1600_W<'_>[src]

Bit 0 - B1600

pub fn b1601(&mut self) -> B1601_W<'_>[src]

Bit 1 - B1601

pub fn b1602(&mut self) -> B1602_W<'_>[src]

Bit 2 - B1602

pub fn b1603(&mut self) -> B1603_W<'_>[src]

Bit 3 - B1603

pub fn b1604(&mut self) -> B1604_W<'_>[src]

Bit 4 - B1604

pub fn b1605(&mut self) -> B1605_W<'_>[src]

Bit 5 - B1605

pub fn b1606(&mut self) -> B1606_W<'_>[src]

Bit 6 - B1606

pub fn b1607(&mut self) -> B1607_W<'_>[src]

Bit 7 - B1607

pub fn b1608(&mut self) -> B1608_W<'_>[src]

Bit 8 - B1608

pub fn b1609(&mut self) -> B1609_W<'_>[src]

Bit 9 - B1609

pub fn b1610(&mut self) -> B1610_W<'_>[src]

Bit 10 - B1610

pub fn b1611(&mut self) -> B1611_W<'_>[src]

Bit 11 - B1611

pub fn b1612(&mut self) -> B1612_W<'_>[src]

Bit 12 - B1612

pub fn b1613(&mut self) -> B1613_W<'_>[src]

Bit 13 - B1613

pub fn b1614(&mut self) -> B1614_W<'_>[src]

Bit 14 - B1614

pub fn b1615(&mut self) -> B1615_W<'_>[src]

Bit 15 - B1615

pub fn b1616(&mut self) -> B1616_W<'_>[src]

Bit 16 - B1616

pub fn b1617(&mut self) -> B1617_W<'_>[src]

Bit 17 - B1617

pub fn b1618(&mut self) -> B1618_W<'_>[src]

Bit 18 - B1618

pub fn b1619(&mut self) -> B1619_W<'_>[src]

Bit 19 - B1619

pub fn b1620(&mut self) -> B1620_W<'_>[src]

Bit 20 - B1620

pub fn b1621(&mut self) -> B1621_W<'_>[src]

Bit 21 - B1621

pub fn b1622(&mut self) -> B1622_W<'_>[src]

Bit 22 - B1622

pub fn b1623(&mut self) -> B1623_W<'_>[src]

Bit 23 - B1623

pub fn b1624(&mut self) -> B1624_W<'_>[src]

Bit 24 - B1624

pub fn b1625(&mut self) -> B1625_W<'_>[src]

Bit 25 - B1625

pub fn b1626(&mut self) -> B1626_W<'_>[src]

Bit 26 - B1626

pub fn b1627(&mut self) -> B1627_W<'_>[src]

Bit 27 - B1627

pub fn b1628(&mut self) -> B1628_W<'_>[src]

Bit 28 - B1628

pub fn b1629(&mut self) -> B1629_W<'_>[src]

Bit 29 - B1629

pub fn b1630(&mut self) -> B1630_W<'_>[src]

Bit 30 - B1630

pub fn b1631(&mut self) -> B1631_W<'_>[src]

Bit 31 - B1631

impl W<u32, Reg<u32, _MPCBB1_VCTR51>>[src]

pub fn b1632(&mut self) -> B1632_W<'_>[src]

Bit 0 - B1632

pub fn b1633(&mut self) -> B1633_W<'_>[src]

Bit 1 - B1633

pub fn b1634(&mut self) -> B1634_W<'_>[src]

Bit 2 - B1634

pub fn b1635(&mut self) -> B1635_W<'_>[src]

Bit 3 - B1635

pub fn b1636(&mut self) -> B1636_W<'_>[src]

Bit 4 - B1636

pub fn b1637(&mut self) -> B1637_W<'_>[src]

Bit 5 - B1637

pub fn b1638(&mut self) -> B1638_W<'_>[src]

Bit 6 - B1638

pub fn b1639(&mut self) -> B1639_W<'_>[src]

Bit 7 - B1639

pub fn b1640(&mut self) -> B1640_W<'_>[src]

Bit 8 - B1640

pub fn b1641(&mut self) -> B1641_W<'_>[src]

Bit 9 - B1641

pub fn b1642(&mut self) -> B1642_W<'_>[src]

Bit 10 - B1642

pub fn b1643(&mut self) -> B1643_W<'_>[src]

Bit 11 - B1643

pub fn b1644(&mut self) -> B1644_W<'_>[src]

Bit 12 - B1644

pub fn b1645(&mut self) -> B1645_W<'_>[src]

Bit 13 - B1645

pub fn b1646(&mut self) -> B1646_W<'_>[src]

Bit 14 - B1646

pub fn b1647(&mut self) -> B1647_W<'_>[src]

Bit 15 - B1647

pub fn b1648(&mut self) -> B1648_W<'_>[src]

Bit 16 - B1648

pub fn b1649(&mut self) -> B1649_W<'_>[src]

Bit 17 - B1649

pub fn b1650(&mut self) -> B1650_W<'_>[src]

Bit 18 - B1650

pub fn b1651(&mut self) -> B1651_W<'_>[src]

Bit 19 - B1651

pub fn b1652(&mut self) -> B1652_W<'_>[src]

Bit 20 - B1652

pub fn b1653(&mut self) -> B1653_W<'_>[src]

Bit 21 - B1653

pub fn b1654(&mut self) -> B1654_W<'_>[src]

Bit 22 - B1654

pub fn b1655(&mut self) -> B1655_W<'_>[src]

Bit 23 - B1655

pub fn b1656(&mut self) -> B1656_W<'_>[src]

Bit 24 - B1656

pub fn b1657(&mut self) -> B1657_W<'_>[src]

Bit 25 - B1657

pub fn b1658(&mut self) -> B1658_W<'_>[src]

Bit 26 - B1658

pub fn b1659(&mut self) -> B1659_W<'_>[src]

Bit 27 - B1659

pub fn b1660(&mut self) -> B1660_W<'_>[src]

Bit 28 - B1660

pub fn b1661(&mut self) -> B1661_W<'_>[src]

Bit 29 - B1661

pub fn b1662(&mut self) -> B1662_W<'_>[src]

Bit 30 - B1662

pub fn b1663(&mut self) -> B1663_W<'_>[src]

Bit 31 - B1663

impl W<u32, Reg<u32, _MPCBB1_VCTR52>>[src]

pub fn b1664(&mut self) -> B1664_W<'_>[src]

Bit 0 - B1664

pub fn b1665(&mut self) -> B1665_W<'_>[src]

Bit 1 - B1665

pub fn b1666(&mut self) -> B1666_W<'_>[src]

Bit 2 - B1666

pub fn b1667(&mut self) -> B1667_W<'_>[src]

Bit 3 - B1667

pub fn b1668(&mut self) -> B1668_W<'_>[src]

Bit 4 - B1668

pub fn b1669(&mut self) -> B1669_W<'_>[src]

Bit 5 - B1669

pub fn b1670(&mut self) -> B1670_W<'_>[src]

Bit 6 - B1670

pub fn b1671(&mut self) -> B1671_W<'_>[src]

Bit 7 - B1671

pub fn b1672(&mut self) -> B1672_W<'_>[src]

Bit 8 - B1672

pub fn b1673(&mut self) -> B1673_W<'_>[src]

Bit 9 - B1673

pub fn b1674(&mut self) -> B1674_W<'_>[src]

Bit 10 - B1674

pub fn b1675(&mut self) -> B1675_W<'_>[src]

Bit 11 - B1675

pub fn b1676(&mut self) -> B1676_W<'_>[src]

Bit 12 - B1676

pub fn b1677(&mut self) -> B1677_W<'_>[src]

Bit 13 - B1677

pub fn b1678(&mut self) -> B1678_W<'_>[src]

Bit 14 - B1678

pub fn b1679(&mut self) -> B1679_W<'_>[src]

Bit 15 - B1679

pub fn b1680(&mut self) -> B1680_W<'_>[src]

Bit 16 - B1680

pub fn b1681(&mut self) -> B1681_W<'_>[src]

Bit 17 - B1681

pub fn b1682(&mut self) -> B1682_W<'_>[src]

Bit 18 - B1682

pub fn b1683(&mut self) -> B1683_W<'_>[src]

Bit 19 - B1683

pub fn b1684(&mut self) -> B1684_W<'_>[src]

Bit 20 - B1684

pub fn b1685(&mut self) -> B1685_W<'_>[src]

Bit 21 - B1685

pub fn b1686(&mut self) -> B1686_W<'_>[src]

Bit 22 - B1686

pub fn b1687(&mut self) -> B1687_W<'_>[src]

Bit 23 - B1687

pub fn b1688(&mut self) -> B1688_W<'_>[src]

Bit 24 - B1688

pub fn b1689(&mut self) -> B1689_W<'_>[src]

Bit 25 - B1689

pub fn b1690(&mut self) -> B1690_W<'_>[src]

Bit 26 - B1690

pub fn b1691(&mut self) -> B1691_W<'_>[src]

Bit 27 - B1691

pub fn b1692(&mut self) -> B1692_W<'_>[src]

Bit 28 - B1692

pub fn b1693(&mut self) -> B1693_W<'_>[src]

Bit 29 - B1693

pub fn b1694(&mut self) -> B1694_W<'_>[src]

Bit 30 - B1694

pub fn b1695(&mut self) -> B1695_W<'_>[src]

Bit 31 - B1695

impl W<u32, Reg<u32, _MPCBB1_VCTR53>>[src]

pub fn b1696(&mut self) -> B1696_W<'_>[src]

Bit 0 - B1696

pub fn b1697(&mut self) -> B1697_W<'_>[src]

Bit 1 - B1697

pub fn b1698(&mut self) -> B1698_W<'_>[src]

Bit 2 - B1698

pub fn b1699(&mut self) -> B1699_W<'_>[src]

Bit 3 - B1699

pub fn b1700(&mut self) -> B1700_W<'_>[src]

Bit 4 - B1700

pub fn b1701(&mut self) -> B1701_W<'_>[src]

Bit 5 - B1701

pub fn b1702(&mut self) -> B1702_W<'_>[src]

Bit 6 - B1702

pub fn b1703(&mut self) -> B1703_W<'_>[src]

Bit 7 - B1703

pub fn b1704(&mut self) -> B1704_W<'_>[src]

Bit 8 - B1704

pub fn b1705(&mut self) -> B1705_W<'_>[src]

Bit 9 - B1705

pub fn b1706(&mut self) -> B1706_W<'_>[src]

Bit 10 - B1706

pub fn b1707(&mut self) -> B1707_W<'_>[src]

Bit 11 - B1707

pub fn b1708(&mut self) -> B1708_W<'_>[src]

Bit 12 - B1708

pub fn b1709(&mut self) -> B1709_W<'_>[src]

Bit 13 - B1709

pub fn b1710(&mut self) -> B1710_W<'_>[src]

Bit 14 - B1710

pub fn b1711(&mut self) -> B1711_W<'_>[src]

Bit 15 - B1711

pub fn b1712(&mut self) -> B1712_W<'_>[src]

Bit 16 - B1712

pub fn b1713(&mut self) -> B1713_W<'_>[src]

Bit 17 - B1713

pub fn b1714(&mut self) -> B1714_W<'_>[src]

Bit 18 - B1714

pub fn b1715(&mut self) -> B1715_W<'_>[src]

Bit 19 - B1715

pub fn b1716(&mut self) -> B1716_W<'_>[src]

Bit 20 - B1716

pub fn b1717(&mut self) -> B1717_W<'_>[src]

Bit 21 - B1717

pub fn b1718(&mut self) -> B1718_W<'_>[src]

Bit 22 - B1718

pub fn b1719(&mut self) -> B1719_W<'_>[src]

Bit 23 - B1719

pub fn b1720(&mut self) -> B1720_W<'_>[src]

Bit 24 - B1720

pub fn b1721(&mut self) -> B1721_W<'_>[src]

Bit 25 - B1721

pub fn b1722(&mut self) -> B1722_W<'_>[src]

Bit 26 - B1722

pub fn b1723(&mut self) -> B1723_W<'_>[src]

Bit 27 - B1723

pub fn b1724(&mut self) -> B1724_W<'_>[src]

Bit 28 - B1724

pub fn b1725(&mut self) -> B1725_W<'_>[src]

Bit 29 - B1725

pub fn b1726(&mut self) -> B1726_W<'_>[src]

Bit 30 - B1726

pub fn b1727(&mut self) -> B1727_W<'_>[src]

Bit 31 - B1727

impl W<u32, Reg<u32, _MPCBB1_VCTR54>>[src]

pub fn b1728(&mut self) -> B1728_W<'_>[src]

Bit 0 - B1728

pub fn b1729(&mut self) -> B1729_W<'_>[src]

Bit 1 - B1729

pub fn b1730(&mut self) -> B1730_W<'_>[src]

Bit 2 - B1730

pub fn b1731(&mut self) -> B1731_W<'_>[src]

Bit 3 - B1731

pub fn b1732(&mut self) -> B1732_W<'_>[src]

Bit 4 - B1732

pub fn b1733(&mut self) -> B1733_W<'_>[src]

Bit 5 - B1733

pub fn b1734(&mut self) -> B1734_W<'_>[src]

Bit 6 - B1734

pub fn b1735(&mut self) -> B1735_W<'_>[src]

Bit 7 - B1735

pub fn b1736(&mut self) -> B1736_W<'_>[src]

Bit 8 - B1736

pub fn b1737(&mut self) -> B1737_W<'_>[src]

Bit 9 - B1737

pub fn b1738(&mut self) -> B1738_W<'_>[src]

Bit 10 - B1738

pub fn b1739(&mut self) -> B1739_W<'_>[src]

Bit 11 - B1739

pub fn b1740(&mut self) -> B1740_W<'_>[src]

Bit 12 - B1740

pub fn b1741(&mut self) -> B1741_W<'_>[src]

Bit 13 - B1741

pub fn b1742(&mut self) -> B1742_W<'_>[src]

Bit 14 - B1742

pub fn b1743(&mut self) -> B1743_W<'_>[src]

Bit 15 - B1743

pub fn b1744(&mut self) -> B1744_W<'_>[src]

Bit 16 - B1744

pub fn b1745(&mut self) -> B1745_W<'_>[src]

Bit 17 - B1745

pub fn b1746(&mut self) -> B1746_W<'_>[src]

Bit 18 - B1746

pub fn b1747(&mut self) -> B1747_W<'_>[src]

Bit 19 - B1747

pub fn b1748(&mut self) -> B1748_W<'_>[src]

Bit 20 - B1748

pub fn b1749(&mut self) -> B1749_W<'_>[src]

Bit 21 - B1749

pub fn b1750(&mut self) -> B1750_W<'_>[src]

Bit 22 - B1750

pub fn b1751(&mut self) -> B1751_W<'_>[src]

Bit 23 - B1751

pub fn b1752(&mut self) -> B1752_W<'_>[src]

Bit 24 - B1752

pub fn b1753(&mut self) -> B1753_W<'_>[src]

Bit 25 - B1753

pub fn b1754(&mut self) -> B1754_W<'_>[src]

Bit 26 - B1754

pub fn b1755(&mut self) -> B1755_W<'_>[src]

Bit 27 - B1755

pub fn b1756(&mut self) -> B1756_W<'_>[src]

Bit 28 - B1756

pub fn b1757(&mut self) -> B1757_W<'_>[src]

Bit 29 - B1757

pub fn b1758(&mut self) -> B1758_W<'_>[src]

Bit 30 - B1758

pub fn b1759(&mut self) -> B1759_W<'_>[src]

Bit 31 - B1759

impl W<u32, Reg<u32, _MPCBB1_VCTR55>>[src]

pub fn b1760(&mut self) -> B1760_W<'_>[src]

Bit 0 - B1760

pub fn b1761(&mut self) -> B1761_W<'_>[src]

Bit 1 - B1761

pub fn b1762(&mut self) -> B1762_W<'_>[src]

Bit 2 - B1762

pub fn b1763(&mut self) -> B1763_W<'_>[src]

Bit 3 - B1763

pub fn b1764(&mut self) -> B1764_W<'_>[src]

Bit 4 - B1764

pub fn b1765(&mut self) -> B1765_W<'_>[src]

Bit 5 - B1765

pub fn b1766(&mut self) -> B1766_W<'_>[src]

Bit 6 - B1766

pub fn b1767(&mut self) -> B1767_W<'_>[src]

Bit 7 - B1767

pub fn b1768(&mut self) -> B1768_W<'_>[src]

Bit 8 - B1768

pub fn b1769(&mut self) -> B1769_W<'_>[src]

Bit 9 - B1769

pub fn b1770(&mut self) -> B1770_W<'_>[src]

Bit 10 - B1770

pub fn b1771(&mut self) -> B1771_W<'_>[src]

Bit 11 - B1771

pub fn b1772(&mut self) -> B1772_W<'_>[src]

Bit 12 - B1772

pub fn b1773(&mut self) -> B1773_W<'_>[src]

Bit 13 - B1773

pub fn b1774(&mut self) -> B1774_W<'_>[src]

Bit 14 - B1774

pub fn b1775(&mut self) -> B1775_W<'_>[src]

Bit 15 - B1775

pub fn b1776(&mut self) -> B1776_W<'_>[src]

Bit 16 - B1776

pub fn b1777(&mut self) -> B1777_W<'_>[src]

Bit 17 - B1777

pub fn b1778(&mut self) -> B1778_W<'_>[src]

Bit 18 - B1778

pub fn b1779(&mut self) -> B1779_W<'_>[src]

Bit 19 - B1779

pub fn b1780(&mut self) -> B1780_W<'_>[src]

Bit 20 - B1780

pub fn b1781(&mut self) -> B1781_W<'_>[src]

Bit 21 - B1781

pub fn b1782(&mut self) -> B1782_W<'_>[src]

Bit 22 - B1782

pub fn b1783(&mut self) -> B1783_W<'_>[src]

Bit 23 - B1783

pub fn b1784(&mut self) -> B1784_W<'_>[src]

Bit 24 - B1784

pub fn b1785(&mut self) -> B1785_W<'_>[src]

Bit 25 - B1785

pub fn b1786(&mut self) -> B1786_W<'_>[src]

Bit 26 - B1786

pub fn b1787(&mut self) -> B1787_W<'_>[src]

Bit 27 - B1787

pub fn b1788(&mut self) -> B1788_W<'_>[src]

Bit 28 - B1788

pub fn b1789(&mut self) -> B1789_W<'_>[src]

Bit 29 - B1789

pub fn b1790(&mut self) -> B1790_W<'_>[src]

Bit 30 - B1790

pub fn b1791(&mut self) -> B1791_W<'_>[src]

Bit 31 - B1791

impl W<u32, Reg<u32, _MPCBB1_VCTR56>>[src]

pub fn b1792(&mut self) -> B1792_W<'_>[src]

Bit 0 - B1792

pub fn b1793(&mut self) -> B1793_W<'_>[src]

Bit 1 - B1793

pub fn b1794(&mut self) -> B1794_W<'_>[src]

Bit 2 - B1794

pub fn b1795(&mut self) -> B1795_W<'_>[src]

Bit 3 - B1795

pub fn b1796(&mut self) -> B1796_W<'_>[src]

Bit 4 - B1796

pub fn b1797(&mut self) -> B1797_W<'_>[src]

Bit 5 - B1797

pub fn b1798(&mut self) -> B1798_W<'_>[src]

Bit 6 - B1798

pub fn b1799(&mut self) -> B1799_W<'_>[src]

Bit 7 - B1799

pub fn b1800(&mut self) -> B1800_W<'_>[src]

Bit 8 - B1800

pub fn b1801(&mut self) -> B1801_W<'_>[src]

Bit 9 - B1801

pub fn b1802(&mut self) -> B1802_W<'_>[src]

Bit 10 - B1802

pub fn b1803(&mut self) -> B1803_W<'_>[src]

Bit 11 - B1803

pub fn b1804(&mut self) -> B1804_W<'_>[src]

Bit 12 - B1804

pub fn b1805(&mut self) -> B1805_W<'_>[src]

Bit 13 - B1805

pub fn b1806(&mut self) -> B1806_W<'_>[src]

Bit 14 - B1806

pub fn b1807(&mut self) -> B1807_W<'_>[src]

Bit 15 - B1807

pub fn b1808(&mut self) -> B1808_W<'_>[src]

Bit 16 - B1808

pub fn b1809(&mut self) -> B1809_W<'_>[src]

Bit 17 - B1809

pub fn b1810(&mut self) -> B1810_W<'_>[src]

Bit 18 - B1810

pub fn b1811(&mut self) -> B1811_W<'_>[src]

Bit 19 - B1811

pub fn b1812(&mut self) -> B1812_W<'_>[src]

Bit 20 - B1812

pub fn b1813(&mut self) -> B1813_W<'_>[src]

Bit 21 - B1813

pub fn b1814(&mut self) -> B1814_W<'_>[src]

Bit 22 - B1814

pub fn b1815(&mut self) -> B1815_W<'_>[src]

Bit 23 - B1815

pub fn b1816(&mut self) -> B1816_W<'_>[src]

Bit 24 - B1816

pub fn b1817(&mut self) -> B1817_W<'_>[src]

Bit 25 - B1817

pub fn b1818(&mut self) -> B1818_W<'_>[src]

Bit 26 - B1818

pub fn b1819(&mut self) -> B1819_W<'_>[src]

Bit 27 - B1819

pub fn b1820(&mut self) -> B1820_W<'_>[src]

Bit 28 - B1820

pub fn b1821(&mut self) -> B1821_W<'_>[src]

Bit 29 - B1821

pub fn b1822(&mut self) -> B1822_W<'_>[src]

Bit 30 - B1822

pub fn b1823(&mut self) -> B1823_W<'_>[src]

Bit 31 - B1823

impl W<u32, Reg<u32, _MPCBB1_VCTR57>>[src]

pub fn b1824(&mut self) -> B1824_W<'_>[src]

Bit 0 - B1824

pub fn b1825(&mut self) -> B1825_W<'_>[src]

Bit 1 - B1825

pub fn b1826(&mut self) -> B1826_W<'_>[src]

Bit 2 - B1826

pub fn b1827(&mut self) -> B1827_W<'_>[src]

Bit 3 - B1827

pub fn b1828(&mut self) -> B1828_W<'_>[src]

Bit 4 - B1828

pub fn b1829(&mut self) -> B1829_W<'_>[src]

Bit 5 - B1829

pub fn b1830(&mut self) -> B1830_W<'_>[src]

Bit 6 - B1830

pub fn b1831(&mut self) -> B1831_W<'_>[src]

Bit 7 - B1831

pub fn b1832(&mut self) -> B1832_W<'_>[src]

Bit 8 - B1832

pub fn b1833(&mut self) -> B1833_W<'_>[src]

Bit 9 - B1833

pub fn b1834(&mut self) -> B1834_W<'_>[src]

Bit 10 - B1834

pub fn b1835(&mut self) -> B1835_W<'_>[src]

Bit 11 - B1835

pub fn b1836(&mut self) -> B1836_W<'_>[src]

Bit 12 - B1836

pub fn b1837(&mut self) -> B1837_W<'_>[src]

Bit 13 - B1837

pub fn b1838(&mut self) -> B1838_W<'_>[src]

Bit 14 - B1838

pub fn b1839(&mut self) -> B1839_W<'_>[src]

Bit 15 - B1839

pub fn b1840(&mut self) -> B1840_W<'_>[src]

Bit 16 - B1840

pub fn b1841(&mut self) -> B1841_W<'_>[src]

Bit 17 - B1841

pub fn b1842(&mut self) -> B1842_W<'_>[src]

Bit 18 - B1842

pub fn b1843(&mut self) -> B1843_W<'_>[src]

Bit 19 - B1843

pub fn b1844(&mut self) -> B1844_W<'_>[src]

Bit 20 - B1844

pub fn b1845(&mut self) -> B1845_W<'_>[src]

Bit 21 - B1845

pub fn b1846(&mut self) -> B1846_W<'_>[src]

Bit 22 - B1846

pub fn b1847(&mut self) -> B1847_W<'_>[src]

Bit 23 - B1847

pub fn b1848(&mut self) -> B1848_W<'_>[src]

Bit 24 - B1848

pub fn b1849(&mut self) -> B1849_W<'_>[src]

Bit 25 - B1849

pub fn b1850(&mut self) -> B1850_W<'_>[src]

Bit 26 - B1850

pub fn b1851(&mut self) -> B1851_W<'_>[src]

Bit 27 - B1851

pub fn b1852(&mut self) -> B1852_W<'_>[src]

Bit 28 - B1852

pub fn b1853(&mut self) -> B1853_W<'_>[src]

Bit 29 - B1853

pub fn b1854(&mut self) -> B1854_W<'_>[src]

Bit 30 - B1854

pub fn b1855(&mut self) -> B1855_W<'_>[src]

Bit 31 - B1855

impl W<u32, Reg<u32, _MPCBB1_VCTR58>>[src]

pub fn b1856(&mut self) -> B1856_W<'_>[src]

Bit 0 - B1856

pub fn b1857(&mut self) -> B1857_W<'_>[src]

Bit 1 - B1857

pub fn b1858(&mut self) -> B1858_W<'_>[src]

Bit 2 - B1858

pub fn b1859(&mut self) -> B1859_W<'_>[src]

Bit 3 - B1859

pub fn b1860(&mut self) -> B1860_W<'_>[src]

Bit 4 - B1860

pub fn b1861(&mut self) -> B1861_W<'_>[src]

Bit 5 - B1861

pub fn b1862(&mut self) -> B1862_W<'_>[src]

Bit 6 - B1862

pub fn b1863(&mut self) -> B1863_W<'_>[src]

Bit 7 - B1863

pub fn b1864(&mut self) -> B1864_W<'_>[src]

Bit 8 - B1864

pub fn b1865(&mut self) -> B1865_W<'_>[src]

Bit 9 - B1865

pub fn b1866(&mut self) -> B1866_W<'_>[src]

Bit 10 - B1866

pub fn b1867(&mut self) -> B1867_W<'_>[src]

Bit 11 - B1867

pub fn b1868(&mut self) -> B1868_W<'_>[src]

Bit 12 - B1868

pub fn b1869(&mut self) -> B1869_W<'_>[src]

Bit 13 - B1869

pub fn b1870(&mut self) -> B1870_W<'_>[src]

Bit 14 - B1870

pub fn b1871(&mut self) -> B1871_W<'_>[src]

Bit 15 - B1871

pub fn b1872(&mut self) -> B1872_W<'_>[src]

Bit 16 - B1872

pub fn b1873(&mut self) -> B1873_W<'_>[src]

Bit 17 - B1873

pub fn b1874(&mut self) -> B1874_W<'_>[src]

Bit 18 - B1874

pub fn b1875(&mut self) -> B1875_W<'_>[src]

Bit 19 - B1875

pub fn b1876(&mut self) -> B1876_W<'_>[src]

Bit 20 - B1876

pub fn b1877(&mut self) -> B1877_W<'_>[src]

Bit 21 - B1877

pub fn b1878(&mut self) -> B1878_W<'_>[src]

Bit 22 - B1878

pub fn b1879(&mut self) -> B1879_W<'_>[src]

Bit 23 - B1879

pub fn b1880(&mut self) -> B1880_W<'_>[src]

Bit 24 - B1880

pub fn b1881(&mut self) -> B1881_W<'_>[src]

Bit 25 - B1881

pub fn b1882(&mut self) -> B1882_W<'_>[src]

Bit 26 - B1882

pub fn b1883(&mut self) -> B1883_W<'_>[src]

Bit 27 - B1883

pub fn b1884(&mut self) -> B1884_W<'_>[src]

Bit 28 - B1884

pub fn b1885(&mut self) -> B1885_W<'_>[src]

Bit 29 - B1885

pub fn b1886(&mut self) -> B1886_W<'_>[src]

Bit 30 - B1886

pub fn b1887(&mut self) -> B1887_W<'_>[src]

Bit 31 - B1887

impl W<u32, Reg<u32, _MPCBB1_VCTR59>>[src]

pub fn b1888(&mut self) -> B1888_W<'_>[src]

Bit 0 - B1888

pub fn b1889(&mut self) -> B1889_W<'_>[src]

Bit 1 - B1889

pub fn b1890(&mut self) -> B1890_W<'_>[src]

Bit 2 - B1890

pub fn b1891(&mut self) -> B1891_W<'_>[src]

Bit 3 - B1891

pub fn b1892(&mut self) -> B1892_W<'_>[src]

Bit 4 - B1892

pub fn b1893(&mut self) -> B1893_W<'_>[src]

Bit 5 - B1893

pub fn b1894(&mut self) -> B1894_W<'_>[src]

Bit 6 - B1894

pub fn b1895(&mut self) -> B1895_W<'_>[src]

Bit 7 - B1895

pub fn b1896(&mut self) -> B1896_W<'_>[src]

Bit 8 - B1896

pub fn b1897(&mut self) -> B1897_W<'_>[src]

Bit 9 - B1897

pub fn b1898(&mut self) -> B1898_W<'_>[src]

Bit 10 - B1898

pub fn b1899(&mut self) -> B1899_W<'_>[src]

Bit 11 - B1899

pub fn b1900(&mut self) -> B1900_W<'_>[src]

Bit 12 - B1900

pub fn b1901(&mut self) -> B1901_W<'_>[src]

Bit 13 - B1901

pub fn b1902(&mut self) -> B1902_W<'_>[src]

Bit 14 - B1902

pub fn b1903(&mut self) -> B1903_W<'_>[src]

Bit 15 - B1903

pub fn b1904(&mut self) -> B1904_W<'_>[src]

Bit 16 - B1904

pub fn b1905(&mut self) -> B1905_W<'_>[src]

Bit 17 - B1905

pub fn b1906(&mut self) -> B1906_W<'_>[src]

Bit 18 - B1906

pub fn b1907(&mut self) -> B1907_W<'_>[src]

Bit 19 - B1907

pub fn b1908(&mut self) -> B1908_W<'_>[src]

Bit 20 - B1908

pub fn b1909(&mut self) -> B1909_W<'_>[src]

Bit 21 - B1909

pub fn b1910(&mut self) -> B1910_W<'_>[src]

Bit 22 - B1910

pub fn b1911(&mut self) -> B1911_W<'_>[src]

Bit 23 - B1911

pub fn b1912(&mut self) -> B1912_W<'_>[src]

Bit 24 - B1912

pub fn b1913(&mut self) -> B1913_W<'_>[src]

Bit 25 - B1913

pub fn b1914(&mut self) -> B1914_W<'_>[src]

Bit 26 - B1914

pub fn b1915(&mut self) -> B1915_W<'_>[src]

Bit 27 - B1915

pub fn b1916(&mut self) -> B1916_W<'_>[src]

Bit 28 - B1916

pub fn b1917(&mut self) -> B1917_W<'_>[src]

Bit 29 - B1917

pub fn b1918(&mut self) -> B1918_W<'_>[src]

Bit 30 - B1918

pub fn b1919(&mut self) -> B1919_W<'_>[src]

Bit 31 - B1919

impl W<u32, Reg<u32, _MPCBB1_VCTR60>>[src]

pub fn b1920(&mut self) -> B1920_W<'_>[src]

Bit 0 - B1920

pub fn b1921(&mut self) -> B1921_W<'_>[src]

Bit 1 - B1921

pub fn b1922(&mut self) -> B1922_W<'_>[src]

Bit 2 - B1922

pub fn b1923(&mut self) -> B1923_W<'_>[src]

Bit 3 - B1923

pub fn b1924(&mut self) -> B1924_W<'_>[src]

Bit 4 - B1924

pub fn b1925(&mut self) -> B1925_W<'_>[src]

Bit 5 - B1925

pub fn b1926(&mut self) -> B1926_W<'_>[src]

Bit 6 - B1926

pub fn b1927(&mut self) -> B1927_W<'_>[src]

Bit 7 - B1927

pub fn b1928(&mut self) -> B1928_W<'_>[src]

Bit 8 - B1928

pub fn b1929(&mut self) -> B1929_W<'_>[src]

Bit 9 - B1929

pub fn b1930(&mut self) -> B1930_W<'_>[src]

Bit 10 - B1930

pub fn b1931(&mut self) -> B1931_W<'_>[src]

Bit 11 - B1931

pub fn b1932(&mut self) -> B1932_W<'_>[src]

Bit 12 - B1932

pub fn b1933(&mut self) -> B1933_W<'_>[src]

Bit 13 - B1933

pub fn b1934(&mut self) -> B1934_W<'_>[src]

Bit 14 - B1934

pub fn b1935(&mut self) -> B1935_W<'_>[src]

Bit 15 - B1935

pub fn b1936(&mut self) -> B1936_W<'_>[src]

Bit 16 - B1936

pub fn b1937(&mut self) -> B1937_W<'_>[src]

Bit 17 - B1937

pub fn b1938(&mut self) -> B1938_W<'_>[src]

Bit 18 - B1938

pub fn b1939(&mut self) -> B1939_W<'_>[src]

Bit 19 - B1939

pub fn b1940(&mut self) -> B1940_W<'_>[src]

Bit 20 - B1940

pub fn b1941(&mut self) -> B1941_W<'_>[src]

Bit 21 - B1941

pub fn b1942(&mut self) -> B1942_W<'_>[src]

Bit 22 - B1942

pub fn b1943(&mut self) -> B1943_W<'_>[src]

Bit 23 - B1943

pub fn b1944(&mut self) -> B1944_W<'_>[src]

Bit 24 - B1944

pub fn b1945(&mut self) -> B1945_W<'_>[src]

Bit 25 - B1945

pub fn b1946(&mut self) -> B1946_W<'_>[src]

Bit 26 - B1946

pub fn b1947(&mut self) -> B1947_W<'_>[src]

Bit 27 - B1947

pub fn b1948(&mut self) -> B1948_W<'_>[src]

Bit 28 - B1948

pub fn b1949(&mut self) -> B1949_W<'_>[src]

Bit 29 - B1949

pub fn b1950(&mut self) -> B1950_W<'_>[src]

Bit 30 - B1950

pub fn b1951(&mut self) -> B1951_W<'_>[src]

Bit 31 - B1951

impl W<u32, Reg<u32, _MPCBB1_VCTR61>>[src]

pub fn b1952(&mut self) -> B1952_W<'_>[src]

Bit 0 - B1952

pub fn b1953(&mut self) -> B1953_W<'_>[src]

Bit 1 - B1953

pub fn b1954(&mut self) -> B1954_W<'_>[src]

Bit 2 - B1954

pub fn b1955(&mut self) -> B1955_W<'_>[src]

Bit 3 - B1955

pub fn b1956(&mut self) -> B1956_W<'_>[src]

Bit 4 - B1956

pub fn b1957(&mut self) -> B1957_W<'_>[src]

Bit 5 - B1957

pub fn b1958(&mut self) -> B1958_W<'_>[src]

Bit 6 - B1958

pub fn b1959(&mut self) -> B1959_W<'_>[src]

Bit 7 - B1959

pub fn b1960(&mut self) -> B1960_W<'_>[src]

Bit 8 - B1960

pub fn b1961(&mut self) -> B1961_W<'_>[src]

Bit 9 - B1961

pub fn b1962(&mut self) -> B1962_W<'_>[src]

Bit 10 - B1962

pub fn b1963(&mut self) -> B1963_W<'_>[src]

Bit 11 - B1963

pub fn b1964(&mut self) -> B1964_W<'_>[src]

Bit 12 - B1964

pub fn b1965(&mut self) -> B1965_W<'_>[src]

Bit 13 - B1965

pub fn b1966(&mut self) -> B1966_W<'_>[src]

Bit 14 - B1966

pub fn b1967(&mut self) -> B1967_W<'_>[src]

Bit 15 - B1967

pub fn b1968(&mut self) -> B1968_W<'_>[src]

Bit 16 - B1968

pub fn b1969(&mut self) -> B1969_W<'_>[src]

Bit 17 - B1969

pub fn b1970(&mut self) -> B1970_W<'_>[src]

Bit 18 - B1970

pub fn b1971(&mut self) -> B1971_W<'_>[src]

Bit 19 - B1971

pub fn b1972(&mut self) -> B1972_W<'_>[src]

Bit 20 - B1972

pub fn b1973(&mut self) -> B1973_W<'_>[src]

Bit 21 - B1973

pub fn b1974(&mut self) -> B1974_W<'_>[src]

Bit 22 - B1974

pub fn b1975(&mut self) -> B1975_W<'_>[src]

Bit 23 - B1975

pub fn b1976(&mut self) -> B1976_W<'_>[src]

Bit 24 - B1976

pub fn b1977(&mut self) -> B1977_W<'_>[src]

Bit 25 - B1977

pub fn b1978(&mut self) -> B1978_W<'_>[src]

Bit 26 - B1978

pub fn b1979(&mut self) -> B1979_W<'_>[src]

Bit 27 - B1979

pub fn b1980(&mut self) -> B1980_W<'_>[src]

Bit 28 - B1980

pub fn b1981(&mut self) -> B1981_W<'_>[src]

Bit 29 - B1981

pub fn b1982(&mut self) -> B1982_W<'_>[src]

Bit 30 - B1982

pub fn b1983(&mut self) -> B1983_W<'_>[src]

Bit 31 - B1983

impl W<u32, Reg<u32, _MPCBB1_VCTR62>>[src]

pub fn b1984(&mut self) -> B1984_W<'_>[src]

Bit 0 - B1984

pub fn b1985(&mut self) -> B1985_W<'_>[src]

Bit 1 - B1985

pub fn b1986(&mut self) -> B1986_W<'_>[src]

Bit 2 - B1986

pub fn b1987(&mut self) -> B1987_W<'_>[src]

Bit 3 - B1987

pub fn b1988(&mut self) -> B1988_W<'_>[src]

Bit 4 - B1988

pub fn b1989(&mut self) -> B1989_W<'_>[src]

Bit 5 - B1989

pub fn b1990(&mut self) -> B1990_W<'_>[src]

Bit 6 - B1990

pub fn b1991(&mut self) -> B1991_W<'_>[src]

Bit 7 - B1991

pub fn b1992(&mut self) -> B1992_W<'_>[src]

Bit 8 - B1992

pub fn b1993(&mut self) -> B1993_W<'_>[src]

Bit 9 - B1993

pub fn b1994(&mut self) -> B1994_W<'_>[src]

Bit 10 - B1994

pub fn b1995(&mut self) -> B1995_W<'_>[src]

Bit 11 - B1995

pub fn b1996(&mut self) -> B1996_W<'_>[src]

Bit 12 - B1996

pub fn b1997(&mut self) -> B1997_W<'_>[src]

Bit 13 - B1997

pub fn b1998(&mut self) -> B1998_W<'_>[src]

Bit 14 - B1998

pub fn b1999(&mut self) -> B1999_W<'_>[src]

Bit 15 - B1999

pub fn b2000(&mut self) -> B2000_W<'_>[src]

Bit 16 - B2000

pub fn b2001(&mut self) -> B2001_W<'_>[src]

Bit 17 - B2001

pub fn b2002(&mut self) -> B2002_W<'_>[src]

Bit 18 - B2002

pub fn b2003(&mut self) -> B2003_W<'_>[src]

Bit 19 - B2003

pub fn b2004(&mut self) -> B2004_W<'_>[src]

Bit 20 - B2004

pub fn b2005(&mut self) -> B2005_W<'_>[src]

Bit 21 - B2005

pub fn b2006(&mut self) -> B2006_W<'_>[src]

Bit 22 - B2006

pub fn b2007(&mut self) -> B2007_W<'_>[src]

Bit 23 - B2007

pub fn b2008(&mut self) -> B2008_W<'_>[src]

Bit 24 - B2008

pub fn b2009(&mut self) -> B2009_W<'_>[src]

Bit 25 - B2009

pub fn b2010(&mut self) -> B2010_W<'_>[src]

Bit 26 - B2010

pub fn b2011(&mut self) -> B2011_W<'_>[src]

Bit 27 - B2011

pub fn b2012(&mut self) -> B2012_W<'_>[src]

Bit 28 - B2012

pub fn b2013(&mut self) -> B2013_W<'_>[src]

Bit 29 - B2013

pub fn b2014(&mut self) -> B2014_W<'_>[src]

Bit 30 - B2014

pub fn b2015(&mut self) -> B2015_W<'_>[src]

Bit 31 - B2015

impl W<u32, Reg<u32, _MPCBB1_VCTR63>>[src]

pub fn b2016(&mut self) -> B2016_W<'_>[src]

Bit 0 - B2016

pub fn b2017(&mut self) -> B2017_W<'_>[src]

Bit 1 - B2017

pub fn b2018(&mut self) -> B2018_W<'_>[src]

Bit 2 - B2018

pub fn b2019(&mut self) -> B2019_W<'_>[src]

Bit 3 - B2019

pub fn b2020(&mut self) -> B2020_W<'_>[src]

Bit 4 - B2020

pub fn b2021(&mut self) -> B2021_W<'_>[src]

Bit 5 - B2021

pub fn b2022(&mut self) -> B2022_W<'_>[src]

Bit 6 - B2022

pub fn b2023(&mut self) -> B2023_W<'_>[src]

Bit 7 - B2023

pub fn b2024(&mut self) -> B2024_W<'_>[src]

Bit 8 - B2024

pub fn b2025(&mut self) -> B2025_W<'_>[src]

Bit 9 - B2025

pub fn b2026(&mut self) -> B2026_W<'_>[src]

Bit 10 - B2026

pub fn b2027(&mut self) -> B2027_W<'_>[src]

Bit 11 - B2027

pub fn b2028(&mut self) -> B2028_W<'_>[src]

Bit 12 - B2028

pub fn b2029(&mut self) -> B2029_W<'_>[src]

Bit 13 - B2029

pub fn b2030(&mut self) -> B2030_W<'_>[src]

Bit 14 - B2030

pub fn b2031(&mut self) -> B2031_W<'_>[src]

Bit 15 - B2031

pub fn b2032(&mut self) -> B2032_W<'_>[src]

Bit 16 - B2032

pub fn b2033(&mut self) -> B2033_W<'_>[src]

Bit 17 - B2033

pub fn b2034(&mut self) -> B2034_W<'_>[src]

Bit 18 - B2034

pub fn b2035(&mut self) -> B2035_W<'_>[src]

Bit 19 - B2035

pub fn b2036(&mut self) -> B2036_W<'_>[src]

Bit 20 - B2036

pub fn b2037(&mut self) -> B2037_W<'_>[src]

Bit 21 - B2037

pub fn b2038(&mut self) -> B2038_W<'_>[src]

Bit 22 - B2038

pub fn b2039(&mut self) -> B2039_W<'_>[src]

Bit 23 - B2039

pub fn b2040(&mut self) -> B2040_W<'_>[src]

Bit 24 - B2040

pub fn b2041(&mut self) -> B2041_W<'_>[src]

Bit 25 - B2041

pub fn b2042(&mut self) -> B2042_W<'_>[src]

Bit 26 - B2042

pub fn b2043(&mut self) -> B2043_W<'_>[src]

Bit 27 - B2043

pub fn b2044(&mut self) -> B2044_W<'_>[src]

Bit 28 - B2044

pub fn b2045(&mut self) -> B2045_W<'_>[src]

Bit 29 - B2045

pub fn b2046(&mut self) -> B2046_W<'_>[src]

Bit 30 - B2046

pub fn b2047(&mut self) -> B2047_W<'_>[src]

Bit 31 - B2047

impl W<u32, Reg<u32, _MPCBB2_CR>>[src]

pub fn lck(&mut self) -> LCK_W<'_>[src]

Bit 0 - LCK

pub fn invsecstate(&mut self) -> INVSECSTATE_W<'_>[src]

Bit 30 - INVSECSTATE

pub fn srwiladis(&mut self) -> SRWILADIS_W<'_>[src]

Bit 31 - SRWILADIS

impl W<u32, Reg<u32, _MPCBB2_LCKVTR1>>[src]

pub fn lcksb0(&mut self) -> LCKSB0_W<'_>[src]

Bit 0 - LCKSB0

pub fn lcksb1(&mut self) -> LCKSB1_W<'_>[src]

Bit 1 - LCKSB1

pub fn lcksb2(&mut self) -> LCKSB2_W<'_>[src]

Bit 2 - LCKSB2

pub fn lcksb3(&mut self) -> LCKSB3_W<'_>[src]

Bit 3 - LCKSB3

pub fn lcksb4(&mut self) -> LCKSB4_W<'_>[src]

Bit 4 - LCKSB4

pub fn lcksb5(&mut self) -> LCKSB5_W<'_>[src]

Bit 5 - LCKSB5

pub fn lcksb6(&mut self) -> LCKSB6_W<'_>[src]

Bit 6 - LCKSB6

pub fn lcksb7(&mut self) -> LCKSB7_W<'_>[src]

Bit 7 - LCKSB7

pub fn lcksb8(&mut self) -> LCKSB8_W<'_>[src]

Bit 8 - LCKSB8

pub fn lcksb9(&mut self) -> LCKSB9_W<'_>[src]

Bit 9 - LCKSB9

pub fn lcksb10(&mut self) -> LCKSB10_W<'_>[src]

Bit 10 - LCKSB10

pub fn lcksb11(&mut self) -> LCKSB11_W<'_>[src]

Bit 11 - LCKSB11

pub fn lcksb12(&mut self) -> LCKSB12_W<'_>[src]

Bit 12 - LCKSB12

pub fn lcksb13(&mut self) -> LCKSB13_W<'_>[src]

Bit 13 - LCKSB13

pub fn lcksb14(&mut self) -> LCKSB14_W<'_>[src]

Bit 14 - LCKSB14

pub fn lcksb15(&mut self) -> LCKSB15_W<'_>[src]

Bit 15 - LCKSB15

pub fn lcksb16(&mut self) -> LCKSB16_W<'_>[src]

Bit 16 - LCKSB16

pub fn lcksb17(&mut self) -> LCKSB17_W<'_>[src]

Bit 17 - LCKSB17

pub fn lcksb18(&mut self) -> LCKSB18_W<'_>[src]

Bit 18 - LCKSB18

pub fn lcksb19(&mut self) -> LCKSB19_W<'_>[src]

Bit 19 - LCKSB19

pub fn lcksb20(&mut self) -> LCKSB20_W<'_>[src]

Bit 20 - LCKSB20

pub fn lcksb21(&mut self) -> LCKSB21_W<'_>[src]

Bit 21 - LCKSB21

pub fn lcksb22(&mut self) -> LCKSB22_W<'_>[src]

Bit 22 - LCKSB22

pub fn lcksb23(&mut self) -> LCKSB23_W<'_>[src]

Bit 23 - LCKSB23

pub fn lcksb24(&mut self) -> LCKSB24_W<'_>[src]

Bit 24 - LCKSB24

pub fn lcksb25(&mut self) -> LCKSB25_W<'_>[src]

Bit 25 - LCKSB25

pub fn lcksb26(&mut self) -> LCKSB26_W<'_>[src]

Bit 26 - LCKSB26

pub fn lcksb27(&mut self) -> LCKSB27_W<'_>[src]

Bit 27 - LCKSB27

pub fn lcksb28(&mut self) -> LCKSB28_W<'_>[src]

Bit 28 - LCKSB28

pub fn lcksb29(&mut self) -> LCKSB29_W<'_>[src]

Bit 29 - LCKSB29

pub fn lcksb30(&mut self) -> LCKSB30_W<'_>[src]

Bit 30 - LCKSB30

pub fn lcksb31(&mut self) -> LCKSB31_W<'_>[src]

Bit 31 - LCKSB31

impl W<u32, Reg<u32, _MPCBB2_LCKVTR2>>[src]

pub fn lcksb32(&mut self) -> LCKSB32_W<'_>[src]

Bit 0 - LCKSB32

pub fn lcksb33(&mut self) -> LCKSB33_W<'_>[src]

Bit 1 - LCKSB33

pub fn lcksb34(&mut self) -> LCKSB34_W<'_>[src]

Bit 2 - LCKSB34

pub fn lcksb35(&mut self) -> LCKSB35_W<'_>[src]

Bit 3 - LCKSB35

pub fn lcksb36(&mut self) -> LCKSB36_W<'_>[src]

Bit 4 - LCKSB36

pub fn lcksb37(&mut self) -> LCKSB37_W<'_>[src]

Bit 5 - LCKSB37

pub fn lcksb38(&mut self) -> LCKSB38_W<'_>[src]

Bit 6 - LCKSB38

pub fn lcksb39(&mut self) -> LCKSB39_W<'_>[src]

Bit 7 - LCKSB39

pub fn lcksb40(&mut self) -> LCKSB40_W<'_>[src]

Bit 8 - LCKSB40

pub fn lcksb41(&mut self) -> LCKSB41_W<'_>[src]

Bit 9 - LCKSB41

pub fn lcksb42(&mut self) -> LCKSB42_W<'_>[src]

Bit 10 - LCKSB42

pub fn lcksb43(&mut self) -> LCKSB43_W<'_>[src]

Bit 11 - LCKSB43

pub fn lcksb44(&mut self) -> LCKSB44_W<'_>[src]

Bit 12 - LCKSB44

pub fn lcksb45(&mut self) -> LCKSB45_W<'_>[src]

Bit 13 - LCKSB45

pub fn lcksb46(&mut self) -> LCKSB46_W<'_>[src]

Bit 14 - LCKSB46

pub fn lcksb47(&mut self) -> LCKSB47_W<'_>[src]

Bit 15 - LCKSB47

pub fn lcksb48(&mut self) -> LCKSB48_W<'_>[src]

Bit 16 - LCKSB48

pub fn lcksb49(&mut self) -> LCKSB49_W<'_>[src]

Bit 17 - LCKSB49

pub fn lcksb50(&mut self) -> LCKSB50_W<'_>[src]

Bit 18 - LCKSB50

pub fn lcksb51(&mut self) -> LCKSB51_W<'_>[src]

Bit 19 - LCKSB51

pub fn lcksb52(&mut self) -> LCKSB52_W<'_>[src]

Bit 20 - LCKSB52

pub fn lcksb53(&mut self) -> LCKSB53_W<'_>[src]

Bit 21 - LCKSB53

pub fn lcksb54(&mut self) -> LCKSB54_W<'_>[src]

Bit 22 - LCKSB54

pub fn lcksb55(&mut self) -> LCKSB55_W<'_>[src]

Bit 23 - LCKSB55

pub fn lcksb56(&mut self) -> LCKSB56_W<'_>[src]

Bit 24 - LCKSB56

pub fn lcksb57(&mut self) -> LCKSB57_W<'_>[src]

Bit 25 - LCKSB57

pub fn lcksb58(&mut self) -> LCKSB58_W<'_>[src]

Bit 26 - LCKSB58

pub fn lcksb59(&mut self) -> LCKSB59_W<'_>[src]

Bit 27 - LCKSB59

pub fn lcksb60(&mut self) -> LCKSB60_W<'_>[src]

Bit 28 - LCKSB60

pub fn lcksb61(&mut self) -> LCKSB61_W<'_>[src]

Bit 29 - LCKSB61

pub fn lcksb62(&mut self) -> LCKSB62_W<'_>[src]

Bit 30 - LCKSB62

pub fn lcksb63(&mut self) -> LCKSB63_W<'_>[src]

Bit 31 - LCKSB63

impl W<u32, Reg<u32, _MPCBB2_VCTR0>>[src]

pub fn b0(&mut self) -> B0_W<'_>[src]

Bit 0 - B0

pub fn b1(&mut self) -> B1_W<'_>[src]

Bit 1 - B1

pub fn b2(&mut self) -> B2_W<'_>[src]

Bit 2 - B2

pub fn b3(&mut self) -> B3_W<'_>[src]

Bit 3 - B3

pub fn b4(&mut self) -> B4_W<'_>[src]

Bit 4 - B4

pub fn b5(&mut self) -> B5_W<'_>[src]

Bit 5 - B5

pub fn b6(&mut self) -> B6_W<'_>[src]

Bit 6 - B6

pub fn b7(&mut self) -> B7_W<'_>[src]

Bit 7 - B7

pub fn b8(&mut self) -> B8_W<'_>[src]

Bit 8 - B8

pub fn b9(&mut self) -> B9_W<'_>[src]

Bit 9 - B9

pub fn b10(&mut self) -> B10_W<'_>[src]

Bit 10 - B10

pub fn b11(&mut self) -> B11_W<'_>[src]

Bit 11 - B11

pub fn b12(&mut self) -> B12_W<'_>[src]

Bit 12 - B12

pub fn b13(&mut self) -> B13_W<'_>[src]

Bit 13 - B13

pub fn b14(&mut self) -> B14_W<'_>[src]

Bit 14 - B14

pub fn b15(&mut self) -> B15_W<'_>[src]

Bit 15 - B15

pub fn b16(&mut self) -> B16_W<'_>[src]

Bit 16 - B16

pub fn b17(&mut self) -> B17_W<'_>[src]

Bit 17 - B17

pub fn b18(&mut self) -> B18_W<'_>[src]

Bit 18 - B18

pub fn b19(&mut self) -> B19_W<'_>[src]

Bit 19 - B19

pub fn b20(&mut self) -> B20_W<'_>[src]

Bit 20 - B20

pub fn b21(&mut self) -> B21_W<'_>[src]

Bit 21 - B21

pub fn b22(&mut self) -> B22_W<'_>[src]

Bit 22 - B22

pub fn b23(&mut self) -> B23_W<'_>[src]

Bit 23 - B23

pub fn b24(&mut self) -> B24_W<'_>[src]

Bit 24 - B24

pub fn b25(&mut self) -> B25_W<'_>[src]

Bit 25 - B25

pub fn b26(&mut self) -> B26_W<'_>[src]

Bit 26 - B26

pub fn b27(&mut self) -> B27_W<'_>[src]

Bit 27 - B27

pub fn b28(&mut self) -> B28_W<'_>[src]

Bit 28 - B28

pub fn b29(&mut self) -> B29_W<'_>[src]

Bit 29 - B29

pub fn b30(&mut self) -> B30_W<'_>[src]

Bit 30 - B30

pub fn b31(&mut self) -> B31_W<'_>[src]

Bit 31 - B31

impl W<u32, Reg<u32, _MPCBB2_VCTR1>>[src]

pub fn b32(&mut self) -> B32_W<'_>[src]

Bit 0 - B32

pub fn b33(&mut self) -> B33_W<'_>[src]

Bit 1 - B33

pub fn b34(&mut self) -> B34_W<'_>[src]

Bit 2 - B34

pub fn b35(&mut self) -> B35_W<'_>[src]

Bit 3 - B35

pub fn b36(&mut self) -> B36_W<'_>[src]

Bit 4 - B36

pub fn b37(&mut self) -> B37_W<'_>[src]

Bit 5 - B37

pub fn b38(&mut self) -> B38_W<'_>[src]

Bit 6 - B38

pub fn b39(&mut self) -> B39_W<'_>[src]

Bit 7 - B39

pub fn b40(&mut self) -> B40_W<'_>[src]

Bit 8 - B40

pub fn b41(&mut self) -> B41_W<'_>[src]

Bit 9 - B41

pub fn b42(&mut self) -> B42_W<'_>[src]

Bit 10 - B42

pub fn b43(&mut self) -> B43_W<'_>[src]

Bit 11 - B43

pub fn b44(&mut self) -> B44_W<'_>[src]

Bit 12 - B44

pub fn b45(&mut self) -> B45_W<'_>[src]

Bit 13 - B45

pub fn b46(&mut self) -> B46_W<'_>[src]

Bit 14 - B46

pub fn b47(&mut self) -> B47_W<'_>[src]

Bit 15 - B47

pub fn b48(&mut self) -> B48_W<'_>[src]

Bit 16 - B48

pub fn b49(&mut self) -> B49_W<'_>[src]

Bit 17 - B49

pub fn b50(&mut self) -> B50_W<'_>[src]

Bit 18 - B50

pub fn b51(&mut self) -> B51_W<'_>[src]

Bit 19 - B51

pub fn b52(&mut self) -> B52_W<'_>[src]

Bit 20 - B52

pub fn b53(&mut self) -> B53_W<'_>[src]

Bit 21 - B53

pub fn b54(&mut self) -> B54_W<'_>[src]

Bit 22 - B54

pub fn b55(&mut self) -> B55_W<'_>[src]

Bit 23 - B55

pub fn b56(&mut self) -> B56_W<'_>[src]

Bit 24 - B56

pub fn b57(&mut self) -> B57_W<'_>[src]

Bit 25 - B57

pub fn b58(&mut self) -> B58_W<'_>[src]

Bit 26 - B58

pub fn b59(&mut self) -> B59_W<'_>[src]

Bit 27 - B59

pub fn b60(&mut self) -> B60_W<'_>[src]

Bit 28 - B60

pub fn b61(&mut self) -> B61_W<'_>[src]

Bit 29 - B61

pub fn b62(&mut self) -> B62_W<'_>[src]

Bit 30 - B62

pub fn b63(&mut self) -> B63_W<'_>[src]

Bit 31 - B63

impl W<u32, Reg<u32, _MPCBB2_VCTR2>>[src]

pub fn b64(&mut self) -> B64_W<'_>[src]

Bit 0 - B64

pub fn b65(&mut self) -> B65_W<'_>[src]

Bit 1 - B65

pub fn b66(&mut self) -> B66_W<'_>[src]

Bit 2 - B66

pub fn b67(&mut self) -> B67_W<'_>[src]

Bit 3 - B67

pub fn b68(&mut self) -> B68_W<'_>[src]

Bit 4 - B68

pub fn b69(&mut self) -> B69_W<'_>[src]

Bit 5 - B69

pub fn b70(&mut self) -> B70_W<'_>[src]

Bit 6 - B70

pub fn b71(&mut self) -> B71_W<'_>[src]

Bit 7 - B71

pub fn b72(&mut self) -> B72_W<'_>[src]

Bit 8 - B72

pub fn b73(&mut self) -> B73_W<'_>[src]

Bit 9 - B73

pub fn b74(&mut self) -> B74_W<'_>[src]

Bit 10 - B74

pub fn b75(&mut self) -> B75_W<'_>[src]

Bit 11 - B75

pub fn b76(&mut self) -> B76_W<'_>[src]

Bit 12 - B76

pub fn b77(&mut self) -> B77_W<'_>[src]

Bit 13 - B77

pub fn b78(&mut self) -> B78_W<'_>[src]

Bit 14 - B78

pub fn b79(&mut self) -> B79_W<'_>[src]

Bit 15 - B79

pub fn b80(&mut self) -> B80_W<'_>[src]

Bit 16 - B80

pub fn b81(&mut self) -> B81_W<'_>[src]

Bit 17 - B81

pub fn b82(&mut self) -> B82_W<'_>[src]

Bit 18 - B82

pub fn b83(&mut self) -> B83_W<'_>[src]

Bit 19 - B83

pub fn b84(&mut self) -> B84_W<'_>[src]

Bit 20 - B84

pub fn b85(&mut self) -> B85_W<'_>[src]

Bit 21 - B85

pub fn b86(&mut self) -> B86_W<'_>[src]

Bit 22 - B86

pub fn b87(&mut self) -> B87_W<'_>[src]

Bit 23 - B87

pub fn b88(&mut self) -> B88_W<'_>[src]

Bit 24 - B88

pub fn b89(&mut self) -> B89_W<'_>[src]

Bit 25 - B89

pub fn b90(&mut self) -> B90_W<'_>[src]

Bit 26 - B90

pub fn b91(&mut self) -> B91_W<'_>[src]

Bit 27 - B91

pub fn b92(&mut self) -> B92_W<'_>[src]

Bit 28 - B92

pub fn b93(&mut self) -> B93_W<'_>[src]

Bit 29 - B93

pub fn b94(&mut self) -> B94_W<'_>[src]

Bit 30 - B94

pub fn b95(&mut self) -> B95_W<'_>[src]

Bit 31 - B95

impl W<u32, Reg<u32, _MPCBB2_VCTR3>>[src]

pub fn b96(&mut self) -> B96_W<'_>[src]

Bit 0 - B96

pub fn b97(&mut self) -> B97_W<'_>[src]

Bit 1 - B97

pub fn b98(&mut self) -> B98_W<'_>[src]

Bit 2 - B98

pub fn b99(&mut self) -> B99_W<'_>[src]

Bit 3 - B99

pub fn b100(&mut self) -> B100_W<'_>[src]

Bit 4 - B100

pub fn b101(&mut self) -> B101_W<'_>[src]

Bit 5 - B101

pub fn b102(&mut self) -> B102_W<'_>[src]

Bit 6 - B102

pub fn b103(&mut self) -> B103_W<'_>[src]

Bit 7 - B103

pub fn b104(&mut self) -> B104_W<'_>[src]

Bit 8 - B104

pub fn b105(&mut self) -> B105_W<'_>[src]

Bit 9 - B105

pub fn b106(&mut self) -> B106_W<'_>[src]

Bit 10 - B106

pub fn b107(&mut self) -> B107_W<'_>[src]

Bit 11 - B107

pub fn b108(&mut self) -> B108_W<'_>[src]

Bit 12 - B108

pub fn b109(&mut self) -> B109_W<'_>[src]

Bit 13 - B109

pub fn b110(&mut self) -> B110_W<'_>[src]

Bit 14 - B110

pub fn b111(&mut self) -> B111_W<'_>[src]

Bit 15 - B111

pub fn b112(&mut self) -> B112_W<'_>[src]

Bit 16 - B112

pub fn b113(&mut self) -> B113_W<'_>[src]

Bit 17 - B113

pub fn b114(&mut self) -> B114_W<'_>[src]

Bit 18 - B114

pub fn b115(&mut self) -> B115_W<'_>[src]

Bit 19 - B115

pub fn b116(&mut self) -> B116_W<'_>[src]

Bit 20 - B116

pub fn b117(&mut self) -> B117_W<'_>[src]

Bit 21 - B117

pub fn b118(&mut self) -> B118_W<'_>[src]

Bit 22 - B118

pub fn b119(&mut self) -> B119_W<'_>[src]

Bit 23 - B119

pub fn b120(&mut self) -> B120_W<'_>[src]

Bit 24 - B120

pub fn b121(&mut self) -> B121_W<'_>[src]

Bit 25 - B121

pub fn b122(&mut self) -> B122_W<'_>[src]

Bit 26 - B122

pub fn b123(&mut self) -> B123_W<'_>[src]

Bit 27 - B123

pub fn b124(&mut self) -> B124_W<'_>[src]

Bit 28 - B124

pub fn b125(&mut self) -> B125_W<'_>[src]

Bit 29 - B125

pub fn b126(&mut self) -> B126_W<'_>[src]

Bit 30 - B126

pub fn b127(&mut self) -> B127_W<'_>[src]

Bit 31 - B127

impl W<u32, Reg<u32, _MPCBB2_VCTR4>>[src]

pub fn b128(&mut self) -> B128_W<'_>[src]

Bit 0 - B128

pub fn b129(&mut self) -> B129_W<'_>[src]

Bit 1 - B129

pub fn b130(&mut self) -> B130_W<'_>[src]

Bit 2 - B130

pub fn b131(&mut self) -> B131_W<'_>[src]

Bit 3 - B131

pub fn b132(&mut self) -> B132_W<'_>[src]

Bit 4 - B132

pub fn b133(&mut self) -> B133_W<'_>[src]

Bit 5 - B133

pub fn b134(&mut self) -> B134_W<'_>[src]

Bit 6 - B134

pub fn b135(&mut self) -> B135_W<'_>[src]

Bit 7 - B135

pub fn b136(&mut self) -> B136_W<'_>[src]

Bit 8 - B136

pub fn b137(&mut self) -> B137_W<'_>[src]

Bit 9 - B137

pub fn b138(&mut self) -> B138_W<'_>[src]

Bit 10 - B138

pub fn b139(&mut self) -> B139_W<'_>[src]

Bit 11 - B139

pub fn b140(&mut self) -> B140_W<'_>[src]

Bit 12 - B140

pub fn b141(&mut self) -> B141_W<'_>[src]

Bit 13 - B141

pub fn b142(&mut self) -> B142_W<'_>[src]

Bit 14 - B142

pub fn b143(&mut self) -> B143_W<'_>[src]

Bit 15 - B143

pub fn b144(&mut self) -> B144_W<'_>[src]

Bit 16 - B144

pub fn b145(&mut self) -> B145_W<'_>[src]

Bit 17 - B145

pub fn b146(&mut self) -> B146_W<'_>[src]

Bit 18 - B146

pub fn b147(&mut self) -> B147_W<'_>[src]

Bit 19 - B147

pub fn b148(&mut self) -> B148_W<'_>[src]

Bit 20 - B148

pub fn b149(&mut self) -> B149_W<'_>[src]

Bit 21 - B149

pub fn b150(&mut self) -> B150_W<'_>[src]

Bit 22 - B150

pub fn b151(&mut self) -> B151_W<'_>[src]

Bit 23 - B151

pub fn b152(&mut self) -> B152_W<'_>[src]

Bit 24 - B152

pub fn b153(&mut self) -> B153_W<'_>[src]

Bit 25 - B153

pub fn b154(&mut self) -> B154_W<'_>[src]

Bit 26 - B154

pub fn b155(&mut self) -> B155_W<'_>[src]

Bit 27 - B155

pub fn b156(&mut self) -> B156_W<'_>[src]

Bit 28 - B156

pub fn b157(&mut self) -> B157_W<'_>[src]

Bit 29 - B157

pub fn b158(&mut self) -> B158_W<'_>[src]

Bit 30 - B158

pub fn b159(&mut self) -> B159_W<'_>[src]

Bit 31 - B159

impl W<u32, Reg<u32, _MPCBB2_VCTR5>>[src]

pub fn b160(&mut self) -> B160_W<'_>[src]

Bit 0 - B160

pub fn b161(&mut self) -> B161_W<'_>[src]

Bit 1 - B161

pub fn b162(&mut self) -> B162_W<'_>[src]

Bit 2 - B162

pub fn b163(&mut self) -> B163_W<'_>[src]

Bit 3 - B163

pub fn b164(&mut self) -> B164_W<'_>[src]

Bit 4 - B164

pub fn b165(&mut self) -> B165_W<'_>[src]

Bit 5 - B165

pub fn b166(&mut self) -> B166_W<'_>[src]

Bit 6 - B166

pub fn b167(&mut self) -> B167_W<'_>[src]

Bit 7 - B167

pub fn b168(&mut self) -> B168_W<'_>[src]

Bit 8 - B168

pub fn b169(&mut self) -> B169_W<'_>[src]

Bit 9 - B169

pub fn b170(&mut self) -> B170_W<'_>[src]

Bit 10 - B170

pub fn b171(&mut self) -> B171_W<'_>[src]

Bit 11 - B171

pub fn b172(&mut self) -> B172_W<'_>[src]

Bit 12 - B172

pub fn b173(&mut self) -> B173_W<'_>[src]

Bit 13 - B173

pub fn b174(&mut self) -> B174_W<'_>[src]

Bit 14 - B174

pub fn b175(&mut self) -> B175_W<'_>[src]

Bit 15 - B175

pub fn b176(&mut self) -> B176_W<'_>[src]

Bit 16 - B176

pub fn b177(&mut self) -> B177_W<'_>[src]

Bit 17 - B177

pub fn b178(&mut self) -> B178_W<'_>[src]

Bit 18 - B178

pub fn b179(&mut self) -> B179_W<'_>[src]

Bit 19 - B179

pub fn b180(&mut self) -> B180_W<'_>[src]

Bit 20 - B180

pub fn b181(&mut self) -> B181_W<'_>[src]

Bit 21 - B181

pub fn b182(&mut self) -> B182_W<'_>[src]

Bit 22 - B182

pub fn b183(&mut self) -> B183_W<'_>[src]

Bit 23 - B183

pub fn b184(&mut self) -> B184_W<'_>[src]

Bit 24 - B184

pub fn b185(&mut self) -> B185_W<'_>[src]

Bit 25 - B185

pub fn b186(&mut self) -> B186_W<'_>[src]

Bit 26 - B186

pub fn b187(&mut self) -> B187_W<'_>[src]

Bit 27 - B187

pub fn b188(&mut self) -> B188_W<'_>[src]

Bit 28 - B188

pub fn b189(&mut self) -> B189_W<'_>[src]

Bit 29 - B189

pub fn b190(&mut self) -> B190_W<'_>[src]

Bit 30 - B190

pub fn b191(&mut self) -> B191_W<'_>[src]

Bit 31 - B191

impl W<u32, Reg<u32, _MPCBB2_VCTR6>>[src]

pub fn b192(&mut self) -> B192_W<'_>[src]

Bit 0 - B192

pub fn b193(&mut self) -> B193_W<'_>[src]

Bit 1 - B193

pub fn b194(&mut self) -> B194_W<'_>[src]

Bit 2 - B194

pub fn b195(&mut self) -> B195_W<'_>[src]

Bit 3 - B195

pub fn b196(&mut self) -> B196_W<'_>[src]

Bit 4 - B196

pub fn b197(&mut self) -> B197_W<'_>[src]

Bit 5 - B197

pub fn b198(&mut self) -> B198_W<'_>[src]

Bit 6 - B198

pub fn b199(&mut self) -> B199_W<'_>[src]

Bit 7 - B199

pub fn b200(&mut self) -> B200_W<'_>[src]

Bit 8 - B200

pub fn b201(&mut self) -> B201_W<'_>[src]

Bit 9 - B201

pub fn b202(&mut self) -> B202_W<'_>[src]

Bit 10 - B202

pub fn b203(&mut self) -> B203_W<'_>[src]

Bit 11 - B203

pub fn b204(&mut self) -> B204_W<'_>[src]

Bit 12 - B204

pub fn b205(&mut self) -> B205_W<'_>[src]

Bit 13 - B205

pub fn b206(&mut self) -> B206_W<'_>[src]

Bit 14 - B206

pub fn b207(&mut self) -> B207_W<'_>[src]

Bit 15 - B207

pub fn b208(&mut self) -> B208_W<'_>[src]

Bit 16 - B208

pub fn b209(&mut self) -> B209_W<'_>[src]

Bit 17 - B209

pub fn b210(&mut self) -> B210_W<'_>[src]

Bit 18 - B210

pub fn b211(&mut self) -> B211_W<'_>[src]

Bit 19 - B211

pub fn b212(&mut self) -> B212_W<'_>[src]

Bit 20 - B212

pub fn b213(&mut self) -> B213_W<'_>[src]

Bit 21 - B213

pub fn b214(&mut self) -> B214_W<'_>[src]

Bit 22 - B214

pub fn b215(&mut self) -> B215_W<'_>[src]

Bit 23 - B215

pub fn b216(&mut self) -> B216_W<'_>[src]

Bit 24 - B216

pub fn b217(&mut self) -> B217_W<'_>[src]

Bit 25 - B217

pub fn b218(&mut self) -> B218_W<'_>[src]

Bit 26 - B218

pub fn b219(&mut self) -> B219_W<'_>[src]

Bit 27 - B219

pub fn b220(&mut self) -> B220_W<'_>[src]

Bit 28 - B220

pub fn b221(&mut self) -> B221_W<'_>[src]

Bit 29 - B221

pub fn b222(&mut self) -> B222_W<'_>[src]

Bit 30 - B222

pub fn b223(&mut self) -> B223_W<'_>[src]

Bit 31 - B223

impl W<u32, Reg<u32, _MPCBB2_VCTR7>>[src]

pub fn b224(&mut self) -> B224_W<'_>[src]

Bit 0 - B224

pub fn b225(&mut self) -> B225_W<'_>[src]

Bit 1 - B225

pub fn b226(&mut self) -> B226_W<'_>[src]

Bit 2 - B226

pub fn b227(&mut self) -> B227_W<'_>[src]

Bit 3 - B227

pub fn b228(&mut self) -> B228_W<'_>[src]

Bit 4 - B228

pub fn b229(&mut self) -> B229_W<'_>[src]

Bit 5 - B229

pub fn b230(&mut self) -> B230_W<'_>[src]

Bit 6 - B230

pub fn b231(&mut self) -> B231_W<'_>[src]

Bit 7 - B231

pub fn b232(&mut self) -> B232_W<'_>[src]

Bit 8 - B232

pub fn b233(&mut self) -> B233_W<'_>[src]

Bit 9 - B233

pub fn b234(&mut self) -> B234_W<'_>[src]

Bit 10 - B234

pub fn b235(&mut self) -> B235_W<'_>[src]

Bit 11 - B235

pub fn b236(&mut self) -> B236_W<'_>[src]

Bit 12 - B236

pub fn b237(&mut self) -> B237_W<'_>[src]

Bit 13 - B237

pub fn b238(&mut self) -> B238_W<'_>[src]

Bit 14 - B238

pub fn b239(&mut self) -> B239_W<'_>[src]

Bit 15 - B239

pub fn b240(&mut self) -> B240_W<'_>[src]

Bit 16 - B240

pub fn b241(&mut self) -> B241_W<'_>[src]

Bit 17 - B241

pub fn b242(&mut self) -> B242_W<'_>[src]

Bit 18 - B242

pub fn b243(&mut self) -> B243_W<'_>[src]

Bit 19 - B243

pub fn b244(&mut self) -> B244_W<'_>[src]

Bit 20 - B244

pub fn b245(&mut self) -> B245_W<'_>[src]

Bit 21 - B245

pub fn b246(&mut self) -> B246_W<'_>[src]

Bit 22 - B246

pub fn b247(&mut self) -> B247_W<'_>[src]

Bit 23 - B247

pub fn b248(&mut self) -> B248_W<'_>[src]

Bit 24 - B248

pub fn b249(&mut self) -> B249_W<'_>[src]

Bit 25 - B249

pub fn b250(&mut self) -> B250_W<'_>[src]

Bit 26 - B250

pub fn b251(&mut self) -> B251_W<'_>[src]

Bit 27 - B251

pub fn b252(&mut self) -> B252_W<'_>[src]

Bit 28 - B252

pub fn b253(&mut self) -> B253_W<'_>[src]

Bit 29 - B253

pub fn b254(&mut self) -> B254_W<'_>[src]

Bit 30 - B254

pub fn b255(&mut self) -> B255_W<'_>[src]

Bit 31 - B255

impl W<u32, Reg<u32, _MPCBB2_VCTR8>>[src]

pub fn b256(&mut self) -> B256_W<'_>[src]

Bit 0 - B256

pub fn b257(&mut self) -> B257_W<'_>[src]

Bit 1 - B257

pub fn b258(&mut self) -> B258_W<'_>[src]

Bit 2 - B258

pub fn b259(&mut self) -> B259_W<'_>[src]

Bit 3 - B259

pub fn b260(&mut self) -> B260_W<'_>[src]

Bit 4 - B260

pub fn b261(&mut self) -> B261_W<'_>[src]

Bit 5 - B261

pub fn b262(&mut self) -> B262_W<'_>[src]

Bit 6 - B262

pub fn b263(&mut self) -> B263_W<'_>[src]

Bit 7 - B263

pub fn b264(&mut self) -> B264_W<'_>[src]

Bit 8 - B264

pub fn b265(&mut self) -> B265_W<'_>[src]

Bit 9 - B265

pub fn b266(&mut self) -> B266_W<'_>[src]

Bit 10 - B266

pub fn b267(&mut self) -> B267_W<'_>[src]

Bit 11 - B267

pub fn b268(&mut self) -> B268_W<'_>[src]

Bit 12 - B268

pub fn b269(&mut self) -> B269_W<'_>[src]

Bit 13 - B269

pub fn b270(&mut self) -> B270_W<'_>[src]

Bit 14 - B270

pub fn b271(&mut self) -> B271_W<'_>[src]

Bit 15 - B271

pub fn b272(&mut self) -> B272_W<'_>[src]

Bit 16 - B272

pub fn b273(&mut self) -> B273_W<'_>[src]

Bit 17 - B273

pub fn b274(&mut self) -> B274_W<'_>[src]

Bit 18 - B274

pub fn b275(&mut self) -> B275_W<'_>[src]

Bit 19 - B275

pub fn b276(&mut self) -> B276_W<'_>[src]

Bit 20 - B276

pub fn b277(&mut self) -> B277_W<'_>[src]

Bit 21 - B277

pub fn b278(&mut self) -> B278_W<'_>[src]

Bit 22 - B278

pub fn b279(&mut self) -> B279_W<'_>[src]

Bit 23 - B279

pub fn b280(&mut self) -> B280_W<'_>[src]

Bit 24 - B280

pub fn b281(&mut self) -> B281_W<'_>[src]

Bit 25 - B281

pub fn b282(&mut self) -> B282_W<'_>[src]

Bit 26 - B282

pub fn b283(&mut self) -> B283_W<'_>[src]

Bit 27 - B283

pub fn b284(&mut self) -> B284_W<'_>[src]

Bit 28 - B284

pub fn b285(&mut self) -> B285_W<'_>[src]

Bit 29 - B285

pub fn b286(&mut self) -> B286_W<'_>[src]

Bit 30 - B286

pub fn b287(&mut self) -> B287_W<'_>[src]

Bit 31 - B287

impl W<u32, Reg<u32, _MPCBB2_VCTR9>>[src]

pub fn b288(&mut self) -> B288_W<'_>[src]

Bit 0 - B288

pub fn b289(&mut self) -> B289_W<'_>[src]

Bit 1 - B289

pub fn b290(&mut self) -> B290_W<'_>[src]

Bit 2 - B290

pub fn b291(&mut self) -> B291_W<'_>[src]

Bit 3 - B291

pub fn b292(&mut self) -> B292_W<'_>[src]

Bit 4 - B292

pub fn b293(&mut self) -> B293_W<'_>[src]

Bit 5 - B293

pub fn b294(&mut self) -> B294_W<'_>[src]

Bit 6 - B294

pub fn b295(&mut self) -> B295_W<'_>[src]

Bit 7 - B295

pub fn b296(&mut self) -> B296_W<'_>[src]

Bit 8 - B296

pub fn b297(&mut self) -> B297_W<'_>[src]

Bit 9 - B297

pub fn b298(&mut self) -> B298_W<'_>[src]

Bit 10 - B298

pub fn b299(&mut self) -> B299_W<'_>[src]

Bit 11 - B299

pub fn b300(&mut self) -> B300_W<'_>[src]

Bit 12 - B300

pub fn b301(&mut self) -> B301_W<'_>[src]

Bit 13 - B301

pub fn b302(&mut self) -> B302_W<'_>[src]

Bit 14 - B302

pub fn b303(&mut self) -> B303_W<'_>[src]

Bit 15 - B303

pub fn b304(&mut self) -> B304_W<'_>[src]

Bit 16 - B304

pub fn b305(&mut self) -> B305_W<'_>[src]

Bit 17 - B305

pub fn b306(&mut self) -> B306_W<'_>[src]

Bit 18 - B306

pub fn b307(&mut self) -> B307_W<'_>[src]

Bit 19 - B307

pub fn b308(&mut self) -> B308_W<'_>[src]

Bit 20 - B308

pub fn b309(&mut self) -> B309_W<'_>[src]

Bit 21 - B309

pub fn b310(&mut self) -> B310_W<'_>[src]

Bit 22 - B310

pub fn b311(&mut self) -> B311_W<'_>[src]

Bit 23 - B311

pub fn b312(&mut self) -> B312_W<'_>[src]

Bit 24 - B312

pub fn b313(&mut self) -> B313_W<'_>[src]

Bit 25 - B313

pub fn b314(&mut self) -> B314_W<'_>[src]

Bit 26 - B314

pub fn b315(&mut self) -> B315_W<'_>[src]

Bit 27 - B315

pub fn b316(&mut self) -> B316_W<'_>[src]

Bit 28 - B316

pub fn b317(&mut self) -> B317_W<'_>[src]

Bit 29 - B317

pub fn b318(&mut self) -> B318_W<'_>[src]

Bit 30 - B318

pub fn b319(&mut self) -> B319_W<'_>[src]

Bit 31 - B319

impl W<u32, Reg<u32, _MPCBB2_VCTR10>>[src]

pub fn b320(&mut self) -> B320_W<'_>[src]

Bit 0 - B320

pub fn b321(&mut self) -> B321_W<'_>[src]

Bit 1 - B321

pub fn b322(&mut self) -> B322_W<'_>[src]

Bit 2 - B322

pub fn b323(&mut self) -> B323_W<'_>[src]

Bit 3 - B323

pub fn b324(&mut self) -> B324_W<'_>[src]

Bit 4 - B324

pub fn b325(&mut self) -> B325_W<'_>[src]

Bit 5 - B325

pub fn b326(&mut self) -> B326_W<'_>[src]

Bit 6 - B326

pub fn b327(&mut self) -> B327_W<'_>[src]

Bit 7 - B327

pub fn b328(&mut self) -> B328_W<'_>[src]

Bit 8 - B328

pub fn b329(&mut self) -> B329_W<'_>[src]

Bit 9 - B329

pub fn b330(&mut self) -> B330_W<'_>[src]

Bit 10 - B330

pub fn b331(&mut self) -> B331_W<'_>[src]

Bit 11 - B331

pub fn b332(&mut self) -> B332_W<'_>[src]

Bit 12 - B332

pub fn b333(&mut self) -> B333_W<'_>[src]

Bit 13 - B333

pub fn b334(&mut self) -> B334_W<'_>[src]

Bit 14 - B334

pub fn b335(&mut self) -> B335_W<'_>[src]

Bit 15 - B335

pub fn b336(&mut self) -> B336_W<'_>[src]

Bit 16 - B336

pub fn b337(&mut self) -> B337_W<'_>[src]

Bit 17 - B337

pub fn b338(&mut self) -> B338_W<'_>[src]

Bit 18 - B338

pub fn b339(&mut self) -> B339_W<'_>[src]

Bit 19 - B339

pub fn b340(&mut self) -> B340_W<'_>[src]

Bit 20 - B340

pub fn b341(&mut self) -> B341_W<'_>[src]

Bit 21 - B341

pub fn b342(&mut self) -> B342_W<'_>[src]

Bit 22 - B342

pub fn b343(&mut self) -> B343_W<'_>[src]

Bit 23 - B343

pub fn b344(&mut self) -> B344_W<'_>[src]

Bit 24 - B344

pub fn b345(&mut self) -> B345_W<'_>[src]

Bit 25 - B345

pub fn b346(&mut self) -> B346_W<'_>[src]

Bit 26 - B346

pub fn b347(&mut self) -> B347_W<'_>[src]

Bit 27 - B347

pub fn b348(&mut self) -> B348_W<'_>[src]

Bit 28 - B348

pub fn b349(&mut self) -> B349_W<'_>[src]

Bit 29 - B349

pub fn b350(&mut self) -> B350_W<'_>[src]

Bit 30 - B350

pub fn b351(&mut self) -> B351_W<'_>[src]

Bit 31 - B351

impl W<u32, Reg<u32, _MPCBB2_VCTR11>>[src]

pub fn b352(&mut self) -> B352_W<'_>[src]

Bit 0 - B352

pub fn b353(&mut self) -> B353_W<'_>[src]

Bit 1 - B353

pub fn b354(&mut self) -> B354_W<'_>[src]

Bit 2 - B354

pub fn b355(&mut self) -> B355_W<'_>[src]

Bit 3 - B355

pub fn b356(&mut self) -> B356_W<'_>[src]

Bit 4 - B356

pub fn b357(&mut self) -> B357_W<'_>[src]

Bit 5 - B357

pub fn b358(&mut self) -> B358_W<'_>[src]

Bit 6 - B358

pub fn b359(&mut self) -> B359_W<'_>[src]

Bit 7 - B359

pub fn b360(&mut self) -> B360_W<'_>[src]

Bit 8 - B360

pub fn b361(&mut self) -> B361_W<'_>[src]

Bit 9 - B361

pub fn b362(&mut self) -> B362_W<'_>[src]

Bit 10 - B362

pub fn b363(&mut self) -> B363_W<'_>[src]

Bit 11 - B363

pub fn b364(&mut self) -> B364_W<'_>[src]

Bit 12 - B364

pub fn b365(&mut self) -> B365_W<'_>[src]

Bit 13 - B365

pub fn b366(&mut self) -> B366_W<'_>[src]

Bit 14 - B366

pub fn b367(&mut self) -> B367_W<'_>[src]

Bit 15 - B367

pub fn b368(&mut self) -> B368_W<'_>[src]

Bit 16 - B368

pub fn b369(&mut self) -> B369_W<'_>[src]

Bit 17 - B369

pub fn b370(&mut self) -> B370_W<'_>[src]

Bit 18 - B370

pub fn b371(&mut self) -> B371_W<'_>[src]

Bit 19 - B371

pub fn b372(&mut self) -> B372_W<'_>[src]

Bit 20 - B372

pub fn b373(&mut self) -> B373_W<'_>[src]

Bit 21 - B373

pub fn b374(&mut self) -> B374_W<'_>[src]

Bit 22 - B374

pub fn b375(&mut self) -> B375_W<'_>[src]

Bit 23 - B375

pub fn b376(&mut self) -> B376_W<'_>[src]

Bit 24 - B376

pub fn b377(&mut self) -> B377_W<'_>[src]

Bit 25 - B377

pub fn b378(&mut self) -> B378_W<'_>[src]

Bit 26 - B378

pub fn b379(&mut self) -> B379_W<'_>[src]

Bit 27 - B379

pub fn b380(&mut self) -> B380_W<'_>[src]

Bit 28 - B380

pub fn b381(&mut self) -> B381_W<'_>[src]

Bit 29 - B381

pub fn b382(&mut self) -> B382_W<'_>[src]

Bit 30 - B382

pub fn b383(&mut self) -> B383_W<'_>[src]

Bit 31 - B383

impl W<u32, Reg<u32, _MPCBB2_VCTR12>>[src]

pub fn b384(&mut self) -> B384_W<'_>[src]

Bit 0 - B384

pub fn b385(&mut self) -> B385_W<'_>[src]

Bit 1 - B385

pub fn b386(&mut self) -> B386_W<'_>[src]

Bit 2 - B386

pub fn b387(&mut self) -> B387_W<'_>[src]

Bit 3 - B387

pub fn b388(&mut self) -> B388_W<'_>[src]

Bit 4 - B388

pub fn b389(&mut self) -> B389_W<'_>[src]

Bit 5 - B389

pub fn b390(&mut self) -> B390_W<'_>[src]

Bit 6 - B390

pub fn b391(&mut self) -> B391_W<'_>[src]

Bit 7 - B391

pub fn b392(&mut self) -> B392_W<'_>[src]

Bit 8 - B392

pub fn b393(&mut self) -> B393_W<'_>[src]

Bit 9 - B393

pub fn b394(&mut self) -> B394_W<'_>[src]

Bit 10 - B394

pub fn b395(&mut self) -> B395_W<'_>[src]

Bit 11 - B395

pub fn b396(&mut self) -> B396_W<'_>[src]

Bit 12 - B396

pub fn b397(&mut self) -> B397_W<'_>[src]

Bit 13 - B397

pub fn b398(&mut self) -> B398_W<'_>[src]

Bit 14 - B398

pub fn b399(&mut self) -> B399_W<'_>[src]

Bit 15 - B399

pub fn b400(&mut self) -> B400_W<'_>[src]

Bit 16 - B400

pub fn b401(&mut self) -> B401_W<'_>[src]

Bit 17 - B401

pub fn b402(&mut self) -> B402_W<'_>[src]

Bit 18 - B402

pub fn b403(&mut self) -> B403_W<'_>[src]

Bit 19 - B403

pub fn b404(&mut self) -> B404_W<'_>[src]

Bit 20 - B404

pub fn b405(&mut self) -> B405_W<'_>[src]

Bit 21 - B405

pub fn b406(&mut self) -> B406_W<'_>[src]

Bit 22 - B406

pub fn b407(&mut self) -> B407_W<'_>[src]

Bit 23 - B407

pub fn b408(&mut self) -> B408_W<'_>[src]

Bit 24 - B408

pub fn b409(&mut self) -> B409_W<'_>[src]

Bit 25 - B409

pub fn b410(&mut self) -> B410_W<'_>[src]

Bit 26 - B410

pub fn b411(&mut self) -> B411_W<'_>[src]

Bit 27 - B411

pub fn b412(&mut self) -> B412_W<'_>[src]

Bit 28 - B412

pub fn b413(&mut self) -> B413_W<'_>[src]

Bit 29 - B413

pub fn b414(&mut self) -> B414_W<'_>[src]

Bit 30 - B414

pub fn b415(&mut self) -> B415_W<'_>[src]

Bit 31 - B415

impl W<u32, Reg<u32, _MPCBB2_VCTR13>>[src]

pub fn b416(&mut self) -> B416_W<'_>[src]

Bit 0 - B416

pub fn b417(&mut self) -> B417_W<'_>[src]

Bit 1 - B417

pub fn b418(&mut self) -> B418_W<'_>[src]

Bit 2 - B418

pub fn b419(&mut self) -> B419_W<'_>[src]

Bit 3 - B419

pub fn b420(&mut self) -> B420_W<'_>[src]

Bit 4 - B420

pub fn b421(&mut self) -> B421_W<'_>[src]

Bit 5 - B421

pub fn b422(&mut self) -> B422_W<'_>[src]

Bit 6 - B422

pub fn b423(&mut self) -> B423_W<'_>[src]

Bit 7 - B423

pub fn b424(&mut self) -> B424_W<'_>[src]

Bit 8 - B424

pub fn b425(&mut self) -> B425_W<'_>[src]

Bit 9 - B425

pub fn b426(&mut self) -> B426_W<'_>[src]

Bit 10 - B426

pub fn b427(&mut self) -> B427_W<'_>[src]

Bit 11 - B427

pub fn b428(&mut self) -> B428_W<'_>[src]

Bit 12 - B428

pub fn b429(&mut self) -> B429_W<'_>[src]

Bit 13 - B429

pub fn b430(&mut self) -> B430_W<'_>[src]

Bit 14 - B430

pub fn b431(&mut self) -> B431_W<'_>[src]

Bit 15 - B431

pub fn b432(&mut self) -> B432_W<'_>[src]

Bit 16 - B432

pub fn b433(&mut self) -> B433_W<'_>[src]

Bit 17 - B433

pub fn b434(&mut self) -> B434_W<'_>[src]

Bit 18 - B434

pub fn b435(&mut self) -> B435_W<'_>[src]

Bit 19 - B435

pub fn b436(&mut self) -> B436_W<'_>[src]

Bit 20 - B436

pub fn b437(&mut self) -> B437_W<'_>[src]

Bit 21 - B437

pub fn b438(&mut self) -> B438_W<'_>[src]

Bit 22 - B438

pub fn b439(&mut self) -> B439_W<'_>[src]

Bit 23 - B439

pub fn b440(&mut self) -> B440_W<'_>[src]

Bit 24 - B440

pub fn b441(&mut self) -> B441_W<'_>[src]

Bit 25 - B441

pub fn b442(&mut self) -> B442_W<'_>[src]

Bit 26 - B442

pub fn b443(&mut self) -> B443_W<'_>[src]

Bit 27 - B443

pub fn b444(&mut self) -> B444_W<'_>[src]

Bit 28 - B444

pub fn b445(&mut self) -> B445_W<'_>[src]

Bit 29 - B445

pub fn b446(&mut self) -> B446_W<'_>[src]

Bit 30 - B446

pub fn b447(&mut self) -> B447_W<'_>[src]

Bit 31 - B447

impl W<u32, Reg<u32, _MPCBB2_VCTR14>>[src]

pub fn b448(&mut self) -> B448_W<'_>[src]

Bit 0 - B448

pub fn b449(&mut self) -> B449_W<'_>[src]

Bit 1 - B449

pub fn b450(&mut self) -> B450_W<'_>[src]

Bit 2 - B450

pub fn b451(&mut self) -> B451_W<'_>[src]

Bit 3 - B451

pub fn b452(&mut self) -> B452_W<'_>[src]

Bit 4 - B452

pub fn b453(&mut self) -> B453_W<'_>[src]

Bit 5 - B453

pub fn b454(&mut self) -> B454_W<'_>[src]

Bit 6 - B454

pub fn b455(&mut self) -> B455_W<'_>[src]

Bit 7 - B455

pub fn b456(&mut self) -> B456_W<'_>[src]

Bit 8 - B456

pub fn b457(&mut self) -> B457_W<'_>[src]

Bit 9 - B457

pub fn b458(&mut self) -> B458_W<'_>[src]

Bit 10 - B458

pub fn b459(&mut self) -> B459_W<'_>[src]

Bit 11 - B459

pub fn b460(&mut self) -> B460_W<'_>[src]

Bit 12 - B460

pub fn b461(&mut self) -> B461_W<'_>[src]

Bit 13 - B461

pub fn b462(&mut self) -> B462_W<'_>[src]

Bit 14 - B462

pub fn b463(&mut self) -> B463_W<'_>[src]

Bit 15 - B463

pub fn b464(&mut self) -> B464_W<'_>[src]

Bit 16 - B464

pub fn b465(&mut self) -> B465_W<'_>[src]

Bit 17 - B465

pub fn b466(&mut self) -> B466_W<'_>[src]

Bit 18 - B466

pub fn b467(&mut self) -> B467_W<'_>[src]

Bit 19 - B467

pub fn b468(&mut self) -> B468_W<'_>[src]

Bit 20 - B468

pub fn b469(&mut self) -> B469_W<'_>[src]

Bit 21 - B469

pub fn b470(&mut self) -> B470_W<'_>[src]

Bit 22 - B470

pub fn b471(&mut self) -> B471_W<'_>[src]

Bit 23 - B471

pub fn b472(&mut self) -> B472_W<'_>[src]

Bit 24 - B472

pub fn b473(&mut self) -> B473_W<'_>[src]

Bit 25 - B473

pub fn b474(&mut self) -> B474_W<'_>[src]

Bit 26 - B474

pub fn b475(&mut self) -> B475_W<'_>[src]

Bit 27 - B475

pub fn b476(&mut self) -> B476_W<'_>[src]

Bit 28 - B476

pub fn b477(&mut self) -> B477_W<'_>[src]

Bit 29 - B477

pub fn b478(&mut self) -> B478_W<'_>[src]

Bit 30 - B478

pub fn b479(&mut self) -> B479_W<'_>[src]

Bit 31 - B479

impl W<u32, Reg<u32, _MPCBB2_VCTR15>>[src]

pub fn b480(&mut self) -> B480_W<'_>[src]

Bit 0 - B480

pub fn b481(&mut self) -> B481_W<'_>[src]

Bit 1 - B481

pub fn b482(&mut self) -> B482_W<'_>[src]

Bit 2 - B482

pub fn b483(&mut self) -> B483_W<'_>[src]

Bit 3 - B483

pub fn b484(&mut self) -> B484_W<'_>[src]

Bit 4 - B484

pub fn b485(&mut self) -> B485_W<'_>[src]

Bit 5 - B485

pub fn b486(&mut self) -> B486_W<'_>[src]

Bit 6 - B486

pub fn b487(&mut self) -> B487_W<'_>[src]

Bit 7 - B487

pub fn b488(&mut self) -> B488_W<'_>[src]

Bit 8 - B488

pub fn b489(&mut self) -> B489_W<'_>[src]

Bit 9 - B489

pub fn b490(&mut self) -> B490_W<'_>[src]

Bit 10 - B490

pub fn b491(&mut self) -> B491_W<'_>[src]

Bit 11 - B491

pub fn b492(&mut self) -> B492_W<'_>[src]

Bit 12 - B492

pub fn b493(&mut self) -> B493_W<'_>[src]

Bit 13 - B493

pub fn b494(&mut self) -> B494_W<'_>[src]

Bit 14 - B494

pub fn b495(&mut self) -> B495_W<'_>[src]

Bit 15 - B495

pub fn b496(&mut self) -> B496_W<'_>[src]

Bit 16 - B496

pub fn b497(&mut self) -> B497_W<'_>[src]

Bit 17 - B497

pub fn b498(&mut self) -> B498_W<'_>[src]

Bit 18 - B498

pub fn b499(&mut self) -> B499_W<'_>[src]

Bit 19 - B499

pub fn b500(&mut self) -> B500_W<'_>[src]

Bit 20 - B500

pub fn b501(&mut self) -> B501_W<'_>[src]

Bit 21 - B501

pub fn b502(&mut self) -> B502_W<'_>[src]

Bit 22 - B502

pub fn b503(&mut self) -> B503_W<'_>[src]

Bit 23 - B503

pub fn b504(&mut self) -> B504_W<'_>[src]

Bit 24 - B504

pub fn b505(&mut self) -> B505_W<'_>[src]

Bit 25 - B505

pub fn b506(&mut self) -> B506_W<'_>[src]

Bit 26 - B506

pub fn b507(&mut self) -> B507_W<'_>[src]

Bit 27 - B507

pub fn b508(&mut self) -> B508_W<'_>[src]

Bit 28 - B508

pub fn b509(&mut self) -> B509_W<'_>[src]

Bit 29 - B509

pub fn b510(&mut self) -> B510_W<'_>[src]

Bit 30 - B510

pub fn b511(&mut self) -> B511_W<'_>[src]

Bit 31 - B511

impl W<u32, Reg<u32, _MPCBB2_VCTR16>>[src]

pub fn b512(&mut self) -> B512_W<'_>[src]

Bit 0 - B512

pub fn b513(&mut self) -> B513_W<'_>[src]

Bit 1 - B513

pub fn b514(&mut self) -> B514_W<'_>[src]

Bit 2 - B514

pub fn b515(&mut self) -> B515_W<'_>[src]

Bit 3 - B515

pub fn b516(&mut self) -> B516_W<'_>[src]

Bit 4 - B516

pub fn b517(&mut self) -> B517_W<'_>[src]

Bit 5 - B517

pub fn b518(&mut self) -> B518_W<'_>[src]

Bit 6 - B518

pub fn b519(&mut self) -> B519_W<'_>[src]

Bit 7 - B519

pub fn b520(&mut self) -> B520_W<'_>[src]

Bit 8 - B520

pub fn b521(&mut self) -> B521_W<'_>[src]

Bit 9 - B521

pub fn b522(&mut self) -> B522_W<'_>[src]

Bit 10 - B522

pub fn b523(&mut self) -> B523_W<'_>[src]

Bit 11 - B523

pub fn b524(&mut self) -> B524_W<'_>[src]

Bit 12 - B524

pub fn b525(&mut self) -> B525_W<'_>[src]

Bit 13 - B525

pub fn b526(&mut self) -> B526_W<'_>[src]

Bit 14 - B526

pub fn b527(&mut self) -> B527_W<'_>[src]

Bit 15 - B527

pub fn b528(&mut self) -> B528_W<'_>[src]

Bit 16 - B528

pub fn b529(&mut self) -> B529_W<'_>[src]

Bit 17 - B529

pub fn b530(&mut self) -> B530_W<'_>[src]

Bit 18 - B530

pub fn b531(&mut self) -> B531_W<'_>[src]

Bit 19 - B531

pub fn b532(&mut self) -> B532_W<'_>[src]

Bit 20 - B532

pub fn b533(&mut self) -> B533_W<'_>[src]

Bit 21 - B533

pub fn b534(&mut self) -> B534_W<'_>[src]

Bit 22 - B534

pub fn b535(&mut self) -> B535_W<'_>[src]

Bit 23 - B535

pub fn b536(&mut self) -> B536_W<'_>[src]

Bit 24 - B536

pub fn b537(&mut self) -> B537_W<'_>[src]

Bit 25 - B537

pub fn b538(&mut self) -> B538_W<'_>[src]

Bit 26 - B538

pub fn b539(&mut self) -> B539_W<'_>[src]

Bit 27 - B539

pub fn b540(&mut self) -> B540_W<'_>[src]

Bit 28 - B540

pub fn b541(&mut self) -> B541_W<'_>[src]

Bit 29 - B541

pub fn b542(&mut self) -> B542_W<'_>[src]

Bit 30 - B542

pub fn b543(&mut self) -> B543_W<'_>[src]

Bit 31 - B543

impl W<u32, Reg<u32, _MPCBB2_VCTR17>>[src]

pub fn b544(&mut self) -> B544_W<'_>[src]

Bit 0 - B544

pub fn b545(&mut self) -> B545_W<'_>[src]

Bit 1 - B545

pub fn b546(&mut self) -> B546_W<'_>[src]

Bit 2 - B546

pub fn b547(&mut self) -> B547_W<'_>[src]

Bit 3 - B547

pub fn b548(&mut self) -> B548_W<'_>[src]

Bit 4 - B548

pub fn b549(&mut self) -> B549_W<'_>[src]

Bit 5 - B549

pub fn b550(&mut self) -> B550_W<'_>[src]

Bit 6 - B550

pub fn b551(&mut self) -> B551_W<'_>[src]

Bit 7 - B551

pub fn b552(&mut self) -> B552_W<'_>[src]

Bit 8 - B552

pub fn b553(&mut self) -> B553_W<'_>[src]

Bit 9 - B553

pub fn b554(&mut self) -> B554_W<'_>[src]

Bit 10 - B554

pub fn b555(&mut self) -> B555_W<'_>[src]

Bit 11 - B555

pub fn b556(&mut self) -> B556_W<'_>[src]

Bit 12 - B556

pub fn b557(&mut self) -> B557_W<'_>[src]

Bit 13 - B557

pub fn b558(&mut self) -> B558_W<'_>[src]

Bit 14 - B558

pub fn b559(&mut self) -> B559_W<'_>[src]

Bit 15 - B559

pub fn b560(&mut self) -> B560_W<'_>[src]

Bit 16 - B560

pub fn b561(&mut self) -> B561_W<'_>[src]

Bit 17 - B561

pub fn b562(&mut self) -> B562_W<'_>[src]

Bit 18 - B562

pub fn b563(&mut self) -> B563_W<'_>[src]

Bit 19 - B563

pub fn b564(&mut self) -> B564_W<'_>[src]

Bit 20 - B564

pub fn b565(&mut self) -> B565_W<'_>[src]

Bit 21 - B565

pub fn b566(&mut self) -> B566_W<'_>[src]

Bit 22 - B566

pub fn b567(&mut self) -> B567_W<'_>[src]

Bit 23 - B567

pub fn b568(&mut self) -> B568_W<'_>[src]

Bit 24 - B568

pub fn b569(&mut self) -> B569_W<'_>[src]

Bit 25 - B569

pub fn b570(&mut self) -> B570_W<'_>[src]

Bit 26 - B570

pub fn b571(&mut self) -> B571_W<'_>[src]

Bit 27 - B571

pub fn b572(&mut self) -> B572_W<'_>[src]

Bit 28 - B572

pub fn b573(&mut self) -> B573_W<'_>[src]

Bit 29 - B573

pub fn b574(&mut self) -> B574_W<'_>[src]

Bit 30 - B574

pub fn b575(&mut self) -> B575_W<'_>[src]

Bit 31 - B575

impl W<u32, Reg<u32, _MPCBB2_VCTR18>>[src]

pub fn b576(&mut self) -> B576_W<'_>[src]

Bit 0 - B576

pub fn b577(&mut self) -> B577_W<'_>[src]

Bit 1 - B577

pub fn b578(&mut self) -> B578_W<'_>[src]

Bit 2 - B578

pub fn b579(&mut self) -> B579_W<'_>[src]

Bit 3 - B579

pub fn b580(&mut self) -> B580_W<'_>[src]

Bit 4 - B580

pub fn b581(&mut self) -> B581_W<'_>[src]

Bit 5 - B581

pub fn b582(&mut self) -> B582_W<'_>[src]

Bit 6 - B582

pub fn b583(&mut self) -> B583_W<'_>[src]

Bit 7 - B583

pub fn b584(&mut self) -> B584_W<'_>[src]

Bit 8 - B584

pub fn b585(&mut self) -> B585_W<'_>[src]

Bit 9 - B585

pub fn b586(&mut self) -> B586_W<'_>[src]

Bit 10 - B586

pub fn b587(&mut self) -> B587_W<'_>[src]

Bit 11 - B587

pub fn b588(&mut self) -> B588_W<'_>[src]

Bit 12 - B588

pub fn b589(&mut self) -> B589_W<'_>[src]

Bit 13 - B589

pub fn b590(&mut self) -> B590_W<'_>[src]

Bit 14 - B590

pub fn b591(&mut self) -> B591_W<'_>[src]

Bit 15 - B591

pub fn b592(&mut self) -> B592_W<'_>[src]

Bit 16 - B592

pub fn b593(&mut self) -> B593_W<'_>[src]

Bit 17 - B593

pub fn b594(&mut self) -> B594_W<'_>[src]

Bit 18 - B594

pub fn b595(&mut self) -> B595_W<'_>[src]

Bit 19 - B595

pub fn b596(&mut self) -> B596_W<'_>[src]

Bit 20 - B596

pub fn b597(&mut self) -> B597_W<'_>[src]

Bit 21 - B597

pub fn b598(&mut self) -> B598_W<'_>[src]

Bit 22 - B598

pub fn b599(&mut self) -> B599_W<'_>[src]

Bit 23 - B599

pub fn b600(&mut self) -> B600_W<'_>[src]

Bit 24 - B600

pub fn b601(&mut self) -> B601_W<'_>[src]

Bit 25 - B601

pub fn b602(&mut self) -> B602_W<'_>[src]

Bit 26 - B602

pub fn b603(&mut self) -> B603_W<'_>[src]

Bit 27 - B603

pub fn b604(&mut self) -> B604_W<'_>[src]

Bit 28 - B604

pub fn b605(&mut self) -> B605_W<'_>[src]

Bit 29 - B605

pub fn b606(&mut self) -> B606_W<'_>[src]

Bit 30 - B606

pub fn b607(&mut self) -> B607_W<'_>[src]

Bit 31 - B607

impl W<u32, Reg<u32, _MPCBB2_VCTR19>>[src]

pub fn b608(&mut self) -> B608_W<'_>[src]

Bit 0 - B608

pub fn b609(&mut self) -> B609_W<'_>[src]

Bit 1 - B609

pub fn b610(&mut self) -> B610_W<'_>[src]

Bit 2 - B610

pub fn b611(&mut self) -> B611_W<'_>[src]

Bit 3 - B611

pub fn b612(&mut self) -> B612_W<'_>[src]

Bit 4 - B612

pub fn b613(&mut self) -> B613_W<'_>[src]

Bit 5 - B613

pub fn b614(&mut self) -> B614_W<'_>[src]

Bit 6 - B614

pub fn b615(&mut self) -> B615_W<'_>[src]

Bit 7 - B615

pub fn b616(&mut self) -> B616_W<'_>[src]

Bit 8 - B616

pub fn b617(&mut self) -> B617_W<'_>[src]

Bit 9 - B617

pub fn b618(&mut self) -> B618_W<'_>[src]

Bit 10 - B618

pub fn b619(&mut self) -> B619_W<'_>[src]

Bit 11 - B619

pub fn b620(&mut self) -> B620_W<'_>[src]

Bit 12 - B620

pub fn b621(&mut self) -> B621_W<'_>[src]

Bit 13 - B621

pub fn b622(&mut self) -> B622_W<'_>[src]

Bit 14 - B622

pub fn b623(&mut self) -> B623_W<'_>[src]

Bit 15 - B623

pub fn b624(&mut self) -> B624_W<'_>[src]

Bit 16 - B624

pub fn b625(&mut self) -> B625_W<'_>[src]

Bit 17 - B625

pub fn b626(&mut self) -> B626_W<'_>[src]

Bit 18 - B626

pub fn b627(&mut self) -> B627_W<'_>[src]

Bit 19 - B627

pub fn b628(&mut self) -> B628_W<'_>[src]

Bit 20 - B628

pub fn b629(&mut self) -> B629_W<'_>[src]

Bit 21 - B629

pub fn b630(&mut self) -> B630_W<'_>[src]

Bit 22 - B630

pub fn b631(&mut self) -> B631_W<'_>[src]

Bit 23 - B631

pub fn b632(&mut self) -> B632_W<'_>[src]

Bit 24 - B632

pub fn b633(&mut self) -> B633_W<'_>[src]

Bit 25 - B633

pub fn b634(&mut self) -> B634_W<'_>[src]

Bit 26 - B634

pub fn b635(&mut self) -> B635_W<'_>[src]

Bit 27 - B635

pub fn b636(&mut self) -> B636_W<'_>[src]

Bit 28 - B636

pub fn b637(&mut self) -> B637_W<'_>[src]

Bit 29 - B637

pub fn b638(&mut self) -> B638_W<'_>[src]

Bit 30 - B638

pub fn b639(&mut self) -> B639_W<'_>[src]

Bit 31 - B639

impl W<u32, Reg<u32, _MPCBB2_VCTR20>>[src]

pub fn b640(&mut self) -> B640_W<'_>[src]

Bit 0 - B640

pub fn b641(&mut self) -> B641_W<'_>[src]

Bit 1 - B641

pub fn b642(&mut self) -> B642_W<'_>[src]

Bit 2 - B642

pub fn b643(&mut self) -> B643_W<'_>[src]

Bit 3 - B643

pub fn b644(&mut self) -> B644_W<'_>[src]

Bit 4 - B644

pub fn b645(&mut self) -> B645_W<'_>[src]

Bit 5 - B645

pub fn b646(&mut self) -> B646_W<'_>[src]

Bit 6 - B646

pub fn b647(&mut self) -> B647_W<'_>[src]

Bit 7 - B647

pub fn b648(&mut self) -> B648_W<'_>[src]

Bit 8 - B648

pub fn b649(&mut self) -> B649_W<'_>[src]

Bit 9 - B649

pub fn b650(&mut self) -> B650_W<'_>[src]

Bit 10 - B650

pub fn b651(&mut self) -> B651_W<'_>[src]

Bit 11 - B651

pub fn b652(&mut self) -> B652_W<'_>[src]

Bit 12 - B652

pub fn b653(&mut self) -> B653_W<'_>[src]

Bit 13 - B653

pub fn b654(&mut self) -> B654_W<'_>[src]

Bit 14 - B654

pub fn b655(&mut self) -> B655_W<'_>[src]

Bit 15 - B655

pub fn b656(&mut self) -> B656_W<'_>[src]

Bit 16 - B656

pub fn b657(&mut self) -> B657_W<'_>[src]

Bit 17 - B657

pub fn b658(&mut self) -> B658_W<'_>[src]

Bit 18 - B658

pub fn b659(&mut self) -> B659_W<'_>[src]

Bit 19 - B659

pub fn b660(&mut self) -> B660_W<'_>[src]

Bit 20 - B660

pub fn b661(&mut self) -> B661_W<'_>[src]

Bit 21 - B661

pub fn b662(&mut self) -> B662_W<'_>[src]

Bit 22 - B662

pub fn b663(&mut self) -> B663_W<'_>[src]

Bit 23 - B663

pub fn b664(&mut self) -> B664_W<'_>[src]

Bit 24 - B664

pub fn b665(&mut self) -> B665_W<'_>[src]

Bit 25 - B665

pub fn b666(&mut self) -> B666_W<'_>[src]

Bit 26 - B666

pub fn b667(&mut self) -> B667_W<'_>[src]

Bit 27 - B667

pub fn b668(&mut self) -> B668_W<'_>[src]

Bit 28 - B668

pub fn b669(&mut self) -> B669_W<'_>[src]

Bit 29 - B669

pub fn b670(&mut self) -> B670_W<'_>[src]

Bit 30 - B670

pub fn b671(&mut self) -> B671_W<'_>[src]

Bit 31 - B671

impl W<u32, Reg<u32, _MPCBB2_VCTR21>>[src]

pub fn b672(&mut self) -> B672_W<'_>[src]

Bit 0 - B672

pub fn b673(&mut self) -> B673_W<'_>[src]

Bit 1 - B673

pub fn b674(&mut self) -> B674_W<'_>[src]

Bit 2 - B674

pub fn b675(&mut self) -> B675_W<'_>[src]

Bit 3 - B675

pub fn b676(&mut self) -> B676_W<'_>[src]

Bit 4 - B676

pub fn b677(&mut self) -> B677_W<'_>[src]

Bit 5 - B677

pub fn b678(&mut self) -> B678_W<'_>[src]

Bit 6 - B678

pub fn b679(&mut self) -> B679_W<'_>[src]

Bit 7 - B679

pub fn b680(&mut self) -> B680_W<'_>[src]

Bit 8 - B680

pub fn b681(&mut self) -> B681_W<'_>[src]

Bit 9 - B681

pub fn b682(&mut self) -> B682_W<'_>[src]

Bit 10 - B682

pub fn b683(&mut self) -> B683_W<'_>[src]

Bit 11 - B683

pub fn b684(&mut self) -> B684_W<'_>[src]

Bit 12 - B684

pub fn b685(&mut self) -> B685_W<'_>[src]

Bit 13 - B685

pub fn b686(&mut self) -> B686_W<'_>[src]

Bit 14 - B686

pub fn b687(&mut self) -> B687_W<'_>[src]

Bit 15 - B687

pub fn b688(&mut self) -> B688_W<'_>[src]

Bit 16 - B688

pub fn b689(&mut self) -> B689_W<'_>[src]

Bit 17 - B689

pub fn b690(&mut self) -> B690_W<'_>[src]

Bit 18 - B690

pub fn b691(&mut self) -> B691_W<'_>[src]

Bit 19 - B691

pub fn b692(&mut self) -> B692_W<'_>[src]

Bit 20 - B692

pub fn b693(&mut self) -> B693_W<'_>[src]

Bit 21 - B693

pub fn b694(&mut self) -> B694_W<'_>[src]

Bit 22 - B694

pub fn b695(&mut self) -> B695_W<'_>[src]

Bit 23 - B695

pub fn b696(&mut self) -> B696_W<'_>[src]

Bit 24 - B696

pub fn b697(&mut self) -> B697_W<'_>[src]

Bit 25 - B697

pub fn b698(&mut self) -> B698_W<'_>[src]

Bit 26 - B698

pub fn b699(&mut self) -> B699_W<'_>[src]

Bit 27 - B699

pub fn b700(&mut self) -> B700_W<'_>[src]

Bit 28 - B700

pub fn b701(&mut self) -> B701_W<'_>[src]

Bit 29 - B701

pub fn b702(&mut self) -> B702_W<'_>[src]

Bit 30 - B702

pub fn b703(&mut self) -> B703_W<'_>[src]

Bit 31 - B703

impl W<u32, Reg<u32, _MPCBB2_VCTR22>>[src]

pub fn b704(&mut self) -> B704_W<'_>[src]

Bit 0 - B704

pub fn b705(&mut self) -> B705_W<'_>[src]

Bit 1 - B705

pub fn b706(&mut self) -> B706_W<'_>[src]

Bit 2 - B706

pub fn b707(&mut self) -> B707_W<'_>[src]

Bit 3 - B707

pub fn b708(&mut self) -> B708_W<'_>[src]

Bit 4 - B708

pub fn b709(&mut self) -> B709_W<'_>[src]

Bit 5 - B709

pub fn b710(&mut self) -> B710_W<'_>[src]

Bit 6 - B710

pub fn b711(&mut self) -> B711_W<'_>[src]

Bit 7 - B711

pub fn b712(&mut self) -> B712_W<'_>[src]

Bit 8 - B712

pub fn b713(&mut self) -> B713_W<'_>[src]

Bit 9 - B713

pub fn b714(&mut self) -> B714_W<'_>[src]

Bit 10 - B714

pub fn b715(&mut self) -> B715_W<'_>[src]

Bit 11 - B715

pub fn b716(&mut self) -> B716_W<'_>[src]

Bit 12 - B716

pub fn b717(&mut self) -> B717_W<'_>[src]

Bit 13 - B717

pub fn b718(&mut self) -> B718_W<'_>[src]

Bit 14 - B718

pub fn b719(&mut self) -> B719_W<'_>[src]

Bit 15 - B719

pub fn b720(&mut self) -> B720_W<'_>[src]

Bit 16 - B720

pub fn b721(&mut self) -> B721_W<'_>[src]

Bit 17 - B721

pub fn b722(&mut self) -> B722_W<'_>[src]

Bit 18 - B722

pub fn b723(&mut self) -> B723_W<'_>[src]

Bit 19 - B723

pub fn b724(&mut self) -> B724_W<'_>[src]

Bit 20 - B724

pub fn b725(&mut self) -> B725_W<'_>[src]

Bit 21 - B725

pub fn b726(&mut self) -> B726_W<'_>[src]

Bit 22 - B726

pub fn b727(&mut self) -> B727_W<'_>[src]

Bit 23 - B727

pub fn b728(&mut self) -> B728_W<'_>[src]

Bit 24 - B728

pub fn b729(&mut self) -> B729_W<'_>[src]

Bit 25 - B729

pub fn b730(&mut self) -> B730_W<'_>[src]

Bit 26 - B730

pub fn b731(&mut self) -> B731_W<'_>[src]

Bit 27 - B731

pub fn b732(&mut self) -> B732_W<'_>[src]

Bit 28 - B732

pub fn b733(&mut self) -> B733_W<'_>[src]

Bit 29 - B733

pub fn b734(&mut self) -> B734_W<'_>[src]

Bit 30 - B734

pub fn b735(&mut self) -> B735_W<'_>[src]

Bit 31 - B735

impl W<u32, Reg<u32, _MPCBB2_VCTR23>>[src]

pub fn b736(&mut self) -> B736_W<'_>[src]

Bit 0 - B736

pub fn b737(&mut self) -> B737_W<'_>[src]

Bit 1 - B737

pub fn b738(&mut self) -> B738_W<'_>[src]

Bit 2 - B738

pub fn b739(&mut self) -> B739_W<'_>[src]

Bit 3 - B739

pub fn b740(&mut self) -> B740_W<'_>[src]

Bit 4 - B740

pub fn b741(&mut self) -> B741_W<'_>[src]

Bit 5 - B741

pub fn b742(&mut self) -> B742_W<'_>[src]

Bit 6 - B742

pub fn b743(&mut self) -> B743_W<'_>[src]

Bit 7 - B743

pub fn b744(&mut self) -> B744_W<'_>[src]

Bit 8 - B744

pub fn b745(&mut self) -> B745_W<'_>[src]

Bit 9 - B745

pub fn b746(&mut self) -> B746_W<'_>[src]

Bit 10 - B746

pub fn b747(&mut self) -> B747_W<'_>[src]

Bit 11 - B747

pub fn b748(&mut self) -> B748_W<'_>[src]

Bit 12 - B748

pub fn b749(&mut self) -> B749_W<'_>[src]

Bit 13 - B749

pub fn b750(&mut self) -> B750_W<'_>[src]

Bit 14 - B750

pub fn b751(&mut self) -> B751_W<'_>[src]

Bit 15 - B751

pub fn b752(&mut self) -> B752_W<'_>[src]

Bit 16 - B752

pub fn b753(&mut self) -> B753_W<'_>[src]

Bit 17 - B753

pub fn b754(&mut self) -> B754_W<'_>[src]

Bit 18 - B754

pub fn b755(&mut self) -> B755_W<'_>[src]

Bit 19 - B755

pub fn b756(&mut self) -> B756_W<'_>[src]

Bit 20 - B756

pub fn b757(&mut self) -> B757_W<'_>[src]

Bit 21 - B757

pub fn b758(&mut self) -> B758_W<'_>[src]

Bit 22 - B758

pub fn b759(&mut self) -> B759_W<'_>[src]

Bit 23 - B759

pub fn b760(&mut self) -> B760_W<'_>[src]

Bit 24 - B760

pub fn b761(&mut self) -> B761_W<'_>[src]

Bit 25 - B761

pub fn b762(&mut self) -> B762_W<'_>[src]

Bit 26 - B762

pub fn b763(&mut self) -> B763_W<'_>[src]

Bit 27 - B763

pub fn b764(&mut self) -> B764_W<'_>[src]

Bit 28 - B764

pub fn b765(&mut self) -> B765_W<'_>[src]

Bit 29 - B765

pub fn b766(&mut self) -> B766_W<'_>[src]

Bit 30 - B766

pub fn b767(&mut self) -> B767_W<'_>[src]

Bit 31 - B767

impl W<u32, Reg<u32, _MPCBB2_VCTR24>>[src]

pub fn b768(&mut self) -> B768_W<'_>[src]

Bit 0 - B768

pub fn b769(&mut self) -> B769_W<'_>[src]

Bit 1 - B769

pub fn b770(&mut self) -> B770_W<'_>[src]

Bit 2 - B770

pub fn b771(&mut self) -> B771_W<'_>[src]

Bit 3 - B771

pub fn b772(&mut self) -> B772_W<'_>[src]

Bit 4 - B772

pub fn b773(&mut self) -> B773_W<'_>[src]

Bit 5 - B773

pub fn b774(&mut self) -> B774_W<'_>[src]

Bit 6 - B774

pub fn b775(&mut self) -> B775_W<'_>[src]

Bit 7 - B775

pub fn b776(&mut self) -> B776_W<'_>[src]

Bit 8 - B776

pub fn b777(&mut self) -> B777_W<'_>[src]

Bit 9 - B777

pub fn b778(&mut self) -> B778_W<'_>[src]

Bit 10 - B778

pub fn b779(&mut self) -> B779_W<'_>[src]

Bit 11 - B779

pub fn b780(&mut self) -> B780_W<'_>[src]

Bit 12 - B780

pub fn b781(&mut self) -> B781_W<'_>[src]

Bit 13 - B781

pub fn b782(&mut self) -> B782_W<'_>[src]

Bit 14 - B782

pub fn b783(&mut self) -> B783_W<'_>[src]

Bit 15 - B783

pub fn b784(&mut self) -> B784_W<'_>[src]

Bit 16 - B784

pub fn b785(&mut self) -> B785_W<'_>[src]

Bit 17 - B785

pub fn b786(&mut self) -> B786_W<'_>[src]

Bit 18 - B786

pub fn b787(&mut self) -> B787_W<'_>[src]

Bit 19 - B787

pub fn b788(&mut self) -> B788_W<'_>[src]

Bit 20 - B788

pub fn b789(&mut self) -> B789_W<'_>[src]

Bit 21 - B789

pub fn b790(&mut self) -> B790_W<'_>[src]

Bit 22 - B790

pub fn b791(&mut self) -> B791_W<'_>[src]

Bit 23 - B791

pub fn b792(&mut self) -> B792_W<'_>[src]

Bit 24 - B792

pub fn b793(&mut self) -> B793_W<'_>[src]

Bit 25 - B793

pub fn b794(&mut self) -> B794_W<'_>[src]

Bit 26 - B794

pub fn b795(&mut self) -> B795_W<'_>[src]

Bit 27 - B795

pub fn b796(&mut self) -> B796_W<'_>[src]

Bit 28 - B796

pub fn b797(&mut self) -> B797_W<'_>[src]

Bit 29 - B797

pub fn b798(&mut self) -> B798_W<'_>[src]

Bit 30 - B798

pub fn b799(&mut self) -> B799_W<'_>[src]

Bit 31 - B799

impl W<u32, Reg<u32, _MPCBB2_VCTR25>>[src]

pub fn b800(&mut self) -> B800_W<'_>[src]

Bit 0 - B800

pub fn b801(&mut self) -> B801_W<'_>[src]

Bit 1 - B801

pub fn b802(&mut self) -> B802_W<'_>[src]

Bit 2 - B802

pub fn b803(&mut self) -> B803_W<'_>[src]

Bit 3 - B803

pub fn b804(&mut self) -> B804_W<'_>[src]

Bit 4 - B804

pub fn b805(&mut self) -> B805_W<'_>[src]

Bit 5 - B805

pub fn b806(&mut self) -> B806_W<'_>[src]

Bit 6 - B806

pub fn b807(&mut self) -> B807_W<'_>[src]

Bit 7 - B807

pub fn b808(&mut self) -> B808_W<'_>[src]

Bit 8 - B808

pub fn b809(&mut self) -> B809_W<'_>[src]

Bit 9 - B809

pub fn b810(&mut self) -> B810_W<'_>[src]

Bit 10 - B810

pub fn b811(&mut self) -> B811_W<'_>[src]

Bit 11 - B811

pub fn b812(&mut self) -> B812_W<'_>[src]

Bit 12 - B812

pub fn b813(&mut self) -> B813_W<'_>[src]

Bit 13 - B813

pub fn b814(&mut self) -> B814_W<'_>[src]

Bit 14 - B814

pub fn b815(&mut self) -> B815_W<'_>[src]

Bit 15 - B815

pub fn b816(&mut self) -> B816_W<'_>[src]

Bit 16 - B816

pub fn b817(&mut self) -> B817_W<'_>[src]

Bit 17 - B817

pub fn b818(&mut self) -> B818_W<'_>[src]

Bit 18 - B818

pub fn b819(&mut self) -> B819_W<'_>[src]

Bit 19 - B819

pub fn b820(&mut self) -> B820_W<'_>[src]

Bit 20 - B820

pub fn b821(&mut self) -> B821_W<'_>[src]

Bit 21 - B821

pub fn b822(&mut self) -> B822_W<'_>[src]

Bit 22 - B822

pub fn b823(&mut self) -> B823_W<'_>[src]

Bit 23 - B823

pub fn b824(&mut self) -> B824_W<'_>[src]

Bit 24 - B824

pub fn b825(&mut self) -> B825_W<'_>[src]

Bit 25 - B825

pub fn b826(&mut self) -> B826_W<'_>[src]

Bit 26 - B826

pub fn b827(&mut self) -> B827_W<'_>[src]

Bit 27 - B827

pub fn b828(&mut self) -> B828_W<'_>[src]

Bit 28 - B828

pub fn b829(&mut self) -> B829_W<'_>[src]

Bit 29 - B829

pub fn b830(&mut self) -> B830_W<'_>[src]

Bit 30 - B830

pub fn b831(&mut self) -> B831_W<'_>[src]

Bit 31 - B831

impl W<u32, Reg<u32, _MPCBB2_VCTR26>>[src]

pub fn b832(&mut self) -> B832_W<'_>[src]

Bit 0 - B832

pub fn b833(&mut self) -> B833_W<'_>[src]

Bit 1 - B833

pub fn b834(&mut self) -> B834_W<'_>[src]

Bit 2 - B834

pub fn b835(&mut self) -> B835_W<'_>[src]

Bit 3 - B835

pub fn b836(&mut self) -> B836_W<'_>[src]

Bit 4 - B836

pub fn b837(&mut self) -> B837_W<'_>[src]

Bit 5 - B837

pub fn b838(&mut self) -> B838_W<'_>[src]

Bit 6 - B838

pub fn b839(&mut self) -> B839_W<'_>[src]

Bit 7 - B839

pub fn b840(&mut self) -> B840_W<'_>[src]

Bit 8 - B840

pub fn b841(&mut self) -> B841_W<'_>[src]

Bit 9 - B841

pub fn b842(&mut self) -> B842_W<'_>[src]

Bit 10 - B842

pub fn b843(&mut self) -> B843_W<'_>[src]

Bit 11 - B843

pub fn b844(&mut self) -> B844_W<'_>[src]

Bit 12 - B844

pub fn b845(&mut self) -> B845_W<'_>[src]

Bit 13 - B845

pub fn b846(&mut self) -> B846_W<'_>[src]

Bit 14 - B846

pub fn b847(&mut self) -> B847_W<'_>[src]

Bit 15 - B847

pub fn b848(&mut self) -> B848_W<'_>[src]

Bit 16 - B848

pub fn b849(&mut self) -> B849_W<'_>[src]

Bit 17 - B849

pub fn b850(&mut self) -> B850_W<'_>[src]

Bit 18 - B850

pub fn b851(&mut self) -> B851_W<'_>[src]

Bit 19 - B851

pub fn b852(&mut self) -> B852_W<'_>[src]

Bit 20 - B852

pub fn b853(&mut self) -> B853_W<'_>[src]

Bit 21 - B853

pub fn b854(&mut self) -> B854_W<'_>[src]

Bit 22 - B854

pub fn b855(&mut self) -> B855_W<'_>[src]

Bit 23 - B855

pub fn b856(&mut self) -> B856_W<'_>[src]

Bit 24 - B856

pub fn b857(&mut self) -> B857_W<'_>[src]

Bit 25 - B857

pub fn b858(&mut self) -> B858_W<'_>[src]

Bit 26 - B858

pub fn b859(&mut self) -> B859_W<'_>[src]

Bit 27 - B859

pub fn b860(&mut self) -> B860_W<'_>[src]

Bit 28 - B860

pub fn b861(&mut self) -> B861_W<'_>[src]

Bit 29 - B861

pub fn b862(&mut self) -> B862_W<'_>[src]

Bit 30 - B862

pub fn b863(&mut self) -> B863_W<'_>[src]

Bit 31 - B863

impl W<u32, Reg<u32, _MPCBB2_VCTR27>>[src]

pub fn b864(&mut self) -> B864_W<'_>[src]

Bit 0 - B864

pub fn b865(&mut self) -> B865_W<'_>[src]

Bit 1 - B865

pub fn b866(&mut self) -> B866_W<'_>[src]

Bit 2 - B866

pub fn b867(&mut self) -> B867_W<'_>[src]

Bit 3 - B867

pub fn b868(&mut self) -> B868_W<'_>[src]

Bit 4 - B868

pub fn b869(&mut self) -> B869_W<'_>[src]

Bit 5 - B869

pub fn b870(&mut self) -> B870_W<'_>[src]

Bit 6 - B870

pub fn b871(&mut self) -> B871_W<'_>[src]

Bit 7 - B871

pub fn b872(&mut self) -> B872_W<'_>[src]

Bit 8 - B872

pub fn b873(&mut self) -> B873_W<'_>[src]

Bit 9 - B873

pub fn b874(&mut self) -> B874_W<'_>[src]

Bit 10 - B874

pub fn b875(&mut self) -> B875_W<'_>[src]

Bit 11 - B875

pub fn b876(&mut self) -> B876_W<'_>[src]

Bit 12 - B876

pub fn b877(&mut self) -> B877_W<'_>[src]

Bit 13 - B877

pub fn b878(&mut self) -> B878_W<'_>[src]

Bit 14 - B878

pub fn b879(&mut self) -> B879_W<'_>[src]

Bit 15 - B879

pub fn b880(&mut self) -> B880_W<'_>[src]

Bit 16 - B880

pub fn b881(&mut self) -> B881_W<'_>[src]

Bit 17 - B881

pub fn b882(&mut self) -> B882_W<'_>[src]

Bit 18 - B882

pub fn b883(&mut self) -> B883_W<'_>[src]

Bit 19 - B883

pub fn b884(&mut self) -> B884_W<'_>[src]

Bit 20 - B884

pub fn b885(&mut self) -> B885_W<'_>[src]

Bit 21 - B885

pub fn b886(&mut self) -> B886_W<'_>[src]

Bit 22 - B886

pub fn b887(&mut self) -> B887_W<'_>[src]

Bit 23 - B887

pub fn b888(&mut self) -> B888_W<'_>[src]

Bit 24 - B888

pub fn b889(&mut self) -> B889_W<'_>[src]

Bit 25 - B889

pub fn b890(&mut self) -> B890_W<'_>[src]

Bit 26 - B890

pub fn b891(&mut self) -> B891_W<'_>[src]

Bit 27 - B891

pub fn b892(&mut self) -> B892_W<'_>[src]

Bit 28 - B892

pub fn b893(&mut self) -> B893_W<'_>[src]

Bit 29 - B893

pub fn b894(&mut self) -> B894_W<'_>[src]

Bit 30 - B894

pub fn b895(&mut self) -> B895_W<'_>[src]

Bit 31 - B895

impl W<u32, Reg<u32, _MPCBB2_VCTR28>>[src]

pub fn b896(&mut self) -> B896_W<'_>[src]

Bit 0 - B896

pub fn b897(&mut self) -> B897_W<'_>[src]

Bit 1 - B897

pub fn b898(&mut self) -> B898_W<'_>[src]

Bit 2 - B898

pub fn b899(&mut self) -> B899_W<'_>[src]

Bit 3 - B899

pub fn b900(&mut self) -> B900_W<'_>[src]

Bit 4 - B900

pub fn b901(&mut self) -> B901_W<'_>[src]

Bit 5 - B901

pub fn b902(&mut self) -> B902_W<'_>[src]

Bit 6 - B902

pub fn b903(&mut self) -> B903_W<'_>[src]

Bit 7 - B903

pub fn b904(&mut self) -> B904_W<'_>[src]

Bit 8 - B904

pub fn b905(&mut self) -> B905_W<'_>[src]

Bit 9 - B905

pub fn b906(&mut self) -> B906_W<'_>[src]

Bit 10 - B906

pub fn b907(&mut self) -> B907_W<'_>[src]

Bit 11 - B907

pub fn b908(&mut self) -> B908_W<'_>[src]

Bit 12 - B908

pub fn b909(&mut self) -> B909_W<'_>[src]

Bit 13 - B909

pub fn b910(&mut self) -> B910_W<'_>[src]

Bit 14 - B910

pub fn b911(&mut self) -> B911_W<'_>[src]

Bit 15 - B911

pub fn b912(&mut self) -> B912_W<'_>[src]

Bit 16 - B912

pub fn b913(&mut self) -> B913_W<'_>[src]

Bit 17 - B913

pub fn b914(&mut self) -> B914_W<'_>[src]

Bit 18 - B914

pub fn b915(&mut self) -> B915_W<'_>[src]

Bit 19 - B915

pub fn b916(&mut self) -> B916_W<'_>[src]

Bit 20 - B916

pub fn b917(&mut self) -> B917_W<'_>[src]

Bit 21 - B917

pub fn b918(&mut self) -> B918_W<'_>[src]

Bit 22 - B918

pub fn b919(&mut self) -> B919_W<'_>[src]

Bit 23 - B919

pub fn b920(&mut self) -> B920_W<'_>[src]

Bit 24 - B920

pub fn b921(&mut self) -> B921_W<'_>[src]

Bit 25 - B921

pub fn b922(&mut self) -> B922_W<'_>[src]

Bit 26 - B922

pub fn b923(&mut self) -> B923_W<'_>[src]

Bit 27 - B923

pub fn b924(&mut self) -> B924_W<'_>[src]

Bit 28 - B924

pub fn b925(&mut self) -> B925_W<'_>[src]

Bit 29 - B925

pub fn b926(&mut self) -> B926_W<'_>[src]

Bit 30 - B926

pub fn b927(&mut self) -> B927_W<'_>[src]

Bit 31 - B927

impl W<u32, Reg<u32, _MPCBB2_VCTR29>>[src]

pub fn b928(&mut self) -> B928_W<'_>[src]

Bit 0 - B928

pub fn b929(&mut self) -> B929_W<'_>[src]

Bit 1 - B929

pub fn b930(&mut self) -> B930_W<'_>[src]

Bit 2 - B930

pub fn b931(&mut self) -> B931_W<'_>[src]

Bit 3 - B931

pub fn b932(&mut self) -> B932_W<'_>[src]

Bit 4 - B932

pub fn b933(&mut self) -> B933_W<'_>[src]

Bit 5 - B933

pub fn b934(&mut self) -> B934_W<'_>[src]

Bit 6 - B934

pub fn b935(&mut self) -> B935_W<'_>[src]

Bit 7 - B935

pub fn b936(&mut self) -> B936_W<'_>[src]

Bit 8 - B936

pub fn b937(&mut self) -> B937_W<'_>[src]

Bit 9 - B937

pub fn b938(&mut self) -> B938_W<'_>[src]

Bit 10 - B938

pub fn b939(&mut self) -> B939_W<'_>[src]

Bit 11 - B939

pub fn b940(&mut self) -> B940_W<'_>[src]

Bit 12 - B940

pub fn b941(&mut self) -> B941_W<'_>[src]

Bit 13 - B941

pub fn b942(&mut self) -> B942_W<'_>[src]

Bit 14 - B942

pub fn b943(&mut self) -> B943_W<'_>[src]

Bit 15 - B943

pub fn b944(&mut self) -> B944_W<'_>[src]

Bit 16 - B944

pub fn b945(&mut self) -> B945_W<'_>[src]

Bit 17 - B945

pub fn b946(&mut self) -> B946_W<'_>[src]

Bit 18 - B946

pub fn b947(&mut self) -> B947_W<'_>[src]

Bit 19 - B947

pub fn b948(&mut self) -> B948_W<'_>[src]

Bit 20 - B948

pub fn b949(&mut self) -> B949_W<'_>[src]

Bit 21 - B949

pub fn b950(&mut self) -> B950_W<'_>[src]

Bit 22 - B950

pub fn b951(&mut self) -> B951_W<'_>[src]

Bit 23 - B951

pub fn b952(&mut self) -> B952_W<'_>[src]

Bit 24 - B952

pub fn b953(&mut self) -> B953_W<'_>[src]

Bit 25 - B953

pub fn b954(&mut self) -> B954_W<'_>[src]

Bit 26 - B954

pub fn b955(&mut self) -> B955_W<'_>[src]

Bit 27 - B955

pub fn b956(&mut self) -> B956_W<'_>[src]

Bit 28 - B956

pub fn b957(&mut self) -> B957_W<'_>[src]

Bit 29 - B957

pub fn b958(&mut self) -> B958_W<'_>[src]

Bit 30 - B958

pub fn b959(&mut self) -> B959_W<'_>[src]

Bit 31 - B959

impl W<u32, Reg<u32, _MPCBB2_VCTR30>>[src]

pub fn b960(&mut self) -> B960_W<'_>[src]

Bit 0 - B960

pub fn b961(&mut self) -> B961_W<'_>[src]

Bit 1 - B961

pub fn b962(&mut self) -> B962_W<'_>[src]

Bit 2 - B962

pub fn b963(&mut self) -> B963_W<'_>[src]

Bit 3 - B963

pub fn b964(&mut self) -> B964_W<'_>[src]

Bit 4 - B964

pub fn b965(&mut self) -> B965_W<'_>[src]

Bit 5 - B965

pub fn b966(&mut self) -> B966_W<'_>[src]

Bit 6 - B966

pub fn b967(&mut self) -> B967_W<'_>[src]

Bit 7 - B967

pub fn b968(&mut self) -> B968_W<'_>[src]

Bit 8 - B968

pub fn b969(&mut self) -> B969_W<'_>[src]

Bit 9 - B969

pub fn b970(&mut self) -> B970_W<'_>[src]

Bit 10 - B970

pub fn b971(&mut self) -> B971_W<'_>[src]

Bit 11 - B971

pub fn b972(&mut self) -> B972_W<'_>[src]

Bit 12 - B972

pub fn b973(&mut self) -> B973_W<'_>[src]

Bit 13 - B973

pub fn b974(&mut self) -> B974_W<'_>[src]

Bit 14 - B974

pub fn b975(&mut self) -> B975_W<'_>[src]

Bit 15 - B975

pub fn b976(&mut self) -> B976_W<'_>[src]

Bit 16 - B976

pub fn b977(&mut self) -> B977_W<'_>[src]

Bit 17 - B977

pub fn b978(&mut self) -> B978_W<'_>[src]

Bit 18 - B978

pub fn b979(&mut self) -> B979_W<'_>[src]

Bit 19 - B979

pub fn b980(&mut self) -> B980_W<'_>[src]

Bit 20 - B980

pub fn b981(&mut self) -> B981_W<'_>[src]

Bit 21 - B981

pub fn b982(&mut self) -> B982_W<'_>[src]

Bit 22 - B982

pub fn b983(&mut self) -> B983_W<'_>[src]

Bit 23 - B983

pub fn b984(&mut self) -> B984_W<'_>[src]

Bit 24 - B984

pub fn b985(&mut self) -> B985_W<'_>[src]

Bit 25 - B985

pub fn b986(&mut self) -> B986_W<'_>[src]

Bit 26 - B986

pub fn b987(&mut self) -> B987_W<'_>[src]

Bit 27 - B987

pub fn b988(&mut self) -> B988_W<'_>[src]

Bit 28 - B988

pub fn b989(&mut self) -> B989_W<'_>[src]

Bit 29 - B989

pub fn b990(&mut self) -> B990_W<'_>[src]

Bit 30 - B990

pub fn b991(&mut self) -> B991_W<'_>[src]

Bit 31 - B991

impl W<u32, Reg<u32, _MPCBB2_VCTR31>>[src]

pub fn b992(&mut self) -> B992_W<'_>[src]

Bit 0 - B992

pub fn b993(&mut self) -> B993_W<'_>[src]

Bit 1 - B993

pub fn b994(&mut self) -> B994_W<'_>[src]

Bit 2 - B994

pub fn b995(&mut self) -> B995_W<'_>[src]

Bit 3 - B995

pub fn b996(&mut self) -> B996_W<'_>[src]

Bit 4 - B996

pub fn b997(&mut self) -> B997_W<'_>[src]

Bit 5 - B997

pub fn b998(&mut self) -> B998_W<'_>[src]

Bit 6 - B998

pub fn b999(&mut self) -> B999_W<'_>[src]

Bit 7 - B999

pub fn b1000(&mut self) -> B1000_W<'_>[src]

Bit 8 - B1000

pub fn b1001(&mut self) -> B1001_W<'_>[src]

Bit 9 - B1001

pub fn b1002(&mut self) -> B1002_W<'_>[src]

Bit 10 - B1002

pub fn b1003(&mut self) -> B1003_W<'_>[src]

Bit 11 - B1003

pub fn b1004(&mut self) -> B1004_W<'_>[src]

Bit 12 - B1004

pub fn b1005(&mut self) -> B1005_W<'_>[src]

Bit 13 - B1005

pub fn b1006(&mut self) -> B1006_W<'_>[src]

Bit 14 - B1006

pub fn b1007(&mut self) -> B1007_W<'_>[src]

Bit 15 - B1007

pub fn b1008(&mut self) -> B1008_W<'_>[src]

Bit 16 - B1008

pub fn b1009(&mut self) -> B1009_W<'_>[src]

Bit 17 - B1009

pub fn b1010(&mut self) -> B1010_W<'_>[src]

Bit 18 - B1010

pub fn b1011(&mut self) -> B1011_W<'_>[src]

Bit 19 - B1011

pub fn b1012(&mut self) -> B1012_W<'_>[src]

Bit 20 - B1012

pub fn b1013(&mut self) -> B1013_W<'_>[src]

Bit 21 - B1013

pub fn b1014(&mut self) -> B1014_W<'_>[src]

Bit 22 - B1014

pub fn b1015(&mut self) -> B1015_W<'_>[src]

Bit 23 - B1015

pub fn b1016(&mut self) -> B1016_W<'_>[src]

Bit 24 - B1016

pub fn b1017(&mut self) -> B1017_W<'_>[src]

Bit 25 - B1017

pub fn b1018(&mut self) -> B1018_W<'_>[src]

Bit 26 - B1018

pub fn b1019(&mut self) -> B1019_W<'_>[src]

Bit 27 - B1019

pub fn b1020(&mut self) -> B1020_W<'_>[src]

Bit 28 - B1020

pub fn b1021(&mut self) -> B1021_W<'_>[src]

Bit 29 - B1021

pub fn b1022(&mut self) -> B1022_W<'_>[src]

Bit 30 - B1022

pub fn b1023(&mut self) -> B1023_W<'_>[src]

Bit 31 - B1023

impl W<u32, Reg<u32, _MPCBB2_VCTR32>>[src]

pub fn b1024(&mut self) -> B1024_W<'_>[src]

Bit 0 - B1024

pub fn b1025(&mut self) -> B1025_W<'_>[src]

Bit 1 - B1025

pub fn b1026(&mut self) -> B1026_W<'_>[src]

Bit 2 - B1026

pub fn b1027(&mut self) -> B1027_W<'_>[src]

Bit 3 - B1027

pub fn b1028(&mut self) -> B1028_W<'_>[src]

Bit 4 - B1028

pub fn b1029(&mut self) -> B1029_W<'_>[src]

Bit 5 - B1029

pub fn b1030(&mut self) -> B1030_W<'_>[src]

Bit 6 - B1030

pub fn b1031(&mut self) -> B1031_W<'_>[src]

Bit 7 - B1031

pub fn b1032(&mut self) -> B1032_W<'_>[src]

Bit 8 - B1032

pub fn b1033(&mut self) -> B1033_W<'_>[src]

Bit 9 - B1033

pub fn b1034(&mut self) -> B1034_W<'_>[src]

Bit 10 - B1034

pub fn b1035(&mut self) -> B1035_W<'_>[src]

Bit 11 - B1035

pub fn b1036(&mut self) -> B1036_W<'_>[src]

Bit 12 - B1036

pub fn b1037(&mut self) -> B1037_W<'_>[src]

Bit 13 - B1037

pub fn b1038(&mut self) -> B1038_W<'_>[src]

Bit 14 - B1038

pub fn b1039(&mut self) -> B1039_W<'_>[src]

Bit 15 - B1039

pub fn b1040(&mut self) -> B1040_W<'_>[src]

Bit 16 - B1040

pub fn b1041(&mut self) -> B1041_W<'_>[src]

Bit 17 - B1041

pub fn b1042(&mut self) -> B1042_W<'_>[src]

Bit 18 - B1042

pub fn b1043(&mut self) -> B1043_W<'_>[src]

Bit 19 - B1043

pub fn b1044(&mut self) -> B1044_W<'_>[src]

Bit 20 - B1044

pub fn b1045(&mut self) -> B1045_W<'_>[src]

Bit 21 - B1045

pub fn b1046(&mut self) -> B1046_W<'_>[src]

Bit 22 - B1046

pub fn b1047(&mut self) -> B1047_W<'_>[src]

Bit 23 - B1047

pub fn b1048(&mut self) -> B1048_W<'_>[src]

Bit 24 - B1048

pub fn b1049(&mut self) -> B1049_W<'_>[src]

Bit 25 - B1049

pub fn b1050(&mut self) -> B1050_W<'_>[src]

Bit 26 - B1050

pub fn b1051(&mut self) -> B1051_W<'_>[src]

Bit 27 - B1051

pub fn b1052(&mut self) -> B1052_W<'_>[src]

Bit 28 - B1052

pub fn b1053(&mut self) -> B1053_W<'_>[src]

Bit 29 - B1053

pub fn b1054(&mut self) -> B1054_W<'_>[src]

Bit 30 - B1054

pub fn b1055(&mut self) -> B1055_W<'_>[src]

Bit 31 - B1055

impl W<u32, Reg<u32, _MPCBB2_VCTR33>>[src]

pub fn b1056(&mut self) -> B1056_W<'_>[src]

Bit 0 - B1056

pub fn b1057(&mut self) -> B1057_W<'_>[src]

Bit 1 - B1057

pub fn b1058(&mut self) -> B1058_W<'_>[src]

Bit 2 - B1058

pub fn b1059(&mut self) -> B1059_W<'_>[src]

Bit 3 - B1059

pub fn b1060(&mut self) -> B1060_W<'_>[src]

Bit 4 - B1060

pub fn b1061(&mut self) -> B1061_W<'_>[src]

Bit 5 - B1061

pub fn b1062(&mut self) -> B1062_W<'_>[src]

Bit 6 - B1062

pub fn b1063(&mut self) -> B1063_W<'_>[src]

Bit 7 - B1063

pub fn b1064(&mut self) -> B1064_W<'_>[src]

Bit 8 - B1064

pub fn b1065(&mut self) -> B1065_W<'_>[src]

Bit 9 - B1065

pub fn b1066(&mut self) -> B1066_W<'_>[src]

Bit 10 - B1066

pub fn b1067(&mut self) -> B1067_W<'_>[src]

Bit 11 - B1067

pub fn b1068(&mut self) -> B1068_W<'_>[src]

Bit 12 - B1068

pub fn b1069(&mut self) -> B1069_W<'_>[src]

Bit 13 - B1069

pub fn b1070(&mut self) -> B1070_W<'_>[src]

Bit 14 - B1070

pub fn b1071(&mut self) -> B1071_W<'_>[src]

Bit 15 - B1071

pub fn b1072(&mut self) -> B1072_W<'_>[src]

Bit 16 - B1072

pub fn b1073(&mut self) -> B1073_W<'_>[src]

Bit 17 - B1073

pub fn b1074(&mut self) -> B1074_W<'_>[src]

Bit 18 - B1074

pub fn b1075(&mut self) -> B1075_W<'_>[src]

Bit 19 - B1075

pub fn b1076(&mut self) -> B1076_W<'_>[src]

Bit 20 - B1076

pub fn b1077(&mut self) -> B1077_W<'_>[src]

Bit 21 - B1077

pub fn b1078(&mut self) -> B1078_W<'_>[src]

Bit 22 - B1078

pub fn b1079(&mut self) -> B1079_W<'_>[src]

Bit 23 - B1079

pub fn b1080(&mut self) -> B1080_W<'_>[src]

Bit 24 - B1080

pub fn b1081(&mut self) -> B1081_W<'_>[src]

Bit 25 - B1081

pub fn b1082(&mut self) -> B1082_W<'_>[src]

Bit 26 - B1082

pub fn b1083(&mut self) -> B1083_W<'_>[src]

Bit 27 - B1083

pub fn b1084(&mut self) -> B1084_W<'_>[src]

Bit 28 - B1084

pub fn b1085(&mut self) -> B1085_W<'_>[src]

Bit 29 - B1085

pub fn b1086(&mut self) -> B1086_W<'_>[src]

Bit 30 - B1086

pub fn b1087(&mut self) -> B1087_W<'_>[src]

Bit 31 - B1087

impl W<u32, Reg<u32, _MPCBB2_VCTR34>>[src]

pub fn b1088(&mut self) -> B1088_W<'_>[src]

Bit 0 - B1088

pub fn b1089(&mut self) -> B1089_W<'_>[src]

Bit 1 - B1089

pub fn b1090(&mut self) -> B1090_W<'_>[src]

Bit 2 - B1090

pub fn b1091(&mut self) -> B1091_W<'_>[src]

Bit 3 - B1091

pub fn b1092(&mut self) -> B1092_W<'_>[src]

Bit 4 - B1092

pub fn b1093(&mut self) -> B1093_W<'_>[src]

Bit 5 - B1093

pub fn b1094(&mut self) -> B1094_W<'_>[src]

Bit 6 - B1094

pub fn b1095(&mut self) -> B1095_W<'_>[src]

Bit 7 - B1095

pub fn b1096(&mut self) -> B1096_W<'_>[src]

Bit 8 - B1096

pub fn b1097(&mut self) -> B1097_W<'_>[src]

Bit 9 - B1097

pub fn b1098(&mut self) -> B1098_W<'_>[src]

Bit 10 - B1098

pub fn b1099(&mut self) -> B1099_W<'_>[src]

Bit 11 - B1099

pub fn b1100(&mut self) -> B1100_W<'_>[src]

Bit 12 - B1100

pub fn b1101(&mut self) -> B1101_W<'_>[src]

Bit 13 - B1101

pub fn b1102(&mut self) -> B1102_W<'_>[src]

Bit 14 - B1102

pub fn b1103(&mut self) -> B1103_W<'_>[src]

Bit 15 - B1103

pub fn b1104(&mut self) -> B1104_W<'_>[src]

Bit 16 - B1104

pub fn b1105(&mut self) -> B1105_W<'_>[src]

Bit 17 - B1105

pub fn b1106(&mut self) -> B1106_W<'_>[src]

Bit 18 - B1106

pub fn b1107(&mut self) -> B1107_W<'_>[src]

Bit 19 - B1107

pub fn b1108(&mut self) -> B1108_W<'_>[src]

Bit 20 - B1108

pub fn b1109(&mut self) -> B1109_W<'_>[src]

Bit 21 - B1109

pub fn b1110(&mut self) -> B1110_W<'_>[src]

Bit 22 - B1110

pub fn b1111(&mut self) -> B1111_W<'_>[src]

Bit 23 - B1111

pub fn b1112(&mut self) -> B1112_W<'_>[src]

Bit 24 - B1112

pub fn b1113(&mut self) -> B1113_W<'_>[src]

Bit 25 - B1113

pub fn b1114(&mut self) -> B1114_W<'_>[src]

Bit 26 - B1114

pub fn b1115(&mut self) -> B1115_W<'_>[src]

Bit 27 - B1115

pub fn b1116(&mut self) -> B1116_W<'_>[src]

Bit 28 - B1116

pub fn b1117(&mut self) -> B1117_W<'_>[src]

Bit 29 - B1117

pub fn b1118(&mut self) -> B1118_W<'_>[src]

Bit 30 - B1118

pub fn b1119(&mut self) -> B1119_W<'_>[src]

Bit 31 - B1119

impl W<u32, Reg<u32, _MPCBB2_VCTR35>>[src]

pub fn b1120(&mut self) -> B1120_W<'_>[src]

Bit 0 - B1120

pub fn b1121(&mut self) -> B1121_W<'_>[src]

Bit 1 - B1121

pub fn b1122(&mut self) -> B1122_W<'_>[src]

Bit 2 - B1122

pub fn b1123(&mut self) -> B1123_W<'_>[src]

Bit 3 - B1123

pub fn b1124(&mut self) -> B1124_W<'_>[src]

Bit 4 - B1124

pub fn b1125(&mut self) -> B1125_W<'_>[src]

Bit 5 - B1125

pub fn b1126(&mut self) -> B1126_W<'_>[src]

Bit 6 - B1126

pub fn b1127(&mut self) -> B1127_W<'_>[src]

Bit 7 - B1127

pub fn b1128(&mut self) -> B1128_W<'_>[src]

Bit 8 - B1128

pub fn b1129(&mut self) -> B1129_W<'_>[src]

Bit 9 - B1129

pub fn b1130(&mut self) -> B1130_W<'_>[src]

Bit 10 - B1130

pub fn b1131(&mut self) -> B1131_W<'_>[src]

Bit 11 - B1131

pub fn b1132(&mut self) -> B1132_W<'_>[src]

Bit 12 - B1132

pub fn b1133(&mut self) -> B1133_W<'_>[src]

Bit 13 - B1133

pub fn b1134(&mut self) -> B1134_W<'_>[src]

Bit 14 - B1134

pub fn b1135(&mut self) -> B1135_W<'_>[src]

Bit 15 - B1135

pub fn b1136(&mut self) -> B1136_W<'_>[src]

Bit 16 - B1136

pub fn b1137(&mut self) -> B1137_W<'_>[src]

Bit 17 - B1137

pub fn b1138(&mut self) -> B1138_W<'_>[src]

Bit 18 - B1138

pub fn b1139(&mut self) -> B1139_W<'_>[src]

Bit 19 - B1139

pub fn b1140(&mut self) -> B1140_W<'_>[src]

Bit 20 - B1140

pub fn b1141(&mut self) -> B1141_W<'_>[src]

Bit 21 - B1141

pub fn b1142(&mut self) -> B1142_W<'_>[src]

Bit 22 - B1142

pub fn b1143(&mut self) -> B1143_W<'_>[src]

Bit 23 - B1143

pub fn b1144(&mut self) -> B1144_W<'_>[src]

Bit 24 - B1144

pub fn b1145(&mut self) -> B1145_W<'_>[src]

Bit 25 - B1145

pub fn b1146(&mut self) -> B1146_W<'_>[src]

Bit 26 - B1146

pub fn b1147(&mut self) -> B1147_W<'_>[src]

Bit 27 - B1147

pub fn b1148(&mut self) -> B1148_W<'_>[src]

Bit 28 - B1148

pub fn b1149(&mut self) -> B1149_W<'_>[src]

Bit 29 - B1149

pub fn b1150(&mut self) -> B1150_W<'_>[src]

Bit 30 - B1150

pub fn b1151(&mut self) -> B1151_W<'_>[src]

Bit 31 - B1151

impl W<u32, Reg<u32, _MPCBB2_VCTR36>>[src]

pub fn b1152(&mut self) -> B1152_W<'_>[src]

Bit 0 - B1152

pub fn b1153(&mut self) -> B1153_W<'_>[src]

Bit 1 - B1153

pub fn b1154(&mut self) -> B1154_W<'_>[src]

Bit 2 - B1154

pub fn b1155(&mut self) -> B1155_W<'_>[src]

Bit 3 - B1155

pub fn b1156(&mut self) -> B1156_W<'_>[src]

Bit 4 - B1156

pub fn b1157(&mut self) -> B1157_W<'_>[src]

Bit 5 - B1157

pub fn b1158(&mut self) -> B1158_W<'_>[src]

Bit 6 - B1158

pub fn b1159(&mut self) -> B1159_W<'_>[src]

Bit 7 - B1159

pub fn b1160(&mut self) -> B1160_W<'_>[src]

Bit 8 - B1160

pub fn b1161(&mut self) -> B1161_W<'_>[src]

Bit 9 - B1161

pub fn b1162(&mut self) -> B1162_W<'_>[src]

Bit 10 - B1162

pub fn b1163(&mut self) -> B1163_W<'_>[src]

Bit 11 - B1163

pub fn b1164(&mut self) -> B1164_W<'_>[src]

Bit 12 - B1164

pub fn b1165(&mut self) -> B1165_W<'_>[src]

Bit 13 - B1165

pub fn b1166(&mut self) -> B1166_W<'_>[src]

Bit 14 - B1166

pub fn b1167(&mut self) -> B1167_W<'_>[src]

Bit 15 - B1167

pub fn b1168(&mut self) -> B1168_W<'_>[src]

Bit 16 - B1168

pub fn b1169(&mut self) -> B1169_W<'_>[src]

Bit 17 - B1169

pub fn b1170(&mut self) -> B1170_W<'_>[src]

Bit 18 - B1170

pub fn b1171(&mut self) -> B1171_W<'_>[src]

Bit 19 - B1171

pub fn b1172(&mut self) -> B1172_W<'_>[src]

Bit 20 - B1172

pub fn b1173(&mut self) -> B1173_W<'_>[src]

Bit 21 - B1173

pub fn b1174(&mut self) -> B1174_W<'_>[src]

Bit 22 - B1174

pub fn b1175(&mut self) -> B1175_W<'_>[src]

Bit 23 - B1175

pub fn b1176(&mut self) -> B1176_W<'_>[src]

Bit 24 - B1176

pub fn b1177(&mut self) -> B1177_W<'_>[src]

Bit 25 - B1177

pub fn b1178(&mut self) -> B1178_W<'_>[src]

Bit 26 - B1178

pub fn b1179(&mut self) -> B1179_W<'_>[src]

Bit 27 - B1179

pub fn b1180(&mut self) -> B1180_W<'_>[src]

Bit 28 - B1180

pub fn b1181(&mut self) -> B1181_W<'_>[src]

Bit 29 - B1181

pub fn b1182(&mut self) -> B1182_W<'_>[src]

Bit 30 - B1182

pub fn b1183(&mut self) -> B1183_W<'_>[src]

Bit 31 - B1183

impl W<u32, Reg<u32, _MPCBB2_VCTR37>>[src]

pub fn b1184(&mut self) -> B1184_W<'_>[src]

Bit 0 - B1184

pub fn b1185(&mut self) -> B1185_W<'_>[src]

Bit 1 - B1185

pub fn b1186(&mut self) -> B1186_W<'_>[src]

Bit 2 - B1186

pub fn b1187(&mut self) -> B1187_W<'_>[src]

Bit 3 - B1187

pub fn b1188(&mut self) -> B1188_W<'_>[src]

Bit 4 - B1188

pub fn b1189(&mut self) -> B1189_W<'_>[src]

Bit 5 - B1189

pub fn b1190(&mut self) -> B1190_W<'_>[src]

Bit 6 - B1190

pub fn b1191(&mut self) -> B1191_W<'_>[src]

Bit 7 - B1191

pub fn b1192(&mut self) -> B1192_W<'_>[src]

Bit 8 - B1192

pub fn b1193(&mut self) -> B1193_W<'_>[src]

Bit 9 - B1193

pub fn b1194(&mut self) -> B1194_W<'_>[src]

Bit 10 - B1194

pub fn b1195(&mut self) -> B1195_W<'_>[src]

Bit 11 - B1195

pub fn b1196(&mut self) -> B1196_W<'_>[src]

Bit 12 - B1196

pub fn b1197(&mut self) -> B1197_W<'_>[src]

Bit 13 - B1197

pub fn b1198(&mut self) -> B1198_W<'_>[src]

Bit 14 - B1198

pub fn b1199(&mut self) -> B1199_W<'_>[src]

Bit 15 - B1199

pub fn b1200(&mut self) -> B1200_W<'_>[src]

Bit 16 - B1200

pub fn b1201(&mut self) -> B1201_W<'_>[src]

Bit 17 - B1201

pub fn b1202(&mut self) -> B1202_W<'_>[src]

Bit 18 - B1202

pub fn b1203(&mut self) -> B1203_W<'_>[src]

Bit 19 - B1203

pub fn b1204(&mut self) -> B1204_W<'_>[src]

Bit 20 - B1204

pub fn b1205(&mut self) -> B1205_W<'_>[src]

Bit 21 - B1205

pub fn b1206(&mut self) -> B1206_W<'_>[src]

Bit 22 - B1206

pub fn b1207(&mut self) -> B1207_W<'_>[src]

Bit 23 - B1207

pub fn b1208(&mut self) -> B1208_W<'_>[src]

Bit 24 - B1208

pub fn b1209(&mut self) -> B1209_W<'_>[src]

Bit 25 - B1209

pub fn b1210(&mut self) -> B1210_W<'_>[src]

Bit 26 - B1210

pub fn b1211(&mut self) -> B1211_W<'_>[src]

Bit 27 - B1211

pub fn b1212(&mut self) -> B1212_W<'_>[src]

Bit 28 - B1212

pub fn b1213(&mut self) -> B1213_W<'_>[src]

Bit 29 - B1213

pub fn b1214(&mut self) -> B1214_W<'_>[src]

Bit 30 - B1214

pub fn b1215(&mut self) -> B1215_W<'_>[src]

Bit 31 - B1215

impl W<u32, Reg<u32, _MPCBB2_VCTR38>>[src]

pub fn b1216(&mut self) -> B1216_W<'_>[src]

Bit 0 - B1216

pub fn b1217(&mut self) -> B1217_W<'_>[src]

Bit 1 - B1217

pub fn b1218(&mut self) -> B1218_W<'_>[src]

Bit 2 - B1218

pub fn b1219(&mut self) -> B1219_W<'_>[src]

Bit 3 - B1219

pub fn b1220(&mut self) -> B1220_W<'_>[src]

Bit 4 - B1220

pub fn b1221(&mut self) -> B1221_W<'_>[src]

Bit 5 - B1221

pub fn b1222(&mut self) -> B1222_W<'_>[src]

Bit 6 - B1222

pub fn b1223(&mut self) -> B1223_W<'_>[src]

Bit 7 - B1223

pub fn b1224(&mut self) -> B1224_W<'_>[src]

Bit 8 - B1224

pub fn b1225(&mut self) -> B1225_W<'_>[src]

Bit 9 - B1225

pub fn b1226(&mut self) -> B1226_W<'_>[src]

Bit 10 - B1226

pub fn b1227(&mut self) -> B1227_W<'_>[src]

Bit 11 - B1227

pub fn b1228(&mut self) -> B1228_W<'_>[src]

Bit 12 - B1228

pub fn b1229(&mut self) -> B1229_W<'_>[src]

Bit 13 - B1229

pub fn b1230(&mut self) -> B1230_W<'_>[src]

Bit 14 - B1230

pub fn b1231(&mut self) -> B1231_W<'_>[src]

Bit 15 - B1231

pub fn b1232(&mut self) -> B1232_W<'_>[src]

Bit 16 - B1232

pub fn b1233(&mut self) -> B1233_W<'_>[src]

Bit 17 - B1233

pub fn b1234(&mut self) -> B1234_W<'_>[src]

Bit 18 - B1234

pub fn b1235(&mut self) -> B1235_W<'_>[src]

Bit 19 - B1235

pub fn b1236(&mut self) -> B1236_W<'_>[src]

Bit 20 - B1236

pub fn b1237(&mut self) -> B1237_W<'_>[src]

Bit 21 - B1237

pub fn b1238(&mut self) -> B1238_W<'_>[src]

Bit 22 - B1238

pub fn b1239(&mut self) -> B1239_W<'_>[src]

Bit 23 - B1239

pub fn b1240(&mut self) -> B1240_W<'_>[src]

Bit 24 - B1240

pub fn b1241(&mut self) -> B1241_W<'_>[src]

Bit 25 - B1241

pub fn b1242(&mut self) -> B1242_W<'_>[src]

Bit 26 - B1242

pub fn b1243(&mut self) -> B1243_W<'_>[src]

Bit 27 - B1243

pub fn b1244(&mut self) -> B1244_W<'_>[src]

Bit 28 - B1244

pub fn b1245(&mut self) -> B1245_W<'_>[src]

Bit 29 - B1245

pub fn b1246(&mut self) -> B1246_W<'_>[src]

Bit 30 - B1246

pub fn b1247(&mut self) -> B1247_W<'_>[src]

Bit 31 - B1247

impl W<u32, Reg<u32, _MPCBB2_VCTR39>>[src]

pub fn b1248(&mut self) -> B1248_W<'_>[src]

Bit 0 - B1248

pub fn b1249(&mut self) -> B1249_W<'_>[src]

Bit 1 - B1249

pub fn b1250(&mut self) -> B1250_W<'_>[src]

Bit 2 - B1250

pub fn b1251(&mut self) -> B1251_W<'_>[src]

Bit 3 - B1251

pub fn b1252(&mut self) -> B1252_W<'_>[src]

Bit 4 - B1252

pub fn b1253(&mut self) -> B1253_W<'_>[src]

Bit 5 - B1253

pub fn b1254(&mut self) -> B1254_W<'_>[src]

Bit 6 - B1254

pub fn b1255(&mut self) -> B1255_W<'_>[src]

Bit 7 - B1255

pub fn b1256(&mut self) -> B1256_W<'_>[src]

Bit 8 - B1256

pub fn b1257(&mut self) -> B1257_W<'_>[src]

Bit 9 - B1257

pub fn b1258(&mut self) -> B1258_W<'_>[src]

Bit 10 - B1258

pub fn b1259(&mut self) -> B1259_W<'_>[src]

Bit 11 - B1259

pub fn b1260(&mut self) -> B1260_W<'_>[src]

Bit 12 - B1260

pub fn b1261(&mut self) -> B1261_W<'_>[src]

Bit 13 - B1261

pub fn b1262(&mut self) -> B1262_W<'_>[src]

Bit 14 - B1262

pub fn b1263(&mut self) -> B1263_W<'_>[src]

Bit 15 - B1263

pub fn b1264(&mut self) -> B1264_W<'_>[src]

Bit 16 - B1264

pub fn b1265(&mut self) -> B1265_W<'_>[src]

Bit 17 - B1265

pub fn b1266(&mut self) -> B1266_W<'_>[src]

Bit 18 - B1266

pub fn b1267(&mut self) -> B1267_W<'_>[src]

Bit 19 - B1267

pub fn b1268(&mut self) -> B1268_W<'_>[src]

Bit 20 - B1268

pub fn b1269(&mut self) -> B1269_W<'_>[src]

Bit 21 - B1269

pub fn b1270(&mut self) -> B1270_W<'_>[src]

Bit 22 - B1270

pub fn b1271(&mut self) -> B1271_W<'_>[src]

Bit 23 - B1271

pub fn b1272(&mut self) -> B1272_W<'_>[src]

Bit 24 - B1272

pub fn b1273(&mut self) -> B1273_W<'_>[src]

Bit 25 - B1273

pub fn b1274(&mut self) -> B1274_W<'_>[src]

Bit 26 - B1274

pub fn b1275(&mut self) -> B1275_W<'_>[src]

Bit 27 - B1275

pub fn b1276(&mut self) -> B1276_W<'_>[src]

Bit 28 - B1276

pub fn b1277(&mut self) -> B1277_W<'_>[src]

Bit 29 - B1277

pub fn b1278(&mut self) -> B1278_W<'_>[src]

Bit 30 - B1278

pub fn b1279(&mut self) -> B1279_W<'_>[src]

Bit 31 - B1279

impl W<u32, Reg<u32, _MPCBB2_VCTR40>>[src]

pub fn b1280(&mut self) -> B1280_W<'_>[src]

Bit 0 - B1280

pub fn b1281(&mut self) -> B1281_W<'_>[src]

Bit 1 - B1281

pub fn b1282(&mut self) -> B1282_W<'_>[src]

Bit 2 - B1282

pub fn b1283(&mut self) -> B1283_W<'_>[src]

Bit 3 - B1283

pub fn b1284(&mut self) -> B1284_W<'_>[src]

Bit 4 - B1284

pub fn b1285(&mut self) -> B1285_W<'_>[src]

Bit 5 - B1285

pub fn b1286(&mut self) -> B1286_W<'_>[src]

Bit 6 - B1286

pub fn b1287(&mut self) -> B1287_W<'_>[src]

Bit 7 - B1287

pub fn b1288(&mut self) -> B1288_W<'_>[src]

Bit 8 - B1288

pub fn b1289(&mut self) -> B1289_W<'_>[src]

Bit 9 - B1289

pub fn b1290(&mut self) -> B1290_W<'_>[src]

Bit 10 - B1290

pub fn b1291(&mut self) -> B1291_W<'_>[src]

Bit 11 - B1291

pub fn b1292(&mut self) -> B1292_W<'_>[src]

Bit 12 - B1292

pub fn b1293(&mut self) -> B1293_W<'_>[src]

Bit 13 - B1293

pub fn b1294(&mut self) -> B1294_W<'_>[src]

Bit 14 - B1294

pub fn b1295(&mut self) -> B1295_W<'_>[src]

Bit 15 - B1295

pub fn b1296(&mut self) -> B1296_W<'_>[src]

Bit 16 - B1296

pub fn b1297(&mut self) -> B1297_W<'_>[src]

Bit 17 - B1297

pub fn b1298(&mut self) -> B1298_W<'_>[src]

Bit 18 - B1298

pub fn b1299(&mut self) -> B1299_W<'_>[src]

Bit 19 - B1299

pub fn b1300(&mut self) -> B1300_W<'_>[src]

Bit 20 - B1300

pub fn b1301(&mut self) -> B1301_W<'_>[src]

Bit 21 - B1301

pub fn b1302(&mut self) -> B1302_W<'_>[src]

Bit 22 - B1302

pub fn b1303(&mut self) -> B1303_W<'_>[src]

Bit 23 - B1303

pub fn b1304(&mut self) -> B1304_W<'_>[src]

Bit 24 - B1304

pub fn b1305(&mut self) -> B1305_W<'_>[src]

Bit 25 - B1305

pub fn b1306(&mut self) -> B1306_W<'_>[src]

Bit 26 - B1306

pub fn b1307(&mut self) -> B1307_W<'_>[src]

Bit 27 - B1307

pub fn b1308(&mut self) -> B1308_W<'_>[src]

Bit 28 - B1308

pub fn b1309(&mut self) -> B1309_W<'_>[src]

Bit 29 - B1309

pub fn b1310(&mut self) -> B1310_W<'_>[src]

Bit 30 - B1310

pub fn b1311(&mut self) -> B1311_W<'_>[src]

Bit 31 - B1311

impl W<u32, Reg<u32, _MPCBB2_VCTR41>>[src]

pub fn b1312(&mut self) -> B1312_W<'_>[src]

Bit 0 - B1312

pub fn b1313(&mut self) -> B1313_W<'_>[src]

Bit 1 - B1313

pub fn b1314(&mut self) -> B1314_W<'_>[src]

Bit 2 - B1314

pub fn b1315(&mut self) -> B1315_W<'_>[src]

Bit 3 - B1315

pub fn b1316(&mut self) -> B1316_W<'_>[src]

Bit 4 - B1316

pub fn b1317(&mut self) -> B1317_W<'_>[src]

Bit 5 - B1317

pub fn b1318(&mut self) -> B1318_W<'_>[src]

Bit 6 - B1318

pub fn b1319(&mut self) -> B1319_W<'_>[src]

Bit 7 - B1319

pub fn b1320(&mut self) -> B1320_W<'_>[src]

Bit 8 - B1320

pub fn b1321(&mut self) -> B1321_W<'_>[src]

Bit 9 - B1321

pub fn b1322(&mut self) -> B1322_W<'_>[src]

Bit 10 - B1322

pub fn b1323(&mut self) -> B1323_W<'_>[src]

Bit 11 - B1323

pub fn b1324(&mut self) -> B1324_W<'_>[src]

Bit 12 - B1324

pub fn b1325(&mut self) -> B1325_W<'_>[src]

Bit 13 - B1325

pub fn b1326(&mut self) -> B1326_W<'_>[src]

Bit 14 - B1326

pub fn b1327(&mut self) -> B1327_W<'_>[src]

Bit 15 - B1327

pub fn b1328(&mut self) -> B1328_W<'_>[src]

Bit 16 - B1328

pub fn b1329(&mut self) -> B1329_W<'_>[src]

Bit 17 - B1329

pub fn b1330(&mut self) -> B1330_W<'_>[src]

Bit 18 - B1330

pub fn b1331(&mut self) -> B1331_W<'_>[src]

Bit 19 - B1331

pub fn b1332(&mut self) -> B1332_W<'_>[src]

Bit 20 - B1332

pub fn b1333(&mut self) -> B1333_W<'_>[src]

Bit 21 - B1333

pub fn b1334(&mut self) -> B1334_W<'_>[src]

Bit 22 - B1334

pub fn b1335(&mut self) -> B1335_W<'_>[src]

Bit 23 - B1335

pub fn b1336(&mut self) -> B1336_W<'_>[src]

Bit 24 - B1336

pub fn b1337(&mut self) -> B1337_W<'_>[src]

Bit 25 - B1337

pub fn b1338(&mut self) -> B1338_W<'_>[src]

Bit 26 - B1338

pub fn b1339(&mut self) -> B1339_W<'_>[src]

Bit 27 - B1339

pub fn b1340(&mut self) -> B1340_W<'_>[src]

Bit 28 - B1340

pub fn b1341(&mut self) -> B1341_W<'_>[src]

Bit 29 - B1341

pub fn b1342(&mut self) -> B1342_W<'_>[src]

Bit 30 - B1342

pub fn b1343(&mut self) -> B1343_W<'_>[src]

Bit 31 - B1343

impl W<u32, Reg<u32, _MPCBB2_VCTR42>>[src]

pub fn b1344(&mut self) -> B1344_W<'_>[src]

Bit 0 - B1344

pub fn b1345(&mut self) -> B1345_W<'_>[src]

Bit 1 - B1345

pub fn b1346(&mut self) -> B1346_W<'_>[src]

Bit 2 - B1346

pub fn b1347(&mut self) -> B1347_W<'_>[src]

Bit 3 - B1347

pub fn b1348(&mut self) -> B1348_W<'_>[src]

Bit 4 - B1348

pub fn b1349(&mut self) -> B1349_W<'_>[src]

Bit 5 - B1349

pub fn b1350(&mut self) -> B1350_W<'_>[src]

Bit 6 - B1350

pub fn b1351(&mut self) -> B1351_W<'_>[src]

Bit 7 - B1351

pub fn b1352(&mut self) -> B1352_W<'_>[src]

Bit 8 - B1352

pub fn b1353(&mut self) -> B1353_W<'_>[src]

Bit 9 - B1353

pub fn b1354(&mut self) -> B1354_W<'_>[src]

Bit 10 - B1354

pub fn b1355(&mut self) -> B1355_W<'_>[src]

Bit 11 - B1355

pub fn b1356(&mut self) -> B1356_W<'_>[src]

Bit 12 - B1356

pub fn b1357(&mut self) -> B1357_W<'_>[src]

Bit 13 - B1357

pub fn b1358(&mut self) -> B1358_W<'_>[src]

Bit 14 - B1358

pub fn b1359(&mut self) -> B1359_W<'_>[src]

Bit 15 - B1359

pub fn b1360(&mut self) -> B1360_W<'_>[src]

Bit 16 - B1360

pub fn b1361(&mut self) -> B1361_W<'_>[src]

Bit 17 - B1361

pub fn b1362(&mut self) -> B1362_W<'_>[src]

Bit 18 - B1362

pub fn b1363(&mut self) -> B1363_W<'_>[src]

Bit 19 - B1363

pub fn b1364(&mut self) -> B1364_W<'_>[src]

Bit 20 - B1364

pub fn b1365(&mut self) -> B1365_W<'_>[src]

Bit 21 - B1365

pub fn b1366(&mut self) -> B1366_W<'_>[src]

Bit 22 - B1366

pub fn b1367(&mut self) -> B1367_W<'_>[src]

Bit 23 - B1367

pub fn b1368(&mut self) -> B1368_W<'_>[src]

Bit 24 - B1368

pub fn b1369(&mut self) -> B1369_W<'_>[src]

Bit 25 - B1369

pub fn b1370(&mut self) -> B1370_W<'_>[src]

Bit 26 - B1370

pub fn b1371(&mut self) -> B1371_W<'_>[src]

Bit 27 - B1371

pub fn b1372(&mut self) -> B1372_W<'_>[src]

Bit 28 - B1372

pub fn b1373(&mut self) -> B1373_W<'_>[src]

Bit 29 - B1373

pub fn b1374(&mut self) -> B1374_W<'_>[src]

Bit 30 - B1374

pub fn b1375(&mut self) -> B1375_W<'_>[src]

Bit 31 - B1375

impl W<u32, Reg<u32, _MPCBB2_VCTR43>>[src]

pub fn b1376(&mut self) -> B1376_W<'_>[src]

Bit 0 - B1376

pub fn b1377(&mut self) -> B1377_W<'_>[src]

Bit 1 - B1377

pub fn b1378(&mut self) -> B1378_W<'_>[src]

Bit 2 - B1378

pub fn b1379(&mut self) -> B1379_W<'_>[src]

Bit 3 - B1379

pub fn b1380(&mut self) -> B1380_W<'_>[src]

Bit 4 - B1380

pub fn b1381(&mut self) -> B1381_W<'_>[src]

Bit 5 - B1381

pub fn b1382(&mut self) -> B1382_W<'_>[src]

Bit 6 - B1382

pub fn b1383(&mut self) -> B1383_W<'_>[src]

Bit 7 - B1383

pub fn b1384(&mut self) -> B1384_W<'_>[src]

Bit 8 - B1384

pub fn b1385(&mut self) -> B1385_W<'_>[src]

Bit 9 - B1385

pub fn b1386(&mut self) -> B1386_W<'_>[src]

Bit 10 - B1386

pub fn b1387(&mut self) -> B1387_W<'_>[src]

Bit 11 - B1387

pub fn b1388(&mut self) -> B1388_W<'_>[src]

Bit 12 - B1388

pub fn b1389(&mut self) -> B1389_W<'_>[src]

Bit 13 - B1389

pub fn b1390(&mut self) -> B1390_W<'_>[src]

Bit 14 - B1390

pub fn b1391(&mut self) -> B1391_W<'_>[src]

Bit 15 - B1391

pub fn b1392(&mut self) -> B1392_W<'_>[src]

Bit 16 - B1392

pub fn b1393(&mut self) -> B1393_W<'_>[src]

Bit 17 - B1393

pub fn b1394(&mut self) -> B1394_W<'_>[src]

Bit 18 - B1394

pub fn b1395(&mut self) -> B1395_W<'_>[src]

Bit 19 - B1395

pub fn b1396(&mut self) -> B1396_W<'_>[src]

Bit 20 - B1396

pub fn b1397(&mut self) -> B1397_W<'_>[src]

Bit 21 - B1397

pub fn b1398(&mut self) -> B1398_W<'_>[src]

Bit 22 - B1398

pub fn b1399(&mut self) -> B1399_W<'_>[src]

Bit 23 - B1399

pub fn b1400(&mut self) -> B1400_W<'_>[src]

Bit 24 - B1400

pub fn b1401(&mut self) -> B1401_W<'_>[src]

Bit 25 - B1401

pub fn b1402(&mut self) -> B1402_W<'_>[src]

Bit 26 - B1402

pub fn b1403(&mut self) -> B1403_W<'_>[src]

Bit 27 - B1403

pub fn b1404(&mut self) -> B1404_W<'_>[src]

Bit 28 - B1404

pub fn b1405(&mut self) -> B1405_W<'_>[src]

Bit 29 - B1405

pub fn b1406(&mut self) -> B1406_W<'_>[src]

Bit 30 - B1406

pub fn b1407(&mut self) -> B1407_W<'_>[src]

Bit 31 - B1407

impl W<u32, Reg<u32, _MPCBB2_VCTR44>>[src]

pub fn b1408(&mut self) -> B1408_W<'_>[src]

Bit 0 - B1408

pub fn b1409(&mut self) -> B1409_W<'_>[src]

Bit 1 - B1409

pub fn b1410(&mut self) -> B1410_W<'_>[src]

Bit 2 - B1410

pub fn b1411(&mut self) -> B1411_W<'_>[src]

Bit 3 - B1411

pub fn b1412(&mut self) -> B1412_W<'_>[src]

Bit 4 - B1412

pub fn b1413(&mut self) -> B1413_W<'_>[src]

Bit 5 - B1413

pub fn b1414(&mut self) -> B1414_W<'_>[src]

Bit 6 - B1414

pub fn b1415(&mut self) -> B1415_W<'_>[src]

Bit 7 - B1415

pub fn b1416(&mut self) -> B1416_W<'_>[src]

Bit 8 - B1416

pub fn b1417(&mut self) -> B1417_W<'_>[src]

Bit 9 - B1417

pub fn b1418(&mut self) -> B1418_W<'_>[src]

Bit 10 - B1418

pub fn b1419(&mut self) -> B1419_W<'_>[src]

Bit 11 - B1419

pub fn b1420(&mut self) -> B1420_W<'_>[src]

Bit 12 - B1420

pub fn b1421(&mut self) -> B1421_W<'_>[src]

Bit 13 - B1421

pub fn b1422(&mut self) -> B1422_W<'_>[src]

Bit 14 - B1422

pub fn b1423(&mut self) -> B1423_W<'_>[src]

Bit 15 - B1423

pub fn b1424(&mut self) -> B1424_W<'_>[src]

Bit 16 - B1424

pub fn b1425(&mut self) -> B1425_W<'_>[src]

Bit 17 - B1425

pub fn b1426(&mut self) -> B1426_W<'_>[src]

Bit 18 - B1426

pub fn b1427(&mut self) -> B1427_W<'_>[src]

Bit 19 - B1427

pub fn b1428(&mut self) -> B1428_W<'_>[src]

Bit 20 - B1428

pub fn b1429(&mut self) -> B1429_W<'_>[src]

Bit 21 - B1429

pub fn b1430(&mut self) -> B1430_W<'_>[src]

Bit 22 - B1430

pub fn b1431(&mut self) -> B1431_W<'_>[src]

Bit 23 - B1431

pub fn b1432(&mut self) -> B1432_W<'_>[src]

Bit 24 - B1432

pub fn b1433(&mut self) -> B1433_W<'_>[src]

Bit 25 - B1433

pub fn b1434(&mut self) -> B1434_W<'_>[src]

Bit 26 - B1434

pub fn b1435(&mut self) -> B1435_W<'_>[src]

Bit 27 - B1435

pub fn b1436(&mut self) -> B1436_W<'_>[src]

Bit 28 - B1436

pub fn b1437(&mut self) -> B1437_W<'_>[src]

Bit 29 - B1437

pub fn b1438(&mut self) -> B1438_W<'_>[src]

Bit 30 - B1438

pub fn b1439(&mut self) -> B1439_W<'_>[src]

Bit 31 - B1439

impl W<u32, Reg<u32, _MPCBB2_VCTR45>>[src]

pub fn b1440(&mut self) -> B1440_W<'_>[src]

Bit 0 - B1440

pub fn b1441(&mut self) -> B1441_W<'_>[src]

Bit 1 - B1441

pub fn b1442(&mut self) -> B1442_W<'_>[src]

Bit 2 - B1442

pub fn b1443(&mut self) -> B1443_W<'_>[src]

Bit 3 - B1443

pub fn b1444(&mut self) -> B1444_W<'_>[src]

Bit 4 - B1444

pub fn b1445(&mut self) -> B1445_W<'_>[src]

Bit 5 - B1445

pub fn b1446(&mut self) -> B1446_W<'_>[src]

Bit 6 - B1446

pub fn b1447(&mut self) -> B1447_W<'_>[src]

Bit 7 - B1447

pub fn b1448(&mut self) -> B1448_W<'_>[src]

Bit 8 - B1448

pub fn b1449(&mut self) -> B1449_W<'_>[src]

Bit 9 - B1449

pub fn b1450(&mut self) -> B1450_W<'_>[src]

Bit 10 - B1450

pub fn b1451(&mut self) -> B1451_W<'_>[src]

Bit 11 - B1451

pub fn b1452(&mut self) -> B1452_W<'_>[src]

Bit 12 - B1452

pub fn b1453(&mut self) -> B1453_W<'_>[src]

Bit 13 - B1453

pub fn b1454(&mut self) -> B1454_W<'_>[src]

Bit 14 - B1454

pub fn b1455(&mut self) -> B1455_W<'_>[src]

Bit 15 - B1455

pub fn b1456(&mut self) -> B1456_W<'_>[src]

Bit 16 - B1456

pub fn b1457(&mut self) -> B1457_W<'_>[src]

Bit 17 - B1457

pub fn b1458(&mut self) -> B1458_W<'_>[src]

Bit 18 - B1458

pub fn b1459(&mut self) -> B1459_W<'_>[src]

Bit 19 - B1459

pub fn b1460(&mut self) -> B1460_W<'_>[src]

Bit 20 - B1460

pub fn b1461(&mut self) -> B1461_W<'_>[src]

Bit 21 - B1461

pub fn b1462(&mut self) -> B1462_W<'_>[src]

Bit 22 - B1462

pub fn b1463(&mut self) -> B1463_W<'_>[src]

Bit 23 - B1463

pub fn b1464(&mut self) -> B1464_W<'_>[src]

Bit 24 - B1464

pub fn b1465(&mut self) -> B1465_W<'_>[src]

Bit 25 - B1465

pub fn b1466(&mut self) -> B1466_W<'_>[src]

Bit 26 - B1466

pub fn b1467(&mut self) -> B1467_W<'_>[src]

Bit 27 - B1467

pub fn b1468(&mut self) -> B1468_W<'_>[src]

Bit 28 - B1468

pub fn b1469(&mut self) -> B1469_W<'_>[src]

Bit 29 - B1469

pub fn b1470(&mut self) -> B1470_W<'_>[src]

Bit 30 - B1470

pub fn b1471(&mut self) -> B1471_W<'_>[src]

Bit 31 - B1471

impl W<u32, Reg<u32, _MPCBB2_VCTR46>>[src]

pub fn b1472(&mut self) -> B1472_W<'_>[src]

Bit 0 - B1472

pub fn b1473(&mut self) -> B1473_W<'_>[src]

Bit 1 - B1473

pub fn b1474(&mut self) -> B1474_W<'_>[src]

Bit 2 - B1474

pub fn b1475(&mut self) -> B1475_W<'_>[src]

Bit 3 - B1475

pub fn b1476(&mut self) -> B1476_W<'_>[src]

Bit 4 - B1476

pub fn b1477(&mut self) -> B1477_W<'_>[src]

Bit 5 - B1477

pub fn b1478(&mut self) -> B1478_W<'_>[src]

Bit 6 - B1478

pub fn b1479(&mut self) -> B1479_W<'_>[src]

Bit 7 - B1479

pub fn b1480(&mut self) -> B1480_W<'_>[src]

Bit 8 - B1480

pub fn b1481(&mut self) -> B1481_W<'_>[src]

Bit 9 - B1481

pub fn b1482(&mut self) -> B1482_W<'_>[src]

Bit 10 - B1482

pub fn b1483(&mut self) -> B1483_W<'_>[src]

Bit 11 - B1483

pub fn b1484(&mut self) -> B1484_W<'_>[src]

Bit 12 - B1484

pub fn b1485(&mut self) -> B1485_W<'_>[src]

Bit 13 - B1485

pub fn b1486(&mut self) -> B1486_W<'_>[src]

Bit 14 - B1486

pub fn b1487(&mut self) -> B1487_W<'_>[src]

Bit 15 - B1487

pub fn b1488(&mut self) -> B1488_W<'_>[src]

Bit 16 - B1488

pub fn b1489(&mut self) -> B1489_W<'_>[src]

Bit 17 - B1489

pub fn b1490(&mut self) -> B1490_W<'_>[src]

Bit 18 - B1490

pub fn b1491(&mut self) -> B1491_W<'_>[src]

Bit 19 - B1491

pub fn b1492(&mut self) -> B1492_W<'_>[src]

Bit 20 - B1492

pub fn b1493(&mut self) -> B1493_W<'_>[src]

Bit 21 - B1493

pub fn b1494(&mut self) -> B1494_W<'_>[src]

Bit 22 - B1494

pub fn b1495(&mut self) -> B1495_W<'_>[src]

Bit 23 - B1495

pub fn b1496(&mut self) -> B1496_W<'_>[src]

Bit 24 - B1496

pub fn b1497(&mut self) -> B1497_W<'_>[src]

Bit 25 - B1497

pub fn b1498(&mut self) -> B1498_W<'_>[src]

Bit 26 - B1498

pub fn b1499(&mut self) -> B1499_W<'_>[src]

Bit 27 - B1499

pub fn b1500(&mut self) -> B1500_W<'_>[src]

Bit 28 - B1500

pub fn b1501(&mut self) -> B1501_W<'_>[src]

Bit 29 - B1501

pub fn b1502(&mut self) -> B1502_W<'_>[src]

Bit 30 - B1502

pub fn b1503(&mut self) -> B1503_W<'_>[src]

Bit 31 - B1503

impl W<u32, Reg<u32, _MPCBB2_VCTR47>>[src]

pub fn b1504(&mut self) -> B1504_W<'_>[src]

Bit 0 - B1504

pub fn b1505(&mut self) -> B1505_W<'_>[src]

Bit 1 - B1505

pub fn b1506(&mut self) -> B1506_W<'_>[src]

Bit 2 - B1506

pub fn b1507(&mut self) -> B1507_W<'_>[src]

Bit 3 - B1507

pub fn b1508(&mut self) -> B1508_W<'_>[src]

Bit 4 - B1508

pub fn b1509(&mut self) -> B1509_W<'_>[src]

Bit 5 - B1509

pub fn b1510(&mut self) -> B1510_W<'_>[src]

Bit 6 - B1510

pub fn b1511(&mut self) -> B1511_W<'_>[src]

Bit 7 - B1511

pub fn b1512(&mut self) -> B1512_W<'_>[src]

Bit 8 - B1512

pub fn b1513(&mut self) -> B1513_W<'_>[src]

Bit 9 - B1513

pub fn b1514(&mut self) -> B1514_W<'_>[src]

Bit 10 - B1514

pub fn b1515(&mut self) -> B1515_W<'_>[src]

Bit 11 - B1515

pub fn b1516(&mut self) -> B1516_W<'_>[src]

Bit 12 - B1516

pub fn b1517(&mut self) -> B1517_W<'_>[src]

Bit 13 - B1517

pub fn b1518(&mut self) -> B1518_W<'_>[src]

Bit 14 - B1518

pub fn b1519(&mut self) -> B1519_W<'_>[src]

Bit 15 - B1519

pub fn b1520(&mut self) -> B1520_W<'_>[src]

Bit 16 - B1520

pub fn b1521(&mut self) -> B1521_W<'_>[src]

Bit 17 - B1521

pub fn b1522(&mut self) -> B1522_W<'_>[src]

Bit 18 - B1522

pub fn b1523(&mut self) -> B1523_W<'_>[src]

Bit 19 - B1523

pub fn b1524(&mut self) -> B1524_W<'_>[src]

Bit 20 - B1524

pub fn b1525(&mut self) -> B1525_W<'_>[src]

Bit 21 - B1525

pub fn b1526(&mut self) -> B1526_W<'_>[src]

Bit 22 - B1526

pub fn b1527(&mut self) -> B1527_W<'_>[src]

Bit 23 - B1527

pub fn b1528(&mut self) -> B1528_W<'_>[src]

Bit 24 - B1528

pub fn b1529(&mut self) -> B1529_W<'_>[src]

Bit 25 - B1529

pub fn b1530(&mut self) -> B1530_W<'_>[src]

Bit 26 - B1530

pub fn b1531(&mut self) -> B1531_W<'_>[src]

Bit 27 - B1531

pub fn b1532(&mut self) -> B1532_W<'_>[src]

Bit 28 - B1532

pub fn b1533(&mut self) -> B1533_W<'_>[src]

Bit 29 - B1533

pub fn b1534(&mut self) -> B1534_W<'_>[src]

Bit 30 - B1534

pub fn b1535(&mut self) -> B1535_W<'_>[src]

Bit 31 - B1535

impl W<u32, Reg<u32, _MPCBB2_VCTR48>>[src]

pub fn b1536(&mut self) -> B1536_W<'_>[src]

Bit 0 - B1536

pub fn b1537(&mut self) -> B1537_W<'_>[src]

Bit 1 - B1537

pub fn b1538(&mut self) -> B1538_W<'_>[src]

Bit 2 - B1538

pub fn b1539(&mut self) -> B1539_W<'_>[src]

Bit 3 - B1539

pub fn b1540(&mut self) -> B1540_W<'_>[src]

Bit 4 - B1540

pub fn b1541(&mut self) -> B1541_W<'_>[src]

Bit 5 - B1541

pub fn b1542(&mut self) -> B1542_W<'_>[src]

Bit 6 - B1542

pub fn b1543(&mut self) -> B1543_W<'_>[src]

Bit 7 - B1543

pub fn b1544(&mut self) -> B1544_W<'_>[src]

Bit 8 - B1544

pub fn b1545(&mut self) -> B1545_W<'_>[src]

Bit 9 - B1545

pub fn b1546(&mut self) -> B1546_W<'_>[src]

Bit 10 - B1546

pub fn b1547(&mut self) -> B1547_W<'_>[src]

Bit 11 - B1547

pub fn b1548(&mut self) -> B1548_W<'_>[src]

Bit 12 - B1548

pub fn b1549(&mut self) -> B1549_W<'_>[src]

Bit 13 - B1549

pub fn b1550(&mut self) -> B1550_W<'_>[src]

Bit 14 - B1550

pub fn b1551(&mut self) -> B1551_W<'_>[src]

Bit 15 - B1551

pub fn b1552(&mut self) -> B1552_W<'_>[src]

Bit 16 - B1552

pub fn b1553(&mut self) -> B1553_W<'_>[src]

Bit 17 - B1553

pub fn b1554(&mut self) -> B1554_W<'_>[src]

Bit 18 - B1554

pub fn b1555(&mut self) -> B1555_W<'_>[src]

Bit 19 - B1555

pub fn b1556(&mut self) -> B1556_W<'_>[src]

Bit 20 - B1556

pub fn b1557(&mut self) -> B1557_W<'_>[src]

Bit 21 - B1557

pub fn b1558(&mut self) -> B1558_W<'_>[src]

Bit 22 - B1558

pub fn b1559(&mut self) -> B1559_W<'_>[src]

Bit 23 - B1559

pub fn b1560(&mut self) -> B1560_W<'_>[src]

Bit 24 - B1560

pub fn b1561(&mut self) -> B1561_W<'_>[src]

Bit 25 - B1561

pub fn b1562(&mut self) -> B1562_W<'_>[src]

Bit 26 - B1562

pub fn b1563(&mut self) -> B1563_W<'_>[src]

Bit 27 - B1563

pub fn b1564(&mut self) -> B1564_W<'_>[src]

Bit 28 - B1564

pub fn b1565(&mut self) -> B1565_W<'_>[src]

Bit 29 - B1565

pub fn b1566(&mut self) -> B1566_W<'_>[src]

Bit 30 - B1566

pub fn b1567(&mut self) -> B1567_W<'_>[src]

Bit 31 - B1567

impl W<u32, Reg<u32, _MPCBB2_VCTR49>>[src]

pub fn b1568(&mut self) -> B1568_W<'_>[src]

Bit 0 - B1568

pub fn b1569(&mut self) -> B1569_W<'_>[src]

Bit 1 - B1569

pub fn b1570(&mut self) -> B1570_W<'_>[src]

Bit 2 - B1570

pub fn b1571(&mut self) -> B1571_W<'_>[src]

Bit 3 - B1571

pub fn b1572(&mut self) -> B1572_W<'_>[src]

Bit 4 - B1572

pub fn b1573(&mut self) -> B1573_W<'_>[src]

Bit 5 - B1573

pub fn b1574(&mut self) -> B1574_W<'_>[src]

Bit 6 - B1574

pub fn b1575(&mut self) -> B1575_W<'_>[src]

Bit 7 - B1575

pub fn b1576(&mut self) -> B1576_W<'_>[src]

Bit 8 - B1576

pub fn b1577(&mut self) -> B1577_W<'_>[src]

Bit 9 - B1577

pub fn b1578(&mut self) -> B1578_W<'_>[src]

Bit 10 - B1578

pub fn b1579(&mut self) -> B1579_W<'_>[src]

Bit 11 - B1579

pub fn b1580(&mut self) -> B1580_W<'_>[src]

Bit 12 - B1580

pub fn b1581(&mut self) -> B1581_W<'_>[src]

Bit 13 - B1581

pub fn b1582(&mut self) -> B1582_W<'_>[src]

Bit 14 - B1582

pub fn b1583(&mut self) -> B1583_W<'_>[src]

Bit 15 - B1583

pub fn b1584(&mut self) -> B1584_W<'_>[src]

Bit 16 - B1584

pub fn b1585(&mut self) -> B1585_W<'_>[src]

Bit 17 - B1585

pub fn b1586(&mut self) -> B1586_W<'_>[src]

Bit 18 - B1586

pub fn b1587(&mut self) -> B1587_W<'_>[src]

Bit 19 - B1587

pub fn b1588(&mut self) -> B1588_W<'_>[src]

Bit 20 - B1588

pub fn b1589(&mut self) -> B1589_W<'_>[src]

Bit 21 - B1589

pub fn b1590(&mut self) -> B1590_W<'_>[src]

Bit 22 - B1590

pub fn b1591(&mut self) -> B1591_W<'_>[src]

Bit 23 - B1591

pub fn b1592(&mut self) -> B1592_W<'_>[src]

Bit 24 - B1592

pub fn b1593(&mut self) -> B1593_W<'_>[src]

Bit 25 - B1593

pub fn b1594(&mut self) -> B1594_W<'_>[src]

Bit 26 - B1594

pub fn b1595(&mut self) -> B1595_W<'_>[src]

Bit 27 - B1595

pub fn b1596(&mut self) -> B1596_W<'_>[src]

Bit 28 - B1596

pub fn b1597(&mut self) -> B1597_W<'_>[src]

Bit 29 - B1597

pub fn b1598(&mut self) -> B1598_W<'_>[src]

Bit 30 - B1598

pub fn b1599(&mut self) -> B1599_W<'_>[src]

Bit 31 - B1599

impl W<u32, Reg<u32, _MPCBB2_VCTR50>>[src]

pub fn b1600(&mut self) -> B1600_W<'_>[src]

Bit 0 - B1600

pub fn b1601(&mut self) -> B1601_W<'_>[src]

Bit 1 - B1601

pub fn b1602(&mut self) -> B1602_W<'_>[src]

Bit 2 - B1602

pub fn b1603(&mut self) -> B1603_W<'_>[src]

Bit 3 - B1603

pub fn b1604(&mut self) -> B1604_W<'_>[src]

Bit 4 - B1604

pub fn b1605(&mut self) -> B1605_W<'_>[src]

Bit 5 - B1605

pub fn b1606(&mut self) -> B1606_W<'_>[src]

Bit 6 - B1606

pub fn b1607(&mut self) -> B1607_W<'_>[src]

Bit 7 - B1607

pub fn b1608(&mut self) -> B1608_W<'_>[src]

Bit 8 - B1608

pub fn b1609(&mut self) -> B1609_W<'_>[src]

Bit 9 - B1609

pub fn b1610(&mut self) -> B1610_W<'_>[src]

Bit 10 - B1610

pub fn b1611(&mut self) -> B1611_W<'_>[src]

Bit 11 - B1611

pub fn b1612(&mut self) -> B1612_W<'_>[src]

Bit 12 - B1612

pub fn b1613(&mut self) -> B1613_W<'_>[src]

Bit 13 - B1613

pub fn b1614(&mut self) -> B1614_W<'_>[src]

Bit 14 - B1614

pub fn b1615(&mut self) -> B1615_W<'_>[src]

Bit 15 - B1615

pub fn b1616(&mut self) -> B1616_W<'_>[src]

Bit 16 - B1616

pub fn b1617(&mut self) -> B1617_W<'_>[src]

Bit 17 - B1617

pub fn b1618(&mut self) -> B1618_W<'_>[src]

Bit 18 - B1618

pub fn b1619(&mut self) -> B1619_W<'_>[src]

Bit 19 - B1619

pub fn b1620(&mut self) -> B1620_W<'_>[src]

Bit 20 - B1620

pub fn b1621(&mut self) -> B1621_W<'_>[src]

Bit 21 - B1621

pub fn b1622(&mut self) -> B1622_W<'_>[src]

Bit 22 - B1622

pub fn b1623(&mut self) -> B1623_W<'_>[src]

Bit 23 - B1623

pub fn b1624(&mut self) -> B1624_W<'_>[src]

Bit 24 - B1624

pub fn b1625(&mut self) -> B1625_W<'_>[src]

Bit 25 - B1625

pub fn b1626(&mut self) -> B1626_W<'_>[src]

Bit 26 - B1626

pub fn b1627(&mut self) -> B1627_W<'_>[src]

Bit 27 - B1627

pub fn b1628(&mut self) -> B1628_W<'_>[src]

Bit 28 - B1628

pub fn b1629(&mut self) -> B1629_W<'_>[src]

Bit 29 - B1629

pub fn b1630(&mut self) -> B1630_W<'_>[src]

Bit 30 - B1630

pub fn b1631(&mut self) -> B1631_W<'_>[src]

Bit 31 - B1631

impl W<u32, Reg<u32, _MPCBB2_VCTR51>>[src]

pub fn b1632(&mut self) -> B1632_W<'_>[src]

Bit 0 - B1632

pub fn b1633(&mut self) -> B1633_W<'_>[src]

Bit 1 - B1633

pub fn b1634(&mut self) -> B1634_W<'_>[src]

Bit 2 - B1634

pub fn b1635(&mut self) -> B1635_W<'_>[src]

Bit 3 - B1635

pub fn b1636(&mut self) -> B1636_W<'_>[src]

Bit 4 - B1636

pub fn b1637(&mut self) -> B1637_W<'_>[src]

Bit 5 - B1637

pub fn b1638(&mut self) -> B1638_W<'_>[src]

Bit 6 - B1638

pub fn b1639(&mut self) -> B1639_W<'_>[src]

Bit 7 - B1639

pub fn b1640(&mut self) -> B1640_W<'_>[src]

Bit 8 - B1640

pub fn b1641(&mut self) -> B1641_W<'_>[src]

Bit 9 - B1641

pub fn b1642(&mut self) -> B1642_W<'_>[src]

Bit 10 - B1642

pub fn b1643(&mut self) -> B1643_W<'_>[src]

Bit 11 - B1643

pub fn b1644(&mut self) -> B1644_W<'_>[src]

Bit 12 - B1644

pub fn b1645(&mut self) -> B1645_W<'_>[src]

Bit 13 - B1645

pub fn b1646(&mut self) -> B1646_W<'_>[src]

Bit 14 - B1646

pub fn b1647(&mut self) -> B1647_W<'_>[src]

Bit 15 - B1647

pub fn b1648(&mut self) -> B1648_W<'_>[src]

Bit 16 - B1648

pub fn b1649(&mut self) -> B1649_W<'_>[src]

Bit 17 - B1649

pub fn b1650(&mut self) -> B1650_W<'_>[src]

Bit 18 - B1650

pub fn b1651(&mut self) -> B1651_W<'_>[src]

Bit 19 - B1651

pub fn b1652(&mut self) -> B1652_W<'_>[src]

Bit 20 - B1652

pub fn b1653(&mut self) -> B1653_W<'_>[src]

Bit 21 - B1653

pub fn b1654(&mut self) -> B1654_W<'_>[src]

Bit 22 - B1654

pub fn b1655(&mut self) -> B1655_W<'_>[src]

Bit 23 - B1655

pub fn b1656(&mut self) -> B1656_W<'_>[src]

Bit 24 - B1656

pub fn b1657(&mut self) -> B1657_W<'_>[src]

Bit 25 - B1657

pub fn b1658(&mut self) -> B1658_W<'_>[src]

Bit 26 - B1658

pub fn b1659(&mut self) -> B1659_W<'_>[src]

Bit 27 - B1659

pub fn b1660(&mut self) -> B1660_W<'_>[src]

Bit 28 - B1660

pub fn b1661(&mut self) -> B1661_W<'_>[src]

Bit 29 - B1661

pub fn b1662(&mut self) -> B1662_W<'_>[src]

Bit 30 - B1662

pub fn b1663(&mut self) -> B1663_W<'_>[src]

Bit 31 - B1663

impl W<u32, Reg<u32, _MPCBB2_VCTR52>>[src]

pub fn b1664(&mut self) -> B1664_W<'_>[src]

Bit 0 - B1664

pub fn b1665(&mut self) -> B1665_W<'_>[src]

Bit 1 - B1665

pub fn b1666(&mut self) -> B1666_W<'_>[src]

Bit 2 - B1666

pub fn b1667(&mut self) -> B1667_W<'_>[src]

Bit 3 - B1667

pub fn b1668(&mut self) -> B1668_W<'_>[src]

Bit 4 - B1668

pub fn b1669(&mut self) -> B1669_W<'_>[src]

Bit 5 - B1669

pub fn b1670(&mut self) -> B1670_W<'_>[src]

Bit 6 - B1670

pub fn b1671(&mut self) -> B1671_W<'_>[src]

Bit 7 - B1671

pub fn b1672(&mut self) -> B1672_W<'_>[src]

Bit 8 - B1672

pub fn b1673(&mut self) -> B1673_W<'_>[src]

Bit 9 - B1673

pub fn b1674(&mut self) -> B1674_W<'_>[src]

Bit 10 - B1674

pub fn b1675(&mut self) -> B1675_W<'_>[src]

Bit 11 - B1675

pub fn b1676(&mut self) -> B1676_W<'_>[src]

Bit 12 - B1676

pub fn b1677(&mut self) -> B1677_W<'_>[src]

Bit 13 - B1677

pub fn b1678(&mut self) -> B1678_W<'_>[src]

Bit 14 - B1678

pub fn b1679(&mut self) -> B1679_W<'_>[src]

Bit 15 - B1679

pub fn b1680(&mut self) -> B1680_W<'_>[src]

Bit 16 - B1680

pub fn b1681(&mut self) -> B1681_W<'_>[src]

Bit 17 - B1681

pub fn b1682(&mut self) -> B1682_W<'_>[src]

Bit 18 - B1682

pub fn b1683(&mut self) -> B1683_W<'_>[src]

Bit 19 - B1683

pub fn b1684(&mut self) -> B1684_W<'_>[src]

Bit 20 - B1684

pub fn b1685(&mut self) -> B1685_W<'_>[src]

Bit 21 - B1685

pub fn b1686(&mut self) -> B1686_W<'_>[src]

Bit 22 - B1686

pub fn b1687(&mut self) -> B1687_W<'_>[src]

Bit 23 - B1687

pub fn b1688(&mut self) -> B1688_W<'_>[src]

Bit 24 - B1688

pub fn b1689(&mut self) -> B1689_W<'_>[src]

Bit 25 - B1689

pub fn b1690(&mut self) -> B1690_W<'_>[src]

Bit 26 - B1690

pub fn b1691(&mut self) -> B1691_W<'_>[src]

Bit 27 - B1691

pub fn b1692(&mut self) -> B1692_W<'_>[src]

Bit 28 - B1692

pub fn b1693(&mut self) -> B1693_W<'_>[src]

Bit 29 - B1693

pub fn b1694(&mut self) -> B1694_W<'_>[src]

Bit 30 - B1694

pub fn b1695(&mut self) -> B1695_W<'_>[src]

Bit 31 - B1695

impl W<u32, Reg<u32, _MPCBB2_VCTR53>>[src]

pub fn b1696(&mut self) -> B1696_W<'_>[src]

Bit 0 - B1696

pub fn b1697(&mut self) -> B1697_W<'_>[src]

Bit 1 - B1697

pub fn b1698(&mut self) -> B1698_W<'_>[src]

Bit 2 - B1698

pub fn b1699(&mut self) -> B1699_W<'_>[src]

Bit 3 - B1699

pub fn b1700(&mut self) -> B1700_W<'_>[src]

Bit 4 - B1700

pub fn b1701(&mut self) -> B1701_W<'_>[src]

Bit 5 - B1701

pub fn b1702(&mut self) -> B1702_W<'_>[src]

Bit 6 - B1702

pub fn b1703(&mut self) -> B1703_W<'_>[src]

Bit 7 - B1703

pub fn b1704(&mut self) -> B1704_W<'_>[src]

Bit 8 - B1704

pub fn b1705(&mut self) -> B1705_W<'_>[src]

Bit 9 - B1705

pub fn b1706(&mut self) -> B1706_W<'_>[src]

Bit 10 - B1706

pub fn b1707(&mut self) -> B1707_W<'_>[src]

Bit 11 - B1707

pub fn b1708(&mut self) -> B1708_W<'_>[src]

Bit 12 - B1708

pub fn b1709(&mut self) -> B1709_W<'_>[src]

Bit 13 - B1709

pub fn b1710(&mut self) -> B1710_W<'_>[src]

Bit 14 - B1710

pub fn b1711(&mut self) -> B1711_W<'_>[src]

Bit 15 - B1711

pub fn b1712(&mut self) -> B1712_W<'_>[src]

Bit 16 - B1712

pub fn b1713(&mut self) -> B1713_W<'_>[src]

Bit 17 - B1713

pub fn b1714(&mut self) -> B1714_W<'_>[src]

Bit 18 - B1714

pub fn b1715(&mut self) -> B1715_W<'_>[src]

Bit 19 - B1715

pub fn b1716(&mut self) -> B1716_W<'_>[src]

Bit 20 - B1716

pub fn b1717(&mut self) -> B1717_W<'_>[src]

Bit 21 - B1717

pub fn b1718(&mut self) -> B1718_W<'_>[src]

Bit 22 - B1718

pub fn b1719(&mut self) -> B1719_W<'_>[src]

Bit 23 - B1719

pub fn b1720(&mut self) -> B1720_W<'_>[src]

Bit 24 - B1720

pub fn b1721(&mut self) -> B1721_W<'_>[src]

Bit 25 - B1721

pub fn b1722(&mut self) -> B1722_W<'_>[src]

Bit 26 - B1722

pub fn b1723(&mut self) -> B1723_W<'_>[src]

Bit 27 - B1723

pub fn b1724(&mut self) -> B1724_W<'_>[src]

Bit 28 - B1724

pub fn b1725(&mut self) -> B1725_W<'_>[src]

Bit 29 - B1725

pub fn b1726(&mut self) -> B1726_W<'_>[src]

Bit 30 - B1726

pub fn b1727(&mut self) -> B1727_W<'_>[src]

Bit 31 - B1727

impl W<u32, Reg<u32, _MPCBB2_VCTR54>>[src]

pub fn b1728(&mut self) -> B1728_W<'_>[src]

Bit 0 - B1728

pub fn b1729(&mut self) -> B1729_W<'_>[src]

Bit 1 - B1729

pub fn b1730(&mut self) -> B1730_W<'_>[src]

Bit 2 - B1730

pub fn b1731(&mut self) -> B1731_W<'_>[src]

Bit 3 - B1731

pub fn b1732(&mut self) -> B1732_W<'_>[src]

Bit 4 - B1732

pub fn b1733(&mut self) -> B1733_W<'_>[src]

Bit 5 - B1733

pub fn b1734(&mut self) -> B1734_W<'_>[src]

Bit 6 - B1734

pub fn b1735(&mut self) -> B1735_W<'_>[src]

Bit 7 - B1735

pub fn b1736(&mut self) -> B1736_W<'_>[src]

Bit 8 - B1736

pub fn b1737(&mut self) -> B1737_W<'_>[src]

Bit 9 - B1737

pub fn b1738(&mut self) -> B1738_W<'_>[src]

Bit 10 - B1738

pub fn b1739(&mut self) -> B1739_W<'_>[src]

Bit 11 - B1739

pub fn b1740(&mut self) -> B1740_W<'_>[src]

Bit 12 - B1740

pub fn b1741(&mut self) -> B1741_W<'_>[src]

Bit 13 - B1741

pub fn b1742(&mut self) -> B1742_W<'_>[src]

Bit 14 - B1742

pub fn b1743(&mut self) -> B1743_W<'_>[src]

Bit 15 - B1743

pub fn b1744(&mut self) -> B1744_W<'_>[src]

Bit 16 - B1744

pub fn b1745(&mut self) -> B1745_W<'_>[src]

Bit 17 - B1745

pub fn b1746(&mut self) -> B1746_W<'_>[src]

Bit 18 - B1746

pub fn b1747(&mut self) -> B1747_W<'_>[src]

Bit 19 - B1747

pub fn b1748(&mut self) -> B1748_W<'_>[src]

Bit 20 - B1748

pub fn b1749(&mut self) -> B1749_W<'_>[src]

Bit 21 - B1749

pub fn b1750(&mut self) -> B1750_W<'_>[src]

Bit 22 - B1750

pub fn b1751(&mut self) -> B1751_W<'_>[src]

Bit 23 - B1751

pub fn b1752(&mut self) -> B1752_W<'_>[src]

Bit 24 - B1752

pub fn b1753(&mut self) -> B1753_W<'_>[src]

Bit 25 - B1753

pub fn b1754(&mut self) -> B1754_W<'_>[src]

Bit 26 - B1754

pub fn b1755(&mut self) -> B1755_W<'_>[src]

Bit 27 - B1755

pub fn b1756(&mut self) -> B1756_W<'_>[src]

Bit 28 - B1756

pub fn b1757(&mut self) -> B1757_W<'_>[src]

Bit 29 - B1757

pub fn b1758(&mut self) -> B1758_W<'_>[src]

Bit 30 - B1758

pub fn b1759(&mut self) -> B1759_W<'_>[src]

Bit 31 - B1759

impl W<u32, Reg<u32, _MPCBB2_VCTR55>>[src]

pub fn b1760(&mut self) -> B1760_W<'_>[src]

Bit 0 - B1760

pub fn b1761(&mut self) -> B1761_W<'_>[src]

Bit 1 - B1761

pub fn b1762(&mut self) -> B1762_W<'_>[src]

Bit 2 - B1762

pub fn b1763(&mut self) -> B1763_W<'_>[src]

Bit 3 - B1763

pub fn b1764(&mut self) -> B1764_W<'_>[src]

Bit 4 - B1764

pub fn b1765(&mut self) -> B1765_W<'_>[src]

Bit 5 - B1765

pub fn b1766(&mut self) -> B1766_W<'_>[src]

Bit 6 - B1766

pub fn b1767(&mut self) -> B1767_W<'_>[src]

Bit 7 - B1767

pub fn b1768(&mut self) -> B1768_W<'_>[src]

Bit 8 - B1768

pub fn b1769(&mut self) -> B1769_W<'_>[src]

Bit 9 - B1769

pub fn b1770(&mut self) -> B1770_W<'_>[src]

Bit 10 - B1770

pub fn b1771(&mut self) -> B1771_W<'_>[src]

Bit 11 - B1771

pub fn b1772(&mut self) -> B1772_W<'_>[src]

Bit 12 - B1772

pub fn b1773(&mut self) -> B1773_W<'_>[src]

Bit 13 - B1773

pub fn b1774(&mut self) -> B1774_W<'_>[src]

Bit 14 - B1774

pub fn b1775(&mut self) -> B1775_W<'_>[src]

Bit 15 - B1775

pub fn b1776(&mut self) -> B1776_W<'_>[src]

Bit 16 - B1776

pub fn b1777(&mut self) -> B1777_W<'_>[src]

Bit 17 - B1777

pub fn b1778(&mut self) -> B1778_W<'_>[src]

Bit 18 - B1778

pub fn b1779(&mut self) -> B1779_W<'_>[src]

Bit 19 - B1779

pub fn b1780(&mut self) -> B1780_W<'_>[src]

Bit 20 - B1780

pub fn b1781(&mut self) -> B1781_W<'_>[src]

Bit 21 - B1781

pub fn b1782(&mut self) -> B1782_W<'_>[src]

Bit 22 - B1782

pub fn b1783(&mut self) -> B1783_W<'_>[src]

Bit 23 - B1783

pub fn b1784(&mut self) -> B1784_W<'_>[src]

Bit 24 - B1784

pub fn b1785(&mut self) -> B1785_W<'_>[src]

Bit 25 - B1785

pub fn b1786(&mut self) -> B1786_W<'_>[src]

Bit 26 - B1786

pub fn b1787(&mut self) -> B1787_W<'_>[src]

Bit 27 - B1787

pub fn b1788(&mut self) -> B1788_W<'_>[src]

Bit 28 - B1788

pub fn b1789(&mut self) -> B1789_W<'_>[src]

Bit 29 - B1789

pub fn b1790(&mut self) -> B1790_W<'_>[src]

Bit 30 - B1790

pub fn b1791(&mut self) -> B1791_W<'_>[src]

Bit 31 - B1791

impl W<u32, Reg<u32, _MPCBB2_VCTR56>>[src]

pub fn b1792(&mut self) -> B1792_W<'_>[src]

Bit 0 - B1792

pub fn b1793(&mut self) -> B1793_W<'_>[src]

Bit 1 - B1793

pub fn b1794(&mut self) -> B1794_W<'_>[src]

Bit 2 - B1794

pub fn b1795(&mut self) -> B1795_W<'_>[src]

Bit 3 - B1795

pub fn b1796(&mut self) -> B1796_W<'_>[src]

Bit 4 - B1796

pub fn b1797(&mut self) -> B1797_W<'_>[src]

Bit 5 - B1797

pub fn b1798(&mut self) -> B1798_W<'_>[src]

Bit 6 - B1798

pub fn b1799(&mut self) -> B1799_W<'_>[src]

Bit 7 - B1799

pub fn b1800(&mut self) -> B1800_W<'_>[src]

Bit 8 - B1800

pub fn b1801(&mut self) -> B1801_W<'_>[src]

Bit 9 - B1801

pub fn b1802(&mut self) -> B1802_W<'_>[src]

Bit 10 - B1802

pub fn b1803(&mut self) -> B1803_W<'_>[src]

Bit 11 - B1803

pub fn b1804(&mut self) -> B1804_W<'_>[src]

Bit 12 - B1804

pub fn b1805(&mut self) -> B1805_W<'_>[src]

Bit 13 - B1805

pub fn b1806(&mut self) -> B1806_W<'_>[src]

Bit 14 - B1806

pub fn b1807(&mut self) -> B1807_W<'_>[src]

Bit 15 - B1807

pub fn b1808(&mut self) -> B1808_W<'_>[src]

Bit 16 - B1808

pub fn b1809(&mut self) -> B1809_W<'_>[src]

Bit 17 - B1809

pub fn b1810(&mut self) -> B1810_W<'_>[src]

Bit 18 - B1810

pub fn b1811(&mut self) -> B1811_W<'_>[src]

Bit 19 - B1811

pub fn b1812(&mut self) -> B1812_W<'_>[src]

Bit 20 - B1812

pub fn b1813(&mut self) -> B1813_W<'_>[src]

Bit 21 - B1813

pub fn b1814(&mut self) -> B1814_W<'_>[src]

Bit 22 - B1814

pub fn b1815(&mut self) -> B1815_W<'_>[src]

Bit 23 - B1815

pub fn b1816(&mut self) -> B1816_W<'_>[src]

Bit 24 - B1816

pub fn b1817(&mut self) -> B1817_W<'_>[src]

Bit 25 - B1817

pub fn b1818(&mut self) -> B1818_W<'_>[src]

Bit 26 - B1818

pub fn b1819(&mut self) -> B1819_W<'_>[src]

Bit 27 - B1819

pub fn b1820(&mut self) -> B1820_W<'_>[src]

Bit 28 - B1820

pub fn b1821(&mut self) -> B1821_W<'_>[src]

Bit 29 - B1821

pub fn b1822(&mut self) -> B1822_W<'_>[src]

Bit 30 - B1822

pub fn b1823(&mut self) -> B1823_W<'_>[src]

Bit 31 - B1823

impl W<u32, Reg<u32, _MPCBB2_VCTR57>>[src]

pub fn b1824(&mut self) -> B1824_W<'_>[src]

Bit 0 - B1824

pub fn b1825(&mut self) -> B1825_W<'_>[src]

Bit 1 - B1825

pub fn b1826(&mut self) -> B1826_W<'_>[src]

Bit 2 - B1826

pub fn b1827(&mut self) -> B1827_W<'_>[src]

Bit 3 - B1827

pub fn b1828(&mut self) -> B1828_W<'_>[src]

Bit 4 - B1828

pub fn b1829(&mut self) -> B1829_W<'_>[src]

Bit 5 - B1829

pub fn b1830(&mut self) -> B1830_W<'_>[src]

Bit 6 - B1830

pub fn b1831(&mut self) -> B1831_W<'_>[src]

Bit 7 - B1831

pub fn b1832(&mut self) -> B1832_W<'_>[src]

Bit 8 - B1832

pub fn b1833(&mut self) -> B1833_W<'_>[src]

Bit 9 - B1833

pub fn b1834(&mut self) -> B1834_W<'_>[src]

Bit 10 - B1834

pub fn b1835(&mut self) -> B1835_W<'_>[src]

Bit 11 - B1835

pub fn b1836(&mut self) -> B1836_W<'_>[src]

Bit 12 - B1836

pub fn b1837(&mut self) -> B1837_W<'_>[src]

Bit 13 - B1837

pub fn b1838(&mut self) -> B1838_W<'_>[src]

Bit 14 - B1838

pub fn b1839(&mut self) -> B1839_W<'_>[src]

Bit 15 - B1839

pub fn b1840(&mut self) -> B1840_W<'_>[src]

Bit 16 - B1840

pub fn b1841(&mut self) -> B1841_W<'_>[src]

Bit 17 - B1841

pub fn b1842(&mut self) -> B1842_W<'_>[src]

Bit 18 - B1842

pub fn b1843(&mut self) -> B1843_W<'_>[src]

Bit 19 - B1843

pub fn b1844(&mut self) -> B1844_W<'_>[src]

Bit 20 - B1844

pub fn b1845(&mut self) -> B1845_W<'_>[src]

Bit 21 - B1845

pub fn b1846(&mut self) -> B1846_W<'_>[src]

Bit 22 - B1846

pub fn b1847(&mut self) -> B1847_W<'_>[src]

Bit 23 - B1847

pub fn b1848(&mut self) -> B1848_W<'_>[src]

Bit 24 - B1848

pub fn b1849(&mut self) -> B1849_W<'_>[src]

Bit 25 - B1849

pub fn b1850(&mut self) -> B1850_W<'_>[src]

Bit 26 - B1850

pub fn b1851(&mut self) -> B1851_W<'_>[src]

Bit 27 - B1851

pub fn b1852(&mut self) -> B1852_W<'_>[src]

Bit 28 - B1852

pub fn b1853(&mut self) -> B1853_W<'_>[src]

Bit 29 - B1853

pub fn b1854(&mut self) -> B1854_W<'_>[src]

Bit 30 - B1854

pub fn b1855(&mut self) -> B1855_W<'_>[src]

Bit 31 - B1855

impl W<u32, Reg<u32, _MPCBB2_VCTR58>>[src]

pub fn b1856(&mut self) -> B1856_W<'_>[src]

Bit 0 - B1856

pub fn b1857(&mut self) -> B1857_W<'_>[src]

Bit 1 - B1857

pub fn b1858(&mut self) -> B1858_W<'_>[src]

Bit 2 - B1858

pub fn b1859(&mut self) -> B1859_W<'_>[src]

Bit 3 - B1859

pub fn b1860(&mut self) -> B1860_W<'_>[src]

Bit 4 - B1860

pub fn b1861(&mut self) -> B1861_W<'_>[src]

Bit 5 - B1861

pub fn b1862(&mut self) -> B1862_W<'_>[src]

Bit 6 - B1862

pub fn b1863(&mut self) -> B1863_W<'_>[src]

Bit 7 - B1863

pub fn b1864(&mut self) -> B1864_W<'_>[src]

Bit 8 - B1864

pub fn b1865(&mut self) -> B1865_W<'_>[src]

Bit 9 - B1865

pub fn b1866(&mut self) -> B1866_W<'_>[src]

Bit 10 - B1866

pub fn b1867(&mut self) -> B1867_W<'_>[src]

Bit 11 - B1867

pub fn b1868(&mut self) -> B1868_W<'_>[src]

Bit 12 - B1868

pub fn b1869(&mut self) -> B1869_W<'_>[src]

Bit 13 - B1869

pub fn b1870(&mut self) -> B1870_W<'_>[src]

Bit 14 - B1870

pub fn b1871(&mut self) -> B1871_W<'_>[src]

Bit 15 - B1871

pub fn b1872(&mut self) -> B1872_W<'_>[src]

Bit 16 - B1872

pub fn b1873(&mut self) -> B1873_W<'_>[src]

Bit 17 - B1873

pub fn b1874(&mut self) -> B1874_W<'_>[src]

Bit 18 - B1874

pub fn b1875(&mut self) -> B1875_W<'_>[src]

Bit 19 - B1875

pub fn b1876(&mut self) -> B1876_W<'_>[src]

Bit 20 - B1876

pub fn b1877(&mut self) -> B1877_W<'_>[src]

Bit 21 - B1877

pub fn b1878(&mut self) -> B1878_W<'_>[src]

Bit 22 - B1878

pub fn b1879(&mut self) -> B1879_W<'_>[src]

Bit 23 - B1879

pub fn b1880(&mut self) -> B1880_W<'_>[src]

Bit 24 - B1880

pub fn b1881(&mut self) -> B1881_W<'_>[src]

Bit 25 - B1881

pub fn b1882(&mut self) -> B1882_W<'_>[src]

Bit 26 - B1882

pub fn b1883(&mut self) -> B1883_W<'_>[src]

Bit 27 - B1883

pub fn b1884(&mut self) -> B1884_W<'_>[src]

Bit 28 - B1884

pub fn b1885(&mut self) -> B1885_W<'_>[src]

Bit 29 - B1885

pub fn b1886(&mut self) -> B1886_W<'_>[src]

Bit 30 - B1886

pub fn b1887(&mut self) -> B1887_W<'_>[src]

Bit 31 - B1887

impl W<u32, Reg<u32, _MPCBB2_VCTR59>>[src]

pub fn b1888(&mut self) -> B1888_W<'_>[src]

Bit 0 - B1888

pub fn b1889(&mut self) -> B1889_W<'_>[src]

Bit 1 - B1889

pub fn b1890(&mut self) -> B1890_W<'_>[src]

Bit 2 - B1890

pub fn b1891(&mut self) -> B1891_W<'_>[src]

Bit 3 - B1891

pub fn b1892(&mut self) -> B1892_W<'_>[src]

Bit 4 - B1892

pub fn b1893(&mut self) -> B1893_W<'_>[src]

Bit 5 - B1893

pub fn b1894(&mut self) -> B1894_W<'_>[src]

Bit 6 - B1894

pub fn b1895(&mut self) -> B1895_W<'_>[src]

Bit 7 - B1895

pub fn b1896(&mut self) -> B1896_W<'_>[src]

Bit 8 - B1896

pub fn b1897(&mut self) -> B1897_W<'_>[src]

Bit 9 - B1897

pub fn b1898(&mut self) -> B1898_W<'_>[src]

Bit 10 - B1898

pub fn b1899(&mut self) -> B1899_W<'_>[src]

Bit 11 - B1899

pub fn b1900(&mut self) -> B1900_W<'_>[src]

Bit 12 - B1900

pub fn b1901(&mut self) -> B1901_W<'_>[src]

Bit 13 - B1901

pub fn b1902(&mut self) -> B1902_W<'_>[src]

Bit 14 - B1902

pub fn b1903(&mut self) -> B1903_W<'_>[src]

Bit 15 - B1903

pub fn b1904(&mut self) -> B1904_W<'_>[src]

Bit 16 - B1904

pub fn b1905(&mut self) -> B1905_W<'_>[src]

Bit 17 - B1905

pub fn b1906(&mut self) -> B1906_W<'_>[src]

Bit 18 - B1906

pub fn b1907(&mut self) -> B1907_W<'_>[src]

Bit 19 - B1907

pub fn b1908(&mut self) -> B1908_W<'_>[src]

Bit 20 - B1908

pub fn b1909(&mut self) -> B1909_W<'_>[src]

Bit 21 - B1909

pub fn b1910(&mut self) -> B1910_W<'_>[src]

Bit 22 - B1910

pub fn b1911(&mut self) -> B1911_W<'_>[src]

Bit 23 - B1911

pub fn b1912(&mut self) -> B1912_W<'_>[src]

Bit 24 - B1912

pub fn b1913(&mut self) -> B1913_W<'_>[src]

Bit 25 - B1913

pub fn b1914(&mut self) -> B1914_W<'_>[src]

Bit 26 - B1914

pub fn b1915(&mut self) -> B1915_W<'_>[src]

Bit 27 - B1915

pub fn b1916(&mut self) -> B1916_W<'_>[src]

Bit 28 - B1916

pub fn b1917(&mut self) -> B1917_W<'_>[src]

Bit 29 - B1917

pub fn b1918(&mut self) -> B1918_W<'_>[src]

Bit 30 - B1918

pub fn b1919(&mut self) -> B1919_W<'_>[src]

Bit 31 - B1919

impl W<u32, Reg<u32, _MPCBB2_VCTR60>>[src]

pub fn b1920(&mut self) -> B1920_W<'_>[src]

Bit 0 - B1920

pub fn b1921(&mut self) -> B1921_W<'_>[src]

Bit 1 - B1921

pub fn b1922(&mut self) -> B1922_W<'_>[src]

Bit 2 - B1922

pub fn b1923(&mut self) -> B1923_W<'_>[src]

Bit 3 - B1923

pub fn b1924(&mut self) -> B1924_W<'_>[src]

Bit 4 - B1924

pub fn b1925(&mut self) -> B1925_W<'_>[src]

Bit 5 - B1925

pub fn b1926(&mut self) -> B1926_W<'_>[src]

Bit 6 - B1926

pub fn b1927(&mut self) -> B1927_W<'_>[src]

Bit 7 - B1927

pub fn b1928(&mut self) -> B1928_W<'_>[src]

Bit 8 - B1928

pub fn b1929(&mut self) -> B1929_W<'_>[src]

Bit 9 - B1929

pub fn b1930(&mut self) -> B1930_W<'_>[src]

Bit 10 - B1930

pub fn b1931(&mut self) -> B1931_W<'_>[src]

Bit 11 - B1931

pub fn b1932(&mut self) -> B1932_W<'_>[src]

Bit 12 - B1932

pub fn b1933(&mut self) -> B1933_W<'_>[src]

Bit 13 - B1933

pub fn b1934(&mut self) -> B1934_W<'_>[src]

Bit 14 - B1934

pub fn b1935(&mut self) -> B1935_W<'_>[src]

Bit 15 - B1935

pub fn b1936(&mut self) -> B1936_W<'_>[src]

Bit 16 - B1936

pub fn b1937(&mut self) -> B1937_W<'_>[src]

Bit 17 - B1937

pub fn b1938(&mut self) -> B1938_W<'_>[src]

Bit 18 - B1938

pub fn b1939(&mut self) -> B1939_W<'_>[src]

Bit 19 - B1939

pub fn b1940(&mut self) -> B1940_W<'_>[src]

Bit 20 - B1940

pub fn b1941(&mut self) -> B1941_W<'_>[src]

Bit 21 - B1941

pub fn b1942(&mut self) -> B1942_W<'_>[src]

Bit 22 - B1942

pub fn b1943(&mut self) -> B1943_W<'_>[src]

Bit 23 - B1943

pub fn b1944(&mut self) -> B1944_W<'_>[src]

Bit 24 - B1944

pub fn b1945(&mut self) -> B1945_W<'_>[src]

Bit 25 - B1945

pub fn b1946(&mut self) -> B1946_W<'_>[src]

Bit 26 - B1946

pub fn b1947(&mut self) -> B1947_W<'_>[src]

Bit 27 - B1947

pub fn b1948(&mut self) -> B1948_W<'_>[src]

Bit 28 - B1948

pub fn b1949(&mut self) -> B1949_W<'_>[src]

Bit 29 - B1949

pub fn b1950(&mut self) -> B1950_W<'_>[src]

Bit 30 - B1950

pub fn b1951(&mut self) -> B1951_W<'_>[src]

Bit 31 - B1951

impl W<u32, Reg<u32, _MPCBB2_VCTR61>>[src]

pub fn b1952(&mut self) -> B1952_W<'_>[src]

Bit 0 - B1952

pub fn b1953(&mut self) -> B1953_W<'_>[src]

Bit 1 - B1953

pub fn b1954(&mut self) -> B1954_W<'_>[src]

Bit 2 - B1954

pub fn b1955(&mut self) -> B1955_W<'_>[src]

Bit 3 - B1955

pub fn b1956(&mut self) -> B1956_W<'_>[src]

Bit 4 - B1956

pub fn b1957(&mut self) -> B1957_W<'_>[src]

Bit 5 - B1957

pub fn b1958(&mut self) -> B1958_W<'_>[src]

Bit 6 - B1958

pub fn b1959(&mut self) -> B1959_W<'_>[src]

Bit 7 - B1959

pub fn b1960(&mut self) -> B1960_W<'_>[src]

Bit 8 - B1960

pub fn b1961(&mut self) -> B1961_W<'_>[src]

Bit 9 - B1961

pub fn b1962(&mut self) -> B1962_W<'_>[src]

Bit 10 - B1962

pub fn b1963(&mut self) -> B1963_W<'_>[src]

Bit 11 - B1963

pub fn b1964(&mut self) -> B1964_W<'_>[src]

Bit 12 - B1964

pub fn b1965(&mut self) -> B1965_W<'_>[src]

Bit 13 - B1965

pub fn b1966(&mut self) -> B1966_W<'_>[src]

Bit 14 - B1966

pub fn b1967(&mut self) -> B1967_W<'_>[src]

Bit 15 - B1967

pub fn b1968(&mut self) -> B1968_W<'_>[src]

Bit 16 - B1968

pub fn b1969(&mut self) -> B1969_W<'_>[src]

Bit 17 - B1969

pub fn b1970(&mut self) -> B1970_W<'_>[src]

Bit 18 - B1970

pub fn b1971(&mut self) -> B1971_W<'_>[src]

Bit 19 - B1971

pub fn b1972(&mut self) -> B1972_W<'_>[src]

Bit 20 - B1972

pub fn b1973(&mut self) -> B1973_W<'_>[src]

Bit 21 - B1973

pub fn b1974(&mut self) -> B1974_W<'_>[src]

Bit 22 - B1974

pub fn b1975(&mut self) -> B1975_W<'_>[src]

Bit 23 - B1975

pub fn b1976(&mut self) -> B1976_W<'_>[src]

Bit 24 - B1976

pub fn b1977(&mut self) -> B1977_W<'_>[src]

Bit 25 - B1977

pub fn b1978(&mut self) -> B1978_W<'_>[src]

Bit 26 - B1978

pub fn b1979(&mut self) -> B1979_W<'_>[src]

Bit 27 - B1979

pub fn b1980(&mut self) -> B1980_W<'_>[src]

Bit 28 - B1980

pub fn b1981(&mut self) -> B1981_W<'_>[src]

Bit 29 - B1981

pub fn b1982(&mut self) -> B1982_W<'_>[src]

Bit 30 - B1982

pub fn b1983(&mut self) -> B1983_W<'_>[src]

Bit 31 - B1983

impl W<u32, Reg<u32, _MPCBB2_VCTR62>>[src]

pub fn b1984(&mut self) -> B1984_W<'_>[src]

Bit 0 - B1984

pub fn b1985(&mut self) -> B1985_W<'_>[src]

Bit 1 - B1985

pub fn b1986(&mut self) -> B1986_W<'_>[src]

Bit 2 - B1986

pub fn b1987(&mut self) -> B1987_W<'_>[src]

Bit 3 - B1987

pub fn b1988(&mut self) -> B1988_W<'_>[src]

Bit 4 - B1988

pub fn b1989(&mut self) -> B1989_W<'_>[src]

Bit 5 - B1989

pub fn b1990(&mut self) -> B1990_W<'_>[src]

Bit 6 - B1990

pub fn b1991(&mut self) -> B1991_W<'_>[src]

Bit 7 - B1991

pub fn b1992(&mut self) -> B1992_W<'_>[src]

Bit 8 - B1992

pub fn b1993(&mut self) -> B1993_W<'_>[src]

Bit 9 - B1993

pub fn b1994(&mut self) -> B1994_W<'_>[src]

Bit 10 - B1994

pub fn b1995(&mut self) -> B1995_W<'_>[src]

Bit 11 - B1995

pub fn b1996(&mut self) -> B1996_W<'_>[src]

Bit 12 - B1996

pub fn b1997(&mut self) -> B1997_W<'_>[src]

Bit 13 - B1997

pub fn b1998(&mut self) -> B1998_W<'_>[src]

Bit 14 - B1998

pub fn b1999(&mut self) -> B1999_W<'_>[src]

Bit 15 - B1999

pub fn b2000(&mut self) -> B2000_W<'_>[src]

Bit 16 - B2000

pub fn b2001(&mut self) -> B2001_W<'_>[src]

Bit 17 - B2001

pub fn b2002(&mut self) -> B2002_W<'_>[src]

Bit 18 - B2002

pub fn b2003(&mut self) -> B2003_W<'_>[src]

Bit 19 - B2003

pub fn b2004(&mut self) -> B2004_W<'_>[src]

Bit 20 - B2004

pub fn b2005(&mut self) -> B2005_W<'_>[src]

Bit 21 - B2005

pub fn b2006(&mut self) -> B2006_W<'_>[src]

Bit 22 - B2006

pub fn b2007(&mut self) -> B2007_W<'_>[src]

Bit 23 - B2007

pub fn b2008(&mut self) -> B2008_W<'_>[src]

Bit 24 - B2008

pub fn b2009(&mut self) -> B2009_W<'_>[src]

Bit 25 - B2009

pub fn b2010(&mut self) -> B2010_W<'_>[src]

Bit 26 - B2010

pub fn b2011(&mut self) -> B2011_W<'_>[src]

Bit 27 - B2011

pub fn b2012(&mut self) -> B2012_W<'_>[src]

Bit 28 - B2012

pub fn b2013(&mut self) -> B2013_W<'_>[src]

Bit 29 - B2013

pub fn b2014(&mut self) -> B2014_W<'_>[src]

Bit 30 - B2014

pub fn b2015(&mut self) -> B2015_W<'_>[src]

Bit 31 - B2015

impl W<u32, Reg<u32, _MPCBB2_VCTR63>>[src]

pub fn b2016(&mut self) -> B2016_W<'_>[src]

Bit 0 - B2016

pub fn b2017(&mut self) -> B2017_W<'_>[src]

Bit 1 - B2017

pub fn b2018(&mut self) -> B2018_W<'_>[src]

Bit 2 - B2018

pub fn b2019(&mut self) -> B2019_W<'_>[src]

Bit 3 - B2019

pub fn b2020(&mut self) -> B2020_W<'_>[src]

Bit 4 - B2020

pub fn b2021(&mut self) -> B2021_W<'_>[src]

Bit 5 - B2021

pub fn b2022(&mut self) -> B2022_W<'_>[src]

Bit 6 - B2022

pub fn b2023(&mut self) -> B2023_W<'_>[src]

Bit 7 - B2023

pub fn b2024(&mut self) -> B2024_W<'_>[src]

Bit 8 - B2024

pub fn b2025(&mut self) -> B2025_W<'_>[src]

Bit 9 - B2025

pub fn b2026(&mut self) -> B2026_W<'_>[src]

Bit 10 - B2026

pub fn b2027(&mut self) -> B2027_W<'_>[src]

Bit 11 - B2027

pub fn b2028(&mut self) -> B2028_W<'_>[src]

Bit 12 - B2028

pub fn b2029(&mut self) -> B2029_W<'_>[src]

Bit 13 - B2029

pub fn b2030(&mut self) -> B2030_W<'_>[src]

Bit 14 - B2030

pub fn b2031(&mut self) -> B2031_W<'_>[src]

Bit 15 - B2031

pub fn b2032(&mut self) -> B2032_W<'_>[src]

Bit 16 - B2032

pub fn b2033(&mut self) -> B2033_W<'_>[src]

Bit 17 - B2033

pub fn b2034(&mut self) -> B2034_W<'_>[src]

Bit 18 - B2034

pub fn b2035(&mut self) -> B2035_W<'_>[src]

Bit 19 - B2035

pub fn b2036(&mut self) -> B2036_W<'_>[src]

Bit 20 - B2036

pub fn b2037(&mut self) -> B2037_W<'_>[src]

Bit 21 - B2037

pub fn b2038(&mut self) -> B2038_W<'_>[src]

Bit 22 - B2038

pub fn b2039(&mut self) -> B2039_W<'_>[src]

Bit 23 - B2039

pub fn b2040(&mut self) -> B2040_W<'_>[src]

Bit 24 - B2040

pub fn b2041(&mut self) -> B2041_W<'_>[src]

Bit 25 - B2041

pub fn b2042(&mut self) -> B2042_W<'_>[src]

Bit 26 - B2042

pub fn b2043(&mut self) -> B2043_W<'_>[src]

Bit 27 - B2043

pub fn b2044(&mut self) -> B2044_W<'_>[src]

Bit 28 - B2044

pub fn b2045(&mut self) -> B2045_W<'_>[src]

Bit 29 - B2045

pub fn b2046(&mut self) -> B2046_W<'_>[src]

Bit 30 - B2046

pub fn b2047(&mut self) -> B2047_W<'_>[src]

Bit 31 - B2047

impl W<u32, Reg<u32, _CR1>>[src]

pub fn lpr(&mut self) -> LPR_W<'_>[src]

Bit 14 - Low-power run

pub fn vos(&mut self) -> VOS_W<'_>[src]

Bits 9:10 - Voltage scaling range selection

pub fn dbp(&mut self) -> DBP_W<'_>[src]

Bit 8 - Disable backup domain write protection

pub fn lpms(&mut self) -> LPMS_W<'_>[src]

Bits 0:2 - Low-power mode selection

impl W<u32, Reg<u32, _CR2>>[src]

pub fn usv(&mut self) -> USV_W<'_>[src]

Bit 10 - VDDUSB USB supply valid

pub fn iosv(&mut self) -> IOSV_W<'_>[src]

Bit 9 - VDDIO2 Independent I/Os supply valid

pub fn pvme4(&mut self) -> PVME4_W<'_>[src]

Bit 7 - Peripheral voltage monitoring 4 enable: VDDA vs. 2.2V

pub fn pvme3(&mut self) -> PVME3_W<'_>[src]

Bit 6 - Peripheral voltage monitoring 3 enable: VDDA vs. 1.62V

pub fn pvme2(&mut self) -> PVME2_W<'_>[src]

Bit 5 - Peripheral voltage monitoring 2 enable: VDDIO2 vs. 0.9V

pub fn pvme1(&mut self) -> PVME1_W<'_>[src]

Bit 4 - Peripheral voltage monitoring 1 enable: VDDUSB vs. 1.2V

pub fn pls(&mut self) -> PLS_W<'_>[src]

Bits 1:3 - Power voltage detector level selection

pub fn pvde(&mut self) -> PVDE_W<'_>[src]

Bit 0 - Power voltage detector enable

impl W<u32, Reg<u32, _CR3>>[src]

pub fn ucpd_dbdis(&mut self) -> UCPD_DBDIS_W<'_>[src]

Bit 14 - UCPD_DBDIS

pub fn ucpd_stdby(&mut self) -> UCPD_STDBY_W<'_>[src]

Bit 13 - UCPD_STDBY

pub fn ulpmen(&mut self) -> ULPMEN_W<'_>[src]

Bit 11 - ULPMEN

pub fn apc(&mut self) -> APC_W<'_>[src]

Bit 10 - Apply pull-up and pull-down configuration

pub fn rrs(&mut self) -> RRS_W<'_>[src]

Bits 8:9 - SRAM2 retention in Standby mode

pub fn ewup5(&mut self) -> EWUP5_W<'_>[src]

Bit 4 - Enable Wakeup pin WKUP5

pub fn ewup4(&mut self) -> EWUP4_W<'_>[src]

Bit 3 - Enable Wakeup pin WKUP4

pub fn ewup3(&mut self) -> EWUP3_W<'_>[src]

Bit 2 - Enable Wakeup pin WKUP3

pub fn ewup2(&mut self) -> EWUP2_W<'_>[src]

Bit 1 - Enable Wakeup pin WKUP2

pub fn ewup1(&mut self) -> EWUP1_W<'_>[src]

Bit 0 - Enable Wakeup pin WKUP1

impl W<u32, Reg<u32, _CR4>>[src]

pub fn smpslpen(&mut self) -> SMPSLPEN_W<'_>[src]

Bit 15 - SMPSLPEN

pub fn smpsfsten(&mut self) -> SMPSFSTEN_W<'_>[src]

Bit 14 - SMPSFSTEN

pub fn extsmpsen(&mut self) -> EXTSMPSEN_W<'_>[src]

Bit 13 - EXTSMPSEN

pub fn smpsbyp(&mut self) -> SMPSBYP_W<'_>[src]

Bit 12 - SMPSBYP

pub fn vbrs(&mut self) -> VBRS_W<'_>[src]

Bit 9 - VBAT battery charging resistor selection

pub fn vbe(&mut self) -> VBE_W<'_>[src]

Bit 8 - VBAT battery charging enable

pub fn wupp5(&mut self) -> WUPP5_W<'_>[src]

Bit 4 - Wakeup pin WKUP5 polarity

pub fn wupp4(&mut self) -> WUPP4_W<'_>[src]

Bit 3 - Wakeup pin WKUP4 polarity

pub fn wupp3(&mut self) -> WUPP3_W<'_>[src]

Bit 2 - Wakeup pin WKUP3 polarity

pub fn wupp2(&mut self) -> WUPP2_W<'_>[src]

Bit 1 - Wakeup pin WKUP2 polarity

pub fn wupp1(&mut self) -> WUPP1_W<'_>[src]

Bit 0 - Wakeup pin WKUP1 polarity

impl W<u32, Reg<u32, _SCR>>[src]

pub fn csbf(&mut self) -> CSBF_W<'_>[src]

Bit 8 - Clear standby flag

pub fn cwuf5(&mut self) -> CWUF5_W<'_>[src]

Bit 4 - Clear wakeup flag 5

pub fn cwuf4(&mut self) -> CWUF4_W<'_>[src]

Bit 3 - Clear wakeup flag 4

pub fn cwuf3(&mut self) -> CWUF3_W<'_>[src]

Bit 2 - Clear wakeup flag 3

pub fn cwuf2(&mut self) -> CWUF2_W<'_>[src]

Bit 1 - Clear wakeup flag 2

pub fn cwuf1(&mut self) -> CWUF1_W<'_>[src]

Bit 0 - Clear wakeup flag 1

impl W<u32, Reg<u32, _PUCRA>>[src]

pub fn pu15(&mut self) -> PU15_W<'_>[src]

Bit 15 - Port A pull-up bit y (y=0..15)

pub fn pu14(&mut self) -> PU14_W<'_>[src]

Bit 14 - Port A pull-up bit y (y=0..15)

pub fn pu13(&mut self) -> PU13_W<'_>[src]

Bit 13 - Port A pull-up bit y (y=0..15)

pub fn pu12(&mut self) -> PU12_W<'_>[src]

Bit 12 - Port A pull-up bit y (y=0..15)

pub fn pu11(&mut self) -> PU11_W<'_>[src]

Bit 11 - Port A pull-up bit y (y=0..15)

pub fn pu10(&mut self) -> PU10_W<'_>[src]

Bit 10 - Port A pull-up bit y (y=0..15)

pub fn pu9(&mut self) -> PU9_W<'_>[src]

Bit 9 - Port A pull-up bit y (y=0..15)

pub fn pu8(&mut self) -> PU8_W<'_>[src]

Bit 8 - Port A pull-up bit y (y=0..15)

pub fn pu7(&mut self) -> PU7_W<'_>[src]

Bit 7 - Port A pull-up bit y (y=0..15)

pub fn pu6(&mut self) -> PU6_W<'_>[src]

Bit 6 - Port A pull-up bit y (y=0..15)

pub fn pu5(&mut self) -> PU5_W<'_>[src]

Bit 5 - Port A pull-up bit y (y=0..15)

pub fn pu4(&mut self) -> PU4_W<'_>[src]

Bit 4 - Port A pull-up bit y (y=0..15)

pub fn pu3(&mut self) -> PU3_W<'_>[src]

Bit 3 - Port A pull-up bit y (y=0..15)

pub fn pu2(&mut self) -> PU2_W<'_>[src]

Bit 2 - Port A pull-up bit y (y=0..15)

pub fn pu1(&mut self) -> PU1_W<'_>[src]

Bit 1 - Port A pull-up bit y (y=0..15)

pub fn pu0(&mut self) -> PU0_W<'_>[src]

Bit 0 - Port A pull-up bit y (y=0..15)

impl W<u32, Reg<u32, _PDCRA>>[src]

pub fn pd15(&mut self) -> PD15_W<'_>[src]

Bit 15 - Port A pull-down bit y (y=0..15)

pub fn pd14(&mut self) -> PD14_W<'_>[src]

Bit 14 - Port A pull-down bit y (y=0..15)

pub fn pd13(&mut self) -> PD13_W<'_>[src]

Bit 13 - Port A pull-down bit y (y=0..15)

pub fn pd12(&mut self) -> PD12_W<'_>[src]

Bit 12 - Port A pull-down bit y (y=0..15)

pub fn pd11(&mut self) -> PD11_W<'_>[src]

Bit 11 - Port A pull-down bit y (y=0..15)

pub fn pd10(&mut self) -> PD10_W<'_>[src]

Bit 10 - Port A pull-down bit y (y=0..15)

pub fn pd9(&mut self) -> PD9_W<'_>[src]

Bit 9 - Port A pull-down bit y (y=0..15)

pub fn pd8(&mut self) -> PD8_W<'_>[src]

Bit 8 - Port A pull-down bit y (y=0..15)

pub fn pd7(&mut self) -> PD7_W<'_>[src]

Bit 7 - Port A pull-down bit y (y=0..15)

pub fn pd6(&mut self) -> PD6_W<'_>[src]

Bit 6 - Port A pull-down bit y (y=0..15)

pub fn pd5(&mut self) -> PD5_W<'_>[src]

Bit 5 - Port A pull-down bit y (y=0..15)

pub fn pd4(&mut self) -> PD4_W<'_>[src]

Bit 4 - Port A pull-down bit y (y=0..15)

pub fn pd3(&mut self) -> PD3_W<'_>[src]

Bit 3 - Port A pull-down bit y (y=0..15)

pub fn pd2(&mut self) -> PD2_W<'_>[src]

Bit 2 - Port A pull-down bit y (y=0..15)

pub fn pd1(&mut self) -> PD1_W<'_>[src]

Bit 1 - Port A pull-down bit y (y=0..15)

pub fn pd0(&mut self) -> PD0_W<'_>[src]

Bit 0 - Port A pull-down bit y (y=0..15)

impl W<u32, Reg<u32, _PUCRB>>[src]

pub fn pu15(&mut self) -> PU15_W<'_>[src]

Bit 15 - Port B pull-up bit y (y=0..15)

pub fn pu14(&mut self) -> PU14_W<'_>[src]

Bit 14 - Port B pull-up bit y (y=0..15)

pub fn pu13(&mut self) -> PU13_W<'_>[src]

Bit 13 - Port B pull-up bit y (y=0..15)

pub fn pu12(&mut self) -> PU12_W<'_>[src]

Bit 12 - Port B pull-up bit y (y=0..15)

pub fn pu11(&mut self) -> PU11_W<'_>[src]

Bit 11 - Port B pull-up bit y (y=0..15)

pub fn pu10(&mut self) -> PU10_W<'_>[src]

Bit 10 - Port B pull-up bit y (y=0..15)

pub fn pu9(&mut self) -> PU9_W<'_>[src]

Bit 9 - Port B pull-up bit y (y=0..15)

pub fn pu8(&mut self) -> PU8_W<'_>[src]

Bit 8 - Port B pull-up bit y (y=0..15)

pub fn pu7(&mut self) -> PU7_W<'_>[src]

Bit 7 - Port B pull-up bit y (y=0..15)

pub fn pu6(&mut self) -> PU6_W<'_>[src]

Bit 6 - Port B pull-up bit y (y=0..15)

pub fn pu5(&mut self) -> PU5_W<'_>[src]

Bit 5 - Port B pull-up bit y (y=0..15)

pub fn pu4(&mut self) -> PU4_W<'_>[src]

Bit 4 - Port B pull-up bit y (y=0..15)

pub fn pu3(&mut self) -> PU3_W<'_>[src]

Bit 3 - Port B pull-up bit y (y=0..15)

pub fn pu2(&mut self) -> PU2_W<'_>[src]

Bit 2 - Port B pull-up bit y (y=0..15)

pub fn pu1(&mut self) -> PU1_W<'_>[src]

Bit 1 - Port B pull-up bit y (y=0..15)

pub fn pu0(&mut self) -> PU0_W<'_>[src]

Bit 0 - Port B pull-up bit y (y=0..15)

impl W<u32, Reg<u32, _PDCRB>>[src]

pub fn pd15(&mut self) -> PD15_W<'_>[src]

Bit 15 - Port B pull-down bit y (y=0..15)

pub fn pd14(&mut self) -> PD14_W<'_>[src]

Bit 14 - Port B pull-down bit y (y=0..15)

pub fn pd13(&mut self) -> PD13_W<'_>[src]

Bit 13 - Port B pull-down bit y (y=0..15)

pub fn pd12(&mut self) -> PD12_W<'_>[src]

Bit 12 - Port B pull-down bit y (y=0..15)

pub fn pd11(&mut self) -> PD11_W<'_>[src]

Bit 11 - Port B pull-down bit y (y=0..15)

pub fn pd10(&mut self) -> PD10_W<'_>[src]

Bit 10 - Port B pull-down bit y (y=0..15)

pub fn pd9(&mut self) -> PD9_W<'_>[src]

Bit 9 - Port B pull-down bit y (y=0..15)

pub fn pd8(&mut self) -> PD8_W<'_>[src]

Bit 8 - Port B pull-down bit y (y=0..15)

pub fn pd7(&mut self) -> PD7_W<'_>[src]

Bit 7 - Port B pull-down bit y (y=0..15)

pub fn pd6(&mut self) -> PD6_W<'_>[src]

Bit 6 - Port B pull-down bit y (y=0..15)

pub fn pd5(&mut self) -> PD5_W<'_>[src]

Bit 5 - Port B pull-down bit y (y=0..15)

pub fn pd4(&mut self) -> PD4_W<'_>[src]

Bit 4 - Port B pull-down bit y (y=0..15)

pub fn pd3(&mut self) -> PD3_W<'_>[src]

Bit 3 - Port B pull-down bit y (y=0..15)

pub fn pd2(&mut self) -> PD2_W<'_>[src]

Bit 2 - Port B pull-down bit y (y=0..15)

pub fn pd1(&mut self) -> PD1_W<'_>[src]

Bit 1 - Port B pull-down bit y (y=0..15)

pub fn pd0(&mut self) -> PD0_W<'_>[src]

Bit 0 - Port B pull-down bit y (y=0..15)

impl W<u32, Reg<u32, _PUCRC>>[src]

pub fn pu15(&mut self) -> PU15_W<'_>[src]

Bit 15 - Port C pull-up bit y (y=0..15)

pub fn pu14(&mut self) -> PU14_W<'_>[src]

Bit 14 - Port C pull-up bit y (y=0..15)

pub fn pu13(&mut self) -> PU13_W<'_>[src]

Bit 13 - Port C pull-up bit y (y=0..15)

pub fn pu12(&mut self) -> PU12_W<'_>[src]

Bit 12 - Port C pull-up bit y (y=0..15)

pub fn pu11(&mut self) -> PU11_W<'_>[src]

Bit 11 - Port C pull-up bit y (y=0..15)

pub fn pu10(&mut self) -> PU10_W<'_>[src]

Bit 10 - Port C pull-up bit y (y=0..15)

pub fn pu9(&mut self) -> PU9_W<'_>[src]

Bit 9 - Port C pull-up bit y (y=0..15)

pub fn pu8(&mut self) -> PU8_W<'_>[src]

Bit 8 - Port C pull-up bit y (y=0..15)

pub fn pu7(&mut self) -> PU7_W<'_>[src]

Bit 7 - Port C pull-up bit y (y=0..15)

pub fn pu6(&mut self) -> PU6_W<'_>[src]

Bit 6 - Port C pull-up bit y (y=0..15)

pub fn pu5(&mut self) -> PU5_W<'_>[src]

Bit 5 - Port C pull-up bit y (y=0..15)

pub fn pu4(&mut self) -> PU4_W<'_>[src]

Bit 4 - Port C pull-up bit y (y=0..15)

pub fn pu3(&mut self) -> PU3_W<'_>[src]

Bit 3 - Port C pull-up bit y (y=0..15)

pub fn pu2(&mut self) -> PU2_W<'_>[src]

Bit 2 - Port C pull-up bit y (y=0..15)

pub fn pu1(&mut self) -> PU1_W<'_>[src]

Bit 1 - Port C pull-up bit y (y=0..15)

pub fn pu0(&mut self) -> PU0_W<'_>[src]

Bit 0 - Port C pull-up bit y (y=0..15)

impl W<u32, Reg<u32, _PDCRC>>[src]

pub fn pd15(&mut self) -> PD15_W<'_>[src]

Bit 15 - Port C pull-down bit y (y=0..15)

pub fn pd14(&mut self) -> PD14_W<'_>[src]

Bit 14 - Port C pull-down bit y (y=0..15)

pub fn pd13(&mut self) -> PD13_W<'_>[src]

Bit 13 - Port C pull-down bit y (y=0..15)

pub fn pd12(&mut self) -> PD12_W<'_>[src]

Bit 12 - Port C pull-down bit y (y=0..15)

pub fn pd11(&mut self) -> PD11_W<'_>[src]

Bit 11 - Port C pull-down bit y (y=0..15)

pub fn pd10(&mut self) -> PD10_W<'_>[src]

Bit 10 - Port C pull-down bit y (y=0..15)

pub fn pd9(&mut self) -> PD9_W<'_>[src]

Bit 9 - Port C pull-down bit y (y=0..15)

pub fn pd8(&mut self) -> PD8_W<'_>[src]

Bit 8 - Port C pull-down bit y (y=0..15)

pub fn pd7(&mut self) -> PD7_W<'_>[src]

Bit 7 - Port C pull-down bit y (y=0..15)

pub fn pd6(&mut self) -> PD6_W<'_>[src]

Bit 6 - Port C pull-down bit y (y=0..15)

pub fn pd5(&mut self) -> PD5_W<'_>[src]

Bit 5 - Port C pull-down bit y (y=0..15)

pub fn pd4(&mut self) -> PD4_W<'_>[src]

Bit 4 - Port C pull-down bit y (y=0..15)

pub fn pd3(&mut self) -> PD3_W<'_>[src]

Bit 3 - Port C pull-down bit y (y=0..15)

pub fn pd2(&mut self) -> PD2_W<'_>[src]

Bit 2 - Port C pull-down bit y (y=0..15)

pub fn pd1(&mut self) -> PD1_W<'_>[src]

Bit 1 - Port C pull-down bit y (y=0..15)

pub fn pd0(&mut self) -> PD0_W<'_>[src]

Bit 0 - Port C pull-down bit y (y=0..15)

impl W<u32, Reg<u32, _PUCRD>>[src]

pub fn pu15(&mut self) -> PU15_W<'_>[src]

Bit 15 - Port D pull-up bit y (y=0..15)

pub fn pu14(&mut self) -> PU14_W<'_>[src]

Bit 14 - Port D pull-up bit y (y=0..15)

pub fn pu13(&mut self) -> PU13_W<'_>[src]

Bit 13 - Port D pull-up bit y (y=0..15)

pub fn pu12(&mut self) -> PU12_W<'_>[src]

Bit 12 - Port D pull-up bit y (y=0..15)

pub fn pu11(&mut self) -> PU11_W<'_>[src]

Bit 11 - Port D pull-up bit y (y=0..15)

pub fn pu10(&mut self) -> PU10_W<'_>[src]

Bit 10 - Port D pull-up bit y (y=0..15)

pub fn pu9(&mut self) -> PU9_W<'_>[src]

Bit 9 - Port D pull-up bit y (y=0..15)

pub fn pu8(&mut self) -> PU8_W<'_>[src]

Bit 8 - Port D pull-up bit y (y=0..15)

pub fn pu7(&mut self) -> PU7_W<'_>[src]

Bit 7 - Port D pull-up bit y (y=0..15)

pub fn pu6(&mut self) -> PU6_W<'_>[src]

Bit 6 - Port D pull-up bit y (y=0..15)

pub fn pu5(&mut self) -> PU5_W<'_>[src]

Bit 5 - Port D pull-up bit y (y=0..15)

pub fn pu4(&mut self) -> PU4_W<'_>[src]

Bit 4 - Port D pull-up bit y (y=0..15)

pub fn pu3(&mut self) -> PU3_W<'_>[src]

Bit 3 - Port D pull-up bit y (y=0..15)

pub fn pu2(&mut self) -> PU2_W<'_>[src]

Bit 2 - Port D pull-up bit y (y=0..15)

pub fn pu1(&mut self) -> PU1_W<'_>[src]

Bit 1 - Port D pull-up bit y (y=0..15)

pub fn pu0(&mut self) -> PU0_W<'_>[src]

Bit 0 - Port D pull-up bit y (y=0..15)

impl W<u32, Reg<u32, _PDCRD>>[src]

pub fn pd15(&mut self) -> PD15_W<'_>[src]

Bit 15 - Port D pull-down bit y (y=0..15)

pub fn pd14(&mut self) -> PD14_W<'_>[src]

Bit 14 - Port D pull-down bit y (y=0..15)

pub fn pd13(&mut self) -> PD13_W<'_>[src]

Bit 13 - Port D pull-down bit y (y=0..15)

pub fn pd12(&mut self) -> PD12_W<'_>[src]

Bit 12 - Port D pull-down bit y (y=0..15)

pub fn pd11(&mut self) -> PD11_W<'_>[src]

Bit 11 - Port D pull-down bit y (y=0..15)

pub fn pd10(&mut self) -> PD10_W<'_>[src]

Bit 10 - Port D pull-down bit y (y=0..15)

pub fn pd9(&mut self) -> PD9_W<'_>[src]

Bit 9 - Port D pull-down bit y (y=0..15)

pub fn pd8(&mut self) -> PD8_W<'_>[src]

Bit 8 - Port D pull-down bit y (y=0..15)

pub fn pd7(&mut self) -> PD7_W<'_>[src]

Bit 7 - Port D pull-down bit y (y=0..15)

pub fn pd6(&mut self) -> PD6_W<'_>[src]

Bit 6 - Port D pull-down bit y (y=0..15)

pub fn pd5(&mut self) -> PD5_W<'_>[src]

Bit 5 - Port D pull-down bit y (y=0..15)

pub fn pd4(&mut self) -> PD4_W<'_>[src]

Bit 4 - Port D pull-down bit y (y=0..15)

pub fn pd3(&mut self) -> PD3_W<'_>[src]

Bit 3 - Port D pull-down bit y (y=0..15)

pub fn pd2(&mut self) -> PD2_W<'_>[src]

Bit 2 - Port D pull-down bit y (y=0..15)

pub fn pd1(&mut self) -> PD1_W<'_>[src]

Bit 1 - Port D pull-down bit y (y=0..15)

pub fn pd0(&mut self) -> PD0_W<'_>[src]

Bit 0 - Port D pull-down bit y (y=0..15)

impl W<u32, Reg<u32, _PUCRE>>[src]

pub fn pu15(&mut self) -> PU15_W<'_>[src]

Bit 15 - Port E pull-up bit y (y=0..15)

pub fn pu14(&mut self) -> PU14_W<'_>[src]

Bit 14 - Port E pull-up bit y (y=0..15)

pub fn pu13(&mut self) -> PU13_W<'_>[src]

Bit 13 - Port E pull-up bit y (y=0..15)

pub fn pu12(&mut self) -> PU12_W<'_>[src]

Bit 12 - Port E pull-up bit y (y=0..15)

pub fn pu11(&mut self) -> PU11_W<'_>[src]

Bit 11 - Port E pull-up bit y (y=0..15)

pub fn pu10(&mut self) -> PU10_W<'_>[src]

Bit 10 - Port E pull-up bit y (y=0..15)

pub fn pu9(&mut self) -> PU9_W<'_>[src]

Bit 9 - Port E pull-up bit y (y=0..15)

pub fn pu8(&mut self) -> PU8_W<'_>[src]

Bit 8 - Port E pull-up bit y (y=0..15)

pub fn pu7(&mut self) -> PU7_W<'_>[src]

Bit 7 - Port E pull-up bit y (y=0..15)

pub fn pu6(&mut self) -> PU6_W<'_>[src]

Bit 6 - Port E pull-up bit y (y=0..15)

pub fn pu5(&mut self) -> PU5_W<'_>[src]

Bit 5 - Port E pull-up bit y (y=0..15)

pub fn pu4(&mut self) -> PU4_W<'_>[src]

Bit 4 - Port E pull-up bit y (y=0..15)

pub fn pu3(&mut self) -> PU3_W<'_>[src]

Bit 3 - Port E pull-up bit y (y=0..15)

pub fn pu2(&mut self) -> PU2_W<'_>[src]

Bit 2 - Port E pull-up bit y (y=0..15)

pub fn pu1(&mut self) -> PU1_W<'_>[src]

Bit 1 - Port E pull-up bit y (y=0..15)

pub fn pu0(&mut self) -> PU0_W<'_>[src]

Bit 0 - Port E pull-up bit y (y=0..15)

impl W<u32, Reg<u32, _PDCRE>>[src]

pub fn pd15(&mut self) -> PD15_W<'_>[src]

Bit 15 - Port E pull-down bit y (y=0..15)

pub fn pd14(&mut self) -> PD14_W<'_>[src]

Bit 14 - Port E pull-down bit y (y=0..15)

pub fn pd13(&mut self) -> PD13_W<'_>[src]

Bit 13 - Port E pull-down bit y (y=0..15)

pub fn pd12(&mut self) -> PD12_W<'_>[src]

Bit 12 - Port E pull-down bit y (y=0..15)

pub fn pd11(&mut self) -> PD11_W<'_>[src]

Bit 11 - Port E pull-down bit y (y=0..15)

pub fn pd10(&mut self) -> PD10_W<'_>[src]

Bit 10 - Port E pull-down bit y (y=0..15)

pub fn pd9(&mut self) -> PD9_W<'_>[src]

Bit 9 - Port E pull-down bit y (y=0..15)

pub fn pd8(&mut self) -> PD8_W<'_>[src]

Bit 8 - Port E pull-down bit y (y=0..15)

pub fn pd7(&mut self) -> PD7_W<'_>[src]

Bit 7 - Port E pull-down bit y (y=0..15)

pub fn pd6(&mut self) -> PD6_W<'_>[src]

Bit 6 - Port E pull-down bit y (y=0..15)

pub fn pd5(&mut self) -> PD5_W<'_>[src]

Bit 5 - Port E pull-down bit y (y=0..15)

pub fn pd4(&mut self) -> PD4_W<'_>[src]

Bit 4 - Port E pull-down bit y (y=0..15)

pub fn pd3(&mut self) -> PD3_W<'_>[src]

Bit 3 - Port E pull-down bit y (y=0..15)

pub fn pd2(&mut self) -> PD2_W<'_>[src]

Bit 2 - Port E pull-down bit y (y=0..15)

pub fn pd1(&mut self) -> PD1_W<'_>[src]

Bit 1 - Port E pull-down bit y (y=0..15)

pub fn pd0(&mut self) -> PD0_W<'_>[src]

Bit 0 - Port E pull-down bit y (y=0..15)

impl W<u32, Reg<u32, _PUCRF>>[src]

pub fn pu15(&mut self) -> PU15_W<'_>[src]

Bit 15 - Port F pull-up bit y (y=0..15)

pub fn pu14(&mut self) -> PU14_W<'_>[src]

Bit 14 - Port F pull-up bit y (y=0..15)

pub fn pu13(&mut self) -> PU13_W<'_>[src]

Bit 13 - Port F pull-up bit y (y=0..15)

pub fn pu12(&mut self) -> PU12_W<'_>[src]

Bit 12 - Port F pull-up bit y (y=0..15)

pub fn pu11(&mut self) -> PU11_W<'_>[src]

Bit 11 - Port F pull-up bit y (y=0..15)

pub fn pu10(&mut self) -> PU10_W<'_>[src]

Bit 10 - Port F pull-up bit y (y=0..15)

pub fn pu9(&mut self) -> PU9_W<'_>[src]

Bit 9 - Port F pull-up bit y (y=0..15)

pub fn pu8(&mut self) -> PU8_W<'_>[src]

Bit 8 - Port F pull-up bit y (y=0..15)

pub fn pu7(&mut self) -> PU7_W<'_>[src]

Bit 7 - Port F pull-up bit y (y=0..15)

pub fn pu6(&mut self) -> PU6_W<'_>[src]

Bit 6 - Port F pull-up bit y (y=0..15)

pub fn pu5(&mut self) -> PU5_W<'_>[src]

Bit 5 - Port F pull-up bit y (y=0..15)

pub fn pu4(&mut self) -> PU4_W<'_>[src]

Bit 4 - Port F pull-up bit y (y=0..15)

pub fn pu3(&mut self) -> PU3_W<'_>[src]

Bit 3 - Port F pull-up bit y (y=0..15)

pub fn pu2(&mut self) -> PU2_W<'_>[src]

Bit 2 - Port F pull-up bit y (y=0..15)

pub fn pu1(&mut self) -> PU1_W<'_>[src]

Bit 1 - Port F pull-up bit y (y=0..15)

pub fn pu0(&mut self) -> PU0_W<'_>[src]

Bit 0 - Port F pull-up bit y (y=0..15)

impl W<u32, Reg<u32, _PDCRF>>[src]

pub fn pd15(&mut self) -> PD15_W<'_>[src]

Bit 15 - Port F pull-down bit y (y=0..15)

pub fn pd14(&mut self) -> PD14_W<'_>[src]

Bit 14 - Port F pull-down bit y (y=0..15)

pub fn pd13(&mut self) -> PD13_W<'_>[src]

Bit 13 - Port F pull-down bit y (y=0..15)

pub fn pd12(&mut self) -> PD12_W<'_>[src]

Bit 12 - Port F pull-down bit y (y=0..15)

pub fn pd11(&mut self) -> PD11_W<'_>[src]

Bit 11 - Port F pull-down bit y (y=0..15)

pub fn pd10(&mut self) -> PD10_W<'_>[src]

Bit 10 - Port F pull-down bit y (y=0..15)

pub fn pd9(&mut self) -> PD9_W<'_>[src]

Bit 9 - Port F pull-down bit y (y=0..15)

pub fn pd8(&mut self) -> PD8_W<'_>[src]

Bit 8 - Port F pull-down bit y (y=0..15)

pub fn pd7(&mut self) -> PD7_W<'_>[src]

Bit 7 - Port F pull-down bit y (y=0..15)

pub fn pd6(&mut self) -> PD6_W<'_>[src]

Bit 6 - Port F pull-down bit y (y=0..15)

pub fn pd5(&mut self) -> PD5_W<'_>[src]

Bit 5 - Port F pull-down bit y (y=0..15)

pub fn pd4(&mut self) -> PD4_W<'_>[src]

Bit 4 - Port F pull-down bit y (y=0..15)

pub fn pd3(&mut self) -> PD3_W<'_>[src]

Bit 3 - Port F pull-down bit y (y=0..15)

pub fn pd2(&mut self) -> PD2_W<'_>[src]

Bit 2 - Port F pull-down bit y (y=0..15)

pub fn pd1(&mut self) -> PD1_W<'_>[src]

Bit 1 - Port F pull-down bit y (y=0..15)

pub fn pd0(&mut self) -> PD0_W<'_>[src]

Bit 0 - Port F pull-down bit y (y=0..15)

impl W<u32, Reg<u32, _PUCRG>>[src]

pub fn pu15(&mut self) -> PU15_W<'_>[src]

Bit 15 - Port G pull-up bit y (y=0..15)

pub fn pu14(&mut self) -> PU14_W<'_>[src]

Bit 14 - Port G pull-up bit y (y=0..15)

pub fn pu13(&mut self) -> PU13_W<'_>[src]

Bit 13 - Port G pull-up bit y (y=0..15)

pub fn pu12(&mut self) -> PU12_W<'_>[src]

Bit 12 - Port G pull-up bit y (y=0..15)

pub fn pu11(&mut self) -> PU11_W<'_>[src]

Bit 11 - Port G pull-up bit y (y=0..15)

pub fn pu10(&mut self) -> PU10_W<'_>[src]

Bit 10 - Port G pull-up bit y (y=0..15)

pub fn pu9(&mut self) -> PU9_W<'_>[src]

Bit 9 - Port G pull-up bit y (y=0..15)

pub fn pu8(&mut self) -> PU8_W<'_>[src]

Bit 8 - Port G pull-up bit y (y=0..15)

pub fn pu7(&mut self) -> PU7_W<'_>[src]

Bit 7 - Port G pull-up bit y (y=0..15)

pub fn pu6(&mut self) -> PU6_W<'_>[src]

Bit 6 - Port G pull-up bit y (y=0..15)

pub fn pu5(&mut self) -> PU5_W<'_>[src]

Bit 5 - Port G pull-up bit y (y=0..15)

pub fn pu4(&mut self) -> PU4_W<'_>[src]

Bit 4 - Port G pull-up bit y (y=0..15)

pub fn pu3(&mut self) -> PU3_W<'_>[src]

Bit 3 - Port G pull-up bit y (y=0..15)

pub fn pu2(&mut self) -> PU2_W<'_>[src]

Bit 2 - Port G pull-up bit y (y=0..15)

pub fn pu1(&mut self) -> PU1_W<'_>[src]

Bit 1 - Port G pull-up bit y (y=0..15)

pub fn pu0(&mut self) -> PU0_W<'_>[src]

Bit 0 - Port G pull-up bit y (y=0..15)

impl W<u32, Reg<u32, _PDCRG>>[src]

pub fn pd15(&mut self) -> PD15_W<'_>[src]

Bit 15 - Port G pull-down bit y (y=0..15)

pub fn pd14(&mut self) -> PD14_W<'_>[src]

Bit 14 - Port G pull-down bit y (y=0..15)

pub fn pd13(&mut self) -> PD13_W<'_>[src]

Bit 13 - Port G pull-down bit y (y=0..15)

pub fn pd12(&mut self) -> PD12_W<'_>[src]

Bit 12 - Port G pull-down bit y (y=0..15)

pub fn pd11(&mut self) -> PD11_W<'_>[src]

Bit 11 - Port G pull-down bit y (y=0..15)

pub fn pd10(&mut self) -> PD10_W<'_>[src]

Bit 10 - Port G pull-down bit y (y=0..15)

pub fn pd9(&mut self) -> PD9_W<'_>[src]

Bit 9 - Port G pull-down bit y (y=0..15)

pub fn pd8(&mut self) -> PD8_W<'_>[src]

Bit 8 - Port G pull-down bit y (y=0..15)

pub fn pd7(&mut self) -> PD7_W<'_>[src]

Bit 7 - Port G pull-down bit y (y=0..15)

pub fn pd6(&mut self) -> PD6_W<'_>[src]

Bit 6 - Port G pull-down bit y (y=0..15)

pub fn pd5(&mut self) -> PD5_W<'_>[src]

Bit 5 - Port G pull-down bit y (y=0..15)

pub fn pd4(&mut self) -> PD4_W<'_>[src]

Bit 4 - Port G pull-down bit y (y=0..15)

pub fn pd3(&mut self) -> PD3_W<'_>[src]

Bit 3 - Port G pull-down bit y (y=0..15)

pub fn pd2(&mut self) -> PD2_W<'_>[src]

Bit 2 - Port G pull-down bit y (y=0..15)

pub fn pd1(&mut self) -> PD1_W<'_>[src]

Bit 1 - Port G pull-down bit y (y=0..15)

pub fn pd0(&mut self) -> PD0_W<'_>[src]

Bit 0 - Port G pull-down bit y (y=0..15)

impl W<u32, Reg<u32, _PUCRH>>[src]

pub fn pu15(&mut self) -> PU15_W<'_>[src]

Bit 15 - Port G pull-up bit y (y=0..15)

pub fn pu14(&mut self) -> PU14_W<'_>[src]

Bit 14 - Port G pull-up bit y (y=0..15)

pub fn pu13(&mut self) -> PU13_W<'_>[src]

Bit 13 - Port G pull-up bit y (y=0..15)

pub fn pu12(&mut self) -> PU12_W<'_>[src]

Bit 12 - Port G pull-up bit y (y=0..15)

pub fn pu11(&mut self) -> PU11_W<'_>[src]

Bit 11 - Port G pull-up bit y (y=0..15)

pub fn pu10(&mut self) -> PU10_W<'_>[src]

Bit 10 - Port G pull-up bit y (y=0..15)

pub fn pu9(&mut self) -> PU9_W<'_>[src]

Bit 9 - Port G pull-up bit y (y=0..15)

pub fn pu8(&mut self) -> PU8_W<'_>[src]

Bit 8 - Port G pull-up bit y (y=0..15)

pub fn pu7(&mut self) -> PU7_W<'_>[src]

Bit 7 - Port G pull-up bit y (y=0..15)

pub fn pu6(&mut self) -> PU6_W<'_>[src]

Bit 6 - Port G pull-up bit y (y=0..15)

pub fn pu5(&mut self) -> PU5_W<'_>[src]

Bit 5 - Port G pull-up bit y (y=0..15)

pub fn pu4(&mut self) -> PU4_W<'_>[src]

Bit 4 - Port G pull-up bit y (y=0..15)

pub fn pu3(&mut self) -> PU3_W<'_>[src]

Bit 3 - Port G pull-up bit y (y=0..15)

pub fn pu2(&mut self) -> PU2_W<'_>[src]

Bit 2 - Port G pull-up bit y (y=0..15)

pub fn pu1(&mut self) -> PU1_W<'_>[src]

Bit 1 - Port G pull-up bit y (y=0..15)

pub fn pu0(&mut self) -> PU0_W<'_>[src]

Bit 0 - Port G pull-up bit y (y=0..15)

impl W<u32, Reg<u32, _PDCRH>>[src]

pub fn pd15(&mut self) -> PD15_W<'_>[src]

Bit 15 - Port G pull-down bit y (y=0..15)

pub fn pd14(&mut self) -> PD14_W<'_>[src]

Bit 14 - Port G pull-down bit y (y=0..15)

pub fn pd13(&mut self) -> PD13_W<'_>[src]

Bit 13 - Port G pull-down bit y (y=0..15)

pub fn pd12(&mut self) -> PD12_W<'_>[src]

Bit 12 - Port G pull-down bit y (y=0..15)

pub fn pd11(&mut self) -> PD11_W<'_>[src]

Bit 11 - Port G pull-down bit y (y=0..15)

pub fn pd10(&mut self) -> PD10_W<'_>[src]

Bit 10 - Port G pull-down bit y (y=0..15)

pub fn pd9(&mut self) -> PD9_W<'_>[src]

Bit 9 - Port G pull-down bit y (y=0..15)

pub fn pd8(&mut self) -> PD8_W<'_>[src]

Bit 8 - Port G pull-down bit y (y=0..15)

pub fn pd7(&mut self) -> PD7_W<'_>[src]

Bit 7 - Port G pull-down bit y (y=0..15)

pub fn pd6(&mut self) -> PD6_W<'_>[src]

Bit 6 - Port G pull-down bit y (y=0..15)

pub fn pd5(&mut self) -> PD5_W<'_>[src]

Bit 5 - Port G pull-down bit y (y=0..15)

pub fn pd4(&mut self) -> PD4_W<'_>[src]

Bit 4 - Port G pull-down bit y (y=0..15)

pub fn pd3(&mut self) -> PD3_W<'_>[src]

Bit 3 - Port G pull-down bit y (y=0..15)

pub fn pd2(&mut self) -> PD2_W<'_>[src]

Bit 2 - Port G pull-down bit y (y=0..15)

pub fn pd1(&mut self) -> PD1_W<'_>[src]

Bit 1 - Port G pull-down bit y (y=0..15)

pub fn pd0(&mut self) -> PD0_W<'_>[src]

Bit 0 - Port G pull-down bit y (y=0..15)

impl W<u32, Reg<u32, _SECCFGR>>[src]

pub fn apcsec(&mut self) -> APCSEC_W<'_>[src]

Bit 11 - APCSEC

pub fn vbsec(&mut self) -> VBSEC_W<'_>[src]

Bit 10 - VBSEC

pub fn vdmsec(&mut self) -> VDMSEC_W<'_>[src]

Bit 9 - VDMSEC

pub fn lpmsec(&mut self) -> LPMSEC_W<'_>[src]

Bit 8 - LPMSEC

pub fn wup5sec(&mut self) -> WUP5SEC_W<'_>[src]

Bit 4 - WKUP5 pin security

pub fn wup4sec(&mut self) -> WUP4SEC_W<'_>[src]

Bit 3 - WKUP4 pin security

pub fn wup3sec(&mut self) -> WUP3SEC_W<'_>[src]

Bit 2 - WKUP3 pin security

pub fn wup2sec(&mut self) -> WUP2SEC_W<'_>[src]

Bit 1 - WKUP2 pin security

pub fn wup1sec(&mut self) -> WUP1SEC_W<'_>[src]

Bit 0 - WKUP1 pin security

impl W<u32, Reg<u32, _PRIVCFGR>>[src]

pub fn priv_(&mut self) -> PRIV_W<'_>[src]

Bit 0 - PRIV

impl W<u32, Reg<u32, _CR>>[src]

pub fn priv_(&mut self) -> PRIV_W<'_>[src]

Bit 31 - PRIV

pub fn pllsai2on(&mut self) -> PLLSAI2ON_W<'_>[src]

Bit 28 - SAI2 PLL enable

pub fn pllsai1on(&mut self) -> PLLSAI1ON_W<'_>[src]

Bit 26 - SAI1 PLL enable

pub fn pllon(&mut self) -> PLLON_W<'_>[src]

Bit 24 - Main PLL enable

pub fn csson(&mut self) -> CSSON_W<'_>[src]

Bit 19 - Clock security system enable

pub fn hsebyp(&mut self) -> HSEBYP_W<'_>[src]

Bit 18 - HSE crystal oscillator bypass

pub fn hseon(&mut self) -> HSEON_W<'_>[src]

Bit 16 - HSE clock enable

pub fn hsiasfs(&mut self) -> HSIASFS_W<'_>[src]

Bit 11 - HSI automatic start from Stop

pub fn hsikeron(&mut self) -> HSIKERON_W<'_>[src]

Bit 9 - HSI always enable for peripheral kernels

pub fn hsion(&mut self) -> HSION_W<'_>[src]

Bit 8 - HSI clock enable

pub fn msirange(&mut self) -> MSIRANGE_W<'_>[src]

Bits 4:7 - MSI clock ranges

pub fn msirgsel(&mut self) -> MSIRGSEL_W<'_>[src]

Bit 3 - MSI clock range selection

pub fn msipllen(&mut self) -> MSIPLLEN_W<'_>[src]

Bit 2 - MSI clock PLL enable

pub fn msion(&mut self) -> MSION_W<'_>[src]

Bit 0 - MSI clock enable

impl W<u32, Reg<u32, _ICSCR>>[src]

pub fn hsitrim(&mut self) -> HSITRIM_W<'_>[src]

Bits 24:30 - HSI clock trimming

pub fn msitrim(&mut self) -> MSITRIM_W<'_>[src]

Bits 8:15 - MSI clock trimming

impl W<u32, Reg<u32, _CFGR>>[src]

pub fn mcosel(&mut self) -> MCOSEL_W<'_>[src]

Bits 24:27 - Microcontroller clock output

pub fn stopwuck(&mut self) -> STOPWUCK_W<'_>[src]

Bit 15 - Wakeup from Stop and CSS backup clock selection

pub fn ppre2(&mut self) -> PPRE2_W<'_>[src]

Bits 11:13 - APB high-speed prescaler (APB2)

pub fn ppre1(&mut self) -> PPRE1_W<'_>[src]

Bits 8:10 - PB low-speed prescaler (APB1)

pub fn hpre(&mut self) -> HPRE_W<'_>[src]

Bits 4:7 - AHB prescaler

pub fn sw(&mut self) -> SW_W<'_>[src]

Bits 0:1 - System clock switch

impl W<u32, Reg<u32, _PLLCFGR>>[src]

pub fn pllpdiv(&mut self) -> PLLPDIV_W<'_>[src]

Bits 27:31 - Main PLL division factor for PLLSAI2CLK

pub fn pllr(&mut self) -> PLLR_W<'_>[src]

Bits 25:26 - Main PLL division factor for PLLCLK (system clock)

pub fn pllren(&mut self) -> PLLREN_W<'_>[src]

Bit 24 - Main PLL PLLCLK output enable

pub fn pllq(&mut self) -> PLLQ_W<'_>[src]

Bits 21:22 - Main PLL division factor for PLLUSB1CLK(48 MHz clock)

pub fn pllqen(&mut self) -> PLLQEN_W<'_>[src]

Bit 20 - Main PLL PLLUSB1CLK output enable

pub fn pllp(&mut self) -> PLLP_W<'_>[src]

Bit 17 - Main PLL division factor for PLLSAI3CLK (SAI1 and SAI2 clock)

pub fn pllpen(&mut self) -> PLLPEN_W<'_>[src]

Bit 16 - Main PLL PLLSAI3CLK output enable

pub fn plln(&mut self) -> PLLN_W<'_>[src]

Bits 8:14 - Main PLL multiplication factor for VCO

pub fn pllm(&mut self) -> PLLM_W<'_>[src]

Bits 4:7 - Division factor for the main PLL and audio PLL (PLLSAI1 and PLLSAI2) input clock

pub fn pllsrc(&mut self) -> PLLSRC_W<'_>[src]

Bits 0:1 - Main PLL, PLLSAI1 and PLLSAI2 entry clock source

impl W<u32, Reg<u32, _PLLSAI1CFGR>>[src]

pub fn pllsai1pdiv(&mut self) -> PLLSAI1PDIV_W<'_>[src]

Bits 27:31 - PLLSAI1 division factor for PLLSAI1CLK

pub fn pllsai1r(&mut self) -> PLLSAI1R_W<'_>[src]

Bits 25:26 - PLLSAI1 division factor for PLLADC1CLK (ADC clock)

pub fn pllsai1ren(&mut self) -> PLLSAI1REN_W<'_>[src]

Bit 24 - PLLSAI1 PLLADC1CLK output enable

pub fn pllsai1q(&mut self) -> PLLSAI1Q_W<'_>[src]

Bits 21:22 - SAI1PLL division factor for PLLUSB2CLK (48 MHz clock)

pub fn pllsai1qen(&mut self) -> PLLSAI1QEN_W<'_>[src]

Bit 20 - SAI1PLL PLLUSB2CLK output enable

pub fn pllsai1p(&mut self) -> PLLSAI1P_W<'_>[src]

Bit 17 - SAI1PLL division factor for PLLSAI1CLK (SAI1 or SAI2 clock)

pub fn pllsai1pen(&mut self) -> PLLSAI1PEN_W<'_>[src]

Bit 16 - SAI1PLL PLLSAI1CLK output enable

pub fn pllsai1n(&mut self) -> PLLSAI1N_W<'_>[src]

Bits 8:14 - SAI1PLL multiplication factor for VCO

pub fn pllsai1m(&mut self) -> PLLSAI1M_W<'_>[src]

Bits 4:7 - Division factor for PLLSAI1 input clock

pub fn pllsai1src(&mut self) -> PLLSAI1SRC_W<'_>[src]

Bits 0:1 - PLLSAI1SRC

impl W<u32, Reg<u32, _PLLSAI2CFGR>>[src]

pub fn pllsai2pdiv(&mut self) -> PLLSAI2PDIV_W<'_>[src]

Bits 27:31 - PLLSAI2 division factor for PLLSAI2CLK

pub fn pllsai2p(&mut self) -> PLLSAI2P_W<'_>[src]

Bit 17 - SAI1PLL division factor for PLLSAI2CLK (SAI1 or SAI2 clock)

pub fn pllsai2pen(&mut self) -> PLLSAI2PEN_W<'_>[src]

Bit 16 - SAI2PLL PLLSAI2CLK output enable

pub fn pllsai2n(&mut self) -> PLLSAI2N_W<'_>[src]

Bits 8:14 - SAI2PLL multiplication factor for VCO

pub fn pllsai2m(&mut self) -> PLLSAI2M_W<'_>[src]

Bits 4:7 - Division factor for PLLSAI2 input clock

pub fn pllsai2src(&mut self) -> PLLSAI2SRC_W<'_>[src]

Bits 0:1 - PLLSAI2SRC

impl W<u32, Reg<u32, _CIER>>[src]

pub fn lsirdyie(&mut self) -> LSIRDYIE_W<'_>[src]

Bit 0 - LSI ready interrupt enable

pub fn lserdyie(&mut self) -> LSERDYIE_W<'_>[src]

Bit 1 - LSE ready interrupt enable

pub fn msirdyie(&mut self) -> MSIRDYIE_W<'_>[src]

Bit 2 - MSI ready interrupt enable

pub fn hsirdyie(&mut self) -> HSIRDYIE_W<'_>[src]

Bit 3 - HSI ready interrupt enable

pub fn hserdyie(&mut self) -> HSERDYIE_W<'_>[src]

Bit 4 - HSE ready interrupt enable

pub fn pllrdyie(&mut self) -> PLLRDYIE_W<'_>[src]

Bit 5 - PLL ready interrupt enable

pub fn pllsai1rdyie(&mut self) -> PLLSAI1RDYIE_W<'_>[src]

Bit 6 - PLLSAI1 ready interrupt enable

pub fn pllsai2rdyie(&mut self) -> PLLSAI2RDYIE_W<'_>[src]

Bit 7 - PLLSAI2 ready interrupt enable

pub fn lsecssie(&mut self) -> LSECSSIE_W<'_>[src]

Bit 9 - LSE clock security system interrupt enable

pub fn hsi48rdyie(&mut self) -> HSI48RDYIE_W<'_>[src]

Bit 10 - HSI48 ready interrupt enable

impl W<u32, Reg<u32, _CICR>>[src]

pub fn lsirdyc(&mut self) -> LSIRDYC_W<'_>[src]

Bit 0 - LSI ready interrupt clear

pub fn lserdyc(&mut self) -> LSERDYC_W<'_>[src]

Bit 1 - LSE ready interrupt clear

pub fn msirdyc(&mut self) -> MSIRDYC_W<'_>[src]

Bit 2 - MSI ready interrupt clear

pub fn hsirdyc(&mut self) -> HSIRDYC_W<'_>[src]

Bit 3 - HSI ready interrupt clear

pub fn hserdyc(&mut self) -> HSERDYC_W<'_>[src]

Bit 4 - HSE ready interrupt clear

pub fn pllrdyc(&mut self) -> PLLRDYC_W<'_>[src]

Bit 5 - PLL ready interrupt clear

pub fn pllsai1rdyc(&mut self) -> PLLSAI1RDYC_W<'_>[src]

Bit 6 - PLLSAI1 ready interrupt clear

pub fn pllsai2rdyc(&mut self) -> PLLSAI2RDYC_W<'_>[src]

Bit 7 - PLLSAI2 ready interrupt clear

pub fn cssc(&mut self) -> CSSC_W<'_>[src]

Bit 8 - Clock security system interrupt clear

pub fn lsecssc(&mut self) -> LSECSSC_W<'_>[src]

Bit 9 - LSE Clock security system interrupt clear

pub fn hsi48rdyc(&mut self) -> HSI48RDYC_W<'_>[src]

Bit 10 - HSI48 oscillator ready interrupt clear

impl W<u32, Reg<u32, _AHB1RSTR>>[src]

pub fn dma1rst(&mut self) -> DMA1RST_W<'_>[src]

Bit 0 - DMA1 reset

pub fn dma2rst(&mut self) -> DMA2RST_W<'_>[src]

Bit 1 - DMA2 reset

pub fn dmamux1rst(&mut self) -> DMAMUX1RST_W<'_>[src]

Bit 2 - DMAMUXRST

pub fn flashrst(&mut self) -> FLASHRST_W<'_>[src]

Bit 8 - Flash memory interface reset

pub fn crcrst(&mut self) -> CRCRST_W<'_>[src]

Bit 12 - CRC reset

pub fn tscrst(&mut self) -> TSCRST_W<'_>[src]

Bit 16 - Touch Sensing Controller reset

pub fn gtzcrst(&mut self) -> GTZCRST_W<'_>[src]

Bit 22 - GTZC reset

impl W<u32, Reg<u32, _AHB2RSTR>>[src]

pub fn gpioarst(&mut self) -> GPIOARST_W<'_>[src]

Bit 0 - IO port A reset

pub fn gpiobrst(&mut self) -> GPIOBRST_W<'_>[src]

Bit 1 - IO port B reset

pub fn gpiocrst(&mut self) -> GPIOCRST_W<'_>[src]

Bit 2 - IO port C reset

pub fn gpiodrst(&mut self) -> GPIODRST_W<'_>[src]

Bit 3 - IO port D reset

pub fn gpioerst(&mut self) -> GPIOERST_W<'_>[src]

Bit 4 - IO port E reset

pub fn gpiofrst(&mut self) -> GPIOFRST_W<'_>[src]

Bit 5 - IO port F reset

pub fn gpiogrst(&mut self) -> GPIOGRST_W<'_>[src]

Bit 6 - IO port G reset

pub fn gpiohrst(&mut self) -> GPIOHRST_W<'_>[src]

Bit 7 - IO port H reset

pub fn adcrst(&mut self) -> ADCRST_W<'_>[src]

Bit 13 - ADC reset

pub fn aesrst(&mut self) -> AESRST_W<'_>[src]

Bit 16 - AES hardware accelerator reset

pub fn hashrst(&mut self) -> HASHRST_W<'_>[src]

Bit 17 - Hash reset

pub fn rngrst(&mut self) -> RNGRST_W<'_>[src]

Bit 18 - Random number generator reset

pub fn pkarst(&mut self) -> PKARST_W<'_>[src]

Bit 19 - PKARST

pub fn otfdec1rst(&mut self) -> OTFDEC1RST_W<'_>[src]

Bit 21 - OTFDEC1RST

pub fn sdmmc1rst(&mut self) -> SDMMC1RST_W<'_>[src]

Bit 22 - SDMMC1 reset

impl W<u32, Reg<u32, _AHB3RSTR>>[src]

pub fn fmcrst(&mut self) -> FMCRST_W<'_>[src]

Bit 0 - Flexible memory controller reset

pub fn ospi1rst(&mut self) -> OSPI1RST_W<'_>[src]

Bit 8 - OSPI1RST

impl W<u32, Reg<u32, _APB1RSTR1>>[src]

pub fn lptim1rst(&mut self) -> LPTIM1RST_W<'_>[src]

Bit 31 - Low Power Timer 1 reset

pub fn opamprst(&mut self) -> OPAMPRST_W<'_>[src]

Bit 30 - OPAMP interface reset

pub fn dac1rst(&mut self) -> DAC1RST_W<'_>[src]

Bit 29 - DAC1 interface reset

pub fn pwrrst(&mut self) -> PWRRST_W<'_>[src]

Bit 28 - Power interface reset

pub fn crsrst(&mut self) -> CRSRST_W<'_>[src]

Bit 24 - CRS reset

pub fn i2c3rst(&mut self) -> I2C3RST_W<'_>[src]

Bit 23 - I2C3 reset

pub fn i2c2rst(&mut self) -> I2C2RST_W<'_>[src]

Bit 22 - I2C2 reset

pub fn i2c1rst(&mut self) -> I2C1RST_W<'_>[src]

Bit 21 - I2C1 reset

pub fn uart5rst(&mut self) -> UART5RST_W<'_>[src]

Bit 20 - UART5 reset

pub fn uart4rst(&mut self) -> UART4RST_W<'_>[src]

Bit 19 - UART4 reset

pub fn usart3rst(&mut self) -> USART3RST_W<'_>[src]

Bit 18 - USART3 reset

pub fn usart2rst(&mut self) -> USART2RST_W<'_>[src]

Bit 17 - USART2 reset

pub fn spi3rst(&mut self) -> SPI3RST_W<'_>[src]

Bit 15 - SPI3 reset

pub fn spi2rst(&mut self) -> SPI2RST_W<'_>[src]

Bit 14 - SPI2 reset

pub fn tim7rst(&mut self) -> TIM7RST_W<'_>[src]

Bit 5 - TIM7 timer reset

pub fn tim6rst(&mut self) -> TIM6RST_W<'_>[src]

Bit 4 - TIM6 timer reset

pub fn tim5rst(&mut self) -> TIM5RST_W<'_>[src]

Bit 3 - TIM5 timer reset

pub fn tim4rst(&mut self) -> TIM4RST_W<'_>[src]

Bit 2 - TIM3 timer reset

pub fn tim3rst(&mut self) -> TIM3RST_W<'_>[src]

Bit 1 - TIM3 timer reset

pub fn tim2rst(&mut self) -> TIM2RST_W<'_>[src]

Bit 0 - TIM2 timer reset

impl W<u32, Reg<u32, _APB1RSTR2>>[src]

pub fn lpuart1rst(&mut self) -> LPUART1RST_W<'_>[src]

Bit 0 - Low-power UART 1 reset

pub fn i2c4rst(&mut self) -> I2C4RST_W<'_>[src]

Bit 1 - I2C4 reset

pub fn lptim2rst(&mut self) -> LPTIM2RST_W<'_>[src]

Bit 5 - Low-power timer 2 reset

pub fn lptim3rst(&mut self) -> LPTIM3RST_W<'_>[src]

Bit 6 - LPTIM3RST

pub fn fdcan1rst(&mut self) -> FDCAN1RST_W<'_>[src]

Bit 9 - FDCAN1RST

pub fn usbfsrst(&mut self) -> USBFSRST_W<'_>[src]

Bit 21 - USBFSRST

pub fn ucpd1rst(&mut self) -> UCPD1RST_W<'_>[src]

Bit 23 - UCPD1RST

impl W<u32, Reg<u32, _APB2RSTR>>[src]

pub fn syscfgrst(&mut self) -> SYSCFGRST_W<'_>[src]

Bit 0 - System configuration (SYSCFG) reset

pub fn tim1rst(&mut self) -> TIM1RST_W<'_>[src]

Bit 11 - TIM1 timer reset

pub fn spi1rst(&mut self) -> SPI1RST_W<'_>[src]

Bit 12 - SPI1 reset

pub fn tim8rst(&mut self) -> TIM8RST_W<'_>[src]

Bit 13 - TIM8 timer reset

pub fn usart1rst(&mut self) -> USART1RST_W<'_>[src]

Bit 14 - USART1 reset

pub fn tim15rst(&mut self) -> TIM15RST_W<'_>[src]

Bit 16 - TIM15 timer reset

pub fn tim16rst(&mut self) -> TIM16RST_W<'_>[src]

Bit 17 - TIM16 timer reset

pub fn tim17rst(&mut self) -> TIM17RST_W<'_>[src]

Bit 18 - TIM17 timer reset

pub fn sai1rst(&mut self) -> SAI1RST_W<'_>[src]

Bit 21 - Serial audio interface 1 (SAI1) reset

pub fn sai2rst(&mut self) -> SAI2RST_W<'_>[src]

Bit 22 - Serial audio interface 2 (SAI2) reset

pub fn dfsdm1rst(&mut self) -> DFSDM1RST_W<'_>[src]

Bit 24 - Digital filters for sigma-delata modulators (DFSDM) reset

impl W<u32, Reg<u32, _AHB1ENR>>[src]

pub fn dma1en(&mut self) -> DMA1EN_W<'_>[src]

Bit 0 - DMA1 clock enable

pub fn dma2en(&mut self) -> DMA2EN_W<'_>[src]

Bit 1 - DMA2 clock enable

pub fn dmamux1en(&mut self) -> DMAMUX1EN_W<'_>[src]

Bit 2 - DMAMUX clock enable

pub fn flashen(&mut self) -> FLASHEN_W<'_>[src]

Bit 8 - Flash memory interface clock enable

pub fn crcen(&mut self) -> CRCEN_W<'_>[src]

Bit 12 - CRC clock enable

pub fn tscen(&mut self) -> TSCEN_W<'_>[src]

Bit 16 - Touch Sensing Controller clock enable

pub fn gtzcen(&mut self) -> GTZCEN_W<'_>[src]

Bit 22 - GTZCEN

impl W<u32, Reg<u32, _AHB2ENR>>[src]

pub fn gpioaen(&mut self) -> GPIOAEN_W<'_>[src]

Bit 0 - IO port A clock enable

pub fn gpioben(&mut self) -> GPIOBEN_W<'_>[src]

Bit 1 - IO port B clock enable

pub fn gpiocen(&mut self) -> GPIOCEN_W<'_>[src]

Bit 2 - IO port C clock enable

pub fn gpioden(&mut self) -> GPIODEN_W<'_>[src]

Bit 3 - IO port D clock enable

pub fn gpioeen(&mut self) -> GPIOEEN_W<'_>[src]

Bit 4 - IO port E clock enable

pub fn gpiofen(&mut self) -> GPIOFEN_W<'_>[src]

Bit 5 - IO port F clock enable

pub fn gpiogen(&mut self) -> GPIOGEN_W<'_>[src]

Bit 6 - IO port G clock enable

pub fn gpiohen(&mut self) -> GPIOHEN_W<'_>[src]

Bit 7 - IO port H clock enable

pub fn adcen(&mut self) -> ADCEN_W<'_>[src]

Bit 13 - ADC clock enable

pub fn aesen(&mut self) -> AESEN_W<'_>[src]

Bit 16 - AES accelerator clock enable

pub fn hashen(&mut self) -> HASHEN_W<'_>[src]

Bit 17 - HASH clock enable

pub fn rngen(&mut self) -> RNGEN_W<'_>[src]

Bit 18 - Random Number Generator clock enable

pub fn pkaen(&mut self) -> PKAEN_W<'_>[src]

Bit 19 - PKAEN

pub fn otfdec1en(&mut self) -> OTFDEC1EN_W<'_>[src]

Bit 21 - OTFDEC1EN

pub fn sdmmc1en(&mut self) -> SDMMC1EN_W<'_>[src]

Bit 22 - SDMMC1 clock enable

impl W<u32, Reg<u32, _AHB3ENR>>[src]

pub fn fmcen(&mut self) -> FMCEN_W<'_>[src]

Bit 0 - Flexible memory controller clock enable

pub fn ospi1en(&mut self) -> OSPI1EN_W<'_>[src]

Bit 8 - OSPI1EN

impl W<u32, Reg<u32, _APB1ENR1>>[src]

pub fn tim2en(&mut self) -> TIM2EN_W<'_>[src]

Bit 0 - TIM2 timer clock enable

pub fn tim3en(&mut self) -> TIM3EN_W<'_>[src]

Bit 1 - TIM3 timer clock enable

pub fn tim4en(&mut self) -> TIM4EN_W<'_>[src]

Bit 2 - TIM4 timer clock enable

pub fn tim5en(&mut self) -> TIM5EN_W<'_>[src]

Bit 3 - TIM5 timer clock enable

pub fn tim6en(&mut self) -> TIM6EN_W<'_>[src]

Bit 4 - TIM6 timer clock enable

pub fn tim7en(&mut self) -> TIM7EN_W<'_>[src]

Bit 5 - TIM7 timer clock enable

pub fn rtcapben(&mut self) -> RTCAPBEN_W<'_>[src]

Bit 10 - RTC APB clock enable

pub fn wwdgen(&mut self) -> WWDGEN_W<'_>[src]

Bit 11 - Window watchdog clock enable

pub fn spi2en(&mut self) -> SPI2EN_W<'_>[src]

Bit 14 - SPI2 clock enable

pub fn sp3en(&mut self) -> SP3EN_W<'_>[src]

Bit 15 - SPI3 clock enable

pub fn usart2en(&mut self) -> USART2EN_W<'_>[src]

Bit 17 - USART2 clock enable

pub fn usart3en(&mut self) -> USART3EN_W<'_>[src]

Bit 18 - USART3 clock enable

pub fn uart4en(&mut self) -> UART4EN_W<'_>[src]

Bit 19 - UART4 clock enable

pub fn uart5en(&mut self) -> UART5EN_W<'_>[src]

Bit 20 - UART5 clock enable

pub fn i2c1en(&mut self) -> I2C1EN_W<'_>[src]

Bit 21 - I2C1 clock enable

pub fn i2c2en(&mut self) -> I2C2EN_W<'_>[src]

Bit 22 - I2C2 clock enable

pub fn i2c3en(&mut self) -> I2C3EN_W<'_>[src]

Bit 23 - I2C3 clock enable

pub fn crsen(&mut self) -> CRSEN_W<'_>[src]

Bit 24 - Clock Recovery System clock enable

pub fn pwren(&mut self) -> PWREN_W<'_>[src]

Bit 28 - Power interface clock enable

pub fn dac1en(&mut self) -> DAC1EN_W<'_>[src]

Bit 29 - DAC1 interface clock enable

pub fn opampen(&mut self) -> OPAMPEN_W<'_>[src]

Bit 30 - OPAMP interface clock enable

pub fn lptim1en(&mut self) -> LPTIM1EN_W<'_>[src]

Bit 31 - Low power timer 1 clock enable

impl W<u32, Reg<u32, _APB1ENR2>>[src]

pub fn lpuart1en(&mut self) -> LPUART1EN_W<'_>[src]

Bit 0 - Low power UART 1 clock enable

pub fn i2c4en(&mut self) -> I2C4EN_W<'_>[src]

Bit 1 - I2C4 clock enable

pub fn lptim2en(&mut self) -> LPTIM2EN_W<'_>[src]

Bit 5 - LPTIM2EN

pub fn lptim3en(&mut self) -> LPTIM3EN_W<'_>[src]

Bit 6 - LPTIM3EN

pub fn fdcan1en(&mut self) -> FDCAN1EN_W<'_>[src]

Bit 9 - FDCAN1EN

pub fn usbfsen(&mut self) -> USBFSEN_W<'_>[src]

Bit 21 - USBFSEN

pub fn ucpd1en(&mut self) -> UCPD1EN_W<'_>[src]

Bit 23 - UCPD1EN

impl W<u32, Reg<u32, _APB2ENR>>[src]

pub fn syscfgen(&mut self) -> SYSCFGEN_W<'_>[src]

Bit 0 - SYSCFG clock enable

pub fn tim1en(&mut self) -> TIM1EN_W<'_>[src]

Bit 11 - TIM1 timer clock enable

pub fn spi1en(&mut self) -> SPI1EN_W<'_>[src]

Bit 12 - SPI1 clock enable

pub fn tim8en(&mut self) -> TIM8EN_W<'_>[src]

Bit 13 - TIM8 timer clock enable

pub fn usart1en(&mut self) -> USART1EN_W<'_>[src]

Bit 14 - USART1clock enable

pub fn tim15en(&mut self) -> TIM15EN_W<'_>[src]

Bit 16 - TIM15 timer clock enable

pub fn tim16en(&mut self) -> TIM16EN_W<'_>[src]

Bit 17 - TIM16 timer clock enable

pub fn tim17en(&mut self) -> TIM17EN_W<'_>[src]

Bit 18 - TIM17 timer clock enable

pub fn sai1en(&mut self) -> SAI1EN_W<'_>[src]

Bit 21 - SAI1 clock enable

pub fn sai2en(&mut self) -> SAI2EN_W<'_>[src]

Bit 22 - SAI2 clock enable

pub fn dfsdm1en(&mut self) -> DFSDM1EN_W<'_>[src]

Bit 24 - DFSDM timer clock enable

impl W<u32, Reg<u32, _AHB1SMENR>>[src]

pub fn dma1smen(&mut self) -> DMA1SMEN_W<'_>[src]

Bit 0 - DMA1 clocks enable during Sleep and Stop modes

pub fn dma2smen(&mut self) -> DMA2SMEN_W<'_>[src]

Bit 1 - DMA2 clocks enable during Sleep and Stop modes

pub fn dmamux1smen(&mut self) -> DMAMUX1SMEN_W<'_>[src]

Bit 2 - DMAMUX clock enable during Sleep and Stop modes

pub fn flashsmen(&mut self) -> FLASHSMEN_W<'_>[src]

Bit 8 - Flash memory interface clocks enable during Sleep and Stop modes

pub fn sram1smen(&mut self) -> SRAM1SMEN_W<'_>[src]

Bit 9 - SRAM1 interface clocks enable during Sleep and Stop modes

pub fn crcsmen(&mut self) -> CRCSMEN_W<'_>[src]

Bit 12 - CRCSMEN

pub fn tscsmen(&mut self) -> TSCSMEN_W<'_>[src]

Bit 16 - Touch Sensing Controller clocks enable during Sleep and Stop modes

pub fn gtzcsmen(&mut self) -> GTZCSMEN_W<'_>[src]

Bit 22 - GTZCSMEN

pub fn icachesmen(&mut self) -> ICACHESMEN_W<'_>[src]

Bit 23 - ICACHESMEN

impl W<u32, Reg<u32, _AHB2SMENR>>[src]

pub fn gpioasmen(&mut self) -> GPIOASMEN_W<'_>[src]

Bit 0 - IO port A clocks enable during Sleep and Stop modes

pub fn gpiobsmen(&mut self) -> GPIOBSMEN_W<'_>[src]

Bit 1 - IO port B clocks enable during Sleep and Stop modes

pub fn gpiocsmen(&mut self) -> GPIOCSMEN_W<'_>[src]

Bit 2 - IO port C clocks enable during Sleep and Stop modes

pub fn gpiodsmen(&mut self) -> GPIODSMEN_W<'_>[src]

Bit 3 - IO port D clocks enable during Sleep and Stop modes

pub fn gpioesmen(&mut self) -> GPIOESMEN_W<'_>[src]

Bit 4 - IO port E clocks enable during Sleep and Stop modes

pub fn gpiofsmen(&mut self) -> GPIOFSMEN_W<'_>[src]

Bit 5 - IO port F clocks enable during Sleep and Stop modes

pub fn gpiogsmen(&mut self) -> GPIOGSMEN_W<'_>[src]

Bit 6 - IO port G clocks enable during Sleep and Stop modes

pub fn gpiohsmen(&mut self) -> GPIOHSMEN_W<'_>[src]

Bit 7 - IO port H clocks enable during Sleep and Stop modes

pub fn sram2smen(&mut self) -> SRAM2SMEN_W<'_>[src]

Bit 9 - SRAM2 interface clocks enable during Sleep and Stop modes

pub fn adcfssmen(&mut self) -> ADCFSSMEN_W<'_>[src]

Bit 13 - ADC clocks enable during Sleep and Stop modes

pub fn aessmen(&mut self) -> AESSMEN_W<'_>[src]

Bit 16 - AES accelerator clocks enable during Sleep and Stop modes

pub fn hashsmen(&mut self) -> HASHSMEN_W<'_>[src]

Bit 17 - HASH clock enable during Sleep and Stop modes

pub fn rngsmen(&mut self) -> RNGSMEN_W<'_>[src]

Bit 18 - Random Number Generator clocks enable during Sleep and Stop modes

pub fn pkasmen(&mut self) -> PKASMEN_W<'_>[src]

Bit 19 - PKASMEN

pub fn otfdec1smen(&mut self) -> OTFDEC1SMEN_W<'_>[src]

Bit 21 - OTFDEC1SMEN

pub fn sdmmc1smen(&mut self) -> SDMMC1SMEN_W<'_>[src]

Bit 22 - SDMMC1 clocks enable during Sleep and Stop modes

impl W<u32, Reg<u32, _AHB3SMENR>>[src]

pub fn fmcsmen(&mut self) -> FMCSMEN_W<'_>[src]

Bit 0 - Flexible memory controller clocks enable during Sleep and Stop modes

pub fn ospi1smen(&mut self) -> OSPI1SMEN_W<'_>[src]

Bit 8 - OSPI1SMEN

impl W<u32, Reg<u32, _APB1SMENR1>>[src]

pub fn tim2smen(&mut self) -> TIM2SMEN_W<'_>[src]

Bit 0 - TIM2 timer clocks enable during Sleep and Stop modes

pub fn tim3smen(&mut self) -> TIM3SMEN_W<'_>[src]

Bit 1 - TIM3 timer clocks enable during Sleep and Stop modes

pub fn tim4smen(&mut self) -> TIM4SMEN_W<'_>[src]

Bit 2 - TIM4 timer clocks enable during Sleep and Stop modes

pub fn tim5smen(&mut self) -> TIM5SMEN_W<'_>[src]

Bit 3 - TIM5 timer clocks enable during Sleep and Stop modes

pub fn tim6smen(&mut self) -> TIM6SMEN_W<'_>[src]

Bit 4 - TIM6 timer clocks enable during Sleep and Stop modes

pub fn tim7smen(&mut self) -> TIM7SMEN_W<'_>[src]

Bit 5 - TIM7 timer clocks enable during Sleep and Stop modes

pub fn rtcapbsmen(&mut self) -> RTCAPBSMEN_W<'_>[src]

Bit 10 - RTC APB clock enable during Sleep and Stop modes

pub fn wwdgsmen(&mut self) -> WWDGSMEN_W<'_>[src]

Bit 11 - Window watchdog clocks enable during Sleep and Stop modes

pub fn spi2smen(&mut self) -> SPI2SMEN_W<'_>[src]

Bit 14 - SPI2 clocks enable during Sleep and Stop modes

pub fn sp3smen(&mut self) -> SP3SMEN_W<'_>[src]

Bit 15 - SPI3 clocks enable during Sleep and Stop modes

pub fn usart2smen(&mut self) -> USART2SMEN_W<'_>[src]

Bit 17 - USART2 clocks enable during Sleep and Stop modes

pub fn usart3smen(&mut self) -> USART3SMEN_W<'_>[src]

Bit 18 - USART3 clocks enable during Sleep and Stop modes

pub fn uart4smen(&mut self) -> UART4SMEN_W<'_>[src]

Bit 19 - UART4 clocks enable during Sleep and Stop modes

pub fn uart5smen(&mut self) -> UART5SMEN_W<'_>[src]

Bit 20 - UART5 clocks enable during Sleep and Stop modes

pub fn i2c1smen(&mut self) -> I2C1SMEN_W<'_>[src]

Bit 21 - I2C1 clocks enable during Sleep and Stop modes

pub fn i2c2smen(&mut self) -> I2C2SMEN_W<'_>[src]

Bit 22 - I2C2 clocks enable during Sleep and Stop modes

pub fn i2c3smen(&mut self) -> I2C3SMEN_W<'_>[src]

Bit 23 - I2C3 clocks enable during Sleep and Stop modes

pub fn crssmen(&mut self) -> CRSSMEN_W<'_>[src]

Bit 24 - CRS clock enable during Sleep and Stop modes

pub fn pwrsmen(&mut self) -> PWRSMEN_W<'_>[src]

Bit 28 - Power interface clocks enable during Sleep and Stop modes

pub fn dac1smen(&mut self) -> DAC1SMEN_W<'_>[src]

Bit 29 - DAC1 interface clocks enable during Sleep and Stop modes

pub fn opampsmen(&mut self) -> OPAMPSMEN_W<'_>[src]

Bit 30 - OPAMP interface clocks enable during Sleep and Stop modes

pub fn lptim1smen(&mut self) -> LPTIM1SMEN_W<'_>[src]

Bit 31 - Low power timer 1 clocks enable during Sleep and Stop modes

impl W<u32, Reg<u32, _APB1SMENR2>>[src]

pub fn lpuart1smen(&mut self) -> LPUART1SMEN_W<'_>[src]

Bit 0 - Low power UART 1 clocks enable during Sleep and Stop modes

pub fn i2c4smen(&mut self) -> I2C4SMEN_W<'_>[src]

Bit 1 - I2C4 clocks enable during Sleep and Stop modes

pub fn lptim2smen(&mut self) -> LPTIM2SMEN_W<'_>[src]

Bit 5 - LPTIM2SMEN

pub fn lptim3smen(&mut self) -> LPTIM3SMEN_W<'_>[src]

Bit 6 - LPTIM3SMEN

pub fn fdcan1smen(&mut self) -> FDCAN1SMEN_W<'_>[src]

Bit 9 - FDCAN1SMEN

pub fn usbfssmen(&mut self) -> USBFSSMEN_W<'_>[src]

Bit 21 - USBFSSMEN

pub fn ucpd1smen(&mut self) -> UCPD1SMEN_W<'_>[src]

Bit 23 - UCPD1SMEN

impl W<u32, Reg<u32, _APB2SMENR>>[src]

pub fn syscfgsmen(&mut self) -> SYSCFGSMEN_W<'_>[src]

Bit 0 - SYSCFG clocks enable during Sleep and Stop modes

pub fn tim1smen(&mut self) -> TIM1SMEN_W<'_>[src]

Bit 11 - TIM1 timer clocks enable during Sleep and Stop modes

pub fn spi1smen(&mut self) -> SPI1SMEN_W<'_>[src]

Bit 12 - SPI1 clocks enable during Sleep and Stop modes

pub fn tim8smen(&mut self) -> TIM8SMEN_W<'_>[src]

Bit 13 - TIM8 timer clocks enable during Sleep and Stop modes

pub fn usart1smen(&mut self) -> USART1SMEN_W<'_>[src]

Bit 14 - USART1clocks enable during Sleep and Stop modes

pub fn tim15smen(&mut self) -> TIM15SMEN_W<'_>[src]

Bit 16 - TIM15 timer clocks enable during Sleep and Stop modes

pub fn tim16smen(&mut self) -> TIM16SMEN_W<'_>[src]

Bit 17 - TIM16 timer clocks enable during Sleep and Stop modes

pub fn tim17smen(&mut self) -> TIM17SMEN_W<'_>[src]

Bit 18 - TIM17 timer clocks enable during Sleep and Stop modes

pub fn sai1smen(&mut self) -> SAI1SMEN_W<'_>[src]

Bit 21 - SAI1 clocks enable during Sleep and Stop modes

pub fn sai2smen(&mut self) -> SAI2SMEN_W<'_>[src]

Bit 22 - SAI2 clocks enable during Sleep and Stop modes

pub fn dfsdm1smen(&mut self) -> DFSDM1SMEN_W<'_>[src]

Bit 24 - DFSDM timer clocks enable during Sleep and Stop modes

impl W<u32, Reg<u32, _CCIPR1>>[src]

pub fn adcsel(&mut self) -> ADCSEL_W<'_>[src]

Bits 28:29 - ADCs clock source selection

pub fn clk48msel(&mut self) -> CLK48MSEL_W<'_>[src]

Bits 26:27 - 48 MHz clock source selection

pub fn fdcansel(&mut self) -> FDCANSEL_W<'_>[src]

Bits 24:25 - FDCAN clock source selection

pub fn lptim3sel(&mut self) -> LPTIM3SEL_W<'_>[src]

Bits 22:23 - Low-power timer 3 clock source selection

pub fn lptim2sel(&mut self) -> LPTIM2SEL_W<'_>[src]

Bits 20:21 - Low power timer 2 clock source selection

pub fn lptim1sel(&mut self) -> LPTIM1SEL_W<'_>[src]

Bits 18:19 - Low power timer 1 clock source selection

pub fn i2c3sel(&mut self) -> I2C3SEL_W<'_>[src]

Bits 16:17 - I2C3 clock source selection

pub fn i2c2sel(&mut self) -> I2C2SEL_W<'_>[src]

Bits 14:15 - I2C2 clock source selection

pub fn i2c1sel(&mut self) -> I2C1SEL_W<'_>[src]

Bits 12:13 - I2C1 clock source selection

pub fn lpuart1sel(&mut self) -> LPUART1SEL_W<'_>[src]

Bits 10:11 - LPUART1 clock source selection

pub fn uart5sel(&mut self) -> UART5SEL_W<'_>[src]

Bits 8:9 - UART5 clock source selection

pub fn uart4sel(&mut self) -> UART4SEL_W<'_>[src]

Bits 6:7 - UART4 clock source selection

pub fn usart3sel(&mut self) -> USART3SEL_W<'_>[src]

Bits 4:5 - USART3 clock source selection

pub fn usart2sel(&mut self) -> USART2SEL_W<'_>[src]

Bits 2:3 - USART2 clock source selection

pub fn usart1sel(&mut self) -> USART1SEL_W<'_>[src]

Bits 0:1 - USART1 clock source selection

impl W<u32, Reg<u32, _BDCR>>[src]

pub fn lscosel(&mut self) -> LSCOSEL_W<'_>[src]

Bit 25 - Low speed clock output selection

pub fn lscoen(&mut self) -> LSCOEN_W<'_>[src]

Bit 24 - Low speed clock output enable

pub fn bdrst(&mut self) -> BDRST_W<'_>[src]

Bit 16 - Backup domain software reset

pub fn rtcen(&mut self) -> RTCEN_W<'_>[src]

Bit 15 - RTC clock enable

pub fn lsesysrdy(&mut self) -> LSESYSRDY_W<'_>[src]

Bit 11 - LSESYSRDY

pub fn rtcsel(&mut self) -> RTCSEL_W<'_>[src]

Bits 8:9 - RTC clock source selection

pub fn lsesysen(&mut self) -> LSESYSEN_W<'_>[src]

Bit 7 - LSESYSEN

pub fn lsecsson(&mut self) -> LSECSSON_W<'_>[src]

Bit 5 - LSECSSON

pub fn lsedrv(&mut self) -> LSEDRV_W<'_>[src]

Bits 3:4 - SE oscillator drive capability

pub fn lsebyp(&mut self) -> LSEBYP_W<'_>[src]

Bit 2 - LSE oscillator bypass

pub fn lseon(&mut self) -> LSEON_W<'_>[src]

Bit 0 - LSE oscillator enable

impl W<u32, Reg<u32, _CSR>>[src]

pub fn rmvf(&mut self) -> RMVF_W<'_>[src]

Bit 23 - Remove reset flag

pub fn msisrange(&mut self) -> MSISRANGE_W<'_>[src]

Bits 8:11 - SI range after Standby mode

pub fn lsiprediv(&mut self) -> LSIPREDIV_W<'_>[src]

Bit 4 - LSIPREDIV

pub fn lsion(&mut self) -> LSION_W<'_>[src]

Bit 0 - LSI oscillator enable

impl W<u32, Reg<u32, _CRRCR>>[src]

pub fn hsi48on(&mut self) -> HSI48ON_W<'_>[src]

Bit 0 - HSI48 clock enable

impl W<u32, Reg<u32, _CCIPR2>>[src]

pub fn i2c4sel(&mut self) -> I2C4SEL_W<'_>[src]

Bits 0:1 - I2C4 clock source selection

pub fn dfsdmsel(&mut self) -> DFSDMSEL_W<'_>[src]

Bit 2 - Digital filter for sigma delta modulator kernel clock source selection

pub fn adfsdmsel(&mut self) -> ADFSDMSEL_W<'_>[src]

Bits 3:4 - Digital filter for sigma delta modulator audio clock source selection

pub fn sai1sel(&mut self) -> SAI1SEL_W<'_>[src]

Bits 5:7 - SAI1 clock source selection

pub fn sai2sel(&mut self) -> SAI2SEL_W<'_>[src]

Bits 8:10 - SAI2 clock source selection

pub fn sdmmcsel(&mut self) -> SDMMCSEL_W<'_>[src]

Bit 14 - SDMMC clock selection

pub fn ospisel(&mut self) -> OSPISEL_W<'_>[src]

Bits 20:21 - Octospi clock source selection

impl W<u32, Reg<u32, _SECCFGR>>[src]

pub fn hsisec(&mut self) -> HSISEC_W<'_>[src]

Bit 0 - HSISEC

pub fn hsesec(&mut self) -> HSESEC_W<'_>[src]

Bit 1 - HSESEC

pub fn msisec(&mut self) -> MSISEC_W<'_>[src]

Bit 2 - MSISEC

pub fn lsisec(&mut self) -> LSISEC_W<'_>[src]

Bit 3 - LSISEC

pub fn lsesec(&mut self) -> LSESEC_W<'_>[src]

Bit 4 - LSESEC

pub fn sysclksec(&mut self) -> SYSCLKSEC_W<'_>[src]

Bit 5 - SYSCLKSEC

pub fn prescsec(&mut self) -> PRESCSEC_W<'_>[src]

Bit 6 - PRESCSEC

pub fn pllsec(&mut self) -> PLLSEC_W<'_>[src]

Bit 7 - PLLSEC

pub fn pllsai1sec(&mut self) -> PLLSAI1SEC_W<'_>[src]

Bit 8 - PLLSAI1SEC

pub fn pllsai2sec(&mut self) -> PLLSAI2SEC_W<'_>[src]

Bit 9 - PLLSAI2SEC

pub fn clk48msec(&mut self) -> CLK48MSEC_W<'_>[src]

Bit 10 - CLK48MSEC

pub fn hsi48sec(&mut self) -> HSI48SEC_W<'_>[src]

Bit 11 - HSI48SEC

pub fn rmvfsec(&mut self) -> RMVFSEC_W<'_>[src]

Bit 12 - RMVFSEC

impl W<u32, Reg<u32, _SECSR>>[src]

pub fn rmvfsecf(&mut self) -> RMVFSECF_W<'_>[src]

Bit 12 - RMVFSECF

pub fn hsi48secf(&mut self) -> HSI48SECF_W<'_>[src]

Bit 11 - HSI48SECF

pub fn clk48msecf(&mut self) -> CLK48MSECF_W<'_>[src]

Bit 10 - CLK48MSECF

pub fn pllsai2secf(&mut self) -> PLLSAI2SECF_W<'_>[src]

Bit 9 - PLLSAI2SECF

pub fn pllsai1secf(&mut self) -> PLLSAI1SECF_W<'_>[src]

Bit 8 - PLLSAI1SECF

pub fn pllsecf(&mut self) -> PLLSECF_W<'_>[src]

Bit 7 - PLLSECF

pub fn prescsecf(&mut self) -> PRESCSECF_W<'_>[src]

Bit 6 - PRESCSECF

pub fn sysclksecf(&mut self) -> SYSCLKSECF_W<'_>[src]

Bit 5 - SYSCLKSECF

pub fn lsesecf(&mut self) -> LSESECF_W<'_>[src]

Bit 4 - LSESECF

pub fn lsisecf(&mut self) -> LSISECF_W<'_>[src]

Bit 3 - LSISECF

pub fn msisecf(&mut self) -> MSISECF_W<'_>[src]

Bit 2 - MSISECF

pub fn hsesecf(&mut self) -> HSESECF_W<'_>[src]

Bit 1 - HSESECF

pub fn hsisecf(&mut self) -> HSISECF_W<'_>[src]

Bit 0 - HSISECF

impl W<u32, Reg<u32, _TR>>[src]

pub fn pm(&mut self) -> PM_W<'_>[src]

Bit 22 - AM/PM notation

pub fn ht(&mut self) -> HT_W<'_>[src]

Bits 20:21 - Hour tens in BCD format

pub fn hu(&mut self) -> HU_W<'_>[src]

Bits 16:19 - Hour units in BCD format

pub fn mnt(&mut self) -> MNT_W<'_>[src]

Bits 12:14 - Minute tens in BCD format

pub fn mnu(&mut self) -> MNU_W<'_>[src]

Bits 8:11 - Minute units in BCD format

pub fn st(&mut self) -> ST_W<'_>[src]

Bits 4:6 - Second tens in BCD format

pub fn su(&mut self) -> SU_W<'_>[src]

Bits 0:3 - Second units in BCD format

impl W<u32, Reg<u32, _DR>>[src]

pub fn yt(&mut self) -> YT_W<'_>[src]

Bits 20:23 - Year tens in BCD format

pub fn yu(&mut self) -> YU_W<'_>[src]

Bits 16:19 - Year units in BCD format

pub fn wdu(&mut self) -> WDU_W<'_>[src]

Bits 13:15 - Week day units

pub fn mt(&mut self) -> MT_W<'_>[src]

Bit 12 - Month tens in BCD format

pub fn mu(&mut self) -> MU_W<'_>[src]

Bits 8:11 - Month units in BCD format

pub fn dt(&mut self) -> DT_W<'_>[src]

Bits 4:5 - Date tens in BCD format

pub fn du(&mut self) -> DU_W<'_>[src]

Bits 0:3 - Date units in BCD format

impl W<u32, Reg<u32, _ICSR>>[src]

pub fn shpf(&mut self) -> SHPF_W<'_>[src]

Bit 3 - Shift operation pending

pub fn rsf(&mut self) -> RSF_W<'_>[src]

Bit 5 - Registers synchronization flag

pub fn init(&mut self) -> INIT_W<'_>[src]

Bit 7 - Initialization mode

impl W<u32, Reg<u32, _PRER>>[src]

pub fn prediv_a(&mut self) -> PREDIV_A_W<'_>[src]

Bits 16:22 - Asynchronous prescaler factor

pub fn prediv_s(&mut self) -> PREDIV_S_W<'_>[src]

Bits 0:14 - Synchronous prescaler factor

impl W<u32, Reg<u32, _WUTR>>[src]

pub fn wut(&mut self) -> WUT_W<'_>[src]

Bits 0:15 - Wakeup auto-reload value bits

pub fn wutoclr(&mut self) -> WUTOCLR_W<'_>[src]

Bits 16:31 - WUTOCLR

impl W<u32, Reg<u32, _CR>>[src]

pub fn wucksel(&mut self) -> WUCKSEL_W<'_>[src]

Bits 0:2 - WUCKSEL

pub fn tsedge(&mut self) -> TSEDGE_W<'_>[src]

Bit 3 - TSEDGE

pub fn refckon(&mut self) -> REFCKON_W<'_>[src]

Bit 4 - REFCKON

pub fn bypshad(&mut self) -> BYPSHAD_W<'_>[src]

Bit 5 - BYPSHAD

pub fn fmt(&mut self) -> FMT_W<'_>[src]

Bit 6 - FMT

pub fn alrae(&mut self) -> ALRAE_W<'_>[src]

Bit 8 - ALRAE

pub fn alrbe(&mut self) -> ALRBE_W<'_>[src]

Bit 9 - ALRBE

pub fn wute(&mut self) -> WUTE_W<'_>[src]

Bit 10 - WUTE

pub fn tse(&mut self) -> TSE_W<'_>[src]

Bit 11 - TSE

pub fn alraie(&mut self) -> ALRAIE_W<'_>[src]

Bit 12 - ALRAIE

pub fn alrbie(&mut self) -> ALRBIE_W<'_>[src]

Bit 13 - ALRBIE

pub fn wutie(&mut self) -> WUTIE_W<'_>[src]

Bit 14 - WUTIE

pub fn tsie(&mut self) -> TSIE_W<'_>[src]

Bit 15 - TSIE

pub fn add1h(&mut self) -> ADD1H_W<'_>[src]

Bit 16 - ADD1H

pub fn sub1h(&mut self) -> SUB1H_W<'_>[src]

Bit 17 - SUB1H

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bit 18 - BKP

pub fn cosel(&mut self) -> COSEL_W<'_>[src]

Bit 19 - COSEL

pub fn pol(&mut self) -> POL_W<'_>[src]

Bit 20 - POL

pub fn osel(&mut self) -> OSEL_W<'_>[src]

Bits 21:22 - OSEL

pub fn coe(&mut self) -> COE_W<'_>[src]

Bit 23 - COE

pub fn itse(&mut self) -> ITSE_W<'_>[src]

Bit 24 - ITSE

pub fn tampts(&mut self) -> TAMPTS_W<'_>[src]

Bit 25 - TAMPTS

pub fn tampoe(&mut self) -> TAMPOE_W<'_>[src]

Bit 26 - TAMPOE

pub fn tampalrm_pu(&mut self) -> TAMPALRM_PU_W<'_>[src]

Bit 29 - TAMPALRM_PU

pub fn tampalrm_type(&mut self) -> TAMPALRM_TYPE_W<'_>[src]

Bit 30 - TAMPALRM_TYPE

pub fn out2en(&mut self) -> OUT2EN_W<'_>[src]

Bit 31 - OUT2EN

impl W<u32, Reg<u32, _PRIVCR>>[src]

pub fn priv_(&mut self) -> PRIV_W<'_>[src]

Bit 15 - PRIV

pub fn initpriv(&mut self) -> INITPRIV_W<'_>[src]

Bit 14 - INITPRIV

pub fn calpriv(&mut self) -> CALPRIV_W<'_>[src]

Bit 13 - CALPRIV

pub fn tspriv(&mut self) -> TSPRIV_W<'_>[src]

Bit 3 - TSPRIV

pub fn wutpriv(&mut self) -> WUTPRIV_W<'_>[src]

Bit 2 - WUTPRIV

pub fn alrbpriv(&mut self) -> ALRBPRIV_W<'_>[src]

Bit 1 - ALRBPRIV

pub fn alrapriv(&mut self) -> ALRAPRIV_W<'_>[src]

Bit 0 - ALRAPRIV

impl W<u32, Reg<u32, _SMCR>>[src]

pub fn decprot(&mut self) -> DECPROT_W<'_>[src]

Bit 15 - DECPROT

pub fn initdprot(&mut self) -> INITDPROT_W<'_>[src]

Bit 14 - INITDPROT

pub fn caldprot(&mut self) -> CALDPROT_W<'_>[src]

Bit 13 - CALDPROT

pub fn tsdprot(&mut self) -> TSDPROT_W<'_>[src]

Bit 3 - TSDPROT

pub fn wutdprot(&mut self) -> WUTDPROT_W<'_>[src]

Bit 2 - WUTDPROT

pub fn alrbdprot(&mut self) -> ALRBDPROT_W<'_>[src]

Bit 1 - ALRBDPROT

pub fn alradprot(&mut self) -> ALRADPROT_W<'_>[src]

Bit 0 - ALRADPROT

impl W<u32, Reg<u32, _WPR>>[src]

pub fn key(&mut self) -> KEY_W<'_>[src]

Bits 0:7 - Write protection key

impl W<u32, Reg<u32, _CALR>>[src]

pub fn calp(&mut self) -> CALP_W<'_>[src]

Bit 15 - Increase frequency of RTC by 488.5 ppm

pub fn calw8(&mut self) -> CALW8_W<'_>[src]

Bit 14 - Use an 8-second calibration cycle period

pub fn calw16(&mut self) -> CALW16_W<'_>[src]

Bit 13 - Use a 16-second calibration cycle period

pub fn lpcal(&mut self) -> LPCAL_W<'_>[src]

Bit 12 - LPCAL

pub fn calm(&mut self) -> CALM_W<'_>[src]

Bits 0:8 - Calibration minus

impl W<u32, Reg<u32, _SHIFTR>>[src]

pub fn add1s(&mut self) -> ADD1S_W<'_>[src]

Bit 31 - Add one second

pub fn subfs(&mut self) -> SUBFS_W<'_>[src]

Bits 0:14 - Subtract a fraction of a second

impl W<u32, Reg<u32, _ALRMAR>>[src]

pub fn msk4(&mut self) -> MSK4_W<'_>[src]

Bit 31 - Alarm A date mask

pub fn wdsel(&mut self) -> WDSEL_W<'_>[src]

Bit 30 - Week day selection

pub fn dt(&mut self) -> DT_W<'_>[src]

Bits 28:29 - Date tens in BCD format

pub fn du(&mut self) -> DU_W<'_>[src]

Bits 24:27 - Date units or day in BCD format

pub fn msk3(&mut self) -> MSK3_W<'_>[src]

Bit 23 - Alarm A hours mask

pub fn pm(&mut self) -> PM_W<'_>[src]

Bit 22 - AM/PM notation

pub fn ht(&mut self) -> HT_W<'_>[src]

Bits 20:21 - Hour tens in BCD format

pub fn hu(&mut self) -> HU_W<'_>[src]

Bits 16:19 - Hour units in BCD format

pub fn msk2(&mut self) -> MSK2_W<'_>[src]

Bit 15 - Alarm A minutes mask

pub fn mnt(&mut self) -> MNT_W<'_>[src]

Bits 12:14 - Minute tens in BCD format

pub fn mnu(&mut self) -> MNU_W<'_>[src]

Bits 8:11 - Minute units in BCD format

pub fn msk1(&mut self) -> MSK1_W<'_>[src]

Bit 7 - Alarm A seconds mask

pub fn st(&mut self) -> ST_W<'_>[src]

Bits 4:6 - Second tens in BCD format

pub fn su(&mut self) -> SU_W<'_>[src]

Bits 0:3 - Second units in BCD format

impl W<u32, Reg<u32, _ALRMASSR>>[src]

pub fn maskss(&mut self) -> MASKSS_W<'_>[src]

Bits 24:27 - Mask the most-significant bits starting at this bit

pub fn ss(&mut self) -> SS_W<'_>[src]

Bits 0:14 - Sub seconds value

impl W<u32, Reg<u32, _ALRMBR>>[src]

pub fn msk4(&mut self) -> MSK4_W<'_>[src]

Bit 31 - Alarm B date mask

pub fn wdsel(&mut self) -> WDSEL_W<'_>[src]

Bit 30 - Week day selection

pub fn dt(&mut self) -> DT_W<'_>[src]

Bits 28:29 - Date tens in BCD format

pub fn du(&mut self) -> DU_W<'_>[src]

Bits 24:27 - Date units or day in BCD format

pub fn msk3(&mut self) -> MSK3_W<'_>[src]

Bit 23 - Alarm B hours mask

pub fn pm(&mut self) -> PM_W<'_>[src]

Bit 22 - AM/PM notation

pub fn ht(&mut self) -> HT_W<'_>[src]

Bits 20:21 - Hour tens in BCD format

pub fn hu(&mut self) -> HU_W<'_>[src]

Bits 16:19 - Hour units in BCD format

pub fn msk2(&mut self) -> MSK2_W<'_>[src]

Bit 15 - Alarm B minutes mask

pub fn mnt(&mut self) -> MNT_W<'_>[src]

Bits 12:14 - Minute tens in BCD format

pub fn mnu(&mut self) -> MNU_W<'_>[src]

Bits 8:11 - Minute units in BCD format

pub fn msk1(&mut self) -> MSK1_W<'_>[src]

Bit 7 - Alarm B seconds mask

pub fn st(&mut self) -> ST_W<'_>[src]

Bits 4:6 - Second tens in BCD format

pub fn su(&mut self) -> SU_W<'_>[src]

Bits 0:3 - Second units in BCD format

impl W<u32, Reg<u32, _ALRMBSSR>>[src]

pub fn maskss(&mut self) -> MASKSS_W<'_>[src]

Bits 24:27 - Mask the most-significant bits starting at this bit

pub fn ss(&mut self) -> SS_W<'_>[src]

Bits 0:14 - Sub seconds value

impl W<u32, Reg<u32, _SCR>>[src]

pub fn calraf(&mut self) -> CALRAF_W<'_>[src]

Bit 0 - CALRAF

pub fn calrbf(&mut self) -> CALRBF_W<'_>[src]

Bit 1 - CALRBF

pub fn cwutf(&mut self) -> CWUTF_W<'_>[src]

Bit 2 - CWUTF

pub fn ctsf(&mut self) -> CTSF_W<'_>[src]

Bit 3 - CTSF

pub fn ctsovf(&mut self) -> CTSOVF_W<'_>[src]

Bit 4 - CTSOVF

pub fn citsf(&mut self) -> CITSF_W<'_>[src]

Bit 5 - CITSF

impl W<u32, Reg<u32, _BCR1>>[src]

pub fn mcjdiv(&mut self) -> MCJDIV_W<'_>[src]

Bits 20:23 - Master clock divider

pub fn nodiv(&mut self) -> NODIV_W<'_>[src]

Bit 19 - No divider

pub fn dmaen(&mut self) -> DMAEN_W<'_>[src]

Bit 17 - DMA enable

pub fn saiben(&mut self) -> SAIBEN_W<'_>[src]

Bit 16 - Audio block B enable

pub fn out_dri(&mut self) -> OUTDRI_W<'_>[src]

Bit 13 - Output drive

pub fn mono(&mut self) -> MONO_W<'_>[src]

Bit 12 - Mono mode

pub fn syncen(&mut self) -> SYNCEN_W<'_>[src]

Bits 10:11 - Synchronization enable

pub fn ckstr(&mut self) -> CKSTR_W<'_>[src]

Bit 9 - Clock strobing edge

pub fn lsbfirst(&mut self) -> LSBFIRST_W<'_>[src]

Bit 8 - Least significant bit first

pub fn ds(&mut self) -> DS_W<'_>[src]

Bits 5:7 - Data size

pub fn prtcfg(&mut self) -> PRTCFG_W<'_>[src]

Bits 2:3 - Protocol configuration

pub fn mode(&mut self) -> MODE_W<'_>[src]

Bits 0:1 - Audio block mode

pub fn osr(&mut self) -> OSR_W<'_>[src]

Bit 26 - Oversampling ratio for master clock

impl W<u32, Reg<u32, _BCR2>>[src]

pub fn comp(&mut self) -> COMP_W<'_>[src]

Bits 14:15 - Companding mode

pub fn cpl(&mut self) -> CPL_W<'_>[src]

Bit 13 - Complement bit

pub fn mutecn(&mut self) -> MUTECN_W<'_>[src]

Bits 7:12 - Mute counter

pub fn muteval(&mut self) -> MUTEVAL_W<'_>[src]

Bit 6 - Mute value

pub fn mute(&mut self) -> MUTE_W<'_>[src]

Bit 5 - Mute

pub fn tris(&mut self) -> TRIS_W<'_>[src]

Bit 4 - Tristate management on data line

pub fn fflus(&mut self) -> FFLUS_W<'_>[src]

Bit 3 - FIFO flush

pub fn fth(&mut self) -> FTH_W<'_>[src]

Bits 0:2 - FIFO threshold

impl W<u32, Reg<u32, _BFRCR>>[src]

pub fn fsoff(&mut self) -> FSOFF_W<'_>[src]

Bit 18 - Frame synchronization offset

pub fn fspol(&mut self) -> FSPOL_W<'_>[src]

Bit 17 - Frame synchronization polarity

pub fn fsdef(&mut self) -> FSDEF_W<'_>[src]

Bit 16 - Frame synchronization definition

pub fn fsall(&mut self) -> FSALL_W<'_>[src]

Bits 8:14 - Frame synchronization active level length

pub fn frl(&mut self) -> FRL_W<'_>[src]

Bits 0:7 - Frame length

impl W<u32, Reg<u32, _BSLOTR>>[src]

pub fn sloten(&mut self) -> SLOTEN_W<'_>[src]

Bits 16:31 - Slot enable

pub fn nbslot(&mut self) -> NBSLOT_W<'_>[src]

Bits 8:11 - Number of slots in an audio frame

pub fn slotsz(&mut self) -> SLOTSZ_W<'_>[src]

Bits 6:7 - Slot size

pub fn fboff(&mut self) -> FBOFF_W<'_>[src]

Bits 0:4 - First bit offset

impl W<u32, Reg<u32, _BIM>>[src]

pub fn lfsdetie(&mut self) -> LFSDETIE_W<'_>[src]

Bit 6 - Late frame synchronization detection interrupt enable

pub fn afsdetie(&mut self) -> AFSDETIE_W<'_>[src]

Bit 5 - Anticipated frame synchronization detection interrupt enable

pub fn cnrdyie(&mut self) -> CNRDYIE_W<'_>[src]

Bit 4 - Codec not ready interrupt enable

pub fn freqie(&mut self) -> FREQIE_W<'_>[src]

Bit 3 - FIFO request interrupt enable

pub fn wckcfg(&mut self) -> WCKCFG_W<'_>[src]

Bit 2 - Wrong clock configuration interrupt enable

pub fn mutedet(&mut self) -> MUTEDET_W<'_>[src]

Bit 1 - Mute detection interrupt enable

pub fn ovrudrie(&mut self) -> OVRUDRIE_W<'_>[src]

Bit 0 - Overrun/underrun interrupt enable

impl W<u32, Reg<u32, _BCLRFR>>[src]

pub fn lfsdet(&mut self) -> LFSDET_W<'_>[src]

Bit 6 - Clear late frame synchronization detection flag

pub fn cafsdet(&mut self) -> CAFSDET_W<'_>[src]

Bit 5 - Clear anticipated frame synchronization detection flag

pub fn cnrdy(&mut self) -> CNRDY_W<'_>[src]

Bit 4 - Clear codec not ready flag

pub fn wckcfg(&mut self) -> WCKCFG_W<'_>[src]

Bit 2 - Clear wrong clock configuration flag

pub fn mutedet(&mut self) -> MUTEDET_W<'_>[src]

Bit 1 - Mute detection flag

pub fn ovrudr(&mut self) -> OVRUDR_W<'_>[src]

Bit 0 - Clear overrun / underrun

impl W<u32, Reg<u32, _BDR>>[src]

pub fn data(&mut self) -> DATA_W<'_>[src]

Bits 0:31 - Data

impl W<u32, Reg<u32, _ACR1>>[src]

pub fn mcjdiv(&mut self) -> MCJDIV_W<'_>[src]

Bits 20:23 - Master clock divider

pub fn nodiv(&mut self) -> NODIV_W<'_>[src]

Bit 19 - No divider

pub fn dmaen(&mut self) -> DMAEN_W<'_>[src]

Bit 17 - DMA enable

pub fn saiaen(&mut self) -> SAIAEN_W<'_>[src]

Bit 16 - Audio block A enable

pub fn out_dri(&mut self) -> OUTDRI_W<'_>[src]

Bit 13 - Output drive

pub fn mono(&mut self) -> MONO_W<'_>[src]

Bit 12 - Mono mode

pub fn syncen(&mut self) -> SYNCEN_W<'_>[src]

Bits 10:11 - Synchronization enable

pub fn ckstr(&mut self) -> CKSTR_W<'_>[src]

Bit 9 - Clock strobing edge

pub fn lsbfirst(&mut self) -> LSBFIRST_W<'_>[src]

Bit 8 - Least significant bit first

pub fn ds(&mut self) -> DS_W<'_>[src]

Bits 5:7 - Data size

pub fn prtcfg(&mut self) -> PRTCFG_W<'_>[src]

Bits 2:3 - Protocol configuration

pub fn mode(&mut self) -> MODE_W<'_>[src]

Bits 0:1 - Audio block mode

pub fn osr(&mut self) -> OSR_W<'_>[src]

Bit 26 - OSR

impl W<u32, Reg<u32, _ACR2>>[src]

pub fn comp(&mut self) -> COMP_W<'_>[src]

Bits 14:15 - Companding mode

pub fn cpl(&mut self) -> CPL_W<'_>[src]

Bit 13 - Complement bit

pub fn mutecn(&mut self) -> MUTECN_W<'_>[src]

Bits 7:12 - Mute counter

pub fn muteval(&mut self) -> MUTEVAL_W<'_>[src]

Bit 6 - Mute value

pub fn mute(&mut self) -> MUTE_W<'_>[src]

Bit 5 - Mute

pub fn tris(&mut self) -> TRIS_W<'_>[src]

Bit 4 - Tristate management on data line

pub fn fflus(&mut self) -> FFLUS_W<'_>[src]

Bit 3 - FIFO flush

pub fn fth(&mut self) -> FTH_W<'_>[src]

Bits 0:2 - FIFO threshold

impl W<u32, Reg<u32, _AFRCR>>[src]

pub fn fsoff(&mut self) -> FSOFF_W<'_>[src]

Bit 18 - Frame synchronization offset

pub fn fspol(&mut self) -> FSPOL_W<'_>[src]

Bit 17 - Frame synchronization polarity

pub fn fsdef(&mut self) -> FSDEF_W<'_>[src]

Bit 16 - Frame synchronization definition

pub fn fsall(&mut self) -> FSALL_W<'_>[src]

Bits 8:14 - Frame synchronization active level length

pub fn frl(&mut self) -> FRL_W<'_>[src]

Bits 0:7 - Frame length

impl W<u32, Reg<u32, _ASLOTR>>[src]

pub fn sloten(&mut self) -> SLOTEN_W<'_>[src]

Bits 16:31 - Slot enable

pub fn nbslot(&mut self) -> NBSLOT_W<'_>[src]

Bits 8:11 - Number of slots in an audio frame

pub fn slotsz(&mut self) -> SLOTSZ_W<'_>[src]

Bits 6:7 - Slot size

pub fn fboff(&mut self) -> FBOFF_W<'_>[src]

Bits 0:4 - First bit offset

impl W<u32, Reg<u32, _AIM>>[src]

pub fn lfsdet(&mut self) -> LFSDET_W<'_>[src]

Bit 6 - Late frame synchronization detection interrupt enable

pub fn afsdetie(&mut self) -> AFSDETIE_W<'_>[src]

Bit 5 - Anticipated frame synchronization detection interrupt enable

pub fn cnrdyie(&mut self) -> CNRDYIE_W<'_>[src]

Bit 4 - Codec not ready interrupt enable

pub fn freqie(&mut self) -> FREQIE_W<'_>[src]

Bit 3 - FIFO request interrupt enable

pub fn wckcfg(&mut self) -> WCKCFG_W<'_>[src]

Bit 2 - Wrong clock configuration interrupt enable

pub fn mutedet(&mut self) -> MUTEDET_W<'_>[src]

Bit 1 - Mute detection interrupt enable

pub fn ovrudrie(&mut self) -> OVRUDRIE_W<'_>[src]

Bit 0 - Overrun/underrun interrupt enable

impl W<u32, Reg<u32, _ASR>>[src]

pub fn flvl(&mut self) -> FLVL_W<'_>[src]

Bits 16:18 - FIFO level threshold

pub fn lfsdet(&mut self) -> LFSDET_W<'_>[src]

Bit 6 - Late frame synchronization detection

pub fn afsdet(&mut self) -> AFSDET_W<'_>[src]

Bit 5 - Anticipated frame synchronization detection

pub fn cnrdy(&mut self) -> CNRDY_W<'_>[src]

Bit 4 - Codec not ready

pub fn freq(&mut self) -> FREQ_W<'_>[src]

Bit 3 - FIFO request

pub fn wckcfg(&mut self) -> WCKCFG_W<'_>[src]

Bit 2 - Wrong clock configuration flag. This bit is read only

pub fn mutedet(&mut self) -> MUTEDET_W<'_>[src]

Bit 1 - Mute detection

pub fn ovrudr(&mut self) -> OVRUDR_W<'_>[src]

Bit 0 - Overrun / underrun

impl W<u32, Reg<u32, _ACLRFR>>[src]

pub fn lfsdet(&mut self) -> LFSDET_W<'_>[src]

Bit 6 - Clear late frame synchronization detection flag

pub fn cafsdet(&mut self) -> CAFSDET_W<'_>[src]

Bit 5 - Clear anticipated frame synchronization detection flag

pub fn cnrdy(&mut self) -> CNRDY_W<'_>[src]

Bit 4 - Clear codec not ready flag

pub fn wckcfg(&mut self) -> WCKCFG_W<'_>[src]

Bit 2 - Clear wrong clock configuration flag

pub fn mutedet(&mut self) -> MUTEDET_W<'_>[src]

Bit 1 - Mute detection flag

pub fn ovrudr(&mut self) -> OVRUDR_W<'_>[src]

Bit 0 - Clear overrun / underrun

impl W<u32, Reg<u32, _ADR>>[src]

pub fn data(&mut self) -> DATA_W<'_>[src]

Bits 0:31 - Data

impl W<u32, Reg<u32, _GCR>>[src]

pub fn syncin(&mut self) -> SYNCIN_W<'_>[src]

Bits 0:1 - Synchronization inputs

pub fn syncout(&mut self) -> SYNCOUT_W<'_>[src]

Bits 4:5 - Synchronization outputs

impl W<u32, Reg<u32, _PDMCR>>[src]

pub fn pdmen(&mut self) -> PDMEN_W<'_>[src]

Bit 0 - PDM enable

pub fn micnbr(&mut self) -> MICNBR_W<'_>[src]

Bits 4:5 - MICNBR

pub fn cken1(&mut self) -> CKEN1_W<'_>[src]

Bit 8 - Clock enable of bitstream clock number 1

pub fn cken2(&mut self) -> CKEN2_W<'_>[src]

Bit 9 - CKEN2

impl W<u32, Reg<u32, _PDMDLY>>[src]

pub fn dlym1l(&mut self) -> DLYM1L_W<'_>[src]

Bits 0:2 - Delay line adjust for first microphone of pair 1

pub fn dlym1r(&mut self) -> DLYM1R_W<'_>[src]

Bits 4:6 - Delay line adjust for second microphone of pair 1

pub fn dlym2l(&mut self) -> DLYM2L_W<'_>[src]

Bits 8:10 - Delay line for first microphone of pair 2

pub fn dlym2r(&mut self) -> DLYM2R_W<'_>[src]

Bits 12:14 - Delay line for second microphone of pair 2

pub fn dlym3l(&mut self) -> DLYM3L_W<'_>[src]

Bits 16:18 - DLYM3L

pub fn dlym3r(&mut self) -> DLYM3R_W<'_>[src]

Bits 20:22 - DLYM3R

pub fn dlym4l(&mut self) -> DLYM4L_W<'_>[src]

Bits 24:26 - DLYM4L

pub fn dlym4r(&mut self) -> DLYM4R_W<'_>[src]

Bits 28:30 - DLYM4R

impl W<u32, Reg<u32, _IFCR>>[src]

pub fn cteif7(&mut self) -> CTEIF7_W<'_>[src]

Bit 27 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif7(&mut self) -> CHTIF7_W<'_>[src]

Bit 26 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif7(&mut self) -> CTCIF7_W<'_>[src]

Bit 25 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif7(&mut self) -> CGIF7_W<'_>[src]

Bit 24 - Channel x global interrupt clear (x = 1 ..7)

pub fn cteif6(&mut self) -> CTEIF6_W<'_>[src]

Bit 23 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif6(&mut self) -> CHTIF6_W<'_>[src]

Bit 22 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif6(&mut self) -> CTCIF6_W<'_>[src]

Bit 21 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif6(&mut self) -> CGIF6_W<'_>[src]

Bit 20 - Channel x global interrupt clear (x = 1 ..7)

pub fn cteif5(&mut self) -> CTEIF5_W<'_>[src]

Bit 19 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif5(&mut self) -> CHTIF5_W<'_>[src]

Bit 18 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif5(&mut self) -> CTCIF5_W<'_>[src]

Bit 17 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif5(&mut self) -> CGIF5_W<'_>[src]

Bit 16 - Channel x global interrupt clear (x = 1 ..7)

pub fn cteif4(&mut self) -> CTEIF4_W<'_>[src]

Bit 15 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif4(&mut self) -> CHTIF4_W<'_>[src]

Bit 14 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif4(&mut self) -> CTCIF4_W<'_>[src]

Bit 13 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif4(&mut self) -> CGIF4_W<'_>[src]

Bit 12 - Channel x global interrupt clear (x = 1 ..7)

pub fn cteif3(&mut self) -> CTEIF3_W<'_>[src]

Bit 11 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif3(&mut self) -> CHTIF3_W<'_>[src]

Bit 10 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif3(&mut self) -> CTCIF3_W<'_>[src]

Bit 9 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif3(&mut self) -> CGIF3_W<'_>[src]

Bit 8 - Channel x global interrupt clear (x = 1 ..7)

pub fn cteif2(&mut self) -> CTEIF2_W<'_>[src]

Bit 7 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif2(&mut self) -> CHTIF2_W<'_>[src]

Bit 6 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif2(&mut self) -> CTCIF2_W<'_>[src]

Bit 5 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif2(&mut self) -> CGIF2_W<'_>[src]

Bit 4 - Channel x global interrupt clear (x = 1 ..7)

pub fn cteif1(&mut self) -> CTEIF1_W<'_>[src]

Bit 3 - Channel x transfer error clear (x = 1 ..7)

pub fn chtif1(&mut self) -> CHTIF1_W<'_>[src]

Bit 2 - Channel x half transfer clear (x = 1 ..7)

pub fn ctcif1(&mut self) -> CTCIF1_W<'_>[src]

Bit 1 - Channel x transfer complete clear (x = 1 ..7)

pub fn cgif1(&mut self) -> CGIF1_W<'_>[src]

Bit 0 - Channel x global interrupt clear (x = 1 ..7)

pub fn cgif8(&mut self) -> CGIF8_W<'_>[src]

Bit 28 - global interrupt flag clear for channel 8

pub fn ctcif8(&mut self) -> CTCIF8_W<'_>[src]

Bit 29 - transfer complete flag clear for channel 8

pub fn chtif8(&mut self) -> CHTIF8_W<'_>[src]

Bit 30 - half transfer flag clear for channel 8

pub fn cteif8(&mut self) -> CTEIF8_W<'_>[src]

Bit 31 - transfer error flag clear for channel 8

impl W<u32, Reg<u32, _CCR1>>[src]

pub fn mem2mem(&mut self) -> MEM2MEM_W<'_>[src]

Bit 14 - Memory to memory mode

pub fn pl(&mut self) -> PL_W<'_>[src]

Bits 12:13 - Channel priority level

pub fn msize(&mut self) -> MSIZE_W<'_>[src]

Bits 10:11 - Memory size

pub fn psize(&mut self) -> PSIZE_W<'_>[src]

Bits 8:9 - Peripheral size

pub fn minc(&mut self) -> MINC_W<'_>[src]

Bit 7 - Memory increment mode

pub fn pinc(&mut self) -> PINC_W<'_>[src]

Bit 6 - Peripheral increment mode

pub fn circ(&mut self) -> CIRC_W<'_>[src]

Bit 5 - Circular mode

pub fn dir(&mut self) -> DIR_W<'_>[src]

Bit 4 - Data transfer direction

pub fn teie(&mut self) -> TEIE_W<'_>[src]

Bit 3 - Transfer error interrupt enable

pub fn htie(&mut self) -> HTIE_W<'_>[src]

Bit 2 - Half transfer interrupt enable

pub fn tcie(&mut self) -> TCIE_W<'_>[src]

Bit 1 - Transfer complete interrupt enable

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - Channel enable

pub fn dbm(&mut self) -> DBM_W<'_>[src]

Bit 15 - double-buffer mode

pub fn ct(&mut self) -> CT_W<'_>[src]

Bit 16 - current target memory of DMA transfer in double-buffer mode

pub fn secm(&mut self) -> SECM_W<'_>[src]

Bit 17 - secure mode

pub fn ssec(&mut self) -> SSEC_W<'_>[src]

Bit 18 - security of the DMA transfer from the source

pub fn dsec(&mut self) -> DSEC_W<'_>[src]

Bit 19 - security of the DMA transfer to the destination

pub fn priv_(&mut self) -> PRIV_W<'_>[src]

Bit 20 - privileged mode

impl W<u32, Reg<u32, _CNDTR1>>[src]

pub fn ndt(&mut self) -> NDT_W<'_>[src]

Bits 0:17 - Number of data to transfer

impl W<u32, Reg<u32, _CPAR1>>[src]

pub fn pa(&mut self) -> PA_W<'_>[src]

Bits 0:31 - Peripheral address

impl W<u32, Reg<u32, _CM0AR1>>[src]

pub fn ma(&mut self) -> MA_W<'_>[src]

Bits 0:31 - Memory address

impl W<u32, Reg<u32, _CM1AR1>>[src]

pub fn mem2mem(&mut self) -> MEM2MEM_W<'_>[src]

Bit 14 - Memory to memory mode

pub fn pl(&mut self) -> PL_W<'_>[src]

Bits 12:13 - Channel priority level

pub fn msize(&mut self) -> MSIZE_W<'_>[src]

Bits 10:11 - Memory size

pub fn psize(&mut self) -> PSIZE_W<'_>[src]

Bits 8:9 - Peripheral size

pub fn minc(&mut self) -> MINC_W<'_>[src]

Bit 7 - Memory increment mode

pub fn pinc(&mut self) -> PINC_W<'_>[src]

Bit 6 - Peripheral increment mode

pub fn circ(&mut self) -> CIRC_W<'_>[src]

Bit 5 - Circular mode

pub fn dir(&mut self) -> DIR_W<'_>[src]

Bit 4 - Data transfer direction

pub fn teie(&mut self) -> TEIE_W<'_>[src]

Bit 3 - Transfer error interrupt enable

pub fn htie(&mut self) -> HTIE_W<'_>[src]

Bit 2 - Half transfer interrupt enable

pub fn tcie(&mut self) -> TCIE_W<'_>[src]

Bit 1 - Transfer complete interrupt enable

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - Channel enable

pub fn dbm(&mut self) -> DBM_W<'_>[src]

Bit 15 - double-buffer mode

pub fn ct(&mut self) -> CT_W<'_>[src]

Bit 16 - current target memory of DMA transfer in double-buffer mode

pub fn secm(&mut self) -> SECM_W<'_>[src]

Bit 17 - secure mode

pub fn ssec(&mut self) -> SSEC_W<'_>[src]

Bit 18 - security of the DMA transfer from the source

pub fn dsec(&mut self) -> DSEC_W<'_>[src]

Bit 19 - security of the DMA transfer to the destination

pub fn priv_(&mut self) -> PRIV_W<'_>[src]

Bit 20 - privileged mode

impl W<u32, Reg<u32, _CCR2>>[src]

pub fn ndt(&mut self) -> NDT_W<'_>[src]

Bits 0:17 - Number of data to transfer

impl W<u32, Reg<u32, _CNDTR2>>[src]

pub fn pa(&mut self) -> PA_W<'_>[src]

Bits 0:31 - Peripheral address

impl W<u32, Reg<u32, _CPAR2>>[src]

pub fn ma(&mut self) -> MA_W<'_>[src]

Bits 0:31 - Memory address

impl W<u32, Reg<u32, _CM0AR2>>[src]

pub fn mem2mem(&mut self) -> MEM2MEM_W<'_>[src]

Bit 14 - Memory to memory mode

pub fn pl(&mut self) -> PL_W<'_>[src]

Bits 12:13 - Channel priority level

pub fn msize(&mut self) -> MSIZE_W<'_>[src]

Bits 10:11 - Memory size

pub fn psize(&mut self) -> PSIZE_W<'_>[src]

Bits 8:9 - Peripheral size

pub fn minc(&mut self) -> MINC_W<'_>[src]

Bit 7 - Memory increment mode

pub fn pinc(&mut self) -> PINC_W<'_>[src]

Bit 6 - Peripheral increment mode

pub fn circ(&mut self) -> CIRC_W<'_>[src]

Bit 5 - Circular mode

pub fn dir(&mut self) -> DIR_W<'_>[src]

Bit 4 - Data transfer direction

pub fn teie(&mut self) -> TEIE_W<'_>[src]

Bit 3 - Transfer error interrupt enable

pub fn htie(&mut self) -> HTIE_W<'_>[src]

Bit 2 - Half transfer interrupt enable

pub fn tcie(&mut self) -> TCIE_W<'_>[src]

Bit 1 - Transfer complete interrupt enable

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - Channel enable

pub fn dbm(&mut self) -> DBM_W<'_>[src]

Bit 15 - double-buffer mode

pub fn ct(&mut self) -> CT_W<'_>[src]

Bit 16 - current target memory of DMA transfer in double-buffer mode

pub fn secm(&mut self) -> SECM_W<'_>[src]

Bit 17 - secure mode

pub fn ssec(&mut self) -> SSEC_W<'_>[src]

Bit 18 - security of the DMA transfer from the source

pub fn dsec(&mut self) -> DSEC_W<'_>[src]

Bit 19 - security of the DMA transfer to the destination

pub fn priv_(&mut self) -> PRIV_W<'_>[src]

Bit 20 - privileged mode

impl W<u32, Reg<u32, _CM1AR2>>[src]

pub fn ndt(&mut self) -> NDT_W<'_>[src]

Bits 0:17 - Number of data to transfer

impl W<u32, Reg<u32, _CCR3>>[src]

pub fn pa(&mut self) -> PA_W<'_>[src]

Bits 0:31 - Peripheral address

impl W<u32, Reg<u32, _CNDTR3>>[src]

pub fn ma(&mut self) -> MA_W<'_>[src]

Bits 0:31 - Memory address

impl W<u32, Reg<u32, _CPAR3>>[src]

pub fn mem2mem(&mut self) -> MEM2MEM_W<'_>[src]

Bit 14 - Memory to memory mode

pub fn pl(&mut self) -> PL_W<'_>[src]

Bits 12:13 - Channel priority level

pub fn msize(&mut self) -> MSIZE_W<'_>[src]

Bits 10:11 - Memory size

pub fn psize(&mut self) -> PSIZE_W<'_>[src]

Bits 8:9 - Peripheral size

pub fn minc(&mut self) -> MINC_W<'_>[src]

Bit 7 - Memory increment mode

pub fn pinc(&mut self) -> PINC_W<'_>[src]

Bit 6 - Peripheral increment mode

pub fn circ(&mut self) -> CIRC_W<'_>[src]

Bit 5 - Circular mode

pub fn dir(&mut self) -> DIR_W<'_>[src]

Bit 4 - Data transfer direction

pub fn teie(&mut self) -> TEIE_W<'_>[src]

Bit 3 - Transfer error interrupt enable

pub fn htie(&mut self) -> HTIE_W<'_>[src]

Bit 2 - Half transfer interrupt enable

pub fn tcie(&mut self) -> TCIE_W<'_>[src]

Bit 1 - Transfer complete interrupt enable

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - Channel enable

pub fn dbm(&mut self) -> DBM_W<'_>[src]

Bit 15 - double-buffer mode

pub fn ct(&mut self) -> CT_W<'_>[src]

Bit 16 - current target memory of DMA transfer in double-buffer mode

pub fn secm(&mut self) -> SECM_W<'_>[src]

Bit 17 - secure mode

pub fn ssec(&mut self) -> SSEC_W<'_>[src]

Bit 18 - security of the DMA transfer from the source

pub fn dsec(&mut self) -> DSEC_W<'_>[src]

Bit 19 - security of the DMA transfer to the destination

pub fn priv_(&mut self) -> PRIV_W<'_>[src]

Bit 20 - privileged mode

impl W<u32, Reg<u32, _CM0AR3>>[src]

pub fn ndt(&mut self) -> NDT_W<'_>[src]

Bits 0:17 - Number of data to transfer

impl W<u32, Reg<u32, _CM1AR3>>[src]

pub fn pa(&mut self) -> PA_W<'_>[src]

Bits 0:31 - Peripheral address

impl W<u32, Reg<u32, _CCR4>>[src]

pub fn ma(&mut self) -> MA_W<'_>[src]

Bits 0:31 - Memory address

impl W<u32, Reg<u32, _CNDTR4>>[src]

pub fn mem2mem(&mut self) -> MEM2MEM_W<'_>[src]

Bit 14 - Memory to memory mode

pub fn pl(&mut self) -> PL_W<'_>[src]

Bits 12:13 - Channel priority level

pub fn msize(&mut self) -> MSIZE_W<'_>[src]

Bits 10:11 - Memory size

pub fn psize(&mut self) -> PSIZE_W<'_>[src]

Bits 8:9 - Peripheral size

pub fn minc(&mut self) -> MINC_W<'_>[src]

Bit 7 - Memory increment mode

pub fn pinc(&mut self) -> PINC_W<'_>[src]

Bit 6 - Peripheral increment mode

pub fn circ(&mut self) -> CIRC_W<'_>[src]

Bit 5 - Circular mode

pub fn dir(&mut self) -> DIR_W<'_>[src]

Bit 4 - Data transfer direction

pub fn teie(&mut self) -> TEIE_W<'_>[src]

Bit 3 - Transfer error interrupt enable

pub fn htie(&mut self) -> HTIE_W<'_>[src]

Bit 2 - Half transfer interrupt enable

pub fn tcie(&mut self) -> TCIE_W<'_>[src]

Bit 1 - Transfer complete interrupt enable

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - Channel enable

pub fn dbm(&mut self) -> DBM_W<'_>[src]

Bit 15 - double-buffer mode

pub fn ct(&mut self) -> CT_W<'_>[src]

Bit 16 - current target memory of DMA transfer in double-buffer mode

pub fn secm(&mut self) -> SECM_W<'_>[src]

Bit 17 - secure mode

pub fn ssec(&mut self) -> SSEC_W<'_>[src]

Bit 18 - security of the DMA transfer from the source

pub fn dsec(&mut self) -> DSEC_W<'_>[src]

Bit 19 - security of the DMA transfer to the destination

pub fn priv_(&mut self) -> PRIV_W<'_>[src]

Bit 20 - privileged mode

impl W<u32, Reg<u32, _CPAR4>>[src]

pub fn ndt(&mut self) -> NDT_W<'_>[src]

Bits 0:17 - Number of data to transfer

impl W<u32, Reg<u32, _CM0AR4>>[src]

pub fn pa(&mut self) -> PA_W<'_>[src]

Bits 0:31 - Peripheral address

impl W<u32, Reg<u32, _CM1AR4>>[src]

pub fn ma(&mut self) -> MA_W<'_>[src]

Bits 0:31 - Memory address

impl W<u32, Reg<u32, _CCR5>>[src]

pub fn mem2mem(&mut self) -> MEM2MEM_W<'_>[src]

Bit 14 - Memory to memory mode

pub fn pl(&mut self) -> PL_W<'_>[src]

Bits 12:13 - Channel priority level

pub fn msize(&mut self) -> MSIZE_W<'_>[src]

Bits 10:11 - Memory size

pub fn psize(&mut self) -> PSIZE_W<'_>[src]

Bits 8:9 - Peripheral size

pub fn minc(&mut self) -> MINC_W<'_>[src]

Bit 7 - Memory increment mode

pub fn pinc(&mut self) -> PINC_W<'_>[src]

Bit 6 - Peripheral increment mode

pub fn circ(&mut self) -> CIRC_W<'_>[src]

Bit 5 - Circular mode

pub fn dir(&mut self) -> DIR_W<'_>[src]

Bit 4 - Data transfer direction

pub fn teie(&mut self) -> TEIE_W<'_>[src]

Bit 3 - Transfer error interrupt enable

pub fn htie(&mut self) -> HTIE_W<'_>[src]

Bit 2 - Half transfer interrupt enable

pub fn tcie(&mut self) -> TCIE_W<'_>[src]

Bit 1 - Transfer complete interrupt enable

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - Channel enable

pub fn dbm(&mut self) -> DBM_W<'_>[src]

Bit 15 - double-buffer mode

pub fn ct(&mut self) -> CT_W<'_>[src]

Bit 16 - current target memory of DMA transfer in double-buffer mode

pub fn secm(&mut self) -> SECM_W<'_>[src]

Bit 17 - secure mode

pub fn ssec(&mut self) -> SSEC_W<'_>[src]

Bit 18 - security of the DMA transfer from the source

pub fn dsec(&mut self) -> DSEC_W<'_>[src]

Bit 19 - security of the DMA transfer to the destination

pub fn priv_(&mut self) -> PRIV_W<'_>[src]

Bit 20 - privileged mode

impl W<u32, Reg<u32, _CNDTR5>>[src]

pub fn ndt(&mut self) -> NDT_W<'_>[src]

Bits 0:17 - Number of data to transfer

impl W<u32, Reg<u32, _CPAR5>>[src]

pub fn pa(&mut self) -> PA_W<'_>[src]

Bits 0:31 - Peripheral address

impl W<u32, Reg<u32, _CM0AR5>>[src]

pub fn ma(&mut self) -> MA_W<'_>[src]

Bits 0:31 - Memory address

impl W<u32, Reg<u32, _CM1AR5>>[src]

pub fn mem2mem(&mut self) -> MEM2MEM_W<'_>[src]

Bit 14 - Memory to memory mode

pub fn pl(&mut self) -> PL_W<'_>[src]

Bits 12:13 - Channel priority level

pub fn msize(&mut self) -> MSIZE_W<'_>[src]

Bits 10:11 - Memory size

pub fn psize(&mut self) -> PSIZE_W<'_>[src]

Bits 8:9 - Peripheral size

pub fn minc(&mut self) -> MINC_W<'_>[src]

Bit 7 - Memory increment mode

pub fn pinc(&mut self) -> PINC_W<'_>[src]

Bit 6 - Peripheral increment mode

pub fn circ(&mut self) -> CIRC_W<'_>[src]

Bit 5 - Circular mode

pub fn dir(&mut self) -> DIR_W<'_>[src]

Bit 4 - Data transfer direction

pub fn teie(&mut self) -> TEIE_W<'_>[src]

Bit 3 - Transfer error interrupt enable

pub fn htie(&mut self) -> HTIE_W<'_>[src]

Bit 2 - Half transfer interrupt enable

pub fn tcie(&mut self) -> TCIE_W<'_>[src]

Bit 1 - Transfer complete interrupt enable

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - Channel enable

pub fn dbm(&mut self) -> DBM_W<'_>[src]

Bit 15 - double-buffer mode

pub fn ct(&mut self) -> CT_W<'_>[src]

Bit 16 - current target memory of DMA transfer in double-buffer mode

pub fn secm(&mut self) -> SECM_W<'_>[src]

Bit 17 - secure mode

pub fn ssec(&mut self) -> SSEC_W<'_>[src]

Bit 18 - security of the DMA transfer from the source

pub fn dsec(&mut self) -> DSEC_W<'_>[src]

Bit 19 - security of the DMA transfer to the destination

pub fn priv_(&mut self) -> PRIV_W<'_>[src]

Bit 20 - privileged mode

impl W<u32, Reg<u32, _CCR6>>[src]

pub fn ndt(&mut self) -> NDT_W<'_>[src]

Bits 0:17 - Number of data to transfer

impl W<u32, Reg<u32, _CNDTR6>>[src]

pub fn pa(&mut self) -> PA_W<'_>[src]

Bits 0:31 - Peripheral address

impl W<u32, Reg<u32, _CPAR6>>[src]

pub fn ma(&mut self) -> MA_W<'_>[src]

Bits 0:31 - Memory address

impl W<u32, Reg<u32, _CM0AR6>>[src]

pub fn c7s(&mut self) -> C7S_W<'_>[src]

Bits 24:27 - DMA channel 7 selection

pub fn c6s(&mut self) -> C6S_W<'_>[src]

Bits 20:23 - DMA channel 6 selection

pub fn c5s(&mut self) -> C5S_W<'_>[src]

Bits 16:19 - DMA channel 5 selection

pub fn c4s(&mut self) -> C4S_W<'_>[src]

Bits 12:15 - DMA channel 4 selection

pub fn c3s(&mut self) -> C3S_W<'_>[src]

Bits 8:11 - DMA channel 3 selection

pub fn c2s(&mut self) -> C2S_W<'_>[src]

Bits 4:7 - DMA channel 2 selection

pub fn c1s(&mut self) -> C1S_W<'_>[src]

Bits 0:3 - DMA channel 1 selection

impl W<u32, Reg<u32, _CM1AR6>>[src]

pub fn ma(&mut self) -> MA_W<'_>[src]

Bits 0:31 - peripheral address

impl W<u32, Reg<u32, _CCR7>>[src]

pub fn ma(&mut self) -> MA_W<'_>[src]

Bits 0:31 - peripheral address

impl W<u32, Reg<u32, _CNDTR7>>[src]

pub fn ma(&mut self) -> MA_W<'_>[src]

Bits 0:31 - peripheral address

impl W<u32, Reg<u32, _CPAR7>>[src]

pub fn ma(&mut self) -> MA_W<'_>[src]

Bits 0:31 - peripheral address

impl W<u32, Reg<u32, _CM0AR7>>[src]

pub fn ma(&mut self) -> MA_W<'_>[src]

Bits 0:31 - peripheral address

impl W<u32, Reg<u32, _CM1AR7>>[src]

pub fn ma(&mut self) -> MA_W<'_>[src]

Bits 0:31 - peripheral address

impl W<u32, Reg<u32, _CCR8>>[src]

pub fn ma(&mut self) -> MA_W<'_>[src]

Bits 0:31 - peripheral address

impl W<u32, Reg<u32, _CNDTR8>>[src]

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - channel enable

pub fn tcie(&mut self) -> TCIE_W<'_>[src]

Bit 1 - transfer complete interrupt enable

pub fn htie(&mut self) -> HTIE_W<'_>[src]

Bit 2 - half transfer interrupt enable

pub fn teie(&mut self) -> TEIE_W<'_>[src]

Bit 3 - transfer error interrupt enable

pub fn dir(&mut self) -> DIR_W<'_>[src]

Bit 4 - data transfer direction

pub fn circ(&mut self) -> CIRC_W<'_>[src]

Bit 5 - circular mode

pub fn pinc(&mut self) -> PINC_W<'_>[src]

Bit 6 - peripheral increment mode

pub fn minc(&mut self) -> MINC_W<'_>[src]

Bit 7 - memory increment mode

pub fn psize(&mut self) -> PSIZE_W<'_>[src]

Bits 8:9 - peripheral size

pub fn msize(&mut self) -> MSIZE_W<'_>[src]

Bits 10:11 - memory size

pub fn pl(&mut self) -> PL_W<'_>[src]

Bits 12:13 - priority level

pub fn mem2mem(&mut self) -> MEM2MEM_W<'_>[src]

Bit 14 - memory-to-memory mode

pub fn dbm(&mut self) -> DBM_W<'_>[src]

Bit 15 - double-buffer mode

pub fn ct(&mut self) -> CT_W<'_>[src]

Bit 16 - current target memory of DMA transfer in double-buffer mode

pub fn secm(&mut self) -> SECM_W<'_>[src]

Bit 17 - secure mode

pub fn ssec(&mut self) -> SSEC_W<'_>[src]

Bit 18 - security of the DMA transfer from the source

pub fn dsec(&mut self) -> DSEC_W<'_>[src]

Bit 19 - security of the DMA transfer to the destination

pub fn priv_(&mut self) -> PRIV_W<'_>[src]

Bit 20 - privileged mode

impl W<u32, Reg<u32, _CPAR8>>[src]

pub fn ndt(&mut self) -> NDT_W<'_>[src]

Bits 0:17 - number of data to transfer

impl W<u32, Reg<u32, _CM0AR8>>[src]

pub fn pa(&mut self) -> PA_W<'_>[src]

Bits 0:31 - peripheral address

impl W<u32, Reg<u32, _CM1AR8>>[src]

pub fn ma(&mut self) -> MA_W<'_>[src]

Bits 0:31 - peripheral address

impl W<u32, Reg<u32, _CSELR>>[src]

pub fn ma(&mut self) -> MA_W<'_>[src]

Bits 0:31 - peripheral address

impl W<u32, Reg<u32, _MPCBB1_CR>>[src]

pub fn lck(&mut self) -> LCK_W<'_>[src]

Bit 0 - LCK

pub fn invsecstate(&mut self) -> INVSECSTATE_W<'_>[src]

Bit 30 - INVSECSTATE

pub fn srwiladis(&mut self) -> SRWILADIS_W<'_>[src]

Bit 31 - SRWILADIS

impl W<u32, Reg<u32, _MPCBB1_LCKVTR1>>[src]

pub fn lcksb0(&mut self) -> LCKSB0_W<'_>[src]

Bit 0 - LCKSB0

pub fn lcksb1(&mut self) -> LCKSB1_W<'_>[src]

Bit 1 - LCKSB1

pub fn lcksb2(&mut self) -> LCKSB2_W<'_>[src]

Bit 2 - LCKSB2

pub fn lcksb3(&mut self) -> LCKSB3_W<'_>[src]

Bit 3 - LCKSB3

pub fn lcksb4(&mut self) -> LCKSB4_W<'_>[src]

Bit 4 - LCKSB4

pub fn lcksb5(&mut self) -> LCKSB5_W<'_>[src]

Bit 5 - LCKSB5

pub fn lcksb6(&mut self) -> LCKSB6_W<'_>[src]

Bit 6 - LCKSB6

pub fn lcksb7(&mut self) -> LCKSB7_W<'_>[src]

Bit 7 - LCKSB7

pub fn lcksb8(&mut self) -> LCKSB8_W<'_>[src]

Bit 8 - LCKSB8

pub fn lcksb9(&mut self) -> LCKSB9_W<'_>[src]

Bit 9 - LCKSB9

pub fn lcksb10(&mut self) -> LCKSB10_W<'_>[src]

Bit 10 - LCKSB10

pub fn lcksb11(&mut self) -> LCKSB11_W<'_>[src]

Bit 11 - LCKSB11

pub fn lcksb12(&mut self) -> LCKSB12_W<'_>[src]

Bit 12 - LCKSB12

pub fn lcksb13(&mut self) -> LCKSB13_W<'_>[src]

Bit 13 - LCKSB13

pub fn lcksb14(&mut self) -> LCKSB14_W<'_>[src]

Bit 14 - LCKSB14

pub fn lcksb15(&mut self) -> LCKSB15_W<'_>[src]

Bit 15 - LCKSB15

pub fn lcksb16(&mut self) -> LCKSB16_W<'_>[src]

Bit 16 - LCKSB16

pub fn lcksb17(&mut self) -> LCKSB17_W<'_>[src]

Bit 17 - LCKSB17

pub fn lcksb18(&mut self) -> LCKSB18_W<'_>[src]

Bit 18 - LCKSB18

pub fn lcksb19(&mut self) -> LCKSB19_W<'_>[src]

Bit 19 - LCKSB19

pub fn lcksb20(&mut self) -> LCKSB20_W<'_>[src]

Bit 20 - LCKSB20

pub fn lcksb21(&mut self) -> LCKSB21_W<'_>[src]

Bit 21 - LCKSB21

pub fn lcksb22(&mut self) -> LCKSB22_W<'_>[src]

Bit 22 - LCKSB22

pub fn lcksb23(&mut self) -> LCKSB23_W<'_>[src]

Bit 23 - LCKSB23

pub fn lcksb24(&mut self) -> LCKSB24_W<'_>[src]

Bit 24 - LCKSB24

pub fn lcksb25(&mut self) -> LCKSB25_W<'_>[src]

Bit 25 - LCKSB25

pub fn lcksb26(&mut self) -> LCKSB26_W<'_>[src]

Bit 26 - LCKSB26

pub fn lcksb27(&mut self) -> LCKSB27_W<'_>[src]

Bit 27 - LCKSB27

pub fn lcksb28(&mut self) -> LCKSB28_W<'_>[src]

Bit 28 - LCKSB28

pub fn lcksb29(&mut self) -> LCKSB29_W<'_>[src]

Bit 29 - LCKSB29

pub fn lcksb30(&mut self) -> LCKSB30_W<'_>[src]

Bit 30 - LCKSB30

pub fn lcksb31(&mut self) -> LCKSB31_W<'_>[src]

Bit 31 - LCKSB31

impl W<u32, Reg<u32, _MPCBB1_LCKVTR2>>[src]

pub fn lcksb32(&mut self) -> LCKSB32_W<'_>[src]

Bit 0 - LCKSB32

pub fn lcksb33(&mut self) -> LCKSB33_W<'_>[src]

Bit 1 - LCKSB33

pub fn lcksb34(&mut self) -> LCKSB34_W<'_>[src]

Bit 2 - LCKSB34

pub fn lcksb35(&mut self) -> LCKSB35_W<'_>[src]

Bit 3 - LCKSB35

pub fn lcksb36(&mut self) -> LCKSB36_W<'_>[src]

Bit 4 - LCKSB36

pub fn lcksb37(&mut self) -> LCKSB37_W<'_>[src]

Bit 5 - LCKSB37

pub fn lcksb38(&mut self) -> LCKSB38_W<'_>[src]

Bit 6 - LCKSB38

pub fn lcksb39(&mut self) -> LCKSB39_W<'_>[src]

Bit 7 - LCKSB39

pub fn lcksb40(&mut self) -> LCKSB40_W<'_>[src]

Bit 8 - LCKSB40

pub fn lcksb41(&mut self) -> LCKSB41_W<'_>[src]

Bit 9 - LCKSB41

pub fn lcksb42(&mut self) -> LCKSB42_W<'_>[src]

Bit 10 - LCKSB42

pub fn lcksb43(&mut self) -> LCKSB43_W<'_>[src]

Bit 11 - LCKSB43

pub fn lcksb44(&mut self) -> LCKSB44_W<'_>[src]

Bit 12 - LCKSB44

pub fn lcksb45(&mut self) -> LCKSB45_W<'_>[src]

Bit 13 - LCKSB45

pub fn lcksb46(&mut self) -> LCKSB46_W<'_>[src]

Bit 14 - LCKSB46

pub fn lcksb47(&mut self) -> LCKSB47_W<'_>[src]

Bit 15 - LCKSB47

pub fn lcksb48(&mut self) -> LCKSB48_W<'_>[src]

Bit 16 - LCKSB48

pub fn lcksb49(&mut self) -> LCKSB49_W<'_>[src]

Bit 17 - LCKSB49

pub fn lcksb50(&mut self) -> LCKSB50_W<'_>[src]

Bit 18 - LCKSB50

pub fn lcksb51(&mut self) -> LCKSB51_W<'_>[src]

Bit 19 - LCKSB51

pub fn lcksb52(&mut self) -> LCKSB52_W<'_>[src]

Bit 20 - LCKSB52

pub fn lcksb53(&mut self) -> LCKSB53_W<'_>[src]

Bit 21 - LCKSB53

pub fn lcksb54(&mut self) -> LCKSB54_W<'_>[src]

Bit 22 - LCKSB54

pub fn lcksb55(&mut self) -> LCKSB55_W<'_>[src]

Bit 23 - LCKSB55

pub fn lcksb56(&mut self) -> LCKSB56_W<'_>[src]

Bit 24 - LCKSB56

pub fn lcksb57(&mut self) -> LCKSB57_W<'_>[src]

Bit 25 - LCKSB57

pub fn lcksb58(&mut self) -> LCKSB58_W<'_>[src]

Bit 26 - LCKSB58

pub fn lcksb59(&mut self) -> LCKSB59_W<'_>[src]

Bit 27 - LCKSB59

pub fn lcksb60(&mut self) -> LCKSB60_W<'_>[src]

Bit 28 - LCKSB60

pub fn lcksb61(&mut self) -> LCKSB61_W<'_>[src]

Bit 29 - LCKSB61

pub fn lcksb62(&mut self) -> LCKSB62_W<'_>[src]

Bit 30 - LCKSB62

pub fn lcksb63(&mut self) -> LCKSB63_W<'_>[src]

Bit 31 - LCKSB63

impl W<u32, Reg<u32, _MPCBB1_VCTR0>>[src]

pub fn b0(&mut self) -> B0_W<'_>[src]

Bit 0 - B0

pub fn b1(&mut self) -> B1_W<'_>[src]

Bit 1 - B1

pub fn b2(&mut self) -> B2_W<'_>[src]

Bit 2 - B2

pub fn b3(&mut self) -> B3_W<'_>[src]

Bit 3 - B3

pub fn b4(&mut self) -> B4_W<'_>[src]

Bit 4 - B4

pub fn b5(&mut self) -> B5_W<'_>[src]

Bit 5 - B5

pub fn b6(&mut self) -> B6_W<'_>[src]

Bit 6 - B6

pub fn b7(&mut self) -> B7_W<'_>[src]

Bit 7 - B7

pub fn b8(&mut self) -> B8_W<'_>[src]

Bit 8 - B8

pub fn b9(&mut self) -> B9_W<'_>[src]

Bit 9 - B9

pub fn b10(&mut self) -> B10_W<'_>[src]

Bit 10 - B10

pub fn b11(&mut self) -> B11_W<'_>[src]

Bit 11 - B11

pub fn b12(&mut self) -> B12_W<'_>[src]

Bit 12 - B12

pub fn b13(&mut self) -> B13_W<'_>[src]

Bit 13 - B13

pub fn b14(&mut self) -> B14_W<'_>[src]

Bit 14 - B14

pub fn b15(&mut self) -> B15_W<'_>[src]

Bit 15 - B15

pub fn b16(&mut self) -> B16_W<'_>[src]

Bit 16 - B16

pub fn b17(&mut self) -> B17_W<'_>[src]

Bit 17 - B17

pub fn b18(&mut self) -> B18_W<'_>[src]

Bit 18 - B18

pub fn b19(&mut self) -> B19_W<'_>[src]

Bit 19 - B19

pub fn b20(&mut self) -> B20_W<'_>[src]

Bit 20 - B20

pub fn b21(&mut self) -> B21_W<'_>[src]

Bit 21 - B21

pub fn b22(&mut self) -> B22_W<'_>[src]

Bit 22 - B22

pub fn b23(&mut self) -> B23_W<'_>[src]

Bit 23 - B23

pub fn b24(&mut self) -> B24_W<'_>[src]

Bit 24 - B24

pub fn b25(&mut self) -> B25_W<'_>[src]

Bit 25 - B25

pub fn b26(&mut self) -> B26_W<'_>[src]

Bit 26 - B26

pub fn b27(&mut self) -> B27_W<'_>[src]

Bit 27 - B27

pub fn b28(&mut self) -> B28_W<'_>[src]

Bit 28 - B28

pub fn b29(&mut self) -> B29_W<'_>[src]

Bit 29 - B29

pub fn b30(&mut self) -> B30_W<'_>[src]

Bit 30 - B30

pub fn b31(&mut self) -> B31_W<'_>[src]

Bit 31 - B31

impl W<u32, Reg<u32, _MPCBB1_VCTR1>>[src]

pub fn b32(&mut self) -> B32_W<'_>[src]

Bit 0 - B32

pub fn b33(&mut self) -> B33_W<'_>[src]

Bit 1 - B33

pub fn b34(&mut self) -> B34_W<'_>[src]

Bit 2 - B34

pub fn b35(&mut self) -> B35_W<'_>[src]

Bit 3 - B35

pub fn b36(&mut self) -> B36_W<'_>[src]

Bit 4 - B36

pub fn b37(&mut self) -> B37_W<'_>[src]

Bit 5 - B37

pub fn b38(&mut self) -> B38_W<'_>[src]

Bit 6 - B38

pub fn b39(&mut self) -> B39_W<'_>[src]

Bit 7 - B39

pub fn b40(&mut self) -> B40_W<'_>[src]

Bit 8 - B40

pub fn b41(&mut self) -> B41_W<'_>[src]

Bit 9 - B41

pub fn b42(&mut self) -> B42_W<'_>[src]

Bit 10 - B42

pub fn b43(&mut self) -> B43_W<'_>[src]

Bit 11 - B43

pub fn b44(&mut self) -> B44_W<'_>[src]

Bit 12 - B44

pub fn b45(&mut self) -> B45_W<'_>[src]

Bit 13 - B45

pub fn b46(&mut self) -> B46_W<'_>[src]

Bit 14 - B46

pub fn b47(&mut self) -> B47_W<'_>[src]

Bit 15 - B47

pub fn b48(&mut self) -> B48_W<'_>[src]

Bit 16 - B48

pub fn b49(&mut self) -> B49_W<'_>[src]

Bit 17 - B49

pub fn b50(&mut self) -> B50_W<'_>[src]

Bit 18 - B50

pub fn b51(&mut self) -> B51_W<'_>[src]

Bit 19 - B51

pub fn b52(&mut self) -> B52_W<'_>[src]

Bit 20 - B52

pub fn b53(&mut self) -> B53_W<'_>[src]

Bit 21 - B53

pub fn b54(&mut self) -> B54_W<'_>[src]

Bit 22 - B54

pub fn b55(&mut self) -> B55_W<'_>[src]

Bit 23 - B55

pub fn b56(&mut self) -> B56_W<'_>[src]

Bit 24 - B56

pub fn b57(&mut self) -> B57_W<'_>[src]

Bit 25 - B57

pub fn b58(&mut self) -> B58_W<'_>[src]

Bit 26 - B58

pub fn b59(&mut self) -> B59_W<'_>[src]

Bit 27 - B59

pub fn b60(&mut self) -> B60_W<'_>[src]

Bit 28 - B60

pub fn b61(&mut self) -> B61_W<'_>[src]

Bit 29 - B61

pub fn b62(&mut self) -> B62_W<'_>[src]

Bit 30 - B62

pub fn b63(&mut self) -> B63_W<'_>[src]

Bit 31 - B63

impl W<u32, Reg<u32, _MPCBB1_VCTR2>>[src]

pub fn b64(&mut self) -> B64_W<'_>[src]

Bit 0 - B64

pub fn b65(&mut self) -> B65_W<'_>[src]

Bit 1 - B65

pub fn b66(&mut self) -> B66_W<'_>[src]

Bit 2 - B66

pub fn b67(&mut self) -> B67_W<'_>[src]

Bit 3 - B67

pub fn b68(&mut self) -> B68_W<'_>[src]

Bit 4 - B68

pub fn b69(&mut self) -> B69_W<'_>[src]

Bit 5 - B69

pub fn b70(&mut self) -> B70_W<'_>[src]

Bit 6 - B70

pub fn b71(&mut self) -> B71_W<'_>[src]

Bit 7 - B71

pub fn b72(&mut self) -> B72_W<'_>[src]

Bit 8 - B72

pub fn b73(&mut self) -> B73_W<'_>[src]

Bit 9 - B73

pub fn b74(&mut self) -> B74_W<'_>[src]

Bit 10 - B74

pub fn b75(&mut self) -> B75_W<'_>[src]

Bit 11 - B75

pub fn b76(&mut self) -> B76_W<'_>[src]

Bit 12 - B76

pub fn b77(&mut self) -> B77_W<'_>[src]

Bit 13 - B77

pub fn b78(&mut self) -> B78_W<'_>[src]

Bit 14 - B78

pub fn b79(&mut self) -> B79_W<'_>[src]

Bit 15 - B79

pub fn b80(&mut self) -> B80_W<'_>[src]

Bit 16 - B80

pub fn b81(&mut self) -> B81_W<'_>[src]

Bit 17 - B81

pub fn b82(&mut self) -> B82_W<'_>[src]

Bit 18 - B82

pub fn b83(&mut self) -> B83_W<'_>[src]

Bit 19 - B83

pub fn b84(&mut self) -> B84_W<'_>[src]

Bit 20 - B84

pub fn b85(&mut self) -> B85_W<'_>[src]

Bit 21 - B85

pub fn b86(&mut self) -> B86_W<'_>[src]

Bit 22 - B86

pub fn b87(&mut self) -> B87_W<'_>[src]

Bit 23 - B87

pub fn b88(&mut self) -> B88_W<'_>[src]

Bit 24 - B88

pub fn b89(&mut self) -> B89_W<'_>[src]

Bit 25 - B89

pub fn b90(&mut self) -> B90_W<'_>[src]

Bit 26 - B90

pub fn b91(&mut self) -> B91_W<'_>[src]

Bit 27 - B91

pub fn b92(&mut self) -> B92_W<'_>[src]

Bit 28 - B92

pub fn b93(&mut self) -> B93_W<'_>[src]

Bit 29 - B93

pub fn b94(&mut self) -> B94_W<'_>[src]

Bit 30 - B94

pub fn b95(&mut self) -> B95_W<'_>[src]

Bit 31 - B95

impl W<u32, Reg<u32, _MPCBB1_VCTR3>>[src]

pub fn b96(&mut self) -> B96_W<'_>[src]

Bit 0 - B96

pub fn b97(&mut self) -> B97_W<'_>[src]

Bit 1 - B97

pub fn b98(&mut self) -> B98_W<'_>[src]

Bit 2 - B98

pub fn b99(&mut self) -> B99_W<'_>[src]

Bit 3 - B99

pub fn b100(&mut self) -> B100_W<'_>[src]

Bit 4 - B100

pub fn b101(&mut self) -> B101_W<'_>[src]

Bit 5 - B101

pub fn b102(&mut self) -> B102_W<'_>[src]

Bit 6 - B102

pub fn b103(&mut self) -> B103_W<'_>[src]

Bit 7 - B103

pub fn b104(&mut self) -> B104_W<'_>[src]

Bit 8 - B104

pub fn b105(&mut self) -> B105_W<'_>[src]

Bit 9 - B105

pub fn b106(&mut self) -> B106_W<'_>[src]

Bit 10 - B106

pub fn b107(&mut self) -> B107_W<'_>[src]

Bit 11 - B107

pub fn b108(&mut self) -> B108_W<'_>[src]

Bit 12 - B108

pub fn b109(&mut self) -> B109_W<'_>[src]

Bit 13 - B109

pub fn b110(&mut self) -> B110_W<'_>[src]

Bit 14 - B110

pub fn b111(&mut self) -> B111_W<'_>[src]

Bit 15 - B111

pub fn b112(&mut self) -> B112_W<'_>[src]

Bit 16 - B112

pub fn b113(&mut self) -> B113_W<'_>[src]

Bit 17 - B113

pub fn b114(&mut self) -> B114_W<'_>[src]

Bit 18 - B114

pub fn b115(&mut self) -> B115_W<'_>[src]

Bit 19 - B115

pub fn b116(&mut self) -> B116_W<'_>[src]

Bit 20 - B116

pub fn b117(&mut self) -> B117_W<'_>[src]

Bit 21 - B117

pub fn b118(&mut self) -> B118_W<'_>[src]

Bit 22 - B118

pub fn b119(&mut self) -> B119_W<'_>[src]

Bit 23 - B119

pub fn b120(&mut self) -> B120_W<'_>[src]

Bit 24 - B120

pub fn b121(&mut self) -> B121_W<'_>[src]

Bit 25 - B121

pub fn b122(&mut self) -> B122_W<'_>[src]

Bit 26 - B122

pub fn b123(&mut self) -> B123_W<'_>[src]

Bit 27 - B123

pub fn b124(&mut self) -> B124_W<'_>[src]

Bit 28 - B124

pub fn b125(&mut self) -> B125_W<'_>[src]

Bit 29 - B125

pub fn b126(&mut self) -> B126_W<'_>[src]

Bit 30 - B126

pub fn b127(&mut self) -> B127_W<'_>[src]

Bit 31 - B127

impl W<u32, Reg<u32, _MPCBB1_VCTR4>>[src]

pub fn b128(&mut self) -> B128_W<'_>[src]

Bit 0 - B128

pub fn b129(&mut self) -> B129_W<'_>[src]

Bit 1 - B129

pub fn b130(&mut self) -> B130_W<'_>[src]

Bit 2 - B130

pub fn b131(&mut self) -> B131_W<'_>[src]

Bit 3 - B131

pub fn b132(&mut self) -> B132_W<'_>[src]

Bit 4 - B132

pub fn b133(&mut self) -> B133_W<'_>[src]

Bit 5 - B133

pub fn b134(&mut self) -> B134_W<'_>[src]

Bit 6 - B134

pub fn b135(&mut self) -> B135_W<'_>[src]

Bit 7 - B135

pub fn b136(&mut self) -> B136_W<'_>[src]

Bit 8 - B136

pub fn b137(&mut self) -> B137_W<'_>[src]

Bit 9 - B137

pub fn b138(&mut self) -> B138_W<'_>[src]

Bit 10 - B138

pub fn b139(&mut self) -> B139_W<'_>[src]

Bit 11 - B139

pub fn b140(&mut self) -> B140_W<'_>[src]

Bit 12 - B140

pub fn b141(&mut self) -> B141_W<'_>[src]

Bit 13 - B141

pub fn b142(&mut self) -> B142_W<'_>[src]

Bit 14 - B142

pub fn b143(&mut self) -> B143_W<'_>[src]

Bit 15 - B143

pub fn b144(&mut self) -> B144_W<'_>[src]

Bit 16 - B144

pub fn b145(&mut self) -> B145_W<'_>[src]

Bit 17 - B145

pub fn b146(&mut self) -> B146_W<'_>[src]

Bit 18 - B146

pub fn b147(&mut self) -> B147_W<'_>[src]

Bit 19 - B147

pub fn b148(&mut self) -> B148_W<'_>[src]

Bit 20 - B148

pub fn b149(&mut self) -> B149_W<'_>[src]

Bit 21 - B149

pub fn b150(&mut self) -> B150_W<'_>[src]

Bit 22 - B150

pub fn b151(&mut self) -> B151_W<'_>[src]

Bit 23 - B151

pub fn b152(&mut self) -> B152_W<'_>[src]

Bit 24 - B152

pub fn b153(&mut self) -> B153_W<'_>[src]

Bit 25 - B153

pub fn b154(&mut self) -> B154_W<'_>[src]

Bit 26 - B154

pub fn b155(&mut self) -> B155_W<'_>[src]

Bit 27 - B155

pub fn b156(&mut self) -> B156_W<'_>[src]

Bit 28 - B156

pub fn b157(&mut self) -> B157_W<'_>[src]

Bit 29 - B157

pub fn b158(&mut self) -> B158_W<'_>[src]

Bit 30 - B158

pub fn b159(&mut self) -> B159_W<'_>[src]

Bit 31 - B159

impl W<u32, Reg<u32, _MPCBB1_VCTR5>>[src]

pub fn b160(&mut self) -> B160_W<'_>[src]

Bit 0 - B160

pub fn b161(&mut self) -> B161_W<'_>[src]

Bit 1 - B161

pub fn b162(&mut self) -> B162_W<'_>[src]

Bit 2 - B162

pub fn b163(&mut self) -> B163_W<'_>[src]

Bit 3 - B163

pub fn b164(&mut self) -> B164_W<'_>[src]

Bit 4 - B164

pub fn b165(&mut self) -> B165_W<'_>[src]

Bit 5 - B165

pub fn b166(&mut self) -> B166_W<'_>[src]

Bit 6 - B166

pub fn b167(&mut self) -> B167_W<'_>[src]

Bit 7 - B167

pub fn b168(&mut self) -> B168_W<'_>[src]

Bit 8 - B168

pub fn b169(&mut self) -> B169_W<'_>[src]

Bit 9 - B169

pub fn b170(&mut self) -> B170_W<'_>[src]

Bit 10 - B170

pub fn b171(&mut self) -> B171_W<'_>[src]

Bit 11 - B171

pub fn b172(&mut self) -> B172_W<'_>[src]

Bit 12 - B172

pub fn b173(&mut self) -> B173_W<'_>[src]

Bit 13 - B173

pub fn b174(&mut self) -> B174_W<'_>[src]

Bit 14 - B174

pub fn b175(&mut self) -> B175_W<'_>[src]

Bit 15 - B175

pub fn b176(&mut self) -> B176_W<'_>[src]

Bit 16 - B176

pub fn b177(&mut self) -> B177_W<'_>[src]

Bit 17 - B177

pub fn b178(&mut self) -> B178_W<'_>[src]

Bit 18 - B178

pub fn b179(&mut self) -> B179_W<'_>[src]

Bit 19 - B179

pub fn b180(&mut self) -> B180_W<'_>[src]

Bit 20 - B180

pub fn b181(&mut self) -> B181_W<'_>[src]

Bit 21 - B181

pub fn b182(&mut self) -> B182_W<'_>[src]

Bit 22 - B182

pub fn b183(&mut self) -> B183_W<'_>[src]

Bit 23 - B183

pub fn b184(&mut self) -> B184_W<'_>[src]

Bit 24 - B184

pub fn b185(&mut self) -> B185_W<'_>[src]

Bit 25 - B185

pub fn b186(&mut self) -> B186_W<'_>[src]

Bit 26 - B186

pub fn b187(&mut self) -> B187_W<'_>[src]

Bit 27 - B187

pub fn b188(&mut self) -> B188_W<'_>[src]

Bit 28 - B188

pub fn b189(&mut self) -> B189_W<'_>[src]

Bit 29 - B189

pub fn b190(&mut self) -> B190_W<'_>[src]

Bit 30 - B190

pub fn b191(&mut self) -> B191_W<'_>[src]

Bit 31 - B191

impl W<u32, Reg<u32, _MPCBB1_VCTR6>>[src]

pub fn b192(&mut self) -> B192_W<'_>[src]

Bit 0 - B192

pub fn b193(&mut self) -> B193_W<'_>[src]

Bit 1 - B193

pub fn b194(&mut self) -> B194_W<'_>[src]

Bit 2 - B194

pub fn b195(&mut self) -> B195_W<'_>[src]

Bit 3 - B195

pub fn b196(&mut self) -> B196_W<'_>[src]

Bit 4 - B196

pub fn b197(&mut self) -> B197_W<'_>[src]

Bit 5 - B197

pub fn b198(&mut self) -> B198_W<'_>[src]

Bit 6 - B198

pub fn b199(&mut self) -> B199_W<'_>[src]

Bit 7 - B199

pub fn b200(&mut self) -> B200_W<'_>[src]

Bit 8 - B200

pub fn b201(&mut self) -> B201_W<'_>[src]

Bit 9 - B201

pub fn b202(&mut self) -> B202_W<'_>[src]

Bit 10 - B202

pub fn b203(&mut self) -> B203_W<'_>[src]

Bit 11 - B203

pub fn b204(&mut self) -> B204_W<'_>[src]

Bit 12 - B204

pub fn b205(&mut self) -> B205_W<'_>[src]

Bit 13 - B205

pub fn b206(&mut self) -> B206_W<'_>[src]

Bit 14 - B206

pub fn b207(&mut self) -> B207_W<'_>[src]

Bit 15 - B207

pub fn b208(&mut self) -> B208_W<'_>[src]

Bit 16 - B208

pub fn b209(&mut self) -> B209_W<'_>[src]

Bit 17 - B209

pub fn b210(&mut self) -> B210_W<'_>[src]

Bit 18 - B210

pub fn b211(&mut self) -> B211_W<'_>[src]

Bit 19 - B211

pub fn b212(&mut self) -> B212_W<'_>[src]

Bit 20 - B212

pub fn b213(&mut self) -> B213_W<'_>[src]

Bit 21 - B213

pub fn b214(&mut self) -> B214_W<'_>[src]

Bit 22 - B214

pub fn b215(&mut self) -> B215_W<'_>[src]

Bit 23 - B215

pub fn b216(&mut self) -> B216_W<'_>[src]

Bit 24 - B216

pub fn b217(&mut self) -> B217_W<'_>[src]

Bit 25 - B217

pub fn b218(&mut self) -> B218_W<'_>[src]

Bit 26 - B218

pub fn b219(&mut self) -> B219_W<'_>[src]

Bit 27 - B219

pub fn b220(&mut self) -> B220_W<'_>[src]

Bit 28 - B220

pub fn b221(&mut self) -> B221_W<'_>[src]

Bit 29 - B221

pub fn b222(&mut self) -> B222_W<'_>[src]

Bit 30 - B222

pub fn b223(&mut self) -> B223_W<'_>[src]

Bit 31 - B223

impl W<u32, Reg<u32, _MPCBB1_VCTR7>>[src]

pub fn b224(&mut self) -> B224_W<'_>[src]

Bit 0 - B224

pub fn b225(&mut self) -> B225_W<'_>[src]

Bit 1 - B225

pub fn b226(&mut self) -> B226_W<'_>[src]

Bit 2 - B226

pub fn b227(&mut self) -> B227_W<'_>[src]

Bit 3 - B227

pub fn b228(&mut self) -> B228_W<'_>[src]

Bit 4 - B228

pub fn b229(&mut self) -> B229_W<'_>[src]

Bit 5 - B229

pub fn b230(&mut self) -> B230_W<'_>[src]

Bit 6 - B230

pub fn b231(&mut self) -> B231_W<'_>[src]

Bit 7 - B231

pub fn b232(&mut self) -> B232_W<'_>[src]

Bit 8 - B232

pub fn b233(&mut self) -> B233_W<'_>[src]

Bit 9 - B233

pub fn b234(&mut self) -> B234_W<'_>[src]

Bit 10 - B234

pub fn b235(&mut self) -> B235_W<'_>[src]

Bit 11 - B235

pub fn b236(&mut self) -> B236_W<'_>[src]

Bit 12 - B236

pub fn b237(&mut self) -> B237_W<'_>[src]

Bit 13 - B237

pub fn b238(&mut self) -> B238_W<'_>[src]

Bit 14 - B238

pub fn b239(&mut self) -> B239_W<'_>[src]

Bit 15 - B239

pub fn b240(&mut self) -> B240_W<'_>[src]

Bit 16 - B240

pub fn b241(&mut self) -> B241_W<'_>[src]

Bit 17 - B241

pub fn b242(&mut self) -> B242_W<'_>[src]

Bit 18 - B242

pub fn b243(&mut self) -> B243_W<'_>[src]

Bit 19 - B243

pub fn b244(&mut self) -> B244_W<'_>[src]

Bit 20 - B244

pub fn b245(&mut self) -> B245_W<'_>[src]

Bit 21 - B245

pub fn b246(&mut self) -> B246_W<'_>[src]

Bit 22 - B246

pub fn b247(&mut self) -> B247_W<'_>[src]

Bit 23 - B247

pub fn b248(&mut self) -> B248_W<'_>[src]

Bit 24 - B248

pub fn b249(&mut self) -> B249_W<'_>[src]

Bit 25 - B249

pub fn b250(&mut self) -> B250_W<'_>[src]

Bit 26 - B250

pub fn b251(&mut self) -> B251_W<'_>[src]

Bit 27 - B251

pub fn b252(&mut self) -> B252_W<'_>[src]

Bit 28 - B252

pub fn b253(&mut self) -> B253_W<'_>[src]

Bit 29 - B253

pub fn b254(&mut self) -> B254_W<'_>[src]

Bit 30 - B254

pub fn b255(&mut self) -> B255_W<'_>[src]

Bit 31 - B255

impl W<u32, Reg<u32, _MPCBB1_VCTR8>>[src]

pub fn b256(&mut self) -> B256_W<'_>[src]

Bit 0 - B256

pub fn b257(&mut self) -> B257_W<'_>[src]

Bit 1 - B257

pub fn b258(&mut self) -> B258_W<'_>[src]

Bit 2 - B258

pub fn b259(&mut self) -> B259_W<'_>[src]

Bit 3 - B259

pub fn b260(&mut self) -> B260_W<'_>[src]

Bit 4 - B260

pub fn b261(&mut self) -> B261_W<'_>[src]

Bit 5 - B261

pub fn b262(&mut self) -> B262_W<'_>[src]

Bit 6 - B262

pub fn b263(&mut self) -> B263_W<'_>[src]

Bit 7 - B263

pub fn b264(&mut self) -> B264_W<'_>[src]

Bit 8 - B264

pub fn b265(&mut self) -> B265_W<'_>[src]

Bit 9 - B265

pub fn b266(&mut self) -> B266_W<'_>[src]

Bit 10 - B266

pub fn b267(&mut self) -> B267_W<'_>[src]

Bit 11 - B267

pub fn b268(&mut self) -> B268_W<'_>[src]

Bit 12 - B268

pub fn b269(&mut self) -> B269_W<'_>[src]

Bit 13 - B269

pub fn b270(&mut self) -> B270_W<'_>[src]

Bit 14 - B270

pub fn b271(&mut self) -> B271_W<'_>[src]

Bit 15 - B271

pub fn b272(&mut self) -> B272_W<'_>[src]

Bit 16 - B272

pub fn b273(&mut self) -> B273_W<'_>[src]

Bit 17 - B273

pub fn b274(&mut self) -> B274_W<'_>[src]

Bit 18 - B274

pub fn b275(&mut self) -> B275_W<'_>[src]

Bit 19 - B275

pub fn b276(&mut self) -> B276_W<'_>[src]

Bit 20 - B276

pub fn b277(&mut self) -> B277_W<'_>[src]

Bit 21 - B277

pub fn b278(&mut self) -> B278_W<'_>[src]

Bit 22 - B278

pub fn b279(&mut self) -> B279_W<'_>[src]

Bit 23 - B279

pub fn b280(&mut self) -> B280_W<'_>[src]

Bit 24 - B280

pub fn b281(&mut self) -> B281_W<'_>[src]

Bit 25 - B281

pub fn b282(&mut self) -> B282_W<'_>[src]

Bit 26 - B282

pub fn b283(&mut self) -> B283_W<'_>[src]

Bit 27 - B283

pub fn b284(&mut self) -> B284_W<'_>[src]

Bit 28 - B284

pub fn b285(&mut self) -> B285_W<'_>[src]

Bit 29 - B285

pub fn b286(&mut self) -> B286_W<'_>[src]

Bit 30 - B286

pub fn b287(&mut self) -> B287_W<'_>[src]

Bit 31 - B287

impl W<u32, Reg<u32, _MPCBB1_VCTR9>>[src]

pub fn b288(&mut self) -> B288_W<'_>[src]

Bit 0 - B288

pub fn b289(&mut self) -> B289_W<'_>[src]

Bit 1 - B289

pub fn b290(&mut self) -> B290_W<'_>[src]

Bit 2 - B290

pub fn b291(&mut self) -> B291_W<'_>[src]

Bit 3 - B291

pub fn b292(&mut self) -> B292_W<'_>[src]

Bit 4 - B292

pub fn b293(&mut self) -> B293_W<'_>[src]

Bit 5 - B293

pub fn b294(&mut self) -> B294_W<'_>[src]

Bit 6 - B294

pub fn b295(&mut self) -> B295_W<'_>[src]

Bit 7 - B295

pub fn b296(&mut self) -> B296_W<'_>[src]

Bit 8 - B296

pub fn b297(&mut self) -> B297_W<'_>[src]

Bit 9 - B297

pub fn b298(&mut self) -> B298_W<'_>[src]

Bit 10 - B298

pub fn b299(&mut self) -> B299_W<'_>[src]

Bit 11 - B299

pub fn b300(&mut self) -> B300_W<'_>[src]

Bit 12 - B300

pub fn b301(&mut self) -> B301_W<'_>[src]

Bit 13 - B301

pub fn b302(&mut self) -> B302_W<'_>[src]

Bit 14 - B302

pub fn b303(&mut self) -> B303_W<'_>[src]

Bit 15 - B303

pub fn b304(&mut self) -> B304_W<'_>[src]

Bit 16 - B304

pub fn b305(&mut self) -> B305_W<'_>[src]

Bit 17 - B305

pub fn b306(&mut self) -> B306_W<'_>[src]

Bit 18 - B306

pub fn b307(&mut self) -> B307_W<'_>[src]

Bit 19 - B307

pub fn b308(&mut self) -> B308_W<'_>[src]

Bit 20 - B308

pub fn b309(&mut self) -> B309_W<'_>[src]

Bit 21 - B309

pub fn b310(&mut self) -> B310_W<'_>[src]

Bit 22 - B310

pub fn b311(&mut self) -> B311_W<'_>[src]

Bit 23 - B311

pub fn b312(&mut self) -> B312_W<'_>[src]

Bit 24 - B312

pub fn b313(&mut self) -> B313_W<'_>[src]

Bit 25 - B313

pub fn b314(&mut self) -> B314_W<'_>[src]

Bit 26 - B314

pub fn b315(&mut self) -> B315_W<'_>[src]

Bit 27 - B315

pub fn b316(&mut self) -> B316_W<'_>[src]

Bit 28 - B316

pub fn b317(&mut self) -> B317_W<'_>[src]

Bit 29 - B317

pub fn b318(&mut self) -> B318_W<'_>[src]

Bit 30 - B318

pub fn b319(&mut self) -> B319_W<'_>[src]

Bit 31 - B319

impl W<u32, Reg<u32, _MPCBB1_VCTR10>>[src]

pub fn b320(&mut self) -> B320_W<'_>[src]

Bit 0 - B320

pub fn b321(&mut self) -> B321_W<'_>[src]

Bit 1 - B321

pub fn b322(&mut self) -> B322_W<'_>[src]

Bit 2 - B322

pub fn b323(&mut self) -> B323_W<'_>[src]

Bit 3 - B323

pub fn b324(&mut self) -> B324_W<'_>[src]

Bit 4 - B324

pub fn b325(&mut self) -> B325_W<'_>[src]

Bit 5 - B325

pub fn b326(&mut self) -> B326_W<'_>[src]

Bit 6 - B326

pub fn b327(&mut self) -> B327_W<'_>[src]

Bit 7 - B327

pub fn b328(&mut self) -> B328_W<'_>[src]

Bit 8 - B328

pub fn b329(&mut self) -> B329_W<'_>[src]

Bit 9 - B329

pub fn b330(&mut self) -> B330_W<'_>[src]

Bit 10 - B330

pub fn b331(&mut self) -> B331_W<'_>[src]

Bit 11 - B331

pub fn b332(&mut self) -> B332_W<'_>[src]

Bit 12 - B332

pub fn b333(&mut self) -> B333_W<'_>[src]

Bit 13 - B333

pub fn b334(&mut self) -> B334_W<'_>[src]

Bit 14 - B334

pub fn b335(&mut self) -> B335_W<'_>[src]

Bit 15 - B335

pub fn b336(&mut self) -> B336_W<'_>[src]

Bit 16 - B336

pub fn b337(&mut self) -> B337_W<'_>[src]

Bit 17 - B337

pub fn b338(&mut self) -> B338_W<'_>[src]

Bit 18 - B338

pub fn b339(&mut self) -> B339_W<'_>[src]

Bit 19 - B339

pub fn b340(&mut self) -> B340_W<'_>[src]

Bit 20 - B340

pub fn b341(&mut self) -> B341_W<'_>[src]

Bit 21 - B341

pub fn b342(&mut self) -> B342_W<'_>[src]

Bit 22 - B342

pub fn b343(&mut self) -> B343_W<'_>[src]

Bit 23 - B343

pub fn b344(&mut self) -> B344_W<'_>[src]

Bit 24 - B344

pub fn b345(&mut self) -> B345_W<'_>[src]

Bit 25 - B345

pub fn b346(&mut self) -> B346_W<'_>[src]

Bit 26 - B346

pub fn b347(&mut self) -> B347_W<'_>[src]

Bit 27 - B347

pub fn b348(&mut self) -> B348_W<'_>[src]

Bit 28 - B348

pub fn b349(&mut self) -> B349_W<'_>[src]

Bit 29 - B349

pub fn b350(&mut self) -> B350_W<'_>[src]

Bit 30 - B350

pub fn b351(&mut self) -> B351_W<'_>[src]

Bit 31 - B351

impl W<u32, Reg<u32, _MPCBB1_VCTR11>>[src]

pub fn b352(&mut self) -> B352_W<'_>[src]

Bit 0 - B352

pub fn b353(&mut self) -> B353_W<'_>[src]

Bit 1 - B353

pub fn b354(&mut self) -> B354_W<'_>[src]

Bit 2 - B354

pub fn b355(&mut self) -> B355_W<'_>[src]

Bit 3 - B355

pub fn b356(&mut self) -> B356_W<'_>[src]

Bit 4 - B356

pub fn b357(&mut self) -> B357_W<'_>[src]

Bit 5 - B357

pub fn b358(&mut self) -> B358_W<'_>[src]

Bit 6 - B358

pub fn b359(&mut self) -> B359_W<'_>[src]

Bit 7 - B359

pub fn b360(&mut self) -> B360_W<'_>[src]

Bit 8 - B360

pub fn b361(&mut self) -> B361_W<'_>[src]

Bit 9 - B361

pub fn b362(&mut self) -> B362_W<'_>[src]

Bit 10 - B362

pub fn b363(&mut self) -> B363_W<'_>[src]

Bit 11 - B363

pub fn b364(&mut self) -> B364_W<'_>[src]

Bit 12 - B364

pub fn b365(&mut self) -> B365_W<'_>[src]

Bit 13 - B365

pub fn b366(&mut self) -> B366_W<'_>[src]

Bit 14 - B366

pub fn b367(&mut self) -> B367_W<'_>[src]

Bit 15 - B367

pub fn b368(&mut self) -> B368_W<'_>[src]

Bit 16 - B368

pub fn b369(&mut self) -> B369_W<'_>[src]

Bit 17 - B369

pub fn b370(&mut self) -> B370_W<'_>[src]

Bit 18 - B370

pub fn b371(&mut self) -> B371_W<'_>[src]

Bit 19 - B371

pub fn b372(&mut self) -> B372_W<'_>[src]

Bit 20 - B372

pub fn b373(&mut self) -> B373_W<'_>[src]

Bit 21 - B373

pub fn b374(&mut self) -> B374_W<'_>[src]

Bit 22 - B374

pub fn b375(&mut self) -> B375_W<'_>[src]

Bit 23 - B375

pub fn b376(&mut self) -> B376_W<'_>[src]

Bit 24 - B376

pub fn b377(&mut self) -> B377_W<'_>[src]

Bit 25 - B377

pub fn b378(&mut self) -> B378_W<'_>[src]

Bit 26 - B378

pub fn b379(&mut self) -> B379_W<'_>[src]

Bit 27 - B379

pub fn b380(&mut self) -> B380_W<'_>[src]

Bit 28 - B380

pub fn b381(&mut self) -> B381_W<'_>[src]

Bit 29 - B381

pub fn b382(&mut self) -> B382_W<'_>[src]

Bit 30 - B382

pub fn b383(&mut self) -> B383_W<'_>[src]

Bit 31 - B383

impl W<u32, Reg<u32, _MPCBB1_VCTR12>>[src]

pub fn b384(&mut self) -> B384_W<'_>[src]

Bit 0 - B384

pub fn b385(&mut self) -> B385_W<'_>[src]

Bit 1 - B385

pub fn b386(&mut self) -> B386_W<'_>[src]

Bit 2 - B386

pub fn b387(&mut self) -> B387_W<'_>[src]

Bit 3 - B387

pub fn b388(&mut self) -> B388_W<'_>[src]

Bit 4 - B388

pub fn b389(&mut self) -> B389_W<'_>[src]

Bit 5 - B389

pub fn b390(&mut self) -> B390_W<'_>[src]

Bit 6 - B390

pub fn b391(&mut self) -> B391_W<'_>[src]

Bit 7 - B391

pub fn b392(&mut self) -> B392_W<'_>[src]

Bit 8 - B392

pub fn b393(&mut self) -> B393_W<'_>[src]

Bit 9 - B393

pub fn b394(&mut self) -> B394_W<'_>[src]

Bit 10 - B394

pub fn b395(&mut self) -> B395_W<'_>[src]

Bit 11 - B395

pub fn b396(&mut self) -> B396_W<'_>[src]

Bit 12 - B396

pub fn b397(&mut self) -> B397_W<'_>[src]

Bit 13 - B397

pub fn b398(&mut self) -> B398_W<'_>[src]

Bit 14 - B398

pub fn b399(&mut self) -> B399_W<'_>[src]

Bit 15 - B399

pub fn b400(&mut self) -> B400_W<'_>[src]

Bit 16 - B400

pub fn b401(&mut self) -> B401_W<'_>[src]

Bit 17 - B401

pub fn b402(&mut self) -> B402_W<'_>[src]

Bit 18 - B402

pub fn b403(&mut self) -> B403_W<'_>[src]

Bit 19 - B403

pub fn b404(&mut self) -> B404_W<'_>[src]

Bit 20 - B404

pub fn b405(&mut self) -> B405_W<'_>[src]

Bit 21 - B405

pub fn b406(&mut self) -> B406_W<'_>[src]

Bit 22 - B406

pub fn b407(&mut self) -> B407_W<'_>[src]

Bit 23 - B407

pub fn b408(&mut self) -> B408_W<'_>[src]

Bit 24 - B408

pub fn b409(&mut self) -> B409_W<'_>[src]

Bit 25 - B409

pub fn b410(&mut self) -> B410_W<'_>[src]

Bit 26 - B410

pub fn b411(&mut self) -> B411_W<'_>[src]

Bit 27 - B411

pub fn b412(&mut self) -> B412_W<'_>[src]

Bit 28 - B412

pub fn b413(&mut self) -> B413_W<'_>[src]

Bit 29 - B413

pub fn b414(&mut self) -> B414_W<'_>[src]

Bit 30 - B414

pub fn b415(&mut self) -> B415_W<'_>[src]

Bit 31 - B415

impl W<u32, Reg<u32, _MPCBB1_VCTR13>>[src]

pub fn b416(&mut self) -> B416_W<'_>[src]

Bit 0 - B416

pub fn b417(&mut self) -> B417_W<'_>[src]

Bit 1 - B417

pub fn b418(&mut self) -> B418_W<'_>[src]

Bit 2 - B418

pub fn b419(&mut self) -> B419_W<'_>[src]

Bit 3 - B419

pub fn b420(&mut self) -> B420_W<'_>[src]

Bit 4 - B420

pub fn b421(&mut self) -> B421_W<'_>[src]

Bit 5 - B421

pub fn b422(&mut self) -> B422_W<'_>[src]

Bit 6 - B422

pub fn b423(&mut self) -> B423_W<'_>[src]

Bit 7 - B423

pub fn b424(&mut self) -> B424_W<'_>[src]

Bit 8 - B424

pub fn b425(&mut self) -> B425_W<'_>[src]

Bit 9 - B425

pub fn b426(&mut self) -> B426_W<'_>[src]

Bit 10 - B426

pub fn b427(&mut self) -> B427_W<'_>[src]

Bit 11 - B427

pub fn b428(&mut self) -> B428_W<'_>[src]

Bit 12 - B428

pub fn b429(&mut self) -> B429_W<'_>[src]

Bit 13 - B429

pub fn b430(&mut self) -> B430_W<'_>[src]

Bit 14 - B430

pub fn b431(&mut self) -> B431_W<'_>[src]

Bit 15 - B431

pub fn b432(&mut self) -> B432_W<'_>[src]

Bit 16 - B432

pub fn b433(&mut self) -> B433_W<'_>[src]

Bit 17 - B433

pub fn b434(&mut self) -> B434_W<'_>[src]

Bit 18 - B434

pub fn b435(&mut self) -> B435_W<'_>[src]

Bit 19 - B435

pub fn b436(&mut self) -> B436_W<'_>[src]

Bit 20 - B436

pub fn b437(&mut self) -> B437_W<'_>[src]

Bit 21 - B437

pub fn b438(&mut self) -> B438_W<'_>[src]

Bit 22 - B438

pub fn b439(&mut self) -> B439_W<'_>[src]

Bit 23 - B439

pub fn b440(&mut self) -> B440_W<'_>[src]

Bit 24 - B440

pub fn b441(&mut self) -> B441_W<'_>[src]

Bit 25 - B441

pub fn b442(&mut self) -> B442_W<'_>[src]

Bit 26 - B442

pub fn b443(&mut self) -> B443_W<'_>[src]

Bit 27 - B443

pub fn b444(&mut self) -> B444_W<'_>[src]

Bit 28 - B444

pub fn b445(&mut self) -> B445_W<'_>[src]

Bit 29 - B445

pub fn b446(&mut self) -> B446_W<'_>[src]

Bit 30 - B446

pub fn b447(&mut self) -> B447_W<'_>[src]

Bit 31 - B447

impl W<u32, Reg<u32, _MPCBB1_VCTR14>>[src]

pub fn b448(&mut self) -> B448_W<'_>[src]

Bit 0 - B448

pub fn b449(&mut self) -> B449_W<'_>[src]

Bit 1 - B449

pub fn b450(&mut self) -> B450_W<'_>[src]

Bit 2 - B450

pub fn b451(&mut self) -> B451_W<'_>[src]

Bit 3 - B451

pub fn b452(&mut self) -> B452_W<'_>[src]

Bit 4 - B452

pub fn b453(&mut self) -> B453_W<'_>[src]

Bit 5 - B453

pub fn b454(&mut self) -> B454_W<'_>[src]

Bit 6 - B454

pub fn b455(&mut self) -> B455_W<'_>[src]

Bit 7 - B455

pub fn b456(&mut self) -> B456_W<'_>[src]

Bit 8 - B456

pub fn b457(&mut self) -> B457_W<'_>[src]

Bit 9 - B457

pub fn b458(&mut self) -> B458_W<'_>[src]

Bit 10 - B458

pub fn b459(&mut self) -> B459_W<'_>[src]

Bit 11 - B459

pub fn b460(&mut self) -> B460_W<'_>[src]

Bit 12 - B460

pub fn b461(&mut self) -> B461_W<'_>[src]

Bit 13 - B461

pub fn b462(&mut self) -> B462_W<'_>[src]

Bit 14 - B462

pub fn b463(&mut self) -> B463_W<'_>[src]

Bit 15 - B463

pub fn b464(&mut self) -> B464_W<'_>[src]

Bit 16 - B464

pub fn b465(&mut self) -> B465_W<'_>[src]

Bit 17 - B465

pub fn b466(&mut self) -> B466_W<'_>[src]

Bit 18 - B466

pub fn b467(&mut self) -> B467_W<'_>[src]

Bit 19 - B467

pub fn b468(&mut self) -> B468_W<'_>[src]

Bit 20 - B468

pub fn b469(&mut self) -> B469_W<'_>[src]

Bit 21 - B469

pub fn b470(&mut self) -> B470_W<'_>[src]

Bit 22 - B470

pub fn b471(&mut self) -> B471_W<'_>[src]

Bit 23 - B471

pub fn b472(&mut self) -> B472_W<'_>[src]

Bit 24 - B472

pub fn b473(&mut self) -> B473_W<'_>[src]

Bit 25 - B473

pub fn b474(&mut self) -> B474_W<'_>[src]

Bit 26 - B474

pub fn b475(&mut self) -> B475_W<'_>[src]

Bit 27 - B475

pub fn b476(&mut self) -> B476_W<'_>[src]

Bit 28 - B476

pub fn b477(&mut self) -> B477_W<'_>[src]

Bit 29 - B477

pub fn b478(&mut self) -> B478_W<'_>[src]

Bit 30 - B478

pub fn b479(&mut self) -> B479_W<'_>[src]

Bit 31 - B479

impl W<u32, Reg<u32, _MPCBB1_VCTR15>>[src]

pub fn b480(&mut self) -> B480_W<'_>[src]

Bit 0 - B480

pub fn b481(&mut self) -> B481_W<'_>[src]

Bit 1 - B481

pub fn b482(&mut self) -> B482_W<'_>[src]

Bit 2 - B482

pub fn b483(&mut self) -> B483_W<'_>[src]

Bit 3 - B483

pub fn b484(&mut self) -> B484_W<'_>[src]

Bit 4 - B484

pub fn b485(&mut self) -> B485_W<'_>[src]

Bit 5 - B485

pub fn b486(&mut self) -> B486_W<'_>[src]

Bit 6 - B486

pub fn b487(&mut self) -> B487_W<'_>[src]

Bit 7 - B487

pub fn b488(&mut self) -> B488_W<'_>[src]

Bit 8 - B488

pub fn b489(&mut self) -> B489_W<'_>[src]

Bit 9 - B489

pub fn b490(&mut self) -> B490_W<'_>[src]

Bit 10 - B490

pub fn b491(&mut self) -> B491_W<'_>[src]

Bit 11 - B491

pub fn b492(&mut self) -> B492_W<'_>[src]

Bit 12 - B492

pub fn b493(&mut self) -> B493_W<'_>[src]

Bit 13 - B493

pub fn b494(&mut self) -> B494_W<'_>[src]

Bit 14 - B494

pub fn b495(&mut self) -> B495_W<'_>[src]

Bit 15 - B495

pub fn b496(&mut self) -> B496_W<'_>[src]

Bit 16 - B496

pub fn b497(&mut self) -> B497_W<'_>[src]

Bit 17 - B497

pub fn b498(&mut self) -> B498_W<'_>[src]

Bit 18 - B498

pub fn b499(&mut self) -> B499_W<'_>[src]

Bit 19 - B499

pub fn b500(&mut self) -> B500_W<'_>[src]

Bit 20 - B500

pub fn b501(&mut self) -> B501_W<'_>[src]

Bit 21 - B501

pub fn b502(&mut self) -> B502_W<'_>[src]

Bit 22 - B502

pub fn b503(&mut self) -> B503_W<'_>[src]

Bit 23 - B503

pub fn b504(&mut self) -> B504_W<'_>[src]

Bit 24 - B504

pub fn b505(&mut self) -> B505_W<'_>[src]

Bit 25 - B505

pub fn b506(&mut self) -> B506_W<'_>[src]

Bit 26 - B506

pub fn b507(&mut self) -> B507_W<'_>[src]

Bit 27 - B507

pub fn b508(&mut self) -> B508_W<'_>[src]

Bit 28 - B508

pub fn b509(&mut self) -> B509_W<'_>[src]

Bit 29 - B509

pub fn b510(&mut self) -> B510_W<'_>[src]

Bit 30 - B510

pub fn b511(&mut self) -> B511_W<'_>[src]

Bit 31 - B511

impl W<u32, Reg<u32, _MPCBB1_VCTR16>>[src]

pub fn b512(&mut self) -> B512_W<'_>[src]

Bit 0 - B512

pub fn b513(&mut self) -> B513_W<'_>[src]

Bit 1 - B513

pub fn b514(&mut self) -> B514_W<'_>[src]

Bit 2 - B514

pub fn b515(&mut self) -> B515_W<'_>[src]

Bit 3 - B515

pub fn b516(&mut self) -> B516_W<'_>[src]

Bit 4 - B516

pub fn b517(&mut self) -> B517_W<'_>[src]

Bit 5 - B517

pub fn b518(&mut self) -> B518_W<'_>[src]

Bit 6 - B518

pub fn b519(&mut self) -> B519_W<'_>[src]

Bit 7 - B519

pub fn b520(&mut self) -> B520_W<'_>[src]

Bit 8 - B520

pub fn b521(&mut self) -> B521_W<'_>[src]

Bit 9 - B521

pub fn b522(&mut self) -> B522_W<'_>[src]

Bit 10 - B522

pub fn b523(&mut self) -> B523_W<'_>[src]

Bit 11 - B523

pub fn b524(&mut self) -> B524_W<'_>[src]

Bit 12 - B524

pub fn b525(&mut self) -> B525_W<'_>[src]

Bit 13 - B525

pub fn b526(&mut self) -> B526_W<'_>[src]

Bit 14 - B526

pub fn b527(&mut self) -> B527_W<'_>[src]

Bit 15 - B527

pub fn b528(&mut self) -> B528_W<'_>[src]

Bit 16 - B528

pub fn b529(&mut self) -> B529_W<'_>[src]

Bit 17 - B529

pub fn b530(&mut self) -> B530_W<'_>[src]

Bit 18 - B530

pub fn b531(&mut self) -> B531_W<'_>[src]

Bit 19 - B531

pub fn b532(&mut self) -> B532_W<'_>[src]

Bit 20 - B532

pub fn b533(&mut self) -> B533_W<'_>[src]

Bit 21 - B533

pub fn b534(&mut self) -> B534_W<'_>[src]

Bit 22 - B534

pub fn b535(&mut self) -> B535_W<'_>[src]

Bit 23 - B535

pub fn b536(&mut self) -> B536_W<'_>[src]

Bit 24 - B536

pub fn b537(&mut self) -> B537_W<'_>[src]

Bit 25 - B537

pub fn b538(&mut self) -> B538_W<'_>[src]

Bit 26 - B538

pub fn b539(&mut self) -> B539_W<'_>[src]

Bit 27 - B539

pub fn b540(&mut self) -> B540_W<'_>[src]

Bit 28 - B540

pub fn b541(&mut self) -> B541_W<'_>[src]

Bit 29 - B541

pub fn b542(&mut self) -> B542_W<'_>[src]

Bit 30 - B542

pub fn b543(&mut self) -> B543_W<'_>[src]

Bit 31 - B543

impl W<u32, Reg<u32, _MPCBB1_VCTR17>>[src]

pub fn b544(&mut self) -> B544_W<'_>[src]

Bit 0 - B544

pub fn b545(&mut self) -> B545_W<'_>[src]

Bit 1 - B545

pub fn b546(&mut self) -> B546_W<'_>[src]

Bit 2 - B546

pub fn b547(&mut self) -> B547_W<'_>[src]

Bit 3 - B547

pub fn b548(&mut self) -> B548_W<'_>[src]

Bit 4 - B548

pub fn b549(&mut self) -> B549_W<'_>[src]

Bit 5 - B549

pub fn b550(&mut self) -> B550_W<'_>[src]

Bit 6 - B550

pub fn b551(&mut self) -> B551_W<'_>[src]

Bit 7 - B551

pub fn b552(&mut self) -> B552_W<'_>[src]

Bit 8 - B552

pub fn b553(&mut self) -> B553_W<'_>[src]

Bit 9 - B553

pub fn b554(&mut self) -> B554_W<'_>[src]

Bit 10 - B554

pub fn b555(&mut self) -> B555_W<'_>[src]

Bit 11 - B555

pub fn b556(&mut self) -> B556_W<'_>[src]

Bit 12 - B556

pub fn b557(&mut self) -> B557_W<'_>[src]

Bit 13 - B557

pub fn b558(&mut self) -> B558_W<'_>[src]

Bit 14 - B558

pub fn b559(&mut self) -> B559_W<'_>[src]

Bit 15 - B559

pub fn b560(&mut self) -> B560_W<'_>[src]

Bit 16 - B560

pub fn b561(&mut self) -> B561_W<'_>[src]

Bit 17 - B561

pub fn b562(&mut self) -> B562_W<'_>[src]

Bit 18 - B562

pub fn b563(&mut self) -> B563_W<'_>[src]

Bit 19 - B563

pub fn b564(&mut self) -> B564_W<'_>[src]

Bit 20 - B564

pub fn b565(&mut self) -> B565_W<'_>[src]

Bit 21 - B565

pub fn b566(&mut self) -> B566_W<'_>[src]

Bit 22 - B566

pub fn b567(&mut self) -> B567_W<'_>[src]

Bit 23 - B567

pub fn b568(&mut self) -> B568_W<'_>[src]

Bit 24 - B568

pub fn b569(&mut self) -> B569_W<'_>[src]

Bit 25 - B569

pub fn b570(&mut self) -> B570_W<'_>[src]

Bit 26 - B570

pub fn b571(&mut self) -> B571_W<'_>[src]

Bit 27 - B571

pub fn b572(&mut self) -> B572_W<'_>[src]

Bit 28 - B572

pub fn b573(&mut self) -> B573_W<'_>[src]

Bit 29 - B573

pub fn b574(&mut self) -> B574_W<'_>[src]

Bit 30 - B574

pub fn b575(&mut self) -> B575_W<'_>[src]

Bit 31 - B575

impl W<u32, Reg<u32, _MPCBB1_VCTR18>>[src]

pub fn b576(&mut self) -> B576_W<'_>[src]

Bit 0 - B576

pub fn b577(&mut self) -> B577_W<'_>[src]

Bit 1 - B577

pub fn b578(&mut self) -> B578_W<'_>[src]

Bit 2 - B578

pub fn b579(&mut self) -> B579_W<'_>[src]

Bit 3 - B579

pub fn b580(&mut self) -> B580_W<'_>[src]

Bit 4 - B580

pub fn b581(&mut self) -> B581_W<'_>[src]

Bit 5 - B581

pub fn b582(&mut self) -> B582_W<'_>[src]

Bit 6 - B582

pub fn b583(&mut self) -> B583_W<'_>[src]

Bit 7 - B583

pub fn b584(&mut self) -> B584_W<'_>[src]

Bit 8 - B584

pub fn b585(&mut self) -> B585_W<'_>[src]

Bit 9 - B585

pub fn b586(&mut self) -> B586_W<'_>[src]

Bit 10 - B586

pub fn b587(&mut self) -> B587_W<'_>[src]

Bit 11 - B587

pub fn b588(&mut self) -> B588_W<'_>[src]

Bit 12 - B588

pub fn b589(&mut self) -> B589_W<'_>[src]

Bit 13 - B589

pub fn b590(&mut self) -> B590_W<'_>[src]

Bit 14 - B590

pub fn b591(&mut self) -> B591_W<'_>[src]

Bit 15 - B591

pub fn b592(&mut self) -> B592_W<'_>[src]

Bit 16 - B592

pub fn b593(&mut self) -> B593_W<'_>[src]

Bit 17 - B593

pub fn b594(&mut self) -> B594_W<'_>[src]

Bit 18 - B594

pub fn b595(&mut self) -> B595_W<'_>[src]

Bit 19 - B595

pub fn b596(&mut self) -> B596_W<'_>[src]

Bit 20 - B596

pub fn b597(&mut self) -> B597_W<'_>[src]

Bit 21 - B597

pub fn b598(&mut self) -> B598_W<'_>[src]

Bit 22 - B598

pub fn b599(&mut self) -> B599_W<'_>[src]

Bit 23 - B599

pub fn b600(&mut self) -> B600_W<'_>[src]

Bit 24 - B600

pub fn b601(&mut self) -> B601_W<'_>[src]

Bit 25 - B601

pub fn b602(&mut self) -> B602_W<'_>[src]

Bit 26 - B602

pub fn b603(&mut self) -> B603_W<'_>[src]

Bit 27 - B603

pub fn b604(&mut self) -> B604_W<'_>[src]

Bit 28 - B604

pub fn b605(&mut self) -> B605_W<'_>[src]

Bit 29 - B605

pub fn b606(&mut self) -> B606_W<'_>[src]

Bit 30 - B606

pub fn b607(&mut self) -> B607_W<'_>[src]

Bit 31 - B607

impl W<u32, Reg<u32, _MPCBB1_VCTR19>>[src]

pub fn b608(&mut self) -> B608_W<'_>[src]

Bit 0 - B608

pub fn b609(&mut self) -> B609_W<'_>[src]

Bit 1 - B609

pub fn b610(&mut self) -> B610_W<'_>[src]

Bit 2 - B610

pub fn b611(&mut self) -> B611_W<'_>[src]

Bit 3 - B611

pub fn b612(&mut self) -> B612_W<'_>[src]

Bit 4 - B612

pub fn b613(&mut self) -> B613_W<'_>[src]

Bit 5 - B613

pub fn b614(&mut self) -> B614_W<'_>[src]

Bit 6 - B614

pub fn b615(&mut self) -> B615_W<'_>[src]

Bit 7 - B615

pub fn b616(&mut self) -> B616_W<'_>[src]

Bit 8 - B616

pub fn b617(&mut self) -> B617_W<'_>[src]

Bit 9 - B617

pub fn b618(&mut self) -> B618_W<'_>[src]

Bit 10 - B618

pub fn b619(&mut self) -> B619_W<'_>[src]

Bit 11 - B619

pub fn b620(&mut self) -> B620_W<'_>[src]

Bit 12 - B620

pub fn b621(&mut self) -> B621_W<'_>[src]

Bit 13 - B621

pub fn b622(&mut self) -> B622_W<'_>[src]

Bit 14 - B622

pub fn b623(&mut self) -> B623_W<'_>[src]

Bit 15 - B623

pub fn b624(&mut self) -> B624_W<'_>[src]

Bit 16 - B624

pub fn b625(&mut self) -> B625_W<'_>[src]

Bit 17 - B625

pub fn b626(&mut self) -> B626_W<'_>[src]

Bit 18 - B626

pub fn b627(&mut self) -> B627_W<'_>[src]

Bit 19 - B627

pub fn b628(&mut self) -> B628_W<'_>[src]

Bit 20 - B628

pub fn b629(&mut self) -> B629_W<'_>[src]

Bit 21 - B629

pub fn b630(&mut self) -> B630_W<'_>[src]

Bit 22 - B630

pub fn b631(&mut self) -> B631_W<'_>[src]

Bit 23 - B631

pub fn b632(&mut self) -> B632_W<'_>[src]

Bit 24 - B632

pub fn b633(&mut self) -> B633_W<'_>[src]

Bit 25 - B633

pub fn b634(&mut self) -> B634_W<'_>[src]

Bit 26 - B634

pub fn b635(&mut self) -> B635_W<'_>[src]

Bit 27 - B635

pub fn b636(&mut self) -> B636_W<'_>[src]

Bit 28 - B636

pub fn b637(&mut self) -> B637_W<'_>[src]

Bit 29 - B637

pub fn b638(&mut self) -> B638_W<'_>[src]

Bit 30 - B638

pub fn b639(&mut self) -> B639_W<'_>[src]

Bit 31 - B639

impl W<u32, Reg<u32, _MPCBB1_VCTR20>>[src]

pub fn b640(&mut self) -> B640_W<'_>[src]

Bit 0 - B640

pub fn b641(&mut self) -> B641_W<'_>[src]

Bit 1 - B641

pub fn b642(&mut self) -> B642_W<'_>[src]

Bit 2 - B642

pub fn b643(&mut self) -> B643_W<'_>[src]

Bit 3 - B643

pub fn b644(&mut self) -> B644_W<'_>[src]

Bit 4 - B644

pub fn b645(&mut self) -> B645_W<'_>[src]

Bit 5 - B645

pub fn b646(&mut self) -> B646_W<'_>[src]

Bit 6 - B646

pub fn b647(&mut self) -> B647_W<'_>[src]

Bit 7 - B647

pub fn b648(&mut self) -> B648_W<'_>[src]

Bit 8 - B648

pub fn b649(&mut self) -> B649_W<'_>[src]

Bit 9 - B649

pub fn b650(&mut self) -> B650_W<'_>[src]

Bit 10 - B650

pub fn b651(&mut self) -> B651_W<'_>[src]

Bit 11 - B651

pub fn b652(&mut self) -> B652_W<'_>[src]

Bit 12 - B652

pub fn b653(&mut self) -> B653_W<'_>[src]

Bit 13 - B653

pub fn b654(&mut self) -> B654_W<'_>[src]

Bit 14 - B654

pub fn b655(&mut self) -> B655_W<'_>[src]

Bit 15 - B655

pub fn b656(&mut self) -> B656_W<'_>[src]

Bit 16 - B656

pub fn b657(&mut self) -> B657_W<'_>[src]

Bit 17 - B657

pub fn b658(&mut self) -> B658_W<'_>[src]

Bit 18 - B658

pub fn b659(&mut self) -> B659_W<'_>[src]

Bit 19 - B659

pub fn b660(&mut self) -> B660_W<'_>[src]

Bit 20 - B660

pub fn b661(&mut self) -> B661_W<'_>[src]

Bit 21 - B661

pub fn b662(&mut self) -> B662_W<'_>[src]

Bit 22 - B662

pub fn b663(&mut self) -> B663_W<'_>[src]

Bit 23 - B663

pub fn b664(&mut self) -> B664_W<'_>[src]

Bit 24 - B664

pub fn b665(&mut self) -> B665_W<'_>[src]

Bit 25 - B665

pub fn b666(&mut self) -> B666_W<'_>[src]

Bit 26 - B666

pub fn b667(&mut self) -> B667_W<'_>[src]

Bit 27 - B667

pub fn b668(&mut self) -> B668_W<'_>[src]

Bit 28 - B668

pub fn b669(&mut self) -> B669_W<'_>[src]

Bit 29 - B669

pub fn b670(&mut self) -> B670_W<'_>[src]

Bit 30 - B670

pub fn b671(&mut self) -> B671_W<'_>[src]

Bit 31 - B671

impl W<u32, Reg<u32, _MPCBB1_VCTR21>>[src]

pub fn b672(&mut self) -> B672_W<'_>[src]

Bit 0 - B672

pub fn b673(&mut self) -> B673_W<'_>[src]

Bit 1 - B673

pub fn b674(&mut self) -> B674_W<'_>[src]

Bit 2 - B674

pub fn b675(&mut self) -> B675_W<'_>[src]

Bit 3 - B675

pub fn b676(&mut self) -> B676_W<'_>[src]

Bit 4 - B676

pub fn b677(&mut self) -> B677_W<'_>[src]

Bit 5 - B677

pub fn b678(&mut self) -> B678_W<'_>[src]

Bit 6 - B678

pub fn b679(&mut self) -> B679_W<'_>[src]

Bit 7 - B679

pub fn b680(&mut self) -> B680_W<'_>[src]

Bit 8 - B680

pub fn b681(&mut self) -> B681_W<'_>[src]

Bit 9 - B681

pub fn b682(&mut self) -> B682_W<'_>[src]

Bit 10 - B682

pub fn b683(&mut self) -> B683_W<'_>[src]

Bit 11 - B683

pub fn b684(&mut self) -> B684_W<'_>[src]

Bit 12 - B684

pub fn b685(&mut self) -> B685_W<'_>[src]

Bit 13 - B685

pub fn b686(&mut self) -> B686_W<'_>[src]

Bit 14 - B686

pub fn b687(&mut self) -> B687_W<'_>[src]

Bit 15 - B687

pub fn b688(&mut self) -> B688_W<'_>[src]

Bit 16 - B688

pub fn b689(&mut self) -> B689_W<'_>[src]

Bit 17 - B689

pub fn b690(&mut self) -> B690_W<'_>[src]

Bit 18 - B690

pub fn b691(&mut self) -> B691_W<'_>[src]

Bit 19 - B691

pub fn b692(&mut self) -> B692_W<'_>[src]

Bit 20 - B692

pub fn b693(&mut self) -> B693_W<'_>[src]

Bit 21 - B693

pub fn b694(&mut self) -> B694_W<'_>[src]

Bit 22 - B694

pub fn b695(&mut self) -> B695_W<'_>[src]

Bit 23 - B695

pub fn b696(&mut self) -> B696_W<'_>[src]

Bit 24 - B696

pub fn b697(&mut self) -> B697_W<'_>[src]

Bit 25 - B697

pub fn b698(&mut self) -> B698_W<'_>[src]

Bit 26 - B698

pub fn b699(&mut self) -> B699_W<'_>[src]

Bit 27 - B699

pub fn b700(&mut self) -> B700_W<'_>[src]

Bit 28 - B700

pub fn b701(&mut self) -> B701_W<'_>[src]

Bit 29 - B701

pub fn b702(&mut self) -> B702_W<'_>[src]

Bit 30 - B702

pub fn b703(&mut self) -> B703_W<'_>[src]

Bit 31 - B703

impl W<u32, Reg<u32, _MPCBB1_VCTR22>>[src]

pub fn b704(&mut self) -> B704_W<'_>[src]

Bit 0 - B704

pub fn b705(&mut self) -> B705_W<'_>[src]

Bit 1 - B705

pub fn b706(&mut self) -> B706_W<'_>[src]

Bit 2 - B706

pub fn b707(&mut self) -> B707_W<'_>[src]

Bit 3 - B707

pub fn b708(&mut self) -> B708_W<'_>[src]

Bit 4 - B708

pub fn b709(&mut self) -> B709_W<'_>[src]

Bit 5 - B709

pub fn b710(&mut self) -> B710_W<'_>[src]

Bit 6 - B710

pub fn b711(&mut self) -> B711_W<'_>[src]

Bit 7 - B711

pub fn b712(&mut self) -> B712_W<'_>[src]

Bit 8 - B712

pub fn b713(&mut self) -> B713_W<'_>[src]

Bit 9 - B713

pub fn b714(&mut self) -> B714_W<'_>[src]

Bit 10 - B714

pub fn b715(&mut self) -> B715_W<'_>[src]

Bit 11 - B715

pub fn b716(&mut self) -> B716_W<'_>[src]

Bit 12 - B716

pub fn b717(&mut self) -> B717_W<'_>[src]

Bit 13 - B717

pub fn b718(&mut self) -> B718_W<'_>[src]

Bit 14 - B718

pub fn b719(&mut self) -> B719_W<'_>[src]

Bit 15 - B719

pub fn b720(&mut self) -> B720_W<'_>[src]

Bit 16 - B720

pub fn b721(&mut self) -> B721_W<'_>[src]

Bit 17 - B721

pub fn b722(&mut self) -> B722_W<'_>[src]

Bit 18 - B722

pub fn b723(&mut self) -> B723_W<'_>[src]

Bit 19 - B723

pub fn b724(&mut self) -> B724_W<'_>[src]

Bit 20 - B724

pub fn b725(&mut self) -> B725_W<'_>[src]

Bit 21 - B725

pub fn b726(&mut self) -> B726_W<'_>[src]

Bit 22 - B726

pub fn b727(&mut self) -> B727_W<'_>[src]

Bit 23 - B727

pub fn b728(&mut self) -> B728_W<'_>[src]

Bit 24 - B728

pub fn b729(&mut self) -> B729_W<'_>[src]

Bit 25 - B729

pub fn b730(&mut self) -> B730_W<'_>[src]

Bit 26 - B730

pub fn b731(&mut self) -> B731_W<'_>[src]

Bit 27 - B731

pub fn b732(&mut self) -> B732_W<'_>[src]

Bit 28 - B732

pub fn b733(&mut self) -> B733_W<'_>[src]

Bit 29 - B733

pub fn b734(&mut self) -> B734_W<'_>[src]

Bit 30 - B734

pub fn b735(&mut self) -> B735_W<'_>[src]

Bit 31 - B735

impl W<u32, Reg<u32, _MPCBB1_VCTR23>>[src]

pub fn b736(&mut self) -> B736_W<'_>[src]

Bit 0 - B736

pub fn b737(&mut self) -> B737_W<'_>[src]

Bit 1 - B737

pub fn b738(&mut self) -> B738_W<'_>[src]

Bit 2 - B738

pub fn b739(&mut self) -> B739_W<'_>[src]

Bit 3 - B739

pub fn b740(&mut self) -> B740_W<'_>[src]

Bit 4 - B740

pub fn b741(&mut self) -> B741_W<'_>[src]

Bit 5 - B741

pub fn b742(&mut self) -> B742_W<'_>[src]

Bit 6 - B742

pub fn b743(&mut self) -> B743_W<'_>[src]

Bit 7 - B743

pub fn b744(&mut self) -> B744_W<'_>[src]

Bit 8 - B744

pub fn b745(&mut self) -> B745_W<'_>[src]

Bit 9 - B745

pub fn b746(&mut self) -> B746_W<'_>[src]

Bit 10 - B746

pub fn b747(&mut self) -> B747_W<'_>[src]

Bit 11 - B747

pub fn b748(&mut self) -> B748_W<'_>[src]

Bit 12 - B748

pub fn b749(&mut self) -> B749_W<'_>[src]

Bit 13 - B749

pub fn b750(&mut self) -> B750_W<'_>[src]

Bit 14 - B750

pub fn b751(&mut self) -> B751_W<'_>[src]

Bit 15 - B751

pub fn b752(&mut self) -> B752_W<'_>[src]

Bit 16 - B752

pub fn b753(&mut self) -> B753_W<'_>[src]

Bit 17 - B753

pub fn b754(&mut self) -> B754_W<'_>[src]

Bit 18 - B754

pub fn b755(&mut self) -> B755_W<'_>[src]

Bit 19 - B755

pub fn b756(&mut self) -> B756_W<'_>[src]

Bit 20 - B756

pub fn b757(&mut self) -> B757_W<'_>[src]

Bit 21 - B757

pub fn b758(&mut self) -> B758_W<'_>[src]

Bit 22 - B758

pub fn b759(&mut self) -> B759_W<'_>[src]

Bit 23 - B759

pub fn b760(&mut self) -> B760_W<'_>[src]

Bit 24 - B760

pub fn b761(&mut self) -> B761_W<'_>[src]

Bit 25 - B761

pub fn b762(&mut self) -> B762_W<'_>[src]

Bit 26 - B762

pub fn b763(&mut self) -> B763_W<'_>[src]

Bit 27 - B763

pub fn b764(&mut self) -> B764_W<'_>[src]

Bit 28 - B764

pub fn b765(&mut self) -> B765_W<'_>[src]

Bit 29 - B765

pub fn b766(&mut self) -> B766_W<'_>[src]

Bit 30 - B766

pub fn b767(&mut self) -> B767_W<'_>[src]

Bit 31 - B767

impl W<u32, Reg<u32, _MPCBB1_VCTR24>>[src]

pub fn b768(&mut self) -> B768_W<'_>[src]

Bit 0 - B768

pub fn b769(&mut self) -> B769_W<'_>[src]

Bit 1 - B769

pub fn b770(&mut self) -> B770_W<'_>[src]

Bit 2 - B770

pub fn b771(&mut self) -> B771_W<'_>[src]

Bit 3 - B771

pub fn b772(&mut self) -> B772_W<'_>[src]

Bit 4 - B772

pub fn b773(&mut self) -> B773_W<'_>[src]

Bit 5 - B773

pub fn b774(&mut self) -> B774_W<'_>[src]

Bit 6 - B774

pub fn b775(&mut self) -> B775_W<'_>[src]

Bit 7 - B775

pub fn b776(&mut self) -> B776_W<'_>[src]

Bit 8 - B776

pub fn b777(&mut self) -> B777_W<'_>[src]

Bit 9 - B777

pub fn b778(&mut self) -> B778_W<'_>[src]

Bit 10 - B778

pub fn b779(&mut self) -> B779_W<'_>[src]

Bit 11 - B779

pub fn b780(&mut self) -> B780_W<'_>[src]

Bit 12 - B780

pub fn b781(&mut self) -> B781_W<'_>[src]

Bit 13 - B781

pub fn b782(&mut self) -> B782_W<'_>[src]

Bit 14 - B782

pub fn b783(&mut self) -> B783_W<'_>[src]

Bit 15 - B783

pub fn b784(&mut self) -> B784_W<'_>[src]

Bit 16 - B784

pub fn b785(&mut self) -> B785_W<'_>[src]

Bit 17 - B785

pub fn b786(&mut self) -> B786_W<'_>[src]

Bit 18 - B786

pub fn b787(&mut self) -> B787_W<'_>[src]

Bit 19 - B787

pub fn b788(&mut self) -> B788_W<'_>[src]

Bit 20 - B788

pub fn b789(&mut self) -> B789_W<'_>[src]

Bit 21 - B789

pub fn b790(&mut self) -> B790_W<'_>[src]

Bit 22 - B790

pub fn b791(&mut self) -> B791_W<'_>[src]

Bit 23 - B791

pub fn b792(&mut self) -> B792_W<'_>[src]

Bit 24 - B792

pub fn b793(&mut self) -> B793_W<'_>[src]

Bit 25 - B793

pub fn b794(&mut self) -> B794_W<'_>[src]

Bit 26 - B794

pub fn b795(&mut self) -> B795_W<'_>[src]

Bit 27 - B795

pub fn b796(&mut self) -> B796_W<'_>[src]

Bit 28 - B796

pub fn b797(&mut self) -> B797_W<'_>[src]

Bit 29 - B797

pub fn b798(&mut self) -> B798_W<'_>[src]

Bit 30 - B798

pub fn b799(&mut self) -> B799_W<'_>[src]

Bit 31 - B799

impl W<u32, Reg<u32, _MPCBB1_VCTR25>>[src]

pub fn b800(&mut self) -> B800_W<'_>[src]

Bit 0 - B800

pub fn b801(&mut self) -> B801_W<'_>[src]

Bit 1 - B801

pub fn b802(&mut self) -> B802_W<'_>[src]

Bit 2 - B802

pub fn b803(&mut self) -> B803_W<'_>[src]

Bit 3 - B803

pub fn b804(&mut self) -> B804_W<'_>[src]

Bit 4 - B804

pub fn b805(&mut self) -> B805_W<'_>[src]

Bit 5 - B805

pub fn b806(&mut self) -> B806_W<'_>[src]

Bit 6 - B806

pub fn b807(&mut self) -> B807_W<'_>[src]

Bit 7 - B807

pub fn b808(&mut self) -> B808_W<'_>[src]

Bit 8 - B808

pub fn b809(&mut self) -> B809_W<'_>[src]

Bit 9 - B809

pub fn b810(&mut self) -> B810_W<'_>[src]

Bit 10 - B810

pub fn b811(&mut self) -> B811_W<'_>[src]

Bit 11 - B811

pub fn b812(&mut self) -> B812_W<'_>[src]

Bit 12 - B812

pub fn b813(&mut self) -> B813_W<'_>[src]

Bit 13 - B813

pub fn b814(&mut self) -> B814_W<'_>[src]

Bit 14 - B814

pub fn b815(&mut self) -> B815_W<'_>[src]

Bit 15 - B815

pub fn b816(&mut self) -> B816_W<'_>[src]

Bit 16 - B816

pub fn b817(&mut self) -> B817_W<'_>[src]

Bit 17 - B817

pub fn b818(&mut self) -> B818_W<'_>[src]

Bit 18 - B818

pub fn b819(&mut self) -> B819_W<'_>[src]

Bit 19 - B819

pub fn b820(&mut self) -> B820_W<'_>[src]

Bit 20 - B820

pub fn b821(&mut self) -> B821_W<'_>[src]

Bit 21 - B821

pub fn b822(&mut self) -> B822_W<'_>[src]

Bit 22 - B822

pub fn b823(&mut self) -> B823_W<'_>[src]

Bit 23 - B823

pub fn b824(&mut self) -> B824_W<'_>[src]

Bit 24 - B824

pub fn b825(&mut self) -> B825_W<'_>[src]

Bit 25 - B825

pub fn b826(&mut self) -> B826_W<'_>[src]

Bit 26 - B826

pub fn b827(&mut self) -> B827_W<'_>[src]

Bit 27 - B827

pub fn b828(&mut self) -> B828_W<'_>[src]

Bit 28 - B828

pub fn b829(&mut self) -> B829_W<'_>[src]

Bit 29 - B829

pub fn b830(&mut self) -> B830_W<'_>[src]

Bit 30 - B830

pub fn b831(&mut self) -> B831_W<'_>[src]

Bit 31 - B831

impl W<u32, Reg<u32, _MPCBB1_VCTR26>>[src]

pub fn b832(&mut self) -> B832_W<'_>[src]

Bit 0 - B832

pub fn b833(&mut self) -> B833_W<'_>[src]

Bit 1 - B833

pub fn b834(&mut self) -> B834_W<'_>[src]

Bit 2 - B834

pub fn b835(&mut self) -> B835_W<'_>[src]

Bit 3 - B835

pub fn b836(&mut self) -> B836_W<'_>[src]

Bit 4 - B836

pub fn b837(&mut self) -> B837_W<'_>[src]

Bit 5 - B837

pub fn b838(&mut self) -> B838_W<'_>[src]

Bit 6 - B838

pub fn b839(&mut self) -> B839_W<'_>[src]

Bit 7 - B839

pub fn b840(&mut self) -> B840_W<'_>[src]

Bit 8 - B840

pub fn b841(&mut self) -> B841_W<'_>[src]

Bit 9 - B841

pub fn b842(&mut self) -> B842_W<'_>[src]

Bit 10 - B842

pub fn b843(&mut self) -> B843_W<'_>[src]

Bit 11 - B843

pub fn b844(&mut self) -> B844_W<'_>[src]

Bit 12 - B844

pub fn b845(&mut self) -> B845_W<'_>[src]

Bit 13 - B845

pub fn b846(&mut self) -> B846_W<'_>[src]

Bit 14 - B846

pub fn b847(&mut self) -> B847_W<'_>[src]

Bit 15 - B847

pub fn b848(&mut self) -> B848_W<'_>[src]

Bit 16 - B848

pub fn b849(&mut self) -> B849_W<'_>[src]

Bit 17 - B849

pub fn b850(&mut self) -> B850_W<'_>[src]

Bit 18 - B850

pub fn b851(&mut self) -> B851_W<'_>[src]

Bit 19 - B851

pub fn b852(&mut self) -> B852_W<'_>[src]

Bit 20 - B852

pub fn b853(&mut self) -> B853_W<'_>[src]

Bit 21 - B853

pub fn b854(&mut self) -> B854_W<'_>[src]

Bit 22 - B854

pub fn b855(&mut self) -> B855_W<'_>[src]

Bit 23 - B855

pub fn b856(&mut self) -> B856_W<'_>[src]

Bit 24 - B856

pub fn b857(&mut self) -> B857_W<'_>[src]

Bit 25 - B857

pub fn b858(&mut self) -> B858_W<'_>[src]

Bit 26 - B858

pub fn b859(&mut self) -> B859_W<'_>[src]

Bit 27 - B859

pub fn b860(&mut self) -> B860_W<'_>[src]

Bit 28 - B860

pub fn b861(&mut self) -> B861_W<'_>[src]

Bit 29 - B861

pub fn b862(&mut self) -> B862_W<'_>[src]

Bit 30 - B862

pub fn b863(&mut self) -> B863_W<'_>[src]

Bit 31 - B863

impl W<u32, Reg<u32, _MPCBB1_VCTR27>>[src]

pub fn b864(&mut self) -> B864_W<'_>[src]

Bit 0 - B864

pub fn b865(&mut self) -> B865_W<'_>[src]

Bit 1 - B865

pub fn b866(&mut self) -> B866_W<'_>[src]

Bit 2 - B866

pub fn b867(&mut self) -> B867_W<'_>[src]

Bit 3 - B867

pub fn b868(&mut self) -> B868_W<'_>[src]

Bit 4 - B868

pub fn b869(&mut self) -> B869_W<'_>[src]

Bit 5 - B869

pub fn b870(&mut self) -> B870_W<'_>[src]

Bit 6 - B870

pub fn b871(&mut self) -> B871_W<'_>[src]

Bit 7 - B871

pub fn b872(&mut self) -> B872_W<'_>[src]

Bit 8 - B872

pub fn b873(&mut self) -> B873_W<'_>[src]

Bit 9 - B873

pub fn b874(&mut self) -> B874_W<'_>[src]

Bit 10 - B874

pub fn b875(&mut self) -> B875_W<'_>[src]

Bit 11 - B875

pub fn b876(&mut self) -> B876_W<'_>[src]

Bit 12 - B876

pub fn b877(&mut self) -> B877_W<'_>[src]

Bit 13 - B877

pub fn b878(&mut self) -> B878_W<'_>[src]

Bit 14 - B878

pub fn b879(&mut self) -> B879_W<'_>[src]

Bit 15 - B879

pub fn b880(&mut self) -> B880_W<'_>[src]

Bit 16 - B880

pub fn b881(&mut self) -> B881_W<'_>[src]

Bit 17 - B881

pub fn b882(&mut self) -> B882_W<'_>[src]

Bit 18 - B882

pub fn b883(&mut self) -> B883_W<'_>[src]

Bit 19 - B883

pub fn b884(&mut self) -> B884_W<'_>[src]

Bit 20 - B884

pub fn b885(&mut self) -> B885_W<'_>[src]

Bit 21 - B885

pub fn b886(&mut self) -> B886_W<'_>[src]

Bit 22 - B886

pub fn b887(&mut self) -> B887_W<'_>[src]

Bit 23 - B887

pub fn b888(&mut self) -> B888_W<'_>[src]

Bit 24 - B888

pub fn b889(&mut self) -> B889_W<'_>[src]

Bit 25 - B889

pub fn b890(&mut self) -> B890_W<'_>[src]

Bit 26 - B890

pub fn b891(&mut self) -> B891_W<'_>[src]

Bit 27 - B891

pub fn b892(&mut self) -> B892_W<'_>[src]

Bit 28 - B892

pub fn b893(&mut self) -> B893_W<'_>[src]

Bit 29 - B893

pub fn b894(&mut self) -> B894_W<'_>[src]

Bit 30 - B894

pub fn b895(&mut self) -> B895_W<'_>[src]

Bit 31 - B895

impl W<u32, Reg<u32, _MPCBB1_VCTR28>>[src]

pub fn b896(&mut self) -> B896_W<'_>[src]

Bit 0 - B896

pub fn b897(&mut self) -> B897_W<'_>[src]

Bit 1 - B897

pub fn b898(&mut self) -> B898_W<'_>[src]

Bit 2 - B898

pub fn b899(&mut self) -> B899_W<'_>[src]

Bit 3 - B899

pub fn b900(&mut self) -> B900_W<'_>[src]

Bit 4 - B900

pub fn b901(&mut self) -> B901_W<'_>[src]

Bit 5 - B901

pub fn b902(&mut self) -> B902_W<'_>[src]

Bit 6 - B902

pub fn b903(&mut self) -> B903_W<'_>[src]

Bit 7 - B903

pub fn b904(&mut self) -> B904_W<'_>[src]

Bit 8 - B904

pub fn b905(&mut self) -> B905_W<'_>[src]

Bit 9 - B905

pub fn b906(&mut self) -> B906_W<'_>[src]

Bit 10 - B906

pub fn b907(&mut self) -> B907_W<'_>[src]

Bit 11 - B907

pub fn b908(&mut self) -> B908_W<'_>[src]

Bit 12 - B908

pub fn b909(&mut self) -> B909_W<'_>[src]

Bit 13 - B909

pub fn b910(&mut self) -> B910_W<'_>[src]

Bit 14 - B910

pub fn b911(&mut self) -> B911_W<'_>[src]

Bit 15 - B911

pub fn b912(&mut self) -> B912_W<'_>[src]

Bit 16 - B912

pub fn b913(&mut self) -> B913_W<'_>[src]

Bit 17 - B913

pub fn b914(&mut self) -> B914_W<'_>[src]

Bit 18 - B914

pub fn b915(&mut self) -> B915_W<'_>[src]

Bit 19 - B915

pub fn b916(&mut self) -> B916_W<'_>[src]

Bit 20 - B916

pub fn b917(&mut self) -> B917_W<'_>[src]

Bit 21 - B917

pub fn b918(&mut self) -> B918_W<'_>[src]

Bit 22 - B918

pub fn b919(&mut self) -> B919_W<'_>[src]

Bit 23 - B919

pub fn b920(&mut self) -> B920_W<'_>[src]

Bit 24 - B920

pub fn b921(&mut self) -> B921_W<'_>[src]

Bit 25 - B921

pub fn b922(&mut self) -> B922_W<'_>[src]

Bit 26 - B922

pub fn b923(&mut self) -> B923_W<'_>[src]

Bit 27 - B923

pub fn b924(&mut self) -> B924_W<'_>[src]

Bit 28 - B924

pub fn b925(&mut self) -> B925_W<'_>[src]

Bit 29 - B925

pub fn b926(&mut self) -> B926_W<'_>[src]

Bit 30 - B926

pub fn b927(&mut self) -> B927_W<'_>[src]

Bit 31 - B927

impl W<u32, Reg<u32, _MPCBB1_VCTR29>>[src]

pub fn b928(&mut self) -> B928_W<'_>[src]

Bit 0 - B928

pub fn b929(&mut self) -> B929_W<'_>[src]

Bit 1 - B929

pub fn b930(&mut self) -> B930_W<'_>[src]

Bit 2 - B930

pub fn b931(&mut self) -> B931_W<'_>[src]

Bit 3 - B931

pub fn b932(&mut self) -> B932_W<'_>[src]

Bit 4 - B932

pub fn b933(&mut self) -> B933_W<'_>[src]

Bit 5 - B933

pub fn b934(&mut self) -> B934_W<'_>[src]

Bit 6 - B934

pub fn b935(&mut self) -> B935_W<'_>[src]

Bit 7 - B935

pub fn b936(&mut self) -> B936_W<'_>[src]

Bit 8 - B936

pub fn b937(&mut self) -> B937_W<'_>[src]

Bit 9 - B937

pub fn b938(&mut self) -> B938_W<'_>[src]

Bit 10 - B938

pub fn b939(&mut self) -> B939_W<'_>[src]

Bit 11 - B939

pub fn b940(&mut self) -> B940_W<'_>[src]

Bit 12 - B940

pub fn b941(&mut self) -> B941_W<'_>[src]

Bit 13 - B941

pub fn b942(&mut self) -> B942_W<'_>[src]

Bit 14 - B942

pub fn b943(&mut self) -> B943_W<'_>[src]

Bit 15 - B943

pub fn b944(&mut self) -> B944_W<'_>[src]

Bit 16 - B944

pub fn b945(&mut self) -> B945_W<'_>[src]

Bit 17 - B945

pub fn b946(&mut self) -> B946_W<'_>[src]

Bit 18 - B946

pub fn b947(&mut self) -> B947_W<'_>[src]

Bit 19 - B947

pub fn b948(&mut self) -> B948_W<'_>[src]

Bit 20 - B948

pub fn b949(&mut self) -> B949_W<'_>[src]

Bit 21 - B949

pub fn b950(&mut self) -> B950_W<'_>[src]

Bit 22 - B950

pub fn b951(&mut self) -> B951_W<'_>[src]

Bit 23 - B951

pub fn b952(&mut self) -> B952_W<'_>[src]

Bit 24 - B952

pub fn b953(&mut self) -> B953_W<'_>[src]

Bit 25 - B953

pub fn b954(&mut self) -> B954_W<'_>[src]

Bit 26 - B954

pub fn b955(&mut self) -> B955_W<'_>[src]

Bit 27 - B955

pub fn b956(&mut self) -> B956_W<'_>[src]

Bit 28 - B956

pub fn b957(&mut self) -> B957_W<'_>[src]

Bit 29 - B957

pub fn b958(&mut self) -> B958_W<'_>[src]

Bit 30 - B958

pub fn b959(&mut self) -> B959_W<'_>[src]

Bit 31 - B959

impl W<u32, Reg<u32, _MPCBB1_VCTR30>>[src]

pub fn b960(&mut self) -> B960_W<'_>[src]

Bit 0 - B960

pub fn b961(&mut self) -> B961_W<'_>[src]

Bit 1 - B961

pub fn b962(&mut self) -> B962_W<'_>[src]

Bit 2 - B962

pub fn b963(&mut self) -> B963_W<'_>[src]

Bit 3 - B963

pub fn b964(&mut self) -> B964_W<'_>[src]

Bit 4 - B964

pub fn b965(&mut self) -> B965_W<'_>[src]

Bit 5 - B965

pub fn b966(&mut self) -> B966_W<'_>[src]

Bit 6 - B966

pub fn b967(&mut self) -> B967_W<'_>[src]

Bit 7 - B967

pub fn b968(&mut self) -> B968_W<'_>[src]

Bit 8 - B968

pub fn b969(&mut self) -> B969_W<'_>[src]

Bit 9 - B969

pub fn b970(&mut self) -> B970_W<'_>[src]

Bit 10 - B970

pub fn b971(&mut self) -> B971_W<'_>[src]

Bit 11 - B971

pub fn b972(&mut self) -> B972_W<'_>[src]

Bit 12 - B972

pub fn b973(&mut self) -> B973_W<'_>[src]

Bit 13 - B973

pub fn b974(&mut self) -> B974_W<'_>[src]

Bit 14 - B974

pub fn b975(&mut self) -> B975_W<'_>[src]

Bit 15 - B975

pub fn b976(&mut self) -> B976_W<'_>[src]

Bit 16 - B976

pub fn b977(&mut self) -> B977_W<'_>[src]

Bit 17 - B977

pub fn b978(&mut self) -> B978_W<'_>[src]

Bit 18 - B978

pub fn b979(&mut self) -> B979_W<'_>[src]

Bit 19 - B979

pub fn b980(&mut self) -> B980_W<'_>[src]

Bit 20 - B980

pub fn b981(&mut self) -> B981_W<'_>[src]

Bit 21 - B981

pub fn b982(&mut self) -> B982_W<'_>[src]

Bit 22 - B982

pub fn b983(&mut self) -> B983_W<'_>[src]

Bit 23 - B983

pub fn b984(&mut self) -> B984_W<'_>[src]

Bit 24 - B984

pub fn b985(&mut self) -> B985_W<'_>[src]

Bit 25 - B985

pub fn b986(&mut self) -> B986_W<'_>[src]

Bit 26 - B986

pub fn b987(&mut self) -> B987_W<'_>[src]

Bit 27 - B987

pub fn b988(&mut self) -> B988_W<'_>[src]

Bit 28 - B988

pub fn b989(&mut self) -> B989_W<'_>[src]

Bit 29 - B989

pub fn b990(&mut self) -> B990_W<'_>[src]

Bit 30 - B990

pub fn b991(&mut self) -> B991_W<'_>[src]

Bit 31 - B991

impl W<u32, Reg<u32, _MPCBB1_VCTR31>>[src]

pub fn b992(&mut self) -> B992_W<'_>[src]

Bit 0 - B992

pub fn b993(&mut self) -> B993_W<'_>[src]

Bit 1 - B993

pub fn b994(&mut self) -> B994_W<'_>[src]

Bit 2 - B994

pub fn b995(&mut self) -> B995_W<'_>[src]

Bit 3 - B995

pub fn b996(&mut self) -> B996_W<'_>[src]

Bit 4 - B996

pub fn b997(&mut self) -> B997_W<'_>[src]

Bit 5 - B997

pub fn b998(&mut self) -> B998_W<'_>[src]

Bit 6 - B998

pub fn b999(&mut self) -> B999_W<'_>[src]

Bit 7 - B999

pub fn b1000(&mut self) -> B1000_W<'_>[src]

Bit 8 - B1000

pub fn b1001(&mut self) -> B1001_W<'_>[src]

Bit 9 - B1001

pub fn b1002(&mut self) -> B1002_W<'_>[src]

Bit 10 - B1002

pub fn b1003(&mut self) -> B1003_W<'_>[src]

Bit 11 - B1003

pub fn b1004(&mut self) -> B1004_W<'_>[src]

Bit 12 - B1004

pub fn b1005(&mut self) -> B1005_W<'_>[src]

Bit 13 - B1005

pub fn b1006(&mut self) -> B1006_W<'_>[src]

Bit 14 - B1006

pub fn b1007(&mut self) -> B1007_W<'_>[src]

Bit 15 - B1007

pub fn b1008(&mut self) -> B1008_W<'_>[src]

Bit 16 - B1008

pub fn b1009(&mut self) -> B1009_W<'_>[src]

Bit 17 - B1009

pub fn b1010(&mut self) -> B1010_W<'_>[src]

Bit 18 - B1010

pub fn b1011(&mut self) -> B1011_W<'_>[src]

Bit 19 - B1011

pub fn b1012(&mut self) -> B1012_W<'_>[src]

Bit 20 - B1012

pub fn b1013(&mut self) -> B1013_W<'_>[src]

Bit 21 - B1013

pub fn b1014(&mut self) -> B1014_W<'_>[src]

Bit 22 - B1014

pub fn b1015(&mut self) -> B1015_W<'_>[src]

Bit 23 - B1015

pub fn b1016(&mut self) -> B1016_W<'_>[src]

Bit 24 - B1016

pub fn b1017(&mut self) -> B1017_W<'_>[src]

Bit 25 - B1017

pub fn b1018(&mut self) -> B1018_W<'_>[src]

Bit 26 - B1018

pub fn b1019(&mut self) -> B1019_W<'_>[src]

Bit 27 - B1019

pub fn b1020(&mut self) -> B1020_W<'_>[src]

Bit 28 - B1020

pub fn b1021(&mut self) -> B1021_W<'_>[src]

Bit 29 - B1021

pub fn b1022(&mut self) -> B1022_W<'_>[src]

Bit 30 - B1022

pub fn b1023(&mut self) -> B1023_W<'_>[src]

Bit 31 - B1023

impl W<u32, Reg<u32, _MPCBB1_VCTR32>>[src]

pub fn b1024(&mut self) -> B1024_W<'_>[src]

Bit 0 - B1024

pub fn b1025(&mut self) -> B1025_W<'_>[src]

Bit 1 - B1025

pub fn b1026(&mut self) -> B1026_W<'_>[src]

Bit 2 - B1026

pub fn b1027(&mut self) -> B1027_W<'_>[src]

Bit 3 - B1027

pub fn b1028(&mut self) -> B1028_W<'_>[src]

Bit 4 - B1028

pub fn b1029(&mut self) -> B1029_W<'_>[src]

Bit 5 - B1029

pub fn b1030(&mut self) -> B1030_W<'_>[src]

Bit 6 - B1030

pub fn b1031(&mut self) -> B1031_W<'_>[src]

Bit 7 - B1031

pub fn b1032(&mut self) -> B1032_W<'_>[src]

Bit 8 - B1032

pub fn b1033(&mut self) -> B1033_W<'_>[src]

Bit 9 - B1033

pub fn b1034(&mut self) -> B1034_W<'_>[src]

Bit 10 - B1034

pub fn b1035(&mut self) -> B1035_W<'_>[src]

Bit 11 - B1035

pub fn b1036(&mut self) -> B1036_W<'_>[src]

Bit 12 - B1036

pub fn b1037(&mut self) -> B1037_W<'_>[src]

Bit 13 - B1037

pub fn b1038(&mut self) -> B1038_W<'_>[src]

Bit 14 - B1038

pub fn b1039(&mut self) -> B1039_W<'_>[src]

Bit 15 - B1039

pub fn b1040(&mut self) -> B1040_W<'_>[src]

Bit 16 - B1040

pub fn b1041(&mut self) -> B1041_W<'_>[src]

Bit 17 - B1041

pub fn b1042(&mut self) -> B1042_W<'_>[src]

Bit 18 - B1042

pub fn b1043(&mut self) -> B1043_W<'_>[src]

Bit 19 - B1043

pub fn b1044(&mut self) -> B1044_W<'_>[src]

Bit 20 - B1044

pub fn b1045(&mut self) -> B1045_W<'_>[src]

Bit 21 - B1045

pub fn b1046(&mut self) -> B1046_W<'_>[src]

Bit 22 - B1046

pub fn b1047(&mut self) -> B1047_W<'_>[src]

Bit 23 - B1047

pub fn b1048(&mut self) -> B1048_W<'_>[src]

Bit 24 - B1048

pub fn b1049(&mut self) -> B1049_W<'_>[src]

Bit 25 - B1049

pub fn b1050(&mut self) -> B1050_W<'_>[src]

Bit 26 - B1050

pub fn b1051(&mut self) -> B1051_W<'_>[src]

Bit 27 - B1051

pub fn b1052(&mut self) -> B1052_W<'_>[src]

Bit 28 - B1052

pub fn b1053(&mut self) -> B1053_W<'_>[src]

Bit 29 - B1053

pub fn b1054(&mut self) -> B1054_W<'_>[src]

Bit 30 - B1054

pub fn b1055(&mut self) -> B1055_W<'_>[src]

Bit 31 - B1055

impl W<u32, Reg<u32, _MPCBB1_VCTR33>>[src]

pub fn b1056(&mut self) -> B1056_W<'_>[src]

Bit 0 - B1056

pub fn b1057(&mut self) -> B1057_W<'_>[src]

Bit 1 - B1057

pub fn b1058(&mut self) -> B1058_W<'_>[src]

Bit 2 - B1058

pub fn b1059(&mut self) -> B1059_W<'_>[src]

Bit 3 - B1059

pub fn b1060(&mut self) -> B1060_W<'_>[src]

Bit 4 - B1060

pub fn b1061(&mut self) -> B1061_W<'_>[src]

Bit 5 - B1061

pub fn b1062(&mut self) -> B1062_W<'_>[src]

Bit 6 - B1062

pub fn b1063(&mut self) -> B1063_W<'_>[src]

Bit 7 - B1063

pub fn b1064(&mut self) -> B1064_W<'_>[src]

Bit 8 - B1064

pub fn b1065(&mut self) -> B1065_W<'_>[src]

Bit 9 - B1065

pub fn b1066(&mut self) -> B1066_W<'_>[src]

Bit 10 - B1066

pub fn b1067(&mut self) -> B1067_W<'_>[src]

Bit 11 - B1067

pub fn b1068(&mut self) -> B1068_W<'_>[src]

Bit 12 - B1068

pub fn b1069(&mut self) -> B1069_W<'_>[src]

Bit 13 - B1069

pub fn b1070(&mut self) -> B1070_W<'_>[src]

Bit 14 - B1070

pub fn b1071(&mut self) -> B1071_W<'_>[src]

Bit 15 - B1071

pub fn b1072(&mut self) -> B1072_W<'_>[src]

Bit 16 - B1072

pub fn b1073(&mut self) -> B1073_W<'_>[src]

Bit 17 - B1073

pub fn b1074(&mut self) -> B1074_W<'_>[src]

Bit 18 - B1074

pub fn b1075(&mut self) -> B1075_W<'_>[src]

Bit 19 - B1075

pub fn b1076(&mut self) -> B1076_W<'_>[src]

Bit 20 - B1076

pub fn b1077(&mut self) -> B1077_W<'_>[src]

Bit 21 - B1077

pub fn b1078(&mut self) -> B1078_W<'_>[src]

Bit 22 - B1078

pub fn b1079(&mut self) -> B1079_W<'_>[src]

Bit 23 - B1079

pub fn b1080(&mut self) -> B1080_W<'_>[src]

Bit 24 - B1080

pub fn b1081(&mut self) -> B1081_W<'_>[src]

Bit 25 - B1081

pub fn b1082(&mut self) -> B1082_W<'_>[src]

Bit 26 - B1082

pub fn b1083(&mut self) -> B1083_W<'_>[src]

Bit 27 - B1083

pub fn b1084(&mut self) -> B1084_W<'_>[src]

Bit 28 - B1084

pub fn b1085(&mut self) -> B1085_W<'_>[src]

Bit 29 - B1085

pub fn b1086(&mut self) -> B1086_W<'_>[src]

Bit 30 - B1086

pub fn b1087(&mut self) -> B1087_W<'_>[src]

Bit 31 - B1087

impl W<u32, Reg<u32, _MPCBB1_VCTR34>>[src]

pub fn b1088(&mut self) -> B1088_W<'_>[src]

Bit 0 - B1088

pub fn b1089(&mut self) -> B1089_W<'_>[src]

Bit 1 - B1089

pub fn b1090(&mut self) -> B1090_W<'_>[src]

Bit 2 - B1090

pub fn b1091(&mut self) -> B1091_W<'_>[src]

Bit 3 - B1091

pub fn b1092(&mut self) -> B1092_W<'_>[src]

Bit 4 - B1092

pub fn b1093(&mut self) -> B1093_W<'_>[src]

Bit 5 - B1093

pub fn b1094(&mut self) -> B1094_W<'_>[src]

Bit 6 - B1094

pub fn b1095(&mut self) -> B1095_W<'_>[src]

Bit 7 - B1095

pub fn b1096(&mut self) -> B1096_W<'_>[src]

Bit 8 - B1096

pub fn b1097(&mut self) -> B1097_W<'_>[src]

Bit 9 - B1097

pub fn b1098(&mut self) -> B1098_W<'_>[src]

Bit 10 - B1098

pub fn b1099(&mut self) -> B1099_W<'_>[src]

Bit 11 - B1099

pub fn b1100(&mut self) -> B1100_W<'_>[src]

Bit 12 - B1100

pub fn b1101(&mut self) -> B1101_W<'_>[src]

Bit 13 - B1101

pub fn b1102(&mut self) -> B1102_W<'_>[src]

Bit 14 - B1102

pub fn b1103(&mut self) -> B1103_W<'_>[src]

Bit 15 - B1103

pub fn b1104(&mut self) -> B1104_W<'_>[src]

Bit 16 - B1104

pub fn b1105(&mut self) -> B1105_W<'_>[src]

Bit 17 - B1105

pub fn b1106(&mut self) -> B1106_W<'_>[src]

Bit 18 - B1106

pub fn b1107(&mut self) -> B1107_W<'_>[src]

Bit 19 - B1107

pub fn b1108(&mut self) -> B1108_W<'_>[src]

Bit 20 - B1108

pub fn b1109(&mut self) -> B1109_W<'_>[src]

Bit 21 - B1109

pub fn b1110(&mut self) -> B1110_W<'_>[src]

Bit 22 - B1110

pub fn b1111(&mut self) -> B1111_W<'_>[src]

Bit 23 - B1111

pub fn b1112(&mut self) -> B1112_W<'_>[src]

Bit 24 - B1112

pub fn b1113(&mut self) -> B1113_W<'_>[src]

Bit 25 - B1113

pub fn b1114(&mut self) -> B1114_W<'_>[src]

Bit 26 - B1114

pub fn b1115(&mut self) -> B1115_W<'_>[src]

Bit 27 - B1115

pub fn b1116(&mut self) -> B1116_W<'_>[src]

Bit 28 - B1116

pub fn b1117(&mut self) -> B1117_W<'_>[src]

Bit 29 - B1117

pub fn b1118(&mut self) -> B1118_W<'_>[src]

Bit 30 - B1118

pub fn b1119(&mut self) -> B1119_W<'_>[src]

Bit 31 - B1119

impl W<u32, Reg<u32, _MPCBB1_VCTR35>>[src]

pub fn b1120(&mut self) -> B1120_W<'_>[src]

Bit 0 - B1120

pub fn b1121(&mut self) -> B1121_W<'_>[src]

Bit 1 - B1121

pub fn b1122(&mut self) -> B1122_W<'_>[src]

Bit 2 - B1122

pub fn b1123(&mut self) -> B1123_W<'_>[src]

Bit 3 - B1123

pub fn b1124(&mut self) -> B1124_W<'_>[src]

Bit 4 - B1124

pub fn b1125(&mut self) -> B1125_W<'_>[src]

Bit 5 - B1125

pub fn b1126(&mut self) -> B1126_W<'_>[src]

Bit 6 - B1126

pub fn b1127(&mut self) -> B1127_W<'_>[src]

Bit 7 - B1127

pub fn b1128(&mut self) -> B1128_W<'_>[src]

Bit 8 - B1128

pub fn b1129(&mut self) -> B1129_W<'_>[src]

Bit 9 - B1129

pub fn b1130(&mut self) -> B1130_W<'_>[src]

Bit 10 - B1130

pub fn b1131(&mut self) -> B1131_W<'_>[src]

Bit 11 - B1131

pub fn b1132(&mut self) -> B1132_W<'_>[src]

Bit 12 - B1132

pub fn b1133(&mut self) -> B1133_W<'_>[src]

Bit 13 - B1133

pub fn b1134(&mut self) -> B1134_W<'_>[src]

Bit 14 - B1134

pub fn b1135(&mut self) -> B1135_W<'_>[src]

Bit 15 - B1135

pub fn b1136(&mut self) -> B1136_W<'_>[src]

Bit 16 - B1136

pub fn b1137(&mut self) -> B1137_W<'_>[src]

Bit 17 - B1137

pub fn b1138(&mut self) -> B1138_W<'_>[src]

Bit 18 - B1138

pub fn b1139(&mut self) -> B1139_W<'_>[src]

Bit 19 - B1139

pub fn b1140(&mut self) -> B1140_W<'_>[src]

Bit 20 - B1140

pub fn b1141(&mut self) -> B1141_W<'_>[src]

Bit 21 - B1141

pub fn b1142(&mut self) -> B1142_W<'_>[src]

Bit 22 - B1142

pub fn b1143(&mut self) -> B1143_W<'_>[src]

Bit 23 - B1143

pub fn b1144(&mut self) -> B1144_W<'_>[src]

Bit 24 - B1144

pub fn b1145(&mut self) -> B1145_W<'_>[src]

Bit 25 - B1145

pub fn b1146(&mut self) -> B1146_W<'_>[src]

Bit 26 - B1146

pub fn b1147(&mut self) -> B1147_W<'_>[src]

Bit 27 - B1147

pub fn b1148(&mut self) -> B1148_W<'_>[src]

Bit 28 - B1148

pub fn b1149(&mut self) -> B1149_W<'_>[src]

Bit 29 - B1149

pub fn b1150(&mut self) -> B1150_W<'_>[src]

Bit 30 - B1150

pub fn b1151(&mut self) -> B1151_W<'_>[src]

Bit 31 - B1151

impl W<u32, Reg<u32, _MPCBB1_VCTR36>>[src]

pub fn b1152(&mut self) -> B1152_W<'_>[src]

Bit 0 - B1152

pub fn b1153(&mut self) -> B1153_W<'_>[src]

Bit 1 - B1153

pub fn b1154(&mut self) -> B1154_W<'_>[src]

Bit 2 - B1154

pub fn b1155(&mut self) -> B1155_W<'_>[src]

Bit 3 - B1155

pub fn b1156(&mut self) -> B1156_W<'_>[src]

Bit 4 - B1156

pub fn b1157(&mut self) -> B1157_W<'_>[src]

Bit 5 - B1157

pub fn b1158(&mut self) -> B1158_W<'_>[src]

Bit 6 - B1158

pub fn b1159(&mut self) -> B1159_W<'_>[src]

Bit 7 - B1159

pub fn b1160(&mut self) -> B1160_W<'_>[src]

Bit 8 - B1160

pub fn b1161(&mut self) -> B1161_W<'_>[src]

Bit 9 - B1161

pub fn b1162(&mut self) -> B1162_W<'_>[src]

Bit 10 - B1162

pub fn b1163(&mut self) -> B1163_W<'_>[src]

Bit 11 - B1163

pub fn b1164(&mut self) -> B1164_W<'_>[src]

Bit 12 - B1164

pub fn b1165(&mut self) -> B1165_W<'_>[src]

Bit 13 - B1165

pub fn b1166(&mut self) -> B1166_W<'_>[src]

Bit 14 - B1166

pub fn b1167(&mut self) -> B1167_W<'_>[src]

Bit 15 - B1167

pub fn b1168(&mut self) -> B1168_W<'_>[src]

Bit 16 - B1168

pub fn b1169(&mut self) -> B1169_W<'_>[src]

Bit 17 - B1169

pub fn b1170(&mut self) -> B1170_W<'_>[src]

Bit 18 - B1170

pub fn b1171(&mut self) -> B1171_W<'_>[src]

Bit 19 - B1171

pub fn b1172(&mut self) -> B1172_W<'_>[src]

Bit 20 - B1172

pub fn b1173(&mut self) -> B1173_W<'_>[src]

Bit 21 - B1173

pub fn b1174(&mut self) -> B1174_W<'_>[src]

Bit 22 - B1174

pub fn b1175(&mut self) -> B1175_W<'_>[src]

Bit 23 - B1175

pub fn b1176(&mut self) -> B1176_W<'_>[src]

Bit 24 - B1176

pub fn b1177(&mut self) -> B1177_W<'_>[src]

Bit 25 - B1177

pub fn b1178(&mut self) -> B1178_W<'_>[src]

Bit 26 - B1178

pub fn b1179(&mut self) -> B1179_W<'_>[src]

Bit 27 - B1179

pub fn b1180(&mut self) -> B1180_W<'_>[src]

Bit 28 - B1180

pub fn b1181(&mut self) -> B1181_W<'_>[src]

Bit 29 - B1181

pub fn b1182(&mut self) -> B1182_W<'_>[src]

Bit 30 - B1182

pub fn b1183(&mut self) -> B1183_W<'_>[src]

Bit 31 - B1183

impl W<u32, Reg<u32, _MPCBB1_VCTR37>>[src]

pub fn b1184(&mut self) -> B1184_W<'_>[src]

Bit 0 - B1184

pub fn b1185(&mut self) -> B1185_W<'_>[src]

Bit 1 - B1185

pub fn b1186(&mut self) -> B1186_W<'_>[src]

Bit 2 - B1186

pub fn b1187(&mut self) -> B1187_W<'_>[src]

Bit 3 - B1187

pub fn b1188(&mut self) -> B1188_W<'_>[src]

Bit 4 - B1188

pub fn b1189(&mut self) -> B1189_W<'_>[src]

Bit 5 - B1189

pub fn b1190(&mut self) -> B1190_W<'_>[src]

Bit 6 - B1190

pub fn b1191(&mut self) -> B1191_W<'_>[src]

Bit 7 - B1191

pub fn b1192(&mut self) -> B1192_W<'_>[src]

Bit 8 - B1192

pub fn b1193(&mut self) -> B1193_W<'_>[src]

Bit 9 - B1193

pub fn b1194(&mut self) -> B1194_W<'_>[src]

Bit 10 - B1194

pub fn b1195(&mut self) -> B1195_W<'_>[src]

Bit 11 - B1195

pub fn b1196(&mut self) -> B1196_W<'_>[src]

Bit 12 - B1196

pub fn b1197(&mut self) -> B1197_W<'_>[src]

Bit 13 - B1197

pub fn b1198(&mut self) -> B1198_W<'_>[src]

Bit 14 - B1198

pub fn b1199(&mut self) -> B1199_W<'_>[src]

Bit 15 - B1199

pub fn b1200(&mut self) -> B1200_W<'_>[src]

Bit 16 - B1200

pub fn b1201(&mut self) -> B1201_W<'_>[src]

Bit 17 - B1201

pub fn b1202(&mut self) -> B1202_W<'_>[src]

Bit 18 - B1202

pub fn b1203(&mut self) -> B1203_W<'_>[src]

Bit 19 - B1203

pub fn b1204(&mut self) -> B1204_W<'_>[src]

Bit 20 - B1204

pub fn b1205(&mut self) -> B1205_W<'_>[src]

Bit 21 - B1205

pub fn b1206(&mut self) -> B1206_W<'_>[src]

Bit 22 - B1206

pub fn b1207(&mut self) -> B1207_W<'_>[src]

Bit 23 - B1207

pub fn b1208(&mut self) -> B1208_W<'_>[src]

Bit 24 - B1208

pub fn b1209(&mut self) -> B1209_W<'_>[src]

Bit 25 - B1209

pub fn b1210(&mut self) -> B1210_W<'_>[src]

Bit 26 - B1210

pub fn b1211(&mut self) -> B1211_W<'_>[src]

Bit 27 - B1211

pub fn b1212(&mut self) -> B1212_W<'_>[src]

Bit 28 - B1212

pub fn b1213(&mut self) -> B1213_W<'_>[src]

Bit 29 - B1213

pub fn b1214(&mut self) -> B1214_W<'_>[src]

Bit 30 - B1214

pub fn b1215(&mut self) -> B1215_W<'_>[src]

Bit 31 - B1215

impl W<u32, Reg<u32, _MPCBB1_VCTR38>>[src]

pub fn b1216(&mut self) -> B1216_W<'_>[src]

Bit 0 - B1216

pub fn b1217(&mut self) -> B1217_W<'_>[src]

Bit 1 - B1217

pub fn b1218(&mut self) -> B1218_W<'_>[src]

Bit 2 - B1218

pub fn b1219(&mut self) -> B1219_W<'_>[src]

Bit 3 - B1219

pub fn b1220(&mut self) -> B1220_W<'_>[src]

Bit 4 - B1220

pub fn b1221(&mut self) -> B1221_W<'_>[src]

Bit 5 - B1221

pub fn b1222(&mut self) -> B1222_W<'_>[src]

Bit 6 - B1222

pub fn b1223(&mut self) -> B1223_W<'_>[src]

Bit 7 - B1223

pub fn b1224(&mut self) -> B1224_W<'_>[src]

Bit 8 - B1224

pub fn b1225(&mut self) -> B1225_W<'_>[src]

Bit 9 - B1225

pub fn b1226(&mut self) -> B1226_W<'_>[src]

Bit 10 - B1226

pub fn b1227(&mut self) -> B1227_W<'_>[src]

Bit 11 - B1227

pub fn b1228(&mut self) -> B1228_W<'_>[src]

Bit 12 - B1228

pub fn b1229(&mut self) -> B1229_W<'_>[src]

Bit 13 - B1229

pub fn b1230(&mut self) -> B1230_W<'_>[src]

Bit 14 - B1230

pub fn b1231(&mut self) -> B1231_W<'_>[src]

Bit 15 - B1231

pub fn b1232(&mut self) -> B1232_W<'_>[src]

Bit 16 - B1232

pub fn b1233(&mut self) -> B1233_W<'_>[src]

Bit 17 - B1233

pub fn b1234(&mut self) -> B1234_W<'_>[src]

Bit 18 - B1234

pub fn b1235(&mut self) -> B1235_W<'_>[src]

Bit 19 - B1235

pub fn b1236(&mut self) -> B1236_W<'_>[src]

Bit 20 - B1236

pub fn b1237(&mut self) -> B1237_W<'_>[src]

Bit 21 - B1237

pub fn b1238(&mut self) -> B1238_W<'_>[src]

Bit 22 - B1238

pub fn b1239(&mut self) -> B1239_W<'_>[src]

Bit 23 - B1239

pub fn b1240(&mut self) -> B1240_W<'_>[src]

Bit 24 - B1240

pub fn b1241(&mut self) -> B1241_W<'_>[src]

Bit 25 - B1241

pub fn b1242(&mut self) -> B1242_W<'_>[src]

Bit 26 - B1242

pub fn b1243(&mut self) -> B1243_W<'_>[src]

Bit 27 - B1243

pub fn b1244(&mut self) -> B1244_W<'_>[src]

Bit 28 - B1244

pub fn b1245(&mut self) -> B1245_W<'_>[src]

Bit 29 - B1245

pub fn b1246(&mut self) -> B1246_W<'_>[src]

Bit 30 - B1246

pub fn b1247(&mut self) -> B1247_W<'_>[src]

Bit 31 - B1247

impl W<u32, Reg<u32, _MPCBB1_VCTR39>>[src]

pub fn b1248(&mut self) -> B1248_W<'_>[src]

Bit 0 - B1248

pub fn b1249(&mut self) -> B1249_W<'_>[src]

Bit 1 - B1249

pub fn b1250(&mut self) -> B1250_W<'_>[src]

Bit 2 - B1250

pub fn b1251(&mut self) -> B1251_W<'_>[src]

Bit 3 - B1251

pub fn b1252(&mut self) -> B1252_W<'_>[src]

Bit 4 - B1252

pub fn b1253(&mut self) -> B1253_W<'_>[src]

Bit 5 - B1253

pub fn b1254(&mut self) -> B1254_W<'_>[src]

Bit 6 - B1254

pub fn b1255(&mut self) -> B1255_W<'_>[src]

Bit 7 - B1255

pub fn b1256(&mut self) -> B1256_W<'_>[src]

Bit 8 - B1256

pub fn b1257(&mut self) -> B1257_W<'_>[src]

Bit 9 - B1257

pub fn b1258(&mut self) -> B1258_W<'_>[src]

Bit 10 - B1258

pub fn b1259(&mut self) -> B1259_W<'_>[src]

Bit 11 - B1259

pub fn b1260(&mut self) -> B1260_W<'_>[src]

Bit 12 - B1260

pub fn b1261(&mut self) -> B1261_W<'_>[src]

Bit 13 - B1261

pub fn b1262(&mut self) -> B1262_W<'_>[src]

Bit 14 - B1262

pub fn b1263(&mut self) -> B1263_W<'_>[src]

Bit 15 - B1263

pub fn b1264(&mut self) -> B1264_W<'_>[src]

Bit 16 - B1264

pub fn b1265(&mut self) -> B1265_W<'_>[src]

Bit 17 - B1265

pub fn b1266(&mut self) -> B1266_W<'_>[src]

Bit 18 - B1266

pub fn b1267(&mut self) -> B1267_W<'_>[src]

Bit 19 - B1267

pub fn b1268(&mut self) -> B1268_W<'_>[src]

Bit 20 - B1268

pub fn b1269(&mut self) -> B1269_W<'_>[src]

Bit 21 - B1269

pub fn b1270(&mut self) -> B1270_W<'_>[src]

Bit 22 - B1270

pub fn b1271(&mut self) -> B1271_W<'_>[src]

Bit 23 - B1271

pub fn b1272(&mut self) -> B1272_W<'_>[src]

Bit 24 - B1272

pub fn b1273(&mut self) -> B1273_W<'_>[src]

Bit 25 - B1273

pub fn b1274(&mut self) -> B1274_W<'_>[src]

Bit 26 - B1274

pub fn b1275(&mut self) -> B1275_W<'_>[src]

Bit 27 - B1275

pub fn b1276(&mut self) -> B1276_W<'_>[src]

Bit 28 - B1276

pub fn b1277(&mut self) -> B1277_W<'_>[src]

Bit 29 - B1277

pub fn b1278(&mut self) -> B1278_W<'_>[src]

Bit 30 - B1278

pub fn b1279(&mut self) -> B1279_W<'_>[src]

Bit 31 - B1279

impl W<u32, Reg<u32, _MPCBB1_VCTR40>>[src]

pub fn b1280(&mut self) -> B1280_W<'_>[src]

Bit 0 - B1280

pub fn b1281(&mut self) -> B1281_W<'_>[src]

Bit 1 - B1281

pub fn b1282(&mut self) -> B1282_W<'_>[src]

Bit 2 - B1282

pub fn b1283(&mut self) -> B1283_W<'_>[src]

Bit 3 - B1283

pub fn b1284(&mut self) -> B1284_W<'_>[src]

Bit 4 - B1284

pub fn b1285(&mut self) -> B1285_W<'_>[src]

Bit 5 - B1285

pub fn b1286(&mut self) -> B1286_W<'_>[src]

Bit 6 - B1286

pub fn b1287(&mut self) -> B1287_W<'_>[src]

Bit 7 - B1287

pub fn b1288(&mut self) -> B1288_W<'_>[src]

Bit 8 - B1288

pub fn b1289(&mut self) -> B1289_W<'_>[src]

Bit 9 - B1289

pub fn b1290(&mut self) -> B1290_W<'_>[src]

Bit 10 - B1290

pub fn b1291(&mut self) -> B1291_W<'_>[src]

Bit 11 - B1291

pub fn b1292(&mut self) -> B1292_W<'_>[src]

Bit 12 - B1292

pub fn b1293(&mut self) -> B1293_W<'_>[src]

Bit 13 - B1293

pub fn b1294(&mut self) -> B1294_W<'_>[src]

Bit 14 - B1294

pub fn b1295(&mut self) -> B1295_W<'_>[src]

Bit 15 - B1295

pub fn b1296(&mut self) -> B1296_W<'_>[src]

Bit 16 - B1296

pub fn b1297(&mut self) -> B1297_W<'_>[src]

Bit 17 - B1297

pub fn b1298(&mut self) -> B1298_W<'_>[src]

Bit 18 - B1298

pub fn b1299(&mut self) -> B1299_W<'_>[src]

Bit 19 - B1299

pub fn b1300(&mut self) -> B1300_W<'_>[src]

Bit 20 - B1300

pub fn b1301(&mut self) -> B1301_W<'_>[src]

Bit 21 - B1301

pub fn b1302(&mut self) -> B1302_W<'_>[src]

Bit 22 - B1302

pub fn b1303(&mut self) -> B1303_W<'_>[src]

Bit 23 - B1303

pub fn b1304(&mut self) -> B1304_W<'_>[src]

Bit 24 - B1304

pub fn b1305(&mut self) -> B1305_W<'_>[src]

Bit 25 - B1305

pub fn b1306(&mut self) -> B1306_W<'_>[src]

Bit 26 - B1306

pub fn b1307(&mut self) -> B1307_W<'_>[src]

Bit 27 - B1307

pub fn b1308(&mut self) -> B1308_W<'_>[src]

Bit 28 - B1308

pub fn b1309(&mut self) -> B1309_W<'_>[src]

Bit 29 - B1309

pub fn b1310(&mut self) -> B1310_W<'_>[src]

Bit 30 - B1310

pub fn b1311(&mut self) -> B1311_W<'_>[src]

Bit 31 - B1311

impl W<u32, Reg<u32, _MPCBB1_VCTR41>>[src]

pub fn b1312(&mut self) -> B1312_W<'_>[src]

Bit 0 - B1312

pub fn b1313(&mut self) -> B1313_W<'_>[src]

Bit 1 - B1313

pub fn b1314(&mut self) -> B1314_W<'_>[src]

Bit 2 - B1314

pub fn b1315(&mut self) -> B1315_W<'_>[src]

Bit 3 - B1315

pub fn b1316(&mut self) -> B1316_W<'_>[src]

Bit 4 - B1316

pub fn b1317(&mut self) -> B1317_W<'_>[src]

Bit 5 - B1317

pub fn b1318(&mut self) -> B1318_W<'_>[src]

Bit 6 - B1318

pub fn b1319(&mut self) -> B1319_W<'_>[src]

Bit 7 - B1319

pub fn b1320(&mut self) -> B1320_W<'_>[src]

Bit 8 - B1320

pub fn b1321(&mut self) -> B1321_W<'_>[src]

Bit 9 - B1321

pub fn b1322(&mut self) -> B1322_W<'_>[src]

Bit 10 - B1322

pub fn b1323(&mut self) -> B1323_W<'_>[src]

Bit 11 - B1323

pub fn b1324(&mut self) -> B1324_W<'_>[src]

Bit 12 - B1324

pub fn b1325(&mut self) -> B1325_W<'_>[src]

Bit 13 - B1325

pub fn b1326(&mut self) -> B1326_W<'_>[src]

Bit 14 - B1326

pub fn b1327(&mut self) -> B1327_W<'_>[src]

Bit 15 - B1327

pub fn b1328(&mut self) -> B1328_W<'_>[src]

Bit 16 - B1328

pub fn b1329(&mut self) -> B1329_W<'_>[src]

Bit 17 - B1329

pub fn b1330(&mut self) -> B1330_W<'_>[src]

Bit 18 - B1330

pub fn b1331(&mut self) -> B1331_W<'_>[src]

Bit 19 - B1331

pub fn b1332(&mut self) -> B1332_W<'_>[src]

Bit 20 - B1332

pub fn b1333(&mut self) -> B1333_W<'_>[src]

Bit 21 - B1333

pub fn b1334(&mut self) -> B1334_W<'_>[src]

Bit 22 - B1334

pub fn b1335(&mut self) -> B1335_W<'_>[src]

Bit 23 - B1335

pub fn b1336(&mut self) -> B1336_W<'_>[src]

Bit 24 - B1336

pub fn b1337(&mut self) -> B1337_W<'_>[src]

Bit 25 - B1337

pub fn b1338(&mut self) -> B1338_W<'_>[src]

Bit 26 - B1338

pub fn b1339(&mut self) -> B1339_W<'_>[src]

Bit 27 - B1339

pub fn b1340(&mut self) -> B1340_W<'_>[src]

Bit 28 - B1340

pub fn b1341(&mut self) -> B1341_W<'_>[src]

Bit 29 - B1341

pub fn b1342(&mut self) -> B1342_W<'_>[src]

Bit 30 - B1342

pub fn b1343(&mut self) -> B1343_W<'_>[src]

Bit 31 - B1343

impl W<u32, Reg<u32, _MPCBB1_VCTR42>>[src]

pub fn b1344(&mut self) -> B1344_W<'_>[src]

Bit 0 - B1344

pub fn b1345(&mut self) -> B1345_W<'_>[src]

Bit 1 - B1345

pub fn b1346(&mut self) -> B1346_W<'_>[src]

Bit 2 - B1346

pub fn b1347(&mut self) -> B1347_W<'_>[src]

Bit 3 - B1347

pub fn b1348(&mut self) -> B1348_W<'_>[src]

Bit 4 - B1348

pub fn b1349(&mut self) -> B1349_W<'_>[src]

Bit 5 - B1349

pub fn b1350(&mut self) -> B1350_W<'_>[src]

Bit 6 - B1350

pub fn b1351(&mut self) -> B1351_W<'_>[src]

Bit 7 - B1351

pub fn b1352(&mut self) -> B1352_W<'_>[src]

Bit 8 - B1352

pub fn b1353(&mut self) -> B1353_W<'_>[src]

Bit 9 - B1353

pub fn b1354(&mut self) -> B1354_W<'_>[src]

Bit 10 - B1354

pub fn b1355(&mut self) -> B1355_W<'_>[src]

Bit 11 - B1355

pub fn b1356(&mut self) -> B1356_W<'_>[src]

Bit 12 - B1356

pub fn b1357(&mut self) -> B1357_W<'_>[src]

Bit 13 - B1357

pub fn b1358(&mut self) -> B1358_W<'_>[src]

Bit 14 - B1358

pub fn b1359(&mut self) -> B1359_W<'_>[src]

Bit 15 - B1359

pub fn b1360(&mut self) -> B1360_W<'_>[src]

Bit 16 - B1360

pub fn b1361(&mut self) -> B1361_W<'_>[src]

Bit 17 - B1361

pub fn b1362(&mut self) -> B1362_W<'_>[src]

Bit 18 - B1362

pub fn b1363(&mut self) -> B1363_W<'_>[src]

Bit 19 - B1363

pub fn b1364(&mut self) -> B1364_W<'_>[src]

Bit 20 - B1364

pub fn b1365(&mut self) -> B1365_W<'_>[src]

Bit 21 - B1365

pub fn b1366(&mut self) -> B1366_W<'_>[src]

Bit 22 - B1366

pub fn b1367(&mut self) -> B1367_W<'_>[src]

Bit 23 - B1367

pub fn b1368(&mut self) -> B1368_W<'_>[src]

Bit 24 - B1368

pub fn b1369(&mut self) -> B1369_W<'_>[src]

Bit 25 - B1369

pub fn b1370(&mut self) -> B1370_W<'_>[src]

Bit 26 - B1370

pub fn b1371(&mut self) -> B1371_W<'_>[src]

Bit 27 - B1371

pub fn b1372(&mut self) -> B1372_W<'_>[src]

Bit 28 - B1372

pub fn b1373(&mut self) -> B1373_W<'_>[src]

Bit 29 - B1373

pub fn b1374(&mut self) -> B1374_W<'_>[src]

Bit 30 - B1374

pub fn b1375(&mut self) -> B1375_W<'_>[src]

Bit 31 - B1375

impl W<u32, Reg<u32, _MPCBB1_VCTR43>>[src]

pub fn b1376(&mut self) -> B1376_W<'_>[src]

Bit 0 - B1376

pub fn b1377(&mut self) -> B1377_W<'_>[src]

Bit 1 - B1377

pub fn b1378(&mut self) -> B1378_W<'_>[src]

Bit 2 - B1378

pub fn b1379(&mut self) -> B1379_W<'_>[src]

Bit 3 - B1379

pub fn b1380(&mut self) -> B1380_W<'_>[src]

Bit 4 - B1380

pub fn b1381(&mut self) -> B1381_W<'_>[src]

Bit 5 - B1381

pub fn b1382(&mut self) -> B1382_W<'_>[src]

Bit 6 - B1382

pub fn b1383(&mut self) -> B1383_W<'_>[src]

Bit 7 - B1383

pub fn b1384(&mut self) -> B1384_W<'_>[src]

Bit 8 - B1384

pub fn b1385(&mut self) -> B1385_W<'_>[src]

Bit 9 - B1385

pub fn b1386(&mut self) -> B1386_W<'_>[src]

Bit 10 - B1386

pub fn b1387(&mut self) -> B1387_W<'_>[src]

Bit 11 - B1387

pub fn b1388(&mut self) -> B1388_W<'_>[src]

Bit 12 - B1388

pub fn b1389(&mut self) -> B1389_W<'_>[src]

Bit 13 - B1389

pub fn b1390(&mut self) -> B1390_W<'_>[src]

Bit 14 - B1390

pub fn b1391(&mut self) -> B1391_W<'_>[src]

Bit 15 - B1391

pub fn b1392(&mut self) -> B1392_W<'_>[src]

Bit 16 - B1392

pub fn b1393(&mut self) -> B1393_W<'_>[src]

Bit 17 - B1393

pub fn b1394(&mut self) -> B1394_W<'_>[src]

Bit 18 - B1394

pub fn b1395(&mut self) -> B1395_W<'_>[src]

Bit 19 - B1395

pub fn b1396(&mut self) -> B1396_W<'_>[src]

Bit 20 - B1396

pub fn b1397(&mut self) -> B1397_W<'_>[src]

Bit 21 - B1397

pub fn b1398(&mut self) -> B1398_W<'_>[src]

Bit 22 - B1398

pub fn b1399(&mut self) -> B1399_W<'_>[src]

Bit 23 - B1399

pub fn b1400(&mut self) -> B1400_W<'_>[src]

Bit 24 - B1400

pub fn b1401(&mut self) -> B1401_W<'_>[src]

Bit 25 - B1401

pub fn b1402(&mut self) -> B1402_W<'_>[src]

Bit 26 - B1402

pub fn b1403(&mut self) -> B1403_W<'_>[src]

Bit 27 - B1403

pub fn b1404(&mut self) -> B1404_W<'_>[src]

Bit 28 - B1404

pub fn b1405(&mut self) -> B1405_W<'_>[src]

Bit 29 - B1405

pub fn b1406(&mut self) -> B1406_W<'_>[src]

Bit 30 - B1406

pub fn b1407(&mut self) -> B1407_W<'_>[src]

Bit 31 - B1407

impl W<u32, Reg<u32, _MPCBB1_VCTR44>>[src]

pub fn b1408(&mut self) -> B1408_W<'_>[src]

Bit 0 - B1408

pub fn b1409(&mut self) -> B1409_W<'_>[src]

Bit 1 - B1409

pub fn b1410(&mut self) -> B1410_W<'_>[src]

Bit 2 - B1410

pub fn b1411(&mut self) -> B1411_W<'_>[src]

Bit 3 - B1411

pub fn b1412(&mut self) -> B1412_W<'_>[src]

Bit 4 - B1412

pub fn b1413(&mut self) -> B1413_W<'_>[src]

Bit 5 - B1413

pub fn b1414(&mut self) -> B1414_W<'_>[src]

Bit 6 - B1414

pub fn b1415(&mut self) -> B1415_W<'_>[src]

Bit 7 - B1415

pub fn b1416(&mut self) -> B1416_W<'_>[src]

Bit 8 - B1416

pub fn b1417(&mut self) -> B1417_W<'_>[src]

Bit 9 - B1417

pub fn b1418(&mut self) -> B1418_W<'_>[src]

Bit 10 - B1418

pub fn b1419(&mut self) -> B1419_W<'_>[src]

Bit 11 - B1419

pub fn b1420(&mut self) -> B1420_W<'_>[src]

Bit 12 - B1420

pub fn b1421(&mut self) -> B1421_W<'_>[src]

Bit 13 - B1421

pub fn b1422(&mut self) -> B1422_W<'_>[src]

Bit 14 - B1422

pub fn b1423(&mut self) -> B1423_W<'_>[src]

Bit 15 - B1423

pub fn b1424(&mut self) -> B1424_W<'_>[src]

Bit 16 - B1424

pub fn b1425(&mut self) -> B1425_W<'_>[src]

Bit 17 - B1425

pub fn b1426(&mut self) -> B1426_W<'_>[src]

Bit 18 - B1426

pub fn b1427(&mut self) -> B1427_W<'_>[src]

Bit 19 - B1427

pub fn b1428(&mut self) -> B1428_W<'_>[src]

Bit 20 - B1428

pub fn b1429(&mut self) -> B1429_W<'_>[src]

Bit 21 - B1429

pub fn b1430(&mut self) -> B1430_W<'_>[src]

Bit 22 - B1430

pub fn b1431(&mut self) -> B1431_W<'_>[src]

Bit 23 - B1431

pub fn b1432(&mut self) -> B1432_W<'_>[src]

Bit 24 - B1432

pub fn b1433(&mut self) -> B1433_W<'_>[src]

Bit 25 - B1433

pub fn b1434(&mut self) -> B1434_W<'_>[src]

Bit 26 - B1434

pub fn b1435(&mut self) -> B1435_W<'_>[src]

Bit 27 - B1435

pub fn b1436(&mut self) -> B1436_W<'_>[src]

Bit 28 - B1436

pub fn b1437(&mut self) -> B1437_W<'_>[src]

Bit 29 - B1437

pub fn b1438(&mut self) -> B1438_W<'_>[src]

Bit 30 - B1438

pub fn b1439(&mut self) -> B1439_W<'_>[src]

Bit 31 - B1439

impl W<u32, Reg<u32, _MPCBB1_VCTR45>>[src]

pub fn b1440(&mut self) -> B1440_W<'_>[src]

Bit 0 - B1440

pub fn b1441(&mut self) -> B1441_W<'_>[src]

Bit 1 - B1441

pub fn b1442(&mut self) -> B1442_W<'_>[src]

Bit 2 - B1442

pub fn b1443(&mut self) -> B1443_W<'_>[src]

Bit 3 - B1443

pub fn b1444(&mut self) -> B1444_W<'_>[src]

Bit 4 - B1444

pub fn b1445(&mut self) -> B1445_W<'_>[src]

Bit 5 - B1445

pub fn b1446(&mut self) -> B1446_W<'_>[src]

Bit 6 - B1446

pub fn b1447(&mut self) -> B1447_W<'_>[src]

Bit 7 - B1447

pub fn b1448(&mut self) -> B1448_W<'_>[src]

Bit 8 - B1448

pub fn b1449(&mut self) -> B1449_W<'_>[src]

Bit 9 - B1449

pub fn b1450(&mut self) -> B1450_W<'_>[src]

Bit 10 - B1450

pub fn b1451(&mut self) -> B1451_W<'_>[src]

Bit 11 - B1451

pub fn b1452(&mut self) -> B1452_W<'_>[src]

Bit 12 - B1452

pub fn b1453(&mut self) -> B1453_W<'_>[src]

Bit 13 - B1453

pub fn b1454(&mut self) -> B1454_W<'_>[src]

Bit 14 - B1454

pub fn b1455(&mut self) -> B1455_W<'_>[src]

Bit 15 - B1455

pub fn b1456(&mut self) -> B1456_W<'_>[src]

Bit 16 - B1456

pub fn b1457(&mut self) -> B1457_W<'_>[src]

Bit 17 - B1457

pub fn b1458(&mut self) -> B1458_W<'_>[src]

Bit 18 - B1458

pub fn b1459(&mut self) -> B1459_W<'_>[src]

Bit 19 - B1459

pub fn b1460(&mut self) -> B1460_W<'_>[src]

Bit 20 - B1460

pub fn b1461(&mut self) -> B1461_W<'_>[src]

Bit 21 - B1461

pub fn b1462(&mut self) -> B1462_W<'_>[src]

Bit 22 - B1462

pub fn b1463(&mut self) -> B1463_W<'_>[src]

Bit 23 - B1463

pub fn b1464(&mut self) -> B1464_W<'_>[src]

Bit 24 - B1464

pub fn b1465(&mut self) -> B1465_W<'_>[src]

Bit 25 - B1465

pub fn b1466(&mut self) -> B1466_W<'_>[src]

Bit 26 - B1466

pub fn b1467(&mut self) -> B1467_W<'_>[src]

Bit 27 - B1467

pub fn b1468(&mut self) -> B1468_W<'_>[src]

Bit 28 - B1468

pub fn b1469(&mut self) -> B1469_W<'_>[src]

Bit 29 - B1469

pub fn b1470(&mut self) -> B1470_W<'_>[src]

Bit 30 - B1470

pub fn b1471(&mut self) -> B1471_W<'_>[src]

Bit 31 - B1471

impl W<u32, Reg<u32, _MPCBB1_VCTR46>>[src]

pub fn b1472(&mut self) -> B1472_W<'_>[src]

Bit 0 - B1472

pub fn b1473(&mut self) -> B1473_W<'_>[src]

Bit 1 - B1473

pub fn b1474(&mut self) -> B1474_W<'_>[src]

Bit 2 - B1474

pub fn b1475(&mut self) -> B1475_W<'_>[src]

Bit 3 - B1475

pub fn b1476(&mut self) -> B1476_W<'_>[src]

Bit 4 - B1476

pub fn b1477(&mut self) -> B1477_W<'_>[src]

Bit 5 - B1477

pub fn b1478(&mut self) -> B1478_W<'_>[src]

Bit 6 - B1478

pub fn b1479(&mut self) -> B1479_W<'_>[src]

Bit 7 - B1479

pub fn b1480(&mut self) -> B1480_W<'_>[src]

Bit 8 - B1480

pub fn b1481(&mut self) -> B1481_W<'_>[src]

Bit 9 - B1481

pub fn b1482(&mut self) -> B1482_W<'_>[src]

Bit 10 - B1482

pub fn b1483(&mut self) -> B1483_W<'_>[src]

Bit 11 - B1483

pub fn b1484(&mut self) -> B1484_W<'_>[src]

Bit 12 - B1484

pub fn b1485(&mut self) -> B1485_W<'_>[src]

Bit 13 - B1485

pub fn b1486(&mut self) -> B1486_W<'_>[src]

Bit 14 - B1486

pub fn b1487(&mut self) -> B1487_W<'_>[src]

Bit 15 - B1487

pub fn b1488(&mut self) -> B1488_W<'_>[src]

Bit 16 - B1488

pub fn b1489(&mut self) -> B1489_W<'_>[src]

Bit 17 - B1489

pub fn b1490(&mut self) -> B1490_W<'_>[src]

Bit 18 - B1490

pub fn b1491(&mut self) -> B1491_W<'_>[src]

Bit 19 - B1491

pub fn b1492(&mut self) -> B1492_W<'_>[src]

Bit 20 - B1492

pub fn b1493(&mut self) -> B1493_W<'_>[src]

Bit 21 - B1493

pub fn b1494(&mut self) -> B1494_W<'_>[src]

Bit 22 - B1494

pub fn b1495(&mut self) -> B1495_W<'_>[src]

Bit 23 - B1495

pub fn b1496(&mut self) -> B1496_W<'_>[src]

Bit 24 - B1496

pub fn b1497(&mut self) -> B1497_W<'_>[src]

Bit 25 - B1497

pub fn b1498(&mut self) -> B1498_W<'_>[src]

Bit 26 - B1498

pub fn b1499(&mut self) -> B1499_W<'_>[src]

Bit 27 - B1499

pub fn b1500(&mut self) -> B1500_W<'_>[src]

Bit 28 - B1500

pub fn b1501(&mut self) -> B1501_W<'_>[src]

Bit 29 - B1501

pub fn b1502(&mut self) -> B1502_W<'_>[src]

Bit 30 - B1502

pub fn b1503(&mut self) -> B1503_W<'_>[src]

Bit 31 - B1503

impl W<u32, Reg<u32, _MPCBB1_VCTR47>>[src]

pub fn b1504(&mut self) -> B1504_W<'_>[src]

Bit 0 - B1504

pub fn b1505(&mut self) -> B1505_W<'_>[src]

Bit 1 - B1505

pub fn b1506(&mut self) -> B1506_W<'_>[src]

Bit 2 - B1506

pub fn b1507(&mut self) -> B1507_W<'_>[src]

Bit 3 - B1507

pub fn b1508(&mut self) -> B1508_W<'_>[src]

Bit 4 - B1508

pub fn b1509(&mut self) -> B1509_W<'_>[src]

Bit 5 - B1509

pub fn b1510(&mut self) -> B1510_W<'_>[src]

Bit 6 - B1510

pub fn b1511(&mut self) -> B1511_W<'_>[src]

Bit 7 - B1511

pub fn b1512(&mut self) -> B1512_W<'_>[src]

Bit 8 - B1512

pub fn b1513(&mut self) -> B1513_W<'_>[src]

Bit 9 - B1513

pub fn b1514(&mut self) -> B1514_W<'_>[src]

Bit 10 - B1514

pub fn b1515(&mut self) -> B1515_W<'_>[src]

Bit 11 - B1515

pub fn b1516(&mut self) -> B1516_W<'_>[src]

Bit 12 - B1516

pub fn b1517(&mut self) -> B1517_W<'_>[src]

Bit 13 - B1517

pub fn b1518(&mut self) -> B1518_W<'_>[src]

Bit 14 - B1518

pub fn b1519(&mut self) -> B1519_W<'_>[src]

Bit 15 - B1519

pub fn b1520(&mut self) -> B1520_W<'_>[src]

Bit 16 - B1520

pub fn b1521(&mut self) -> B1521_W<'_>[src]

Bit 17 - B1521

pub fn b1522(&mut self) -> B1522_W<'_>[src]

Bit 18 - B1522

pub fn b1523(&mut self) -> B1523_W<'_>[src]

Bit 19 - B1523

pub fn b1524(&mut self) -> B1524_W<'_>[src]

Bit 20 - B1524

pub fn b1525(&mut self) -> B1525_W<'_>[src]

Bit 21 - B1525

pub fn b1526(&mut self) -> B1526_W<'_>[src]

Bit 22 - B1526

pub fn b1527(&mut self) -> B1527_W<'_>[src]

Bit 23 - B1527

pub fn b1528(&mut self) -> B1528_W<'_>[src]

Bit 24 - B1528

pub fn b1529(&mut self) -> B1529_W<'_>[src]

Bit 25 - B1529

pub fn b1530(&mut self) -> B1530_W<'_>[src]

Bit 26 - B1530

pub fn b1531(&mut self) -> B1531_W<'_>[src]

Bit 27 - B1531

pub fn b1532(&mut self) -> B1532_W<'_>[src]

Bit 28 - B1532

pub fn b1533(&mut self) -> B1533_W<'_>[src]

Bit 29 - B1533

pub fn b1534(&mut self) -> B1534_W<'_>[src]

Bit 30 - B1534

pub fn b1535(&mut self) -> B1535_W<'_>[src]

Bit 31 - B1535

impl W<u32, Reg<u32, _MPCBB1_VCTR48>>[src]

pub fn b1536(&mut self) -> B1536_W<'_>[src]

Bit 0 - B1536

pub fn b1537(&mut self) -> B1537_W<'_>[src]

Bit 1 - B1537

pub fn b1538(&mut self) -> B1538_W<'_>[src]

Bit 2 - B1538

pub fn b1539(&mut self) -> B1539_W<'_>[src]

Bit 3 - B1539

pub fn b1540(&mut self) -> B1540_W<'_>[src]

Bit 4 - B1540

pub fn b1541(&mut self) -> B1541_W<'_>[src]

Bit 5 - B1541

pub fn b1542(&mut self) -> B1542_W<'_>[src]

Bit 6 - B1542

pub fn b1543(&mut self) -> B1543_W<'_>[src]

Bit 7 - B1543

pub fn b1544(&mut self) -> B1544_W<'_>[src]

Bit 8 - B1544

pub fn b1545(&mut self) -> B1545_W<'_>[src]

Bit 9 - B1545

pub fn b1546(&mut self) -> B1546_W<'_>[src]

Bit 10 - B1546

pub fn b1547(&mut self) -> B1547_W<'_>[src]

Bit 11 - B1547

pub fn b1548(&mut self) -> B1548_W<'_>[src]

Bit 12 - B1548

pub fn b1549(&mut self) -> B1549_W<'_>[src]

Bit 13 - B1549

pub fn b1550(&mut self) -> B1550_W<'_>[src]

Bit 14 - B1550

pub fn b1551(&mut self) -> B1551_W<'_>[src]

Bit 15 - B1551

pub fn b1552(&mut self) -> B1552_W<'_>[src]

Bit 16 - B1552

pub fn b1553(&mut self) -> B1553_W<'_>[src]

Bit 17 - B1553

pub fn b1554(&mut self) -> B1554_W<'_>[src]

Bit 18 - B1554

pub fn b1555(&mut self) -> B1555_W<'_>[src]

Bit 19 - B1555

pub fn b1556(&mut self) -> B1556_W<'_>[src]

Bit 20 - B1556

pub fn b1557(&mut self) -> B1557_W<'_>[src]

Bit 21 - B1557

pub fn b1558(&mut self) -> B1558_W<'_>[src]

Bit 22 - B1558

pub fn b1559(&mut self) -> B1559_W<'_>[src]

Bit 23 - B1559

pub fn b1560(&mut self) -> B1560_W<'_>[src]

Bit 24 - B1560

pub fn b1561(&mut self) -> B1561_W<'_>[src]

Bit 25 - B1561

pub fn b1562(&mut self) -> B1562_W<'_>[src]

Bit 26 - B1562

pub fn b1563(&mut self) -> B1563_W<'_>[src]

Bit 27 - B1563

pub fn b1564(&mut self) -> B1564_W<'_>[src]

Bit 28 - B1564

pub fn b1565(&mut self) -> B1565_W<'_>[src]

Bit 29 - B1565

pub fn b1566(&mut self) -> B1566_W<'_>[src]

Bit 30 - B1566

pub fn b1567(&mut self) -> B1567_W<'_>[src]

Bit 31 - B1567

impl W<u32, Reg<u32, _MPCBB1_VCTR49>>[src]

pub fn b1568(&mut self) -> B1568_W<'_>[src]

Bit 0 - B1568

pub fn b1569(&mut self) -> B1569_W<'_>[src]

Bit 1 - B1569

pub fn b1570(&mut self) -> B1570_W<'_>[src]

Bit 2 - B1570

pub fn b1571(&mut self) -> B1571_W<'_>[src]

Bit 3 - B1571

pub fn b1572(&mut self) -> B1572_W<'_>[src]

Bit 4 - B1572

pub fn b1573(&mut self) -> B1573_W<'_>[src]

Bit 5 - B1573

pub fn b1574(&mut self) -> B1574_W<'_>[src]

Bit 6 - B1574

pub fn b1575(&mut self) -> B1575_W<'_>[src]

Bit 7 - B1575

pub fn b1576(&mut self) -> B1576_W<'_>[src]

Bit 8 - B1576

pub fn b1577(&mut self) -> B1577_W<'_>[src]

Bit 9 - B1577

pub fn b1578(&mut self) -> B1578_W<'_>[src]

Bit 10 - B1578

pub fn b1579(&mut self) -> B1579_W<'_>[src]

Bit 11 - B1579

pub fn b1580(&mut self) -> B1580_W<'_>[src]

Bit 12 - B1580

pub fn b1581(&mut self) -> B1581_W<'_>[src]

Bit 13 - B1581

pub fn b1582(&mut self) -> B1582_W<'_>[src]

Bit 14 - B1582

pub fn b1583(&mut self) -> B1583_W<'_>[src]

Bit 15 - B1583

pub fn b1584(&mut self) -> B1584_W<'_>[src]

Bit 16 - B1584

pub fn b1585(&mut self) -> B1585_W<'_>[src]

Bit 17 - B1585

pub fn b1586(&mut self) -> B1586_W<'_>[src]

Bit 18 - B1586

pub fn b1587(&mut self) -> B1587_W<'_>[src]

Bit 19 - B1587

pub fn b1588(&mut self) -> B1588_W<'_>[src]

Bit 20 - B1588

pub fn b1589(&mut self) -> B1589_W<'_>[src]

Bit 21 - B1589

pub fn b1590(&mut self) -> B1590_W<'_>[src]

Bit 22 - B1590

pub fn b1591(&mut self) -> B1591_W<'_>[src]

Bit 23 - B1591

pub fn b1592(&mut self) -> B1592_W<'_>[src]

Bit 24 - B1592

pub fn b1593(&mut self) -> B1593_W<'_>[src]

Bit 25 - B1593

pub fn b1594(&mut self) -> B1594_W<'_>[src]

Bit 26 - B1594

pub fn b1595(&mut self) -> B1595_W<'_>[src]

Bit 27 - B1595

pub fn b1596(&mut self) -> B1596_W<'_>[src]

Bit 28 - B1596

pub fn b1597(&mut self) -> B1597_W<'_>[src]

Bit 29 - B1597

pub fn b1598(&mut self) -> B1598_W<'_>[src]

Bit 30 - B1598

pub fn b1599(&mut self) -> B1599_W<'_>[src]

Bit 31 - B1599

impl W<u32, Reg<u32, _MPCBB1_VCTR50>>[src]

pub fn b1600(&mut self) -> B1600_W<'_>[src]

Bit 0 - B1600

pub fn b1601(&mut self) -> B1601_W<'_>[src]

Bit 1 - B1601

pub fn b1602(&mut self) -> B1602_W<'_>[src]

Bit 2 - B1602

pub fn b1603(&mut self) -> B1603_W<'_>[src]

Bit 3 - B1603

pub fn b1604(&mut self) -> B1604_W<'_>[src]

Bit 4 - B1604

pub fn b1605(&mut self) -> B1605_W<'_>[src]

Bit 5 - B1605

pub fn b1606(&mut self) -> B1606_W<'_>[src]

Bit 6 - B1606

pub fn b1607(&mut self) -> B1607_W<'_>[src]

Bit 7 - B1607

pub fn b1608(&mut self) -> B1608_W<'_>[src]

Bit 8 - B1608

pub fn b1609(&mut self) -> B1609_W<'_>[src]

Bit 9 - B1609

pub fn b1610(&mut self) -> B1610_W<'_>[src]

Bit 10 - B1610

pub fn b1611(&mut self) -> B1611_W<'_>[src]

Bit 11 - B1611

pub fn b1612(&mut self) -> B1612_W<'_>[src]

Bit 12 - B1612

pub fn b1613(&mut self) -> B1613_W<'_>[src]

Bit 13 - B1613

pub fn b1614(&mut self) -> B1614_W<'_>[src]

Bit 14 - B1614

pub fn b1615(&mut self) -> B1615_W<'_>[src]

Bit 15 - B1615

pub fn b1616(&mut self) -> B1616_W<'_>[src]

Bit 16 - B1616

pub fn b1617(&mut self) -> B1617_W<'_>[src]

Bit 17 - B1617

pub fn b1618(&mut self) -> B1618_W<'_>[src]

Bit 18 - B1618

pub fn b1619(&mut self) -> B1619_W<'_>[src]

Bit 19 - B1619

pub fn b1620(&mut self) -> B1620_W<'_>[src]

Bit 20 - B1620

pub fn b1621(&mut self) -> B1621_W<'_>[src]

Bit 21 - B1621

pub fn b1622(&mut self) -> B1622_W<'_>[src]

Bit 22 - B1622

pub fn b1623(&mut self) -> B1623_W<'_>[src]

Bit 23 - B1623

pub fn b1624(&mut self) -> B1624_W<'_>[src]

Bit 24 - B1624

pub fn b1625(&mut self) -> B1625_W<'_>[src]

Bit 25 - B1625

pub fn b1626(&mut self) -> B1626_W<'_>[src]

Bit 26 - B1626

pub fn b1627(&mut self) -> B1627_W<'_>[src]

Bit 27 - B1627

pub fn b1628(&mut self) -> B1628_W<'_>[src]

Bit 28 - B1628

pub fn b1629(&mut self) -> B1629_W<'_>[src]

Bit 29 - B1629

pub fn b1630(&mut self) -> B1630_W<'_>[src]

Bit 30 - B1630

pub fn b1631(&mut self) -> B1631_W<'_>[src]

Bit 31 - B1631

impl W<u32, Reg<u32, _MPCBB1_VCTR51>>[src]

pub fn b1632(&mut self) -> B1632_W<'_>[src]

Bit 0 - B1632

pub fn b1633(&mut self) -> B1633_W<'_>[src]

Bit 1 - B1633

pub fn b1634(&mut self) -> B1634_W<'_>[src]

Bit 2 - B1634

pub fn b1635(&mut self) -> B1635_W<'_>[src]

Bit 3 - B1635

pub fn b1636(&mut self) -> B1636_W<'_>[src]

Bit 4 - B1636

pub fn b1637(&mut self) -> B1637_W<'_>[src]

Bit 5 - B1637

pub fn b1638(&mut self) -> B1638_W<'_>[src]

Bit 6 - B1638

pub fn b1639(&mut self) -> B1639_W<'_>[src]

Bit 7 - B1639

pub fn b1640(&mut self) -> B1640_W<'_>[src]

Bit 8 - B1640

pub fn b1641(&mut self) -> B1641_W<'_>[src]

Bit 9 - B1641

pub fn b1642(&mut self) -> B1642_W<'_>[src]

Bit 10 - B1642

pub fn b1643(&mut self) -> B1643_W<'_>[src]

Bit 11 - B1643

pub fn b1644(&mut self) -> B1644_W<'_>[src]

Bit 12 - B1644

pub fn b1645(&mut self) -> B1645_W<'_>[src]

Bit 13 - B1645

pub fn b1646(&mut self) -> B1646_W<'_>[src]

Bit 14 - B1646

pub fn b1647(&mut self) -> B1647_W<'_>[src]

Bit 15 - B1647

pub fn b1648(&mut self) -> B1648_W<'_>[src]

Bit 16 - B1648

pub fn b1649(&mut self) -> B1649_W<'_>[src]

Bit 17 - B1649

pub fn b1650(&mut self) -> B1650_W<'_>[src]

Bit 18 - B1650

pub fn b1651(&mut self) -> B1651_W<'_>[src]

Bit 19 - B1651

pub fn b1652(&mut self) -> B1652_W<'_>[src]

Bit 20 - B1652

pub fn b1653(&mut self) -> B1653_W<'_>[src]

Bit 21 - B1653

pub fn b1654(&mut self) -> B1654_W<'_>[src]

Bit 22 - B1654

pub fn b1655(&mut self) -> B1655_W<'_>[src]

Bit 23 - B1655

pub fn b1656(&mut self) -> B1656_W<'_>[src]

Bit 24 - B1656

pub fn b1657(&mut self) -> B1657_W<'_>[src]

Bit 25 - B1657

pub fn b1658(&mut self) -> B1658_W<'_>[src]

Bit 26 - B1658

pub fn b1659(&mut self) -> B1659_W<'_>[src]

Bit 27 - B1659

pub fn b1660(&mut self) -> B1660_W<'_>[src]

Bit 28 - B1660

pub fn b1661(&mut self) -> B1661_W<'_>[src]

Bit 29 - B1661

pub fn b1662(&mut self) -> B1662_W<'_>[src]

Bit 30 - B1662

pub fn b1663(&mut self) -> B1663_W<'_>[src]

Bit 31 - B1663

impl W<u32, Reg<u32, _MPCBB1_VCTR52>>[src]

pub fn b1664(&mut self) -> B1664_W<'_>[src]

Bit 0 - B1664

pub fn b1665(&mut self) -> B1665_W<'_>[src]

Bit 1 - B1665

pub fn b1666(&mut self) -> B1666_W<'_>[src]

Bit 2 - B1666

pub fn b1667(&mut self) -> B1667_W<'_>[src]

Bit 3 - B1667

pub fn b1668(&mut self) -> B1668_W<'_>[src]

Bit 4 - B1668

pub fn b1669(&mut self) -> B1669_W<'_>[src]

Bit 5 - B1669

pub fn b1670(&mut self) -> B1670_W<'_>[src]

Bit 6 - B1670

pub fn b1671(&mut self) -> B1671_W<'_>[src]

Bit 7 - B1671

pub fn b1672(&mut self) -> B1672_W<'_>[src]

Bit 8 - B1672

pub fn b1673(&mut self) -> B1673_W<'_>[src]

Bit 9 - B1673

pub fn b1674(&mut self) -> B1674_W<'_>[src]

Bit 10 - B1674

pub fn b1675(&mut self) -> B1675_W<'_>[src]

Bit 11 - B1675

pub fn b1676(&mut self) -> B1676_W<'_>[src]

Bit 12 - B1676

pub fn b1677(&mut self) -> B1677_W<'_>[src]

Bit 13 - B1677

pub fn b1678(&mut self) -> B1678_W<'_>[src]

Bit 14 - B1678

pub fn b1679(&mut self) -> B1679_W<'_>[src]

Bit 15 - B1679

pub fn b1680(&mut self) -> B1680_W<'_>[src]

Bit 16 - B1680

pub fn b1681(&mut self) -> B1681_W<'_>[src]

Bit 17 - B1681

pub fn b1682(&mut self) -> B1682_W<'_>[src]

Bit 18 - B1682

pub fn b1683(&mut self) -> B1683_W<'_>[src]

Bit 19 - B1683

pub fn b1684(&mut self) -> B1684_W<'_>[src]

Bit 20 - B1684

pub fn b1685(&mut self) -> B1685_W<'_>[src]

Bit 21 - B1685

pub fn b1686(&mut self) -> B1686_W<'_>[src]

Bit 22 - B1686

pub fn b1687(&mut self) -> B1687_W<'_>[src]

Bit 23 - B1687

pub fn b1688(&mut self) -> B1688_W<'_>[src]

Bit 24 - B1688

pub fn b1689(&mut self) -> B1689_W<'_>[src]

Bit 25 - B1689

pub fn b1690(&mut self) -> B1690_W<'_>[src]

Bit 26 - B1690

pub fn b1691(&mut self) -> B1691_W<'_>[src]

Bit 27 - B1691

pub fn b1692(&mut self) -> B1692_W<'_>[src]

Bit 28 - B1692

pub fn b1693(&mut self) -> B1693_W<'_>[src]

Bit 29 - B1693

pub fn b1694(&mut self) -> B1694_W<'_>[src]

Bit 30 - B1694

pub fn b1695(&mut self) -> B1695_W<'_>[src]

Bit 31 - B1695

impl W<u32, Reg<u32, _MPCBB1_VCTR53>>[src]

pub fn b1696(&mut self) -> B1696_W<'_>[src]

Bit 0 - B1696

pub fn b1697(&mut self) -> B1697_W<'_>[src]

Bit 1 - B1697

pub fn b1698(&mut self) -> B1698_W<'_>[src]

Bit 2 - B1698

pub fn b1699(&mut self) -> B1699_W<'_>[src]

Bit 3 - B1699

pub fn b1700(&mut self) -> B1700_W<'_>[src]

Bit 4 - B1700

pub fn b1701(&mut self) -> B1701_W<'_>[src]

Bit 5 - B1701

pub fn b1702(&mut self) -> B1702_W<'_>[src]

Bit 6 - B1702

pub fn b1703(&mut self) -> B1703_W<'_>[src]

Bit 7 - B1703

pub fn b1704(&mut self) -> B1704_W<'_>[src]

Bit 8 - B1704

pub fn b1705(&mut self) -> B1705_W<'_>[src]

Bit 9 - B1705

pub fn b1706(&mut self) -> B1706_W<'_>[src]

Bit 10 - B1706

pub fn b1707(&mut self) -> B1707_W<'_>[src]

Bit 11 - B1707

pub fn b1708(&mut self) -> B1708_W<'_>[src]

Bit 12 - B1708

pub fn b1709(&mut self) -> B1709_W<'_>[src]

Bit 13 - B1709

pub fn b1710(&mut self) -> B1710_W<'_>[src]

Bit 14 - B1710

pub fn b1711(&mut self) -> B1711_W<'_>[src]

Bit 15 - B1711

pub fn b1712(&mut self) -> B1712_W<'_>[src]

Bit 16 - B1712

pub fn b1713(&mut self) -> B1713_W<'_>[src]

Bit 17 - B1713

pub fn b1714(&mut self) -> B1714_W<'_>[src]

Bit 18 - B1714

pub fn b1715(&mut self) -> B1715_W<'_>[src]

Bit 19 - B1715

pub fn b1716(&mut self) -> B1716_W<'_>[src]

Bit 20 - B1716

pub fn b1717(&mut self) -> B1717_W<'_>[src]

Bit 21 - B1717

pub fn b1718(&mut self) -> B1718_W<'_>[src]

Bit 22 - B1718

pub fn b1719(&mut self) -> B1719_W<'_>[src]

Bit 23 - B1719

pub fn b1720(&mut self) -> B1720_W<'_>[src]

Bit 24 - B1720

pub fn b1721(&mut self) -> B1721_W<'_>[src]

Bit 25 - B1721

pub fn b1722(&mut self) -> B1722_W<'_>[src]

Bit 26 - B1722

pub fn b1723(&mut self) -> B1723_W<'_>[src]

Bit 27 - B1723

pub fn b1724(&mut self) -> B1724_W<'_>[src]

Bit 28 - B1724

pub fn b1725(&mut self) -> B1725_W<'_>[src]

Bit 29 - B1725

pub fn b1726(&mut self) -> B1726_W<'_>[src]

Bit 30 - B1726

pub fn b1727(&mut self) -> B1727_W<'_>[src]

Bit 31 - B1727

impl W<u32, Reg<u32, _MPCBB1_VCTR54>>[src]

pub fn b1728(&mut self) -> B1728_W<'_>[src]

Bit 0 - B1728

pub fn b1729(&mut self) -> B1729_W<'_>[src]

Bit 1 - B1729

pub fn b1730(&mut self) -> B1730_W<'_>[src]

Bit 2 - B1730

pub fn b1731(&mut self) -> B1731_W<'_>[src]

Bit 3 - B1731

pub fn b1732(&mut self) -> B1732_W<'_>[src]

Bit 4 - B1732

pub fn b1733(&mut self) -> B1733_W<'_>[src]

Bit 5 - B1733

pub fn b1734(&mut self) -> B1734_W<'_>[src]

Bit 6 - B1734

pub fn b1735(&mut self) -> B1735_W<'_>[src]

Bit 7 - B1735

pub fn b1736(&mut self) -> B1736_W<'_>[src]

Bit 8 - B1736

pub fn b1737(&mut self) -> B1737_W<'_>[src]

Bit 9 - B1737

pub fn b1738(&mut self) -> B1738_W<'_>[src]

Bit 10 - B1738

pub fn b1739(&mut self) -> B1739_W<'_>[src]

Bit 11 - B1739

pub fn b1740(&mut self) -> B1740_W<'_>[src]

Bit 12 - B1740

pub fn b1741(&mut self) -> B1741_W<'_>[src]

Bit 13 - B1741

pub fn b1742(&mut self) -> B1742_W<'_>[src]

Bit 14 - B1742

pub fn b1743(&mut self) -> B1743_W<'_>[src]

Bit 15 - B1743

pub fn b1744(&mut self) -> B1744_W<'_>[src]

Bit 16 - B1744

pub fn b1745(&mut self) -> B1745_W<'_>[src]

Bit 17 - B1745

pub fn b1746(&mut self) -> B1746_W<'_>[src]

Bit 18 - B1746

pub fn b1747(&mut self) -> B1747_W<'_>[src]

Bit 19 - B1747

pub fn b1748(&mut self) -> B1748_W<'_>[src]

Bit 20 - B1748

pub fn b1749(&mut self) -> B1749_W<'_>[src]

Bit 21 - B1749

pub fn b1750(&mut self) -> B1750_W<'_>[src]

Bit 22 - B1750

pub fn b1751(&mut self) -> B1751_W<'_>[src]

Bit 23 - B1751

pub fn b1752(&mut self) -> B1752_W<'_>[src]

Bit 24 - B1752

pub fn b1753(&mut self) -> B1753_W<'_>[src]

Bit 25 - B1753

pub fn b1754(&mut self) -> B1754_W<'_>[src]

Bit 26 - B1754

pub fn b1755(&mut self) -> B1755_W<'_>[src]

Bit 27 - B1755

pub fn b1756(&mut self) -> B1756_W<'_>[src]

Bit 28 - B1756

pub fn b1757(&mut self) -> B1757_W<'_>[src]

Bit 29 - B1757

pub fn b1758(&mut self) -> B1758_W<'_>[src]

Bit 30 - B1758

pub fn b1759(&mut self) -> B1759_W<'_>[src]

Bit 31 - B1759

impl W<u32, Reg<u32, _MPCBB1_VCTR55>>[src]

pub fn b1760(&mut self) -> B1760_W<'_>[src]

Bit 0 - B1760

pub fn b1761(&mut self) -> B1761_W<'_>[src]

Bit 1 - B1761

pub fn b1762(&mut self) -> B1762_W<'_>[src]

Bit 2 - B1762

pub fn b1763(&mut self) -> B1763_W<'_>[src]

Bit 3 - B1763

pub fn b1764(&mut self) -> B1764_W<'_>[src]

Bit 4 - B1764

pub fn b1765(&mut self) -> B1765_W<'_>[src]

Bit 5 - B1765

pub fn b1766(&mut self) -> B1766_W<'_>[src]

Bit 6 - B1766

pub fn b1767(&mut self) -> B1767_W<'_>[src]

Bit 7 - B1767

pub fn b1768(&mut self) -> B1768_W<'_>[src]

Bit 8 - B1768

pub fn b1769(&mut self) -> B1769_W<'_>[src]

Bit 9 - B1769

pub fn b1770(&mut self) -> B1770_W<'_>[src]

Bit 10 - B1770

pub fn b1771(&mut self) -> B1771_W<'_>[src]

Bit 11 - B1771

pub fn b1772(&mut self) -> B1772_W<'_>[src]

Bit 12 - B1772

pub fn b1773(&mut self) -> B1773_W<'_>[src]

Bit 13 - B1773

pub fn b1774(&mut self) -> B1774_W<'_>[src]

Bit 14 - B1774

pub fn b1775(&mut self) -> B1775_W<'_>[src]

Bit 15 - B1775

pub fn b1776(&mut self) -> B1776_W<'_>[src]

Bit 16 - B1776

pub fn b1777(&mut self) -> B1777_W<'_>[src]

Bit 17 - B1777

pub fn b1778(&mut self) -> B1778_W<'_>[src]

Bit 18 - B1778

pub fn b1779(&mut self) -> B1779_W<'_>[src]

Bit 19 - B1779

pub fn b1780(&mut self) -> B1780_W<'_>[src]

Bit 20 - B1780

pub fn b1781(&mut self) -> B1781_W<'_>[src]

Bit 21 - B1781

pub fn b1782(&mut self) -> B1782_W<'_>[src]

Bit 22 - B1782

pub fn b1783(&mut self) -> B1783_W<'_>[src]

Bit 23 - B1783

pub fn b1784(&mut self) -> B1784_W<'_>[src]

Bit 24 - B1784

pub fn b1785(&mut self) -> B1785_W<'_>[src]

Bit 25 - B1785

pub fn b1786(&mut self) -> B1786_W<'_>[src]

Bit 26 - B1786

pub fn b1787(&mut self) -> B1787_W<'_>[src]

Bit 27 - B1787

pub fn b1788(&mut self) -> B1788_W<'_>[src]

Bit 28 - B1788

pub fn b1789(&mut self) -> B1789_W<'_>[src]

Bit 29 - B1789

pub fn b1790(&mut self) -> B1790_W<'_>[src]

Bit 30 - B1790

pub fn b1791(&mut self) -> B1791_W<'_>[src]

Bit 31 - B1791

impl W<u32, Reg<u32, _MPCBB1_VCTR56>>[src]

pub fn b1792(&mut self) -> B1792_W<'_>[src]

Bit 0 - B1792

pub fn b1793(&mut self) -> B1793_W<'_>[src]

Bit 1 - B1793

pub fn b1794(&mut self) -> B1794_W<'_>[src]

Bit 2 - B1794

pub fn b1795(&mut self) -> B1795_W<'_>[src]

Bit 3 - B1795

pub fn b1796(&mut self) -> B1796_W<'_>[src]

Bit 4 - B1796

pub fn b1797(&mut self) -> B1797_W<'_>[src]

Bit 5 - B1797

pub fn b1798(&mut self) -> B1798_W<'_>[src]

Bit 6 - B1798

pub fn b1799(&mut self) -> B1799_W<'_>[src]

Bit 7 - B1799

pub fn b1800(&mut self) -> B1800_W<'_>[src]

Bit 8 - B1800

pub fn b1801(&mut self) -> B1801_W<'_>[src]

Bit 9 - B1801

pub fn b1802(&mut self) -> B1802_W<'_>[src]

Bit 10 - B1802

pub fn b1803(&mut self) -> B1803_W<'_>[src]

Bit 11 - B1803

pub fn b1804(&mut self) -> B1804_W<'_>[src]

Bit 12 - B1804

pub fn b1805(&mut self) -> B1805_W<'_>[src]

Bit 13 - B1805

pub fn b1806(&mut self) -> B1806_W<'_>[src]

Bit 14 - B1806

pub fn b1807(&mut self) -> B1807_W<'_>[src]

Bit 15 - B1807

pub fn b1808(&mut self) -> B1808_W<'_>[src]

Bit 16 - B1808

pub fn b1809(&mut self) -> B1809_W<'_>[src]

Bit 17 - B1809

pub fn b1810(&mut self) -> B1810_W<'_>[src]

Bit 18 - B1810

pub fn b1811(&mut self) -> B1811_W<'_>[src]

Bit 19 - B1811

pub fn b1812(&mut self) -> B1812_W<'_>[src]

Bit 20 - B1812

pub fn b1813(&mut self) -> B1813_W<'_>[src]

Bit 21 - B1813

pub fn b1814(&mut self) -> B1814_W<'_>[src]

Bit 22 - B1814

pub fn b1815(&mut self) -> B1815_W<'_>[src]

Bit 23 - B1815

pub fn b1816(&mut self) -> B1816_W<'_>[src]

Bit 24 - B1816

pub fn b1817(&mut self) -> B1817_W<'_>[src]

Bit 25 - B1817

pub fn b1818(&mut self) -> B1818_W<'_>[src]

Bit 26 - B1818

pub fn b1819(&mut self) -> B1819_W<'_>[src]

Bit 27 - B1819

pub fn b1820(&mut self) -> B1820_W<'_>[src]

Bit 28 - B1820

pub fn b1821(&mut self) -> B1821_W<'_>[src]

Bit 29 - B1821

pub fn b1822(&mut self) -> B1822_W<'_>[src]

Bit 30 - B1822

pub fn b1823(&mut self) -> B1823_W<'_>[src]

Bit 31 - B1823

impl W<u32, Reg<u32, _MPCBB1_VCTR57>>[src]

pub fn b1824(&mut self) -> B1824_W<'_>[src]

Bit 0 - B1824

pub fn b1825(&mut self) -> B1825_W<'_>[src]

Bit 1 - B1825

pub fn b1826(&mut self) -> B1826_W<'_>[src]

Bit 2 - B1826

pub fn b1827(&mut self) -> B1827_W<'_>[src]

Bit 3 - B1827

pub fn b1828(&mut self) -> B1828_W<'_>[src]

Bit 4 - B1828

pub fn b1829(&mut self) -> B1829_W<'_>[src]

Bit 5 - B1829

pub fn b1830(&mut self) -> B1830_W<'_>[src]

Bit 6 - B1830

pub fn b1831(&mut self) -> B1831_W<'_>[src]

Bit 7 - B1831

pub fn b1832(&mut self) -> B1832_W<'_>[src]

Bit 8 - B1832

pub fn b1833(&mut self) -> B1833_W<'_>[src]

Bit 9 - B1833

pub fn b1834(&mut self) -> B1834_W<'_>[src]

Bit 10 - B1834

pub fn b1835(&mut self) -> B1835_W<'_>[src]

Bit 11 - B1835

pub fn b1836(&mut self) -> B1836_W<'_>[src]

Bit 12 - B1836

pub fn b1837(&mut self) -> B1837_W<'_>[src]

Bit 13 - B1837

pub fn b1838(&mut self) -> B1838_W<'_>[src]

Bit 14 - B1838

pub fn b1839(&mut self) -> B1839_W<'_>[src]

Bit 15 - B1839

pub fn b1840(&mut self) -> B1840_W<'_>[src]

Bit 16 - B1840

pub fn b1841(&mut self) -> B1841_W<'_>[src]

Bit 17 - B1841

pub fn b1842(&mut self) -> B1842_W<'_>[src]

Bit 18 - B1842

pub fn b1843(&mut self) -> B1843_W<'_>[src]

Bit 19 - B1843

pub fn b1844(&mut self) -> B1844_W<'_>[src]

Bit 20 - B1844

pub fn b1845(&mut self) -> B1845_W<'_>[src]

Bit 21 - B1845

pub fn b1846(&mut self) -> B1846_W<'_>[src]

Bit 22 - B1846

pub fn b1847(&mut self) -> B1847_W<'_>[src]

Bit 23 - B1847

pub fn b1848(&mut self) -> B1848_W<'_>[src]

Bit 24 - B1848

pub fn b1849(&mut self) -> B1849_W<'_>[src]

Bit 25 - B1849

pub fn b1850(&mut self) -> B1850_W<'_>[src]

Bit 26 - B1850

pub fn b1851(&mut self) -> B1851_W<'_>[src]

Bit 27 - B1851

pub fn b1852(&mut self) -> B1852_W<'_>[src]

Bit 28 - B1852

pub fn b1853(&mut self) -> B1853_W<'_>[src]

Bit 29 - B1853

pub fn b1854(&mut self) -> B1854_W<'_>[src]

Bit 30 - B1854

pub fn b1855(&mut self) -> B1855_W<'_>[src]

Bit 31 - B1855

impl W<u32, Reg<u32, _MPCBB1_VCTR58>>[src]

pub fn b1856(&mut self) -> B1856_W<'_>[src]

Bit 0 - B1856

pub fn b1857(&mut self) -> B1857_W<'_>[src]

Bit 1 - B1857

pub fn b1858(&mut self) -> B1858_W<'_>[src]

Bit 2 - B1858

pub fn b1859(&mut self) -> B1859_W<'_>[src]

Bit 3 - B1859

pub fn b1860(&mut self) -> B1860_W<'_>[src]

Bit 4 - B1860

pub fn b1861(&mut self) -> B1861_W<'_>[src]

Bit 5 - B1861

pub fn b1862(&mut self) -> B1862_W<'_>[src]

Bit 6 - B1862

pub fn b1863(&mut self) -> B1863_W<'_>[src]

Bit 7 - B1863

pub fn b1864(&mut self) -> B1864_W<'_>[src]

Bit 8 - B1864

pub fn b1865(&mut self) -> B1865_W<'_>[src]

Bit 9 - B1865

pub fn b1866(&mut self) -> B1866_W<'_>[src]

Bit 10 - B1866

pub fn b1867(&mut self) -> B1867_W<'_>[src]

Bit 11 - B1867

pub fn b1868(&mut self) -> B1868_W<'_>[src]

Bit 12 - B1868

pub fn b1869(&mut self) -> B1869_W<'_>[src]

Bit 13 - B1869

pub fn b1870(&mut self) -> B1870_W<'_>[src]

Bit 14 - B1870

pub fn b1871(&mut self) -> B1871_W<'_>[src]

Bit 15 - B1871

pub fn b1872(&mut self) -> B1872_W<'_>[src]

Bit 16 - B1872

pub fn b1873(&mut self) -> B1873_W<'_>[src]

Bit 17 - B1873

pub fn b1874(&mut self) -> B1874_W<'_>[src]

Bit 18 - B1874

pub fn b1875(&mut self) -> B1875_W<'_>[src]

Bit 19 - B1875

pub fn b1876(&mut self) -> B1876_W<'_>[src]

Bit 20 - B1876

pub fn b1877(&mut self) -> B1877_W<'_>[src]

Bit 21 - B1877

pub fn b1878(&mut self) -> B1878_W<'_>[src]

Bit 22 - B1878

pub fn b1879(&mut self) -> B1879_W<'_>[src]

Bit 23 - B1879

pub fn b1880(&mut self) -> B1880_W<'_>[src]

Bit 24 - B1880

pub fn b1881(&mut self) -> B1881_W<'_>[src]

Bit 25 - B1881

pub fn b1882(&mut self) -> B1882_W<'_>[src]

Bit 26 - B1882

pub fn b1883(&mut self) -> B1883_W<'_>[src]

Bit 27 - B1883

pub fn b1884(&mut self) -> B1884_W<'_>[src]

Bit 28 - B1884

pub fn b1885(&mut self) -> B1885_W<'_>[src]

Bit 29 - B1885

pub fn b1886(&mut self) -> B1886_W<'_>[src]

Bit 30 - B1886

pub fn b1887(&mut self) -> B1887_W<'_>[src]

Bit 31 - B1887

impl W<u32, Reg<u32, _MPCBB1_VCTR59>>[src]

pub fn b1888(&mut self) -> B1888_W<'_>[src]

Bit 0 - B1888

pub fn b1889(&mut self) -> B1889_W<'_>[src]

Bit 1 - B1889

pub fn b1890(&mut self) -> B1890_W<'_>[src]

Bit 2 - B1890

pub fn b1891(&mut self) -> B1891_W<'_>[src]

Bit 3 - B1891

pub fn b1892(&mut self) -> B1892_W<'_>[src]

Bit 4 - B1892

pub fn b1893(&mut self) -> B1893_W<'_>[src]

Bit 5 - B1893

pub fn b1894(&mut self) -> B1894_W<'_>[src]

Bit 6 - B1894

pub fn b1895(&mut self) -> B1895_W<'_>[src]

Bit 7 - B1895

pub fn b1896(&mut self) -> B1896_W<'_>[src]

Bit 8 - B1896

pub fn b1897(&mut self) -> B1897_W<'_>[src]

Bit 9 - B1897

pub fn b1898(&mut self) -> B1898_W<'_>[src]

Bit 10 - B1898

pub fn b1899(&mut self) -> B1899_W<'_>[src]

Bit 11 - B1899

pub fn b1900(&mut self) -> B1900_W<'_>[src]

Bit 12 - B1900

pub fn b1901(&mut self) -> B1901_W<'_>[src]

Bit 13 - B1901

pub fn b1902(&mut self) -> B1902_W<'_>[src]

Bit 14 - B1902

pub fn b1903(&mut self) -> B1903_W<'_>[src]

Bit 15 - B1903

pub fn b1904(&mut self) -> B1904_W<'_>[src]

Bit 16 - B1904

pub fn b1905(&mut self) -> B1905_W<'_>[src]

Bit 17 - B1905

pub fn b1906(&mut self) -> B1906_W<'_>[src]

Bit 18 - B1906

pub fn b1907(&mut self) -> B1907_W<'_>[src]

Bit 19 - B1907

pub fn b1908(&mut self) -> B1908_W<'_>[src]

Bit 20 - B1908

pub fn b1909(&mut self) -> B1909_W<'_>[src]

Bit 21 - B1909

pub fn b1910(&mut self) -> B1910_W<'_>[src]

Bit 22 - B1910

pub fn b1911(&mut self) -> B1911_W<'_>[src]

Bit 23 - B1911

pub fn b1912(&mut self) -> B1912_W<'_>[src]

Bit 24 - B1912

pub fn b1913(&mut self) -> B1913_W<'_>[src]

Bit 25 - B1913

pub fn b1914(&mut self) -> B1914_W<'_>[src]

Bit 26 - B1914

pub fn b1915(&mut self) -> B1915_W<'_>[src]

Bit 27 - B1915

pub fn b1916(&mut self) -> B1916_W<'_>[src]

Bit 28 - B1916

pub fn b1917(&mut self) -> B1917_W<'_>[src]

Bit 29 - B1917

pub fn b1918(&mut self) -> B1918_W<'_>[src]

Bit 30 - B1918

pub fn b1919(&mut self) -> B1919_W<'_>[src]

Bit 31 - B1919

impl W<u32, Reg<u32, _MPCBB1_VCTR60>>[src]

pub fn b1920(&mut self) -> B1920_W<'_>[src]

Bit 0 - B1920

pub fn b1921(&mut self) -> B1921_W<'_>[src]

Bit 1 - B1921

pub fn b1922(&mut self) -> B1922_W<'_>[src]

Bit 2 - B1922

pub fn b1923(&mut self) -> B1923_W<'_>[src]

Bit 3 - B1923

pub fn b1924(&mut self) -> B1924_W<'_>[src]

Bit 4 - B1924

pub fn b1925(&mut self) -> B1925_W<'_>[src]

Bit 5 - B1925

pub fn b1926(&mut self) -> B1926_W<'_>[src]

Bit 6 - B1926

pub fn b1927(&mut self) -> B1927_W<'_>[src]

Bit 7 - B1927

pub fn b1928(&mut self) -> B1928_W<'_>[src]

Bit 8 - B1928

pub fn b1929(&mut self) -> B1929_W<'_>[src]

Bit 9 - B1929

pub fn b1930(&mut self) -> B1930_W<'_>[src]

Bit 10 - B1930

pub fn b1931(&mut self) -> B1931_W<'_>[src]

Bit 11 - B1931

pub fn b1932(&mut self) -> B1932_W<'_>[src]

Bit 12 - B1932

pub fn b1933(&mut self) -> B1933_W<'_>[src]

Bit 13 - B1933

pub fn b1934(&mut self) -> B1934_W<'_>[src]

Bit 14 - B1934

pub fn b1935(&mut self) -> B1935_W<'_>[src]

Bit 15 - B1935

pub fn b1936(&mut self) -> B1936_W<'_>[src]

Bit 16 - B1936

pub fn b1937(&mut self) -> B1937_W<'_>[src]

Bit 17 - B1937

pub fn b1938(&mut self) -> B1938_W<'_>[src]

Bit 18 - B1938

pub fn b1939(&mut self) -> B1939_W<'_>[src]

Bit 19 - B1939

pub fn b1940(&mut self) -> B1940_W<'_>[src]

Bit 20 - B1940

pub fn b1941(&mut self) -> B1941_W<'_>[src]

Bit 21 - B1941

pub fn b1942(&mut self) -> B1942_W<'_>[src]

Bit 22 - B1942

pub fn b1943(&mut self) -> B1943_W<'_>[src]

Bit 23 - B1943

pub fn b1944(&mut self) -> B1944_W<'_>[src]

Bit 24 - B1944

pub fn b1945(&mut self) -> B1945_W<'_>[src]

Bit 25 - B1945

pub fn b1946(&mut self) -> B1946_W<'_>[src]

Bit 26 - B1946

pub fn b1947(&mut self) -> B1947_W<'_>[src]

Bit 27 - B1947

pub fn b1948(&mut self) -> B1948_W<'_>[src]

Bit 28 - B1948

pub fn b1949(&mut self) -> B1949_W<'_>[src]

Bit 29 - B1949

pub fn b1950(&mut self) -> B1950_W<'_>[src]

Bit 30 - B1950

pub fn b1951(&mut self) -> B1951_W<'_>[src]

Bit 31 - B1951

impl W<u32, Reg<u32, _MPCBB1_VCTR61>>[src]

pub fn b1952(&mut self) -> B1952_W<'_>[src]

Bit 0 - B1952

pub fn b1953(&mut self) -> B1953_W<'_>[src]

Bit 1 - B1953

pub fn b1954(&mut self) -> B1954_W<'_>[src]

Bit 2 - B1954

pub fn b1955(&mut self) -> B1955_W<'_>[src]

Bit 3 - B1955

pub fn b1956(&mut self) -> B1956_W<'_>[src]

Bit 4 - B1956

pub fn b1957(&mut self) -> B1957_W<'_>[src]

Bit 5 - B1957

pub fn b1958(&mut self) -> B1958_W<'_>[src]

Bit 6 - B1958

pub fn b1959(&mut self) -> B1959_W<'_>[src]

Bit 7 - B1959

pub fn b1960(&mut self) -> B1960_W<'_>[src]

Bit 8 - B1960

pub fn b1961(&mut self) -> B1961_W<'_>[src]

Bit 9 - B1961

pub fn b1962(&mut self) -> B1962_W<'_>[src]

Bit 10 - B1962

pub fn b1963(&mut self) -> B1963_W<'_>[src]

Bit 11 - B1963

pub fn b1964(&mut self) -> B1964_W<'_>[src]

Bit 12 - B1964

pub fn b1965(&mut self) -> B1965_W<'_>[src]

Bit 13 - B1965

pub fn b1966(&mut self) -> B1966_W<'_>[src]

Bit 14 - B1966

pub fn b1967(&mut self) -> B1967_W<'_>[src]

Bit 15 - B1967

pub fn b1968(&mut self) -> B1968_W<'_>[src]

Bit 16 - B1968

pub fn b1969(&mut self) -> B1969_W<'_>[src]

Bit 17 - B1969

pub fn b1970(&mut self) -> B1970_W<'_>[src]

Bit 18 - B1970

pub fn b1971(&mut self) -> B1971_W<'_>[src]

Bit 19 - B1971

pub fn b1972(&mut self) -> B1972_W<'_>[src]

Bit 20 - B1972

pub fn b1973(&mut self) -> B1973_W<'_>[src]

Bit 21 - B1973

pub fn b1974(&mut self) -> B1974_W<'_>[src]

Bit 22 - B1974

pub fn b1975(&mut self) -> B1975_W<'_>[src]

Bit 23 - B1975

pub fn b1976(&mut self) -> B1976_W<'_>[src]

Bit 24 - B1976

pub fn b1977(&mut self) -> B1977_W<'_>[src]

Bit 25 - B1977

pub fn b1978(&mut self) -> B1978_W<'_>[src]

Bit 26 - B1978

pub fn b1979(&mut self) -> B1979_W<'_>[src]

Bit 27 - B1979

pub fn b1980(&mut self) -> B1980_W<'_>[src]

Bit 28 - B1980

pub fn b1981(&mut self) -> B1981_W<'_>[src]

Bit 29 - B1981

pub fn b1982(&mut self) -> B1982_W<'_>[src]

Bit 30 - B1982

pub fn b1983(&mut self) -> B1983_W<'_>[src]

Bit 31 - B1983

impl W<u32, Reg<u32, _MPCBB1_VCTR62>>[src]

pub fn b1984(&mut self) -> B1984_W<'_>[src]

Bit 0 - B1984

pub fn b1985(&mut self) -> B1985_W<'_>[src]

Bit 1 - B1985

pub fn b1986(&mut self) -> B1986_W<'_>[src]

Bit 2 - B1986

pub fn b1987(&mut self) -> B1987_W<'_>[src]

Bit 3 - B1987

pub fn b1988(&mut self) -> B1988_W<'_>[src]

Bit 4 - B1988

pub fn b1989(&mut self) -> B1989_W<'_>[src]

Bit 5 - B1989

pub fn b1990(&mut self) -> B1990_W<'_>[src]

Bit 6 - B1990

pub fn b1991(&mut self) -> B1991_W<'_>[src]

Bit 7 - B1991

pub fn b1992(&mut self) -> B1992_W<'_>[src]

Bit 8 - B1992

pub fn b1993(&mut self) -> B1993_W<'_>[src]

Bit 9 - B1993

pub fn b1994(&mut self) -> B1994_W<'_>[src]

Bit 10 - B1994

pub fn b1995(&mut self) -> B1995_W<'_>[src]

Bit 11 - B1995

pub fn b1996(&mut self) -> B1996_W<'_>[src]

Bit 12 - B1996

pub fn b1997(&mut self) -> B1997_W<'_>[src]

Bit 13 - B1997

pub fn b1998(&mut self) -> B1998_W<'_>[src]

Bit 14 - B1998

pub fn b1999(&mut self) -> B1999_W<'_>[src]

Bit 15 - B1999

pub fn b2000(&mut self) -> B2000_W<'_>[src]

Bit 16 - B2000

pub fn b2001(&mut self) -> B2001_W<'_>[src]

Bit 17 - B2001

pub fn b2002(&mut self) -> B2002_W<'_>[src]

Bit 18 - B2002

pub fn b2003(&mut self) -> B2003_W<'_>[src]

Bit 19 - B2003

pub fn b2004(&mut self) -> B2004_W<'_>[src]

Bit 20 - B2004

pub fn b2005(&mut self) -> B2005_W<'_>[src]

Bit 21 - B2005

pub fn b2006(&mut self) -> B2006_W<'_>[src]

Bit 22 - B2006

pub fn b2007(&mut self) -> B2007_W<'_>[src]

Bit 23 - B2007

pub fn b2008(&mut self) -> B2008_W<'_>[src]

Bit 24 - B2008

pub fn b2009(&mut self) -> B2009_W<'_>[src]

Bit 25 - B2009

pub fn b2010(&mut self) -> B2010_W<'_>[src]

Bit 26 - B2010

pub fn b2011(&mut self) -> B2011_W<'_>[src]

Bit 27 - B2011

pub fn b2012(&mut self) -> B2012_W<'_>[src]

Bit 28 - B2012

pub fn b2013(&mut self) -> B2013_W<'_>[src]

Bit 29 - B2013

pub fn b2014(&mut self) -> B2014_W<'_>[src]

Bit 30 - B2014

pub fn b2015(&mut self) -> B2015_W<'_>[src]

Bit 31 - B2015

impl W<u32, Reg<u32, _MPCBB1_VCTR63>>[src]

pub fn b2016(&mut self) -> B2016_W<'_>[src]

Bit 0 - B2016

pub fn b2017(&mut self) -> B2017_W<'_>[src]

Bit 1 - B2017

pub fn b2018(&mut self) -> B2018_W<'_>[src]

Bit 2 - B2018

pub fn b2019(&mut self) -> B2019_W<'_>[src]

Bit 3 - B2019

pub fn b2020(&mut self) -> B2020_W<'_>[src]

Bit 4 - B2020

pub fn b2021(&mut self) -> B2021_W<'_>[src]

Bit 5 - B2021

pub fn b2022(&mut self) -> B2022_W<'_>[src]

Bit 6 - B2022

pub fn b2023(&mut self) -> B2023_W<'_>[src]

Bit 7 - B2023

pub fn b2024(&mut self) -> B2024_W<'_>[src]

Bit 8 - B2024

pub fn b2025(&mut self) -> B2025_W<'_>[src]

Bit 9 - B2025

pub fn b2026(&mut self) -> B2026_W<'_>[src]

Bit 10 - B2026

pub fn b2027(&mut self) -> B2027_W<'_>[src]

Bit 11 - B2027

pub fn b2028(&mut self) -> B2028_W<'_>[src]

Bit 12 - B2028

pub fn b2029(&mut self) -> B2029_W<'_>[src]

Bit 13 - B2029

pub fn b2030(&mut self) -> B2030_W<'_>[src]

Bit 14 - B2030

pub fn b2031(&mut self) -> B2031_W<'_>[src]

Bit 15 - B2031

pub fn b2032(&mut self) -> B2032_W<'_>[src]

Bit 16 - B2032

pub fn b2033(&mut self) -> B2033_W<'_>[src]

Bit 17 - B2033

pub fn b2034(&mut self) -> B2034_W<'_>[src]

Bit 18 - B2034

pub fn b2035(&mut self) -> B2035_W<'_>[src]

Bit 19 - B2035

pub fn b2036(&mut self) -> B2036_W<'_>[src]

Bit 20 - B2036

pub fn b2037(&mut self) -> B2037_W<'_>[src]

Bit 21 - B2037

pub fn b2038(&mut self) -> B2038_W<'_>[src]

Bit 22 - B2038

pub fn b2039(&mut self) -> B2039_W<'_>[src]

Bit 23 - B2039

pub fn b2040(&mut self) -> B2040_W<'_>[src]

Bit 24 - B2040

pub fn b2041(&mut self) -> B2041_W<'_>[src]

Bit 25 - B2041

pub fn b2042(&mut self) -> B2042_W<'_>[src]

Bit 26 - B2042

pub fn b2043(&mut self) -> B2043_W<'_>[src]

Bit 27 - B2043

pub fn b2044(&mut self) -> B2044_W<'_>[src]

Bit 28 - B2044

pub fn b2045(&mut self) -> B2045_W<'_>[src]

Bit 29 - B2045

pub fn b2046(&mut self) -> B2046_W<'_>[src]

Bit 30 - B2046

pub fn b2047(&mut self) -> B2047_W<'_>[src]

Bit 31 - B2047

impl W<u32, Reg<u32, _MPCBB2_CR>>[src]

pub fn lck(&mut self) -> LCK_W<'_>[src]

Bit 0 - LCK

pub fn invsecstate(&mut self) -> INVSECSTATE_W<'_>[src]

Bit 30 - INVSECSTATE

pub fn srwiladis(&mut self) -> SRWILADIS_W<'_>[src]

Bit 31 - SRWILADIS

impl W<u32, Reg<u32, _MPCBB2_LCKVTR1>>[src]

pub fn lcksb0(&mut self) -> LCKSB0_W<'_>[src]

Bit 0 - LCKSB0

pub fn lcksb1(&mut self) -> LCKSB1_W<'_>[src]

Bit 1 - LCKSB1

pub fn lcksb2(&mut self) -> LCKSB2_W<'_>[src]

Bit 2 - LCKSB2

pub fn lcksb3(&mut self) -> LCKSB3_W<'_>[src]

Bit 3 - LCKSB3

pub fn lcksb4(&mut self) -> LCKSB4_W<'_>[src]

Bit 4 - LCKSB4

pub fn lcksb5(&mut self) -> LCKSB5_W<'_>[src]

Bit 5 - LCKSB5

pub fn lcksb6(&mut self) -> LCKSB6_W<'_>[src]

Bit 6 - LCKSB6

pub fn lcksb7(&mut self) -> LCKSB7_W<'_>[src]

Bit 7 - LCKSB7

pub fn lcksb8(&mut self) -> LCKSB8_W<'_>[src]

Bit 8 - LCKSB8

pub fn lcksb9(&mut self) -> LCKSB9_W<'_>[src]

Bit 9 - LCKSB9

pub fn lcksb10(&mut self) -> LCKSB10_W<'_>[src]

Bit 10 - LCKSB10

pub fn lcksb11(&mut self) -> LCKSB11_W<'_>[src]

Bit 11 - LCKSB11

pub fn lcksb12(&mut self) -> LCKSB12_W<'_>[src]

Bit 12 - LCKSB12

pub fn lcksb13(&mut self) -> LCKSB13_W<'_>[src]

Bit 13 - LCKSB13

pub fn lcksb14(&mut self) -> LCKSB14_W<'_>[src]

Bit 14 - LCKSB14

pub fn lcksb15(&mut self) -> LCKSB15_W<'_>[src]

Bit 15 - LCKSB15

pub fn lcksb16(&mut self) -> LCKSB16_W<'_>[src]

Bit 16 - LCKSB16

pub fn lcksb17(&mut self) -> LCKSB17_W<'_>[src]

Bit 17 - LCKSB17

pub fn lcksb18(&mut self) -> LCKSB18_W<'_>[src]

Bit 18 - LCKSB18

pub fn lcksb19(&mut self) -> LCKSB19_W<'_>[src]

Bit 19 - LCKSB19

pub fn lcksb20(&mut self) -> LCKSB20_W<'_>[src]

Bit 20 - LCKSB20

pub fn lcksb21(&mut self) -> LCKSB21_W<'_>[src]

Bit 21 - LCKSB21

pub fn lcksb22(&mut self) -> LCKSB22_W<'_>[src]

Bit 22 - LCKSB22

pub fn lcksb23(&mut self) -> LCKSB23_W<'_>[src]

Bit 23 - LCKSB23

pub fn lcksb24(&mut self) -> LCKSB24_W<'_>[src]

Bit 24 - LCKSB24

pub fn lcksb25(&mut self) -> LCKSB25_W<'_>[src]

Bit 25 - LCKSB25

pub fn lcksb26(&mut self) -> LCKSB26_W<'_>[src]

Bit 26 - LCKSB26

pub fn lcksb27(&mut self) -> LCKSB27_W<'_>[src]

Bit 27 - LCKSB27

pub fn lcksb28(&mut self) -> LCKSB28_W<'_>[src]

Bit 28 - LCKSB28

pub fn lcksb29(&mut self) -> LCKSB29_W<'_>[src]

Bit 29 - LCKSB29

pub fn lcksb30(&mut self) -> LCKSB30_W<'_>[src]

Bit 30 - LCKSB30

pub fn lcksb31(&mut self) -> LCKSB31_W<'_>[src]

Bit 31 - LCKSB31

impl W<u32, Reg<u32, _MPCBB2_LCKVTR2>>[src]

pub fn lcksb32(&mut self) -> LCKSB32_W<'_>[src]

Bit 0 - LCKSB32

pub fn lcksb33(&mut self) -> LCKSB33_W<'_>[src]

Bit 1 - LCKSB33

pub fn lcksb34(&mut self) -> LCKSB34_W<'_>[src]

Bit 2 - LCKSB34

pub fn lcksb35(&mut self) -> LCKSB35_W<'_>[src]

Bit 3 - LCKSB35

pub fn lcksb36(&mut self) -> LCKSB36_W<'_>[src]

Bit 4 - LCKSB36

pub fn lcksb37(&mut self) -> LCKSB37_W<'_>[src]

Bit 5 - LCKSB37

pub fn lcksb38(&mut self) -> LCKSB38_W<'_>[src]

Bit 6 - LCKSB38

pub fn lcksb39(&mut self) -> LCKSB39_W<'_>[src]

Bit 7 - LCKSB39

pub fn lcksb40(&mut self) -> LCKSB40_W<'_>[src]

Bit 8 - LCKSB40

pub fn lcksb41(&mut self) -> LCKSB41_W<'_>[src]

Bit 9 - LCKSB41

pub fn lcksb42(&mut self) -> LCKSB42_W<'_>[src]

Bit 10 - LCKSB42

pub fn lcksb43(&mut self) -> LCKSB43_W<'_>[src]

Bit 11 - LCKSB43

pub fn lcksb44(&mut self) -> LCKSB44_W<'_>[src]

Bit 12 - LCKSB44

pub fn lcksb45(&mut self) -> LCKSB45_W<'_>[src]

Bit 13 - LCKSB45

pub fn lcksb46(&mut self) -> LCKSB46_W<'_>[src]

Bit 14 - LCKSB46

pub fn lcksb47(&mut self) -> LCKSB47_W<'_>[src]

Bit 15 - LCKSB47

pub fn lcksb48(&mut self) -> LCKSB48_W<'_>[src]

Bit 16 - LCKSB48

pub fn lcksb49(&mut self) -> LCKSB49_W<'_>[src]

Bit 17 - LCKSB49

pub fn lcksb50(&mut self) -> LCKSB50_W<'_>[src]

Bit 18 - LCKSB50

pub fn lcksb51(&mut self) -> LCKSB51_W<'_>[src]

Bit 19 - LCKSB51

pub fn lcksb52(&mut self) -> LCKSB52_W<'_>[src]

Bit 20 - LCKSB52

pub fn lcksb53(&mut self) -> LCKSB53_W<'_>[src]

Bit 21 - LCKSB53

pub fn lcksb54(&mut self) -> LCKSB54_W<'_>[src]

Bit 22 - LCKSB54

pub fn lcksb55(&mut self) -> LCKSB55_W<'_>[src]

Bit 23 - LCKSB55

pub fn lcksb56(&mut self) -> LCKSB56_W<'_>[src]

Bit 24 - LCKSB56

pub fn lcksb57(&mut self) -> LCKSB57_W<'_>[src]

Bit 25 - LCKSB57

pub fn lcksb58(&mut self) -> LCKSB58_W<'_>[src]

Bit 26 - LCKSB58

pub fn lcksb59(&mut self) -> LCKSB59_W<'_>[src]

Bit 27 - LCKSB59

pub fn lcksb60(&mut self) -> LCKSB60_W<'_>[src]

Bit 28 - LCKSB60

pub fn lcksb61(&mut self) -> LCKSB61_W<'_>[src]

Bit 29 - LCKSB61

pub fn lcksb62(&mut self) -> LCKSB62_W<'_>[src]

Bit 30 - LCKSB62

pub fn lcksb63(&mut self) -> LCKSB63_W<'_>[src]

Bit 31 - LCKSB63

impl W<u32, Reg<u32, _MPCBB2_VCTR0>>[src]

pub fn b0(&mut self) -> B0_W<'_>[src]

Bit 0 - B0

pub fn b1(&mut self) -> B1_W<'_>[src]

Bit 1 - B1

pub fn b2(&mut self) -> B2_W<'_>[src]

Bit 2 - B2

pub fn b3(&mut self) -> B3_W<'_>[src]

Bit 3 - B3

pub fn b4(&mut self) -> B4_W<'_>[src]

Bit 4 - B4

pub fn b5(&mut self) -> B5_W<'_>[src]

Bit 5 - B5

pub fn b6(&mut self) -> B6_W<'_>[src]

Bit 6 - B6

pub fn b7(&mut self) -> B7_W<'_>[src]

Bit 7 - B7

pub fn b8(&mut self) -> B8_W<'_>[src]

Bit 8 - B8

pub fn b9(&mut self) -> B9_W<'_>[src]

Bit 9 - B9

pub fn b10(&mut self) -> B10_W<'_>[src]

Bit 10 - B10

pub fn b11(&mut self) -> B11_W<'_>[src]

Bit 11 - B11

pub fn b12(&mut self) -> B12_W<'_>[src]

Bit 12 - B12

pub fn b13(&mut self) -> B13_W<'_>[src]

Bit 13 - B13

pub fn b14(&mut self) -> B14_W<'_>[src]

Bit 14 - B14

pub fn b15(&mut self) -> B15_W<'_>[src]

Bit 15 - B15

pub fn b16(&mut self) -> B16_W<'_>[src]

Bit 16 - B16

pub fn b17(&mut self) -> B17_W<'_>[src]

Bit 17 - B17

pub fn b18(&mut self) -> B18_W<'_>[src]

Bit 18 - B18

pub fn b19(&mut self) -> B19_W<'_>[src]

Bit 19 - B19

pub fn b20(&mut self) -> B20_W<'_>[src]

Bit 20 - B20

pub fn b21(&mut self) -> B21_W<'_>[src]

Bit 21 - B21

pub fn b22(&mut self) -> B22_W<'_>[src]

Bit 22 - B22

pub fn b23(&mut self) -> B23_W<'_>[src]

Bit 23 - B23

pub fn b24(&mut self) -> B24_W<'_>[src]

Bit 24 - B24

pub fn b25(&mut self) -> B25_W<'_>[src]

Bit 25 - B25

pub fn b26(&mut self) -> B26_W<'_>[src]

Bit 26 - B26

pub fn b27(&mut self) -> B27_W<'_>[src]

Bit 27 - B27

pub fn b28(&mut self) -> B28_W<'_>[src]

Bit 28 - B28

pub fn b29(&mut self) -> B29_W<'_>[src]

Bit 29 - B29

pub fn b30(&mut self) -> B30_W<'_>[src]

Bit 30 - B30

pub fn b31(&mut self) -> B31_W<'_>[src]

Bit 31 - B31

impl W<u32, Reg<u32, _MPCBB2_VCTR1>>[src]

pub fn b32(&mut self) -> B32_W<'_>[src]

Bit 0 - B32

pub fn b33(&mut self) -> B33_W<'_>[src]

Bit 1 - B33

pub fn b34(&mut self) -> B34_W<'_>[src]

Bit 2 - B34

pub fn b35(&mut self) -> B35_W<'_>[src]

Bit 3 - B35

pub fn b36(&mut self) -> B36_W<'_>[src]

Bit 4 - B36

pub fn b37(&mut self) -> B37_W<'_>[src]

Bit 5 - B37

pub fn b38(&mut self) -> B38_W<'_>[src]

Bit 6 - B38

pub fn b39(&mut self) -> B39_W<'_>[src]

Bit 7 - B39

pub fn b40(&mut self) -> B40_W<'_>[src]

Bit 8 - B40

pub fn b41(&mut self) -> B41_W<'_>[src]

Bit 9 - B41

pub fn b42(&mut self) -> B42_W<'_>[src]

Bit 10 - B42

pub fn b43(&mut self) -> B43_W<'_>[src]

Bit 11 - B43

pub fn b44(&mut self) -> B44_W<'_>[src]

Bit 12 - B44

pub fn b45(&mut self) -> B45_W<'_>[src]

Bit 13 - B45

pub fn b46(&mut self) -> B46_W<'_>[src]

Bit 14 - B46

pub fn b47(&mut self) -> B47_W<'_>[src]

Bit 15 - B47

pub fn b48(&mut self) -> B48_W<'_>[src]

Bit 16 - B48

pub fn b49(&mut self) -> B49_W<'_>[src]

Bit 17 - B49

pub fn b50(&mut self) -> B50_W<'_>[src]

Bit 18 - B50

pub fn b51(&mut self) -> B51_W<'_>[src]

Bit 19 - B51

pub fn b52(&mut self) -> B52_W<'_>[src]

Bit 20 - B52

pub fn b53(&mut self) -> B53_W<'_>[src]

Bit 21 - B53

pub fn b54(&mut self) -> B54_W<'_>[src]

Bit 22 - B54

pub fn b55(&mut self) -> B55_W<'_>[src]

Bit 23 - B55

pub fn b56(&mut self) -> B56_W<'_>[src]

Bit 24 - B56

pub fn b57(&mut self) -> B57_W<'_>[src]

Bit 25 - B57

pub fn b58(&mut self) -> B58_W<'_>[src]

Bit 26 - B58

pub fn b59(&mut self) -> B59_W<'_>[src]

Bit 27 - B59

pub fn b60(&mut self) -> B60_W<'_>[src]

Bit 28 - B60

pub fn b61(&mut self) -> B61_W<'_>[src]

Bit 29 - B61

pub fn b62(&mut self) -> B62_W<'_>[src]

Bit 30 - B62

pub fn b63(&mut self) -> B63_W<'_>[src]

Bit 31 - B63

impl W<u32, Reg<u32, _MPCBB2_VCTR2>>[src]

pub fn b64(&mut self) -> B64_W<'_>[src]

Bit 0 - B64

pub fn b65(&mut self) -> B65_W<'_>[src]

Bit 1 - B65

pub fn b66(&mut self) -> B66_W<'_>[src]

Bit 2 - B66

pub fn b67(&mut self) -> B67_W<'_>[src]

Bit 3 - B67

pub fn b68(&mut self) -> B68_W<'_>[src]

Bit 4 - B68

pub fn b69(&mut self) -> B69_W<'_>[src]

Bit 5 - B69

pub fn b70(&mut self) -> B70_W<'_>[src]

Bit 6 - B70

pub fn b71(&mut self) -> B71_W<'_>[src]

Bit 7 - B71

pub fn b72(&mut self) -> B72_W<'_>[src]

Bit 8 - B72

pub fn b73(&mut self) -> B73_W<'_>[src]

Bit 9 - B73

pub fn b74(&mut self) -> B74_W<'_>[src]

Bit 10 - B74

pub fn b75(&mut self) -> B75_W<'_>[src]

Bit 11 - B75

pub fn b76(&mut self) -> B76_W<'_>[src]

Bit 12 - B76

pub fn b77(&mut self) -> B77_W<'_>[src]

Bit 13 - B77

pub fn b78(&mut self) -> B78_W<'_>[src]

Bit 14 - B78

pub fn b79(&mut self) -> B79_W<'_>[src]

Bit 15 - B79

pub fn b80(&mut self) -> B80_W<'_>[src]

Bit 16 - B80

pub fn b81(&mut self) -> B81_W<'_>[src]

Bit 17 - B81

pub fn b82(&mut self) -> B82_W<'_>[src]

Bit 18 - B82

pub fn b83(&mut self) -> B83_W<'_>[src]

Bit 19 - B83

pub fn b84(&mut self) -> B84_W<'_>[src]

Bit 20 - B84

pub fn b85(&mut self) -> B85_W<'_>[src]

Bit 21 - B85

pub fn b86(&mut self) -> B86_W<'_>[src]

Bit 22 - B86

pub fn b87(&mut self) -> B87_W<'_>[src]

Bit 23 - B87

pub fn b88(&mut self) -> B88_W<'_>[src]

Bit 24 - B88

pub fn b89(&mut self) -> B89_W<'_>[src]

Bit 25 - B89

pub fn b90(&mut self) -> B90_W<'_>[src]

Bit 26 - B90

pub fn b91(&mut self) -> B91_W<'_>[src]

Bit 27 - B91

pub fn b92(&mut self) -> B92_W<'_>[src]

Bit 28 - B92

pub fn b93(&mut self) -> B93_W<'_>[src]

Bit 29 - B93

pub fn b94(&mut self) -> B94_W<'_>[src]

Bit 30 - B94

pub fn b95(&mut self) -> B95_W<'_>[src]

Bit 31 - B95

impl W<u32, Reg<u32, _MPCBB2_VCTR3>>[src]

pub fn b96(&mut self) -> B96_W<'_>[src]

Bit 0 - B96

pub fn b97(&mut self) -> B97_W<'_>[src]

Bit 1 - B97

pub fn b98(&mut self) -> B98_W<'_>[src]

Bit 2 - B98

pub fn b99(&mut self) -> B99_W<'_>[src]

Bit 3 - B99

pub fn b100(&mut self) -> B100_W<'_>[src]

Bit 4 - B100

pub fn b101(&mut self) -> B101_W<'_>[src]

Bit 5 - B101

pub fn b102(&mut self) -> B102_W<'_>[src]

Bit 6 - B102

pub fn b103(&mut self) -> B103_W<'_>[src]

Bit 7 - B103

pub fn b104(&mut self) -> B104_W<'_>[src]

Bit 8 - B104

pub fn b105(&mut self) -> B105_W<'_>[src]

Bit 9 - B105

pub fn b106(&mut self) -> B106_W<'_>[src]

Bit 10 - B106

pub fn b107(&mut self) -> B107_W<'_>[src]

Bit 11 - B107

pub fn b108(&mut self) -> B108_W<'_>[src]

Bit 12 - B108

pub fn b109(&mut self) -> B109_W<'_>[src]

Bit 13 - B109

pub fn b110(&mut self) -> B110_W<'_>[src]

Bit 14 - B110

pub fn b111(&mut self) -> B111_W<'_>[src]

Bit 15 - B111

pub fn b112(&mut self) -> B112_W<'_>[src]

Bit 16 - B112

pub fn b113(&mut self) -> B113_W<'_>[src]

Bit 17 - B113

pub fn b114(&mut self) -> B114_W<'_>[src]

Bit 18 - B114

pub fn b115(&mut self) -> B115_W<'_>[src]

Bit 19 - B115

pub fn b116(&mut self) -> B116_W<'_>[src]

Bit 20 - B116

pub fn b117(&mut self) -> B117_W<'_>[src]

Bit 21 - B117

pub fn b118(&mut self) -> B118_W<'_>[src]

Bit 22 - B118

pub fn b119(&mut self) -> B119_W<'_>[src]

Bit 23 - B119

pub fn b120(&mut self) -> B120_W<'_>[src]

Bit 24 - B120

pub fn b121(&mut self) -> B121_W<'_>[src]

Bit 25 - B121

pub fn b122(&mut self) -> B122_W<'_>[src]

Bit 26 - B122

pub fn b123(&mut self) -> B123_W<'_>[src]

Bit 27 - B123

pub fn b124(&mut self) -> B124_W<'_>[src]

Bit 28 - B124

pub fn b125(&mut self) -> B125_W<'_>[src]

Bit 29 - B125

pub fn b126(&mut self) -> B126_W<'_>[src]

Bit 30 - B126

pub fn b127(&mut self) -> B127_W<'_>[src]

Bit 31 - B127

impl W<u32, Reg<u32, _MPCBB2_VCTR4>>[src]

pub fn b128(&mut self) -> B128_W<'_>[src]

Bit 0 - B128

pub fn b129(&mut self) -> B129_W<'_>[src]

Bit 1 - B129

pub fn b130(&mut self) -> B130_W<'_>[src]

Bit 2 - B130

pub fn b131(&mut self) -> B131_W<'_>[src]

Bit 3 - B131

pub fn b132(&mut self) -> B132_W<'_>[src]

Bit 4 - B132

pub fn b133(&mut self) -> B133_W<'_>[src]

Bit 5 - B133

pub fn b134(&mut self) -> B134_W<'_>[src]

Bit 6 - B134

pub fn b135(&mut self) -> B135_W<'_>[src]

Bit 7 - B135

pub fn b136(&mut self) -> B136_W<'_>[src]

Bit 8 - B136

pub fn b137(&mut self) -> B137_W<'_>[src]

Bit 9 - B137

pub fn b138(&mut self) -> B138_W<'_>[src]

Bit 10 - B138

pub fn b139(&mut self) -> B139_W<'_>[src]

Bit 11 - B139

pub fn b140(&mut self) -> B140_W<'_>[src]

Bit 12 - B140

pub fn b141(&mut self) -> B141_W<'_>[src]

Bit 13 - B141

pub fn b142(&mut self) -> B142_W<'_>[src]

Bit 14 - B142

pub fn b143(&mut self) -> B143_W<'_>[src]

Bit 15 - B143

pub fn b144(&mut self) -> B144_W<'_>[src]

Bit 16 - B144

pub fn b145(&mut self) -> B145_W<'_>[src]

Bit 17 - B145

pub fn b146(&mut self) -> B146_W<'_>[src]

Bit 18 - B146

pub fn b147(&mut self) -> B147_W<'_>[src]

Bit 19 - B147

pub fn b148(&mut self) -> B148_W<'_>[src]

Bit 20 - B148

pub fn b149(&mut self) -> B149_W<'_>[src]

Bit 21 - B149

pub fn b150(&mut self) -> B150_W<'_>[src]

Bit 22 - B150

pub fn b151(&mut self) -> B151_W<'_>[src]

Bit 23 - B151

pub fn b152(&mut self) -> B152_W<'_>[src]

Bit 24 - B152

pub fn b153(&mut self) -> B153_W<'_>[src]

Bit 25 - B153

pub fn b154(&mut self) -> B154_W<'_>[src]

Bit 26 - B154

pub fn b155(&mut self) -> B155_W<'_>[src]

Bit 27 - B155

pub fn b156(&mut self) -> B156_W<'_>[src]

Bit 28 - B156

pub fn b157(&mut self) -> B157_W<'_>[src]

Bit 29 - B157

pub fn b158(&mut self) -> B158_W<'_>[src]

Bit 30 - B158

pub fn b159(&mut self) -> B159_W<'_>[src]

Bit 31 - B159

impl W<u32, Reg<u32, _MPCBB2_VCTR5>>[src]

pub fn b160(&mut self) -> B160_W<'_>[src]

Bit 0 - B160

pub fn b161(&mut self) -> B161_W<'_>[src]

Bit 1 - B161

pub fn b162(&mut self) -> B162_W<'_>[src]

Bit 2 - B162

pub fn b163(&mut self) -> B163_W<'_>[src]

Bit 3 - B163

pub fn b164(&mut self) -> B164_W<'_>[src]

Bit 4 - B164

pub fn b165(&mut self) -> B165_W<'_>[src]

Bit 5 - B165

pub fn b166(&mut self) -> B166_W<'_>[src]

Bit 6 - B166

pub fn b167(&mut self) -> B167_W<'_>[src]

Bit 7 - B167

pub fn b168(&mut self) -> B168_W<'_>[src]

Bit 8 - B168

pub fn b169(&mut self) -> B169_W<'_>[src]

Bit 9 - B169

pub fn b170(&mut self) -> B170_W<'_>[src]

Bit 10 - B170

pub fn b171(&mut self) -> B171_W<'_>[src]

Bit 11 - B171

pub fn b172(&mut self) -> B172_W<'_>[src]

Bit 12 - B172

pub fn b173(&mut self) -> B173_W<'_>[src]

Bit 13 - B173

pub fn b174(&mut self) -> B174_W<'_>[src]

Bit 14 - B174

pub fn b175(&mut self) -> B175_W<'_>[src]

Bit 15 - B175

pub fn b176(&mut self) -> B176_W<'_>[src]

Bit 16 - B176

pub fn b177(&mut self) -> B177_W<'_>[src]

Bit 17 - B177

pub fn b178(&mut self) -> B178_W<'_>[src]

Bit 18 - B178

pub fn b179(&mut self) -> B179_W<'_>[src]

Bit 19 - B179

pub fn b180(&mut self) -> B180_W<'_>[src]

Bit 20 - B180

pub fn b181(&mut self) -> B181_W<'_>[src]

Bit 21 - B181

pub fn b182(&mut self) -> B182_W<'_>[src]

Bit 22 - B182

pub fn b183(&mut self) -> B183_W<'_>[src]

Bit 23 - B183

pub fn b184(&mut self) -> B184_W<'_>[src]

Bit 24 - B184

pub fn b185(&mut self) -> B185_W<'_>[src]

Bit 25 - B185

pub fn b186(&mut self) -> B186_W<'_>[src]

Bit 26 - B186

pub fn b187(&mut self) -> B187_W<'_>[src]

Bit 27 - B187

pub fn b188(&mut self) -> B188_W<'_>[src]

Bit 28 - B188

pub fn b189(&mut self) -> B189_W<'_>[src]

Bit 29 - B189

pub fn b190(&mut self) -> B190_W<'_>[src]

Bit 30 - B190

pub fn b191(&mut self) -> B191_W<'_>[src]

Bit 31 - B191

impl W<u32, Reg<u32, _MPCBB2_VCTR6>>[src]

pub fn b192(&mut self) -> B192_W<'_>[src]

Bit 0 - B192

pub fn b193(&mut self) -> B193_W<'_>[src]

Bit 1 - B193

pub fn b194(&mut self) -> B194_W<'_>[src]

Bit 2 - B194

pub fn b195(&mut self) -> B195_W<'_>[src]

Bit 3 - B195

pub fn b196(&mut self) -> B196_W<'_>[src]

Bit 4 - B196

pub fn b197(&mut self) -> B197_W<'_>[src]

Bit 5 - B197

pub fn b198(&mut self) -> B198_W<'_>[src]

Bit 6 - B198

pub fn b199(&mut self) -> B199_W<'_>[src]

Bit 7 - B199

pub fn b200(&mut self) -> B200_W<'_>[src]

Bit 8 - B200

pub fn b201(&mut self) -> B201_W<'_>[src]

Bit 9 - B201

pub fn b202(&mut self) -> B202_W<'_>[src]

Bit 10 - B202

pub fn b203(&mut self) -> B203_W<'_>[src]

Bit 11 - B203

pub fn b204(&mut self) -> B204_W<'_>[src]

Bit 12 - B204

pub fn b205(&mut self) -> B205_W<'_>[src]

Bit 13 - B205

pub fn b206(&mut self) -> B206_W<'_>[src]

Bit 14 - B206

pub fn b207(&mut self) -> B207_W<'_>[src]

Bit 15 - B207

pub fn b208(&mut self) -> B208_W<'_>[src]

Bit 16 - B208

pub fn b209(&mut self) -> B209_W<'_>[src]

Bit 17 - B209

pub fn b210(&mut self) -> B210_W<'_>[src]

Bit 18 - B210

pub fn b211(&mut self) -> B211_W<'_>[src]

Bit 19 - B211

pub fn b212(&mut self) -> B212_W<'_>[src]

Bit 20 - B212

pub fn b213(&mut self) -> B213_W<'_>[src]

Bit 21 - B213

pub fn b214(&mut self) -> B214_W<'_>[src]

Bit 22 - B214

pub fn b215(&mut self) -> B215_W<'_>[src]

Bit 23 - B215

pub fn b216(&mut self) -> B216_W<'_>[src]

Bit 24 - B216

pub fn b217(&mut self) -> B217_W<'_>[src]

Bit 25 - B217

pub fn b218(&mut self) -> B218_W<'_>[src]

Bit 26 - B218

pub fn b219(&mut self) -> B219_W<'_>[src]

Bit 27 - B219

pub fn b220(&mut self) -> B220_W<'_>[src]

Bit 28 - B220

pub fn b221(&mut self) -> B221_W<'_>[src]

Bit 29 - B221

pub fn b222(&mut self) -> B222_W<'_>[src]

Bit 30 - B222

pub fn b223(&mut self) -> B223_W<'_>[src]

Bit 31 - B223

impl W<u32, Reg<u32, _MPCBB2_VCTR7>>[src]

pub fn b224(&mut self) -> B224_W<'_>[src]

Bit 0 - B224

pub fn b225(&mut self) -> B225_W<'_>[src]

Bit 1 - B225

pub fn b226(&mut self) -> B226_W<'_>[src]

Bit 2 - B226

pub fn b227(&mut self) -> B227_W<'_>[src]

Bit 3 - B227

pub fn b228(&mut self) -> B228_W<'_>[src]

Bit 4 - B228

pub fn b229(&mut self) -> B229_W<'_>[src]

Bit 5 - B229

pub fn b230(&mut self) -> B230_W<'_>[src]

Bit 6 - B230

pub fn b231(&mut self) -> B231_W<'_>[src]

Bit 7 - B231

pub fn b232(&mut self) -> B232_W<'_>[src]

Bit 8 - B232

pub fn b233(&mut self) -> B233_W<'_>[src]

Bit 9 - B233

pub fn b234(&mut self) -> B234_W<'_>[src]

Bit 10 - B234

pub fn b235(&mut self) -> B235_W<'_>[src]

Bit 11 - B235

pub fn b236(&mut self) -> B236_W<'_>[src]

Bit 12 - B236

pub fn b237(&mut self) -> B237_W<'_>[src]

Bit 13 - B237

pub fn b238(&mut self) -> B238_W<'_>[src]

Bit 14 - B238

pub fn b239(&mut self) -> B239_W<'_>[src]

Bit 15 - B239

pub fn b240(&mut self) -> B240_W<'_>[src]

Bit 16 - B240

pub fn b241(&mut self) -> B241_W<'_>[src]

Bit 17 - B241

pub fn b242(&mut self) -> B242_W<'_>[src]

Bit 18 - B242

pub fn b243(&mut self) -> B243_W<'_>[src]

Bit 19 - B243

pub fn b244(&mut self) -> B244_W<'_>[src]

Bit 20 - B244

pub fn b245(&mut self) -> B245_W<'_>[src]

Bit 21 - B245

pub fn b246(&mut self) -> B246_W<'_>[src]

Bit 22 - B246

pub fn b247(&mut self) -> B247_W<'_>[src]

Bit 23 - B247

pub fn b248(&mut self) -> B248_W<'_>[src]

Bit 24 - B248

pub fn b249(&mut self) -> B249_W<'_>[src]

Bit 25 - B249

pub fn b250(&mut self) -> B250_W<'_>[src]

Bit 26 - B250

pub fn b251(&mut self) -> B251_W<'_>[src]

Bit 27 - B251

pub fn b252(&mut self) -> B252_W<'_>[src]

Bit 28 - B252

pub fn b253(&mut self) -> B253_W<'_>[src]

Bit 29 - B253

pub fn b254(&mut self) -> B254_W<'_>[src]

Bit 30 - B254

pub fn b255(&mut self) -> B255_W<'_>[src]

Bit 31 - B255

impl W<u32, Reg<u32, _MPCBB2_VCTR8>>[src]

pub fn b256(&mut self) -> B256_W<'_>[src]

Bit 0 - B256

pub fn b257(&mut self) -> B257_W<'_>[src]

Bit 1 - B257

pub fn b258(&mut self) -> B258_W<'_>[src]

Bit 2 - B258

pub fn b259(&mut self) -> B259_W<'_>[src]

Bit 3 - B259

pub fn b260(&mut self) -> B260_W<'_>[src]

Bit 4 - B260

pub fn b261(&mut self) -> B261_W<'_>[src]

Bit 5 - B261

pub fn b262(&mut self) -> B262_W<'_>[src]

Bit 6 - B262

pub fn b263(&mut self) -> B263_W<'_>[src]

Bit 7 - B263

pub fn b264(&mut self) -> B264_W<'_>[src]

Bit 8 - B264

pub fn b265(&mut self) -> B265_W<'_>[src]

Bit 9 - B265

pub fn b266(&mut self) -> B266_W<'_>[src]

Bit 10 - B266

pub fn b267(&mut self) -> B267_W<'_>[src]

Bit 11 - B267

pub fn b268(&mut self) -> B268_W<'_>[src]

Bit 12 - B268

pub fn b269(&mut self) -> B269_W<'_>[src]

Bit 13 - B269

pub fn b270(&mut self) -> B270_W<'_>[src]

Bit 14 - B270

pub fn b271(&mut self) -> B271_W<'_>[src]

Bit 15 - B271

pub fn b272(&mut self) -> B272_W<'_>[src]

Bit 16 - B272

pub fn b273(&mut self) -> B273_W<'_>[src]

Bit 17 - B273

pub fn b274(&mut self) -> B274_W<'_>[src]

Bit 18 - B274

pub fn b275(&mut self) -> B275_W<'_>[src]

Bit 19 - B275

pub fn b276(&mut self) -> B276_W<'_>[src]

Bit 20 - B276

pub fn b277(&mut self) -> B277_W<'_>[src]

Bit 21 - B277

pub fn b278(&mut self) -> B278_W<'_>[src]

Bit 22 - B278

pub fn b279(&mut self) -> B279_W<'_>[src]

Bit 23 - B279

pub fn b280(&mut self) -> B280_W<'_>[src]

Bit 24 - B280

pub fn b281(&mut self) -> B281_W<'_>[src]

Bit 25 - B281

pub fn b282(&mut self) -> B282_W<'_>[src]

Bit 26 - B282

pub fn b283(&mut self) -> B283_W<'_>[src]

Bit 27 - B283

pub fn b284(&mut self) -> B284_W<'_>[src]

Bit 28 - B284

pub fn b285(&mut self) -> B285_W<'_>[src]

Bit 29 - B285

pub fn b286(&mut self) -> B286_W<'_>[src]

Bit 30 - B286

pub fn b287(&mut self) -> B287_W<'_>[src]

Bit 31 - B287

impl W<u32, Reg<u32, _MPCBB2_VCTR9>>[src]

pub fn b288(&mut self) -> B288_W<'_>[src]

Bit 0 - B288

pub fn b289(&mut self) -> B289_W<'_>[src]

Bit 1 - B289

pub fn b290(&mut self) -> B290_W<'_>[src]

Bit 2 - B290

pub fn b291(&mut self) -> B291_W<'_>[src]

Bit 3 - B291

pub fn b292(&mut self) -> B292_W<'_>[src]

Bit 4 - B292

pub fn b293(&mut self) -> B293_W<'_>[src]

Bit 5 - B293

pub fn b294(&mut self) -> B294_W<'_>[src]

Bit 6 - B294

pub fn b295(&mut self) -> B295_W<'_>[src]

Bit 7 - B295

pub fn b296(&mut self) -> B296_W<'_>[src]

Bit 8 - B296

pub fn b297(&mut self) -> B297_W<'_>[src]

Bit 9 - B297

pub fn b298(&mut self) -> B298_W<'_>[src]

Bit 10 - B298

pub fn b299(&mut self) -> B299_W<'_>[src]

Bit 11 - B299

pub fn b300(&mut self) -> B300_W<'_>[src]

Bit 12 - B300

pub fn b301(&mut self) -> B301_W<'_>[src]

Bit 13 - B301

pub fn b302(&mut self) -> B302_W<'_>[src]

Bit 14 - B302

pub fn b303(&mut self) -> B303_W<'_>[src]

Bit 15 - B303

pub fn b304(&mut self) -> B304_W<'_>[src]

Bit 16 - B304

pub fn b305(&mut self) -> B305_W<'_>[src]

Bit 17 - B305

pub fn b306(&mut self) -> B306_W<'_>[src]

Bit 18 - B306

pub fn b307(&mut self) -> B307_W<'_>[src]

Bit 19 - B307

pub fn b308(&mut self) -> B308_W<'_>[src]

Bit 20 - B308

pub fn b309(&mut self) -> B309_W<'_>[src]

Bit 21 - B309

pub fn b310(&mut self) -> B310_W<'_>[src]

Bit 22 - B310

pub fn b311(&mut self) -> B311_W<'_>[src]

Bit 23 - B311

pub fn b312(&mut self) -> B312_W<'_>[src]

Bit 24 - B312

pub fn b313(&mut self) -> B313_W<'_>[src]

Bit 25 - B313

pub fn b314(&mut self) -> B314_W<'_>[src]

Bit 26 - B314

pub fn b315(&mut self) -> B315_W<'_>[src]

Bit 27 - B315

pub fn b316(&mut self) -> B316_W<'_>[src]

Bit 28 - B316

pub fn b317(&mut self) -> B317_W<'_>[src]

Bit 29 - B317

pub fn b318(&mut self) -> B318_W<'_>[src]

Bit 30 - B318

pub fn b319(&mut self) -> B319_W<'_>[src]

Bit 31 - B319

impl W<u32, Reg<u32, _MPCBB2_VCTR10>>[src]

pub fn b320(&mut self) -> B320_W<'_>[src]

Bit 0 - B320

pub fn b321(&mut self) -> B321_W<'_>[src]

Bit 1 - B321

pub fn b322(&mut self) -> B322_W<'_>[src]

Bit 2 - B322

pub fn b323(&mut self) -> B323_W<'_>[src]

Bit 3 - B323

pub fn b324(&mut self) -> B324_W<'_>[src]

Bit 4 - B324

pub fn b325(&mut self) -> B325_W<'_>[src]

Bit 5 - B325

pub fn b326(&mut self) -> B326_W<'_>[src]

Bit 6 - B326

pub fn b327(&mut self) -> B327_W<'_>[src]

Bit 7 - B327

pub fn b328(&mut self) -> B328_W<'_>[src]

Bit 8 - B328

pub fn b329(&mut self) -> B329_W<'_>[src]

Bit 9 - B329

pub fn b330(&mut self) -> B330_W<'_>[src]

Bit 10 - B330

pub fn b331(&mut self) -> B331_W<'_>[src]

Bit 11 - B331

pub fn b332(&mut self) -> B332_W<'_>[src]

Bit 12 - B332

pub fn b333(&mut self) -> B333_W<'_>[src]

Bit 13 - B333

pub fn b334(&mut self) -> B334_W<'_>[src]

Bit 14 - B334

pub fn b335(&mut self) -> B335_W<'_>[src]

Bit 15 - B335

pub fn b336(&mut self) -> B336_W<'_>[src]

Bit 16 - B336

pub fn b337(&mut self) -> B337_W<'_>[src]

Bit 17 - B337

pub fn b338(&mut self) -> B338_W<'_>[src]

Bit 18 - B338

pub fn b339(&mut self) -> B339_W<'_>[src]

Bit 19 - B339

pub fn b340(&mut self) -> B340_W<'_>[src]

Bit 20 - B340

pub fn b341(&mut self) -> B341_W<'_>[src]

Bit 21 - B341

pub fn b342(&mut self) -> B342_W<'_>[src]

Bit 22 - B342

pub fn b343(&mut self) -> B343_W<'_>[src]

Bit 23 - B343

pub fn b344(&mut self) -> B344_W<'_>[src]

Bit 24 - B344

pub fn b345(&mut self) -> B345_W<'_>[src]

Bit 25 - B345

pub fn b346(&mut self) -> B346_W<'_>[src]

Bit 26 - B346

pub fn b347(&mut self) -> B347_W<'_>[src]

Bit 27 - B347

pub fn b348(&mut self) -> B348_W<'_>[src]

Bit 28 - B348

pub fn b349(&mut self) -> B349_W<'_>[src]

Bit 29 - B349

pub fn b350(&mut self) -> B350_W<'_>[src]

Bit 30 - B350

pub fn b351(&mut self) -> B351_W<'_>[src]

Bit 31 - B351

impl W<u32, Reg<u32, _MPCBB2_VCTR11>>[src]

pub fn b352(&mut self) -> B352_W<'_>[src]

Bit 0 - B352

pub fn b353(&mut self) -> B353_W<'_>[src]

Bit 1 - B353

pub fn b354(&mut self) -> B354_W<'_>[src]

Bit 2 - B354

pub fn b355(&mut self) -> B355_W<'_>[src]

Bit 3 - B355

pub fn b356(&mut self) -> B356_W<'_>[src]

Bit 4 - B356

pub fn b357(&mut self) -> B357_W<'_>[src]

Bit 5 - B357

pub fn b358(&mut self) -> B358_W<'_>[src]

Bit 6 - B358

pub fn b359(&mut self) -> B359_W<'_>[src]

Bit 7 - B359

pub fn b360(&mut self) -> B360_W<'_>[src]

Bit 8 - B360

pub fn b361(&mut self) -> B361_W<'_>[src]

Bit 9 - B361

pub fn b362(&mut self) -> B362_W<'_>[src]

Bit 10 - B362

pub fn b363(&mut self) -> B363_W<'_>[src]

Bit 11 - B363

pub fn b364(&mut self) -> B364_W<'_>[src]

Bit 12 - B364

pub fn b365(&mut self) -> B365_W<'_>[src]

Bit 13 - B365

pub fn b366(&mut self) -> B366_W<'_>[src]

Bit 14 - B366

pub fn b367(&mut self) -> B367_W<'_>[src]

Bit 15 - B367

pub fn b368(&mut self) -> B368_W<'_>[src]

Bit 16 - B368

pub fn b369(&mut self) -> B369_W<'_>[src]

Bit 17 - B369

pub fn b370(&mut self) -> B370_W<'_>[src]

Bit 18 - B370

pub fn b371(&mut self) -> B371_W<'_>[src]

Bit 19 - B371

pub fn b372(&mut self) -> B372_W<'_>[src]

Bit 20 - B372

pub fn b373(&mut self) -> B373_W<'_>[src]

Bit 21 - B373

pub fn b374(&mut self) -> B374_W<'_>[src]

Bit 22 - B374

pub fn b375(&mut self) -> B375_W<'_>[src]

Bit 23 - B375

pub fn b376(&mut self) -> B376_W<'_>[src]

Bit 24 - B376

pub fn b377(&mut self) -> B377_W<'_>[src]

Bit 25 - B377

pub fn b378(&mut self) -> B378_W<'_>[src]

Bit 26 - B378

pub fn b379(&mut self) -> B379_W<'_>[src]

Bit 27 - B379

pub fn b380(&mut self) -> B380_W<'_>[src]

Bit 28 - B380

pub fn b381(&mut self) -> B381_W<'_>[src]

Bit 29 - B381

pub fn b382(&mut self) -> B382_W<'_>[src]

Bit 30 - B382

pub fn b383(&mut self) -> B383_W<'_>[src]

Bit 31 - B383

impl W<u32, Reg<u32, _MPCBB2_VCTR12>>[src]

pub fn b384(&mut self) -> B384_W<'_>[src]

Bit 0 - B384

pub fn b385(&mut self) -> B385_W<'_>[src]

Bit 1 - B385

pub fn b386(&mut self) -> B386_W<'_>[src]

Bit 2 - B386

pub fn b387(&mut self) -> B387_W<'_>[src]

Bit 3 - B387

pub fn b388(&mut self) -> B388_W<'_>[src]

Bit 4 - B388

pub fn b389(&mut self) -> B389_W<'_>[src]

Bit 5 - B389

pub fn b390(&mut self) -> B390_W<'_>[src]

Bit 6 - B390

pub fn b391(&mut self) -> B391_W<'_>[src]

Bit 7 - B391

pub fn b392(&mut self) -> B392_W<'_>[src]

Bit 8 - B392

pub fn b393(&mut self) -> B393_W<'_>[src]

Bit 9 - B393

pub fn b394(&mut self) -> B394_W<'_>[src]

Bit 10 - B394

pub fn b395(&mut self) -> B395_W<'_>[src]

Bit 11 - B395

pub fn b396(&mut self) -> B396_W<'_>[src]

Bit 12 - B396

pub fn b397(&mut self) -> B397_W<'_>[src]

Bit 13 - B397

pub fn b398(&mut self) -> B398_W<'_>[src]

Bit 14 - B398

pub fn b399(&mut self) -> B399_W<'_>[src]

Bit 15 - B399

pub fn b400(&mut self) -> B400_W<'_>[src]

Bit 16 - B400

pub fn b401(&mut self) -> B401_W<'_>[src]

Bit 17 - B401

pub fn b402(&mut self) -> B402_W<'_>[src]

Bit 18 - B402

pub fn b403(&mut self) -> B403_W<'_>[src]

Bit 19 - B403

pub fn b404(&mut self) -> B404_W<'_>[src]

Bit 20 - B404

pub fn b405(&mut self) -> B405_W<'_>[src]

Bit 21 - B405

pub fn b406(&mut self) -> B406_W<'_>[src]

Bit 22 - B406

pub fn b407(&mut self) -> B407_W<'_>[src]

Bit 23 - B407

pub fn b408(&mut self) -> B408_W<'_>[src]

Bit 24 - B408

pub fn b409(&mut self) -> B409_W<'_>[src]

Bit 25 - B409

pub fn b410(&mut self) -> B410_W<'_>[src]

Bit 26 - B410

pub fn b411(&mut self) -> B411_W<'_>[src]

Bit 27 - B411

pub fn b412(&mut self) -> B412_W<'_>[src]

Bit 28 - B412

pub fn b413(&mut self) -> B413_W<'_>[src]

Bit 29 - B413

pub fn b414(&mut self) -> B414_W<'_>[src]

Bit 30 - B414

pub fn b415(&mut self) -> B415_W<'_>[src]

Bit 31 - B415

impl W<u32, Reg<u32, _MPCBB2_VCTR13>>[src]

pub fn b416(&mut self) -> B416_W<'_>[src]

Bit 0 - B416

pub fn b417(&mut self) -> B417_W<'_>[src]

Bit 1 - B417

pub fn b418(&mut self) -> B418_W<'_>[src]

Bit 2 - B418

pub fn b419(&mut self) -> B419_W<'_>[src]

Bit 3 - B419

pub fn b420(&mut self) -> B420_W<'_>[src]

Bit 4 - B420

pub fn b421(&mut self) -> B421_W<'_>[src]

Bit 5 - B421

pub fn b422(&mut self) -> B422_W<'_>[src]

Bit 6 - B422

pub fn b423(&mut self) -> B423_W<'_>[src]

Bit 7 - B423

pub fn b424(&mut self) -> B424_W<'_>[src]

Bit 8 - B424

pub fn b425(&mut self) -> B425_W<'_>[src]

Bit 9 - B425

pub fn b426(&mut self) -> B426_W<'_>[src]

Bit 10 - B426

pub fn b427(&mut self) -> B427_W<'_>[src]

Bit 11 - B427

pub fn b428(&mut self) -> B428_W<'_>[src]

Bit 12 - B428

pub fn b429(&mut self) -> B429_W<'_>[src]

Bit 13 - B429

pub fn b430(&mut self) -> B430_W<'_>[src]

Bit 14 - B430

pub fn b431(&mut self) -> B431_W<'_>[src]

Bit 15 - B431

pub fn b432(&mut self) -> B432_W<'_>[src]

Bit 16 - B432

pub fn b433(&mut self) -> B433_W<'_>[src]

Bit 17 - B433

pub fn b434(&mut self) -> B434_W<'_>[src]

Bit 18 - B434

pub fn b435(&mut self) -> B435_W<'_>[src]

Bit 19 - B435

pub fn b436(&mut self) -> B436_W<'_>[src]

Bit 20 - B436

pub fn b437(&mut self) -> B437_W<'_>[src]

Bit 21 - B437

pub fn b438(&mut self) -> B438_W<'_>[src]

Bit 22 - B438

pub fn b439(&mut self) -> B439_W<'_>[src]

Bit 23 - B439

pub fn b440(&mut self) -> B440_W<'_>[src]

Bit 24 - B440

pub fn b441(&mut self) -> B441_W<'_>[src]

Bit 25 - B441

pub fn b442(&mut self) -> B442_W<'_>[src]

Bit 26 - B442

pub fn b443(&mut self) -> B443_W<'_>[src]

Bit 27 - B443

pub fn b444(&mut self) -> B444_W<'_>[src]

Bit 28 - B444

pub fn b445(&mut self) -> B445_W<'_>[src]

Bit 29 - B445

pub fn b446(&mut self) -> B446_W<'_>[src]

Bit 30 - B446

pub fn b447(&mut self) -> B447_W<'_>[src]

Bit 31 - B447

impl W<u32, Reg<u32, _MPCBB2_VCTR14>>[src]

pub fn b448(&mut self) -> B448_W<'_>[src]

Bit 0 - B448

pub fn b449(&mut self) -> B449_W<'_>[src]

Bit 1 - B449

pub fn b450(&mut self) -> B450_W<'_>[src]

Bit 2 - B450

pub fn b451(&mut self) -> B451_W<'_>[src]

Bit 3 - B451

pub fn b452(&mut self) -> B452_W<'_>[src]

Bit 4 - B452

pub fn b453(&mut self) -> B453_W<'_>[src]

Bit 5 - B453

pub fn b454(&mut self) -> B454_W<'_>[src]

Bit 6 - B454

pub fn b455(&mut self) -> B455_W<'_>[src]

Bit 7 - B455

pub fn b456(&mut self) -> B456_W<'_>[src]

Bit 8 - B456

pub fn b457(&mut self) -> B457_W<'_>[src]

Bit 9 - B457

pub fn b458(&mut self) -> B458_W<'_>[src]

Bit 10 - B458

pub fn b459(&mut self) -> B459_W<'_>[src]

Bit 11 - B459

pub fn b460(&mut self) -> B460_W<'_>[src]

Bit 12 - B460

pub fn b461(&mut self) -> B461_W<'_>[src]

Bit 13 - B461

pub fn b462(&mut self) -> B462_W<'_>[src]

Bit 14 - B462

pub fn b463(&mut self) -> B463_W<'_>[src]

Bit 15 - B463

pub fn b464(&mut self) -> B464_W<'_>[src]

Bit 16 - B464

pub fn b465(&mut self) -> B465_W<'_>[src]

Bit 17 - B465

pub fn b466(&mut self) -> B466_W<'_>[src]

Bit 18 - B466

pub fn b467(&mut self) -> B467_W<'_>[src]

Bit 19 - B467

pub fn b468(&mut self) -> B468_W<'_>[src]

Bit 20 - B468

pub fn b469(&mut self) -> B469_W<'_>[src]

Bit 21 - B469

pub fn b470(&mut self) -> B470_W<'_>[src]

Bit 22 - B470

pub fn b471(&mut self) -> B471_W<'_>[src]

Bit 23 - B471

pub fn b472(&mut self) -> B472_W<'_>[src]

Bit 24 - B472

pub fn b473(&mut self) -> B473_W<'_>[src]

Bit 25 - B473

pub fn b474(&mut self) -> B474_W<'_>[src]

Bit 26 - B474

pub fn b475(&mut self) -> B475_W<'_>[src]

Bit 27 - B475

pub fn b476(&mut self) -> B476_W<'_>[src]

Bit 28 - B476

pub fn b477(&mut self) -> B477_W<'_>[src]

Bit 29 - B477

pub fn b478(&mut self) -> B478_W<'_>[src]

Bit 30 - B478

pub fn b479(&mut self) -> B479_W<'_>[src]

Bit 31 - B479

impl W<u32, Reg<u32, _MPCBB2_VCTR15>>[src]

pub fn b480(&mut self) -> B480_W<'_>[src]

Bit 0 - B480

pub fn b481(&mut self) -> B481_W<'_>[src]

Bit 1 - B481

pub fn b482(&mut self) -> B482_W<'_>[src]

Bit 2 - B482

pub fn b483(&mut self) -> B483_W<'_>[src]

Bit 3 - B483

pub fn b484(&mut self) -> B484_W<'_>[src]

Bit 4 - B484

pub fn b485(&mut self) -> B485_W<'_>[src]

Bit 5 - B485

pub fn b486(&mut self) -> B486_W<'_>[src]

Bit 6 - B486

pub fn b487(&mut self) -> B487_W<'_>[src]

Bit 7 - B487

pub fn b488(&mut self) -> B488_W<'_>[src]

Bit 8 - B488

pub fn b489(&mut self) -> B489_W<'_>[src]

Bit 9 - B489

pub fn b490(&mut self) -> B490_W<'_>[src]

Bit 10 - B490

pub fn b491(&mut self) -> B491_W<'_>[src]

Bit 11 - B491

pub fn b492(&mut self) -> B492_W<'_>[src]

Bit 12 - B492

pub fn b493(&mut self) -> B493_W<'_>[src]

Bit 13 - B493

pub fn b494(&mut self) -> B494_W<'_>[src]

Bit 14 - B494

pub fn b495(&mut self) -> B495_W<'_>[src]

Bit 15 - B495

pub fn b496(&mut self) -> B496_W<'_>[src]

Bit 16 - B496

pub fn b497(&mut self) -> B497_W<'_>[src]

Bit 17 - B497

pub fn b498(&mut self) -> B498_W<'_>[src]

Bit 18 - B498

pub fn b499(&mut self) -> B499_W<'_>[src]

Bit 19 - B499

pub fn b500(&mut self) -> B500_W<'_>[src]

Bit 20 - B500

pub fn b501(&mut self) -> B501_W<'_>[src]

Bit 21 - B501

pub fn b502(&mut self) -> B502_W<'_>[src]

Bit 22 - B502

pub fn b503(&mut self) -> B503_W<'_>[src]

Bit 23 - B503

pub fn b504(&mut self) -> B504_W<'_>[src]

Bit 24 - B504

pub fn b505(&mut self) -> B505_W<'_>[src]

Bit 25 - B505

pub fn b506(&mut self) -> B506_W<'_>[src]

Bit 26 - B506

pub fn b507(&mut self) -> B507_W<'_>[src]

Bit 27 - B507

pub fn b508(&mut self) -> B508_W<'_>[src]

Bit 28 - B508

pub fn b509(&mut self) -> B509_W<'_>[src]

Bit 29 - B509

pub fn b510(&mut self) -> B510_W<'_>[src]

Bit 30 - B510

pub fn b511(&mut self) -> B511_W<'_>[src]

Bit 31 - B511

impl W<u32, Reg<u32, _MPCBB2_VCTR16>>[src]

pub fn b512(&mut self) -> B512_W<'_>[src]

Bit 0 - B512

pub fn b513(&mut self) -> B513_W<'_>[src]

Bit 1 - B513

pub fn b514(&mut self) -> B514_W<'_>[src]

Bit 2 - B514

pub fn b515(&mut self) -> B515_W<'_>[src]

Bit 3 - B515

pub fn b516(&mut self) -> B516_W<'_>[src]

Bit 4 - B516

pub fn b517(&mut self) -> B517_W<'_>[src]

Bit 5 - B517

pub fn b518(&mut self) -> B518_W<'_>[src]

Bit 6 - B518

pub fn b519(&mut self) -> B519_W<'_>[src]

Bit 7 - B519

pub fn b520(&mut self) -> B520_W<'_>[src]

Bit 8 - B520

pub fn b521(&mut self) -> B521_W<'_>[src]

Bit 9 - B521

pub fn b522(&mut self) -> B522_W<'_>[src]

Bit 10 - B522

pub fn b523(&mut self) -> B523_W<'_>[src]

Bit 11 - B523

pub fn b524(&mut self) -> B524_W<'_>[src]

Bit 12 - B524

pub fn b525(&mut self) -> B525_W<'_>[src]

Bit 13 - B525

pub fn b526(&mut self) -> B526_W<'_>[src]

Bit 14 - B526

pub fn b527(&mut self) -> B527_W<'_>[src]

Bit 15 - B527

pub fn b528(&mut self) -> B528_W<'_>[src]

Bit 16 - B528

pub fn b529(&mut self) -> B529_W<'_>[src]

Bit 17 - B529

pub fn b530(&mut self) -> B530_W<'_>[src]

Bit 18 - B530

pub fn b531(&mut self) -> B531_W<'_>[src]

Bit 19 - B531

pub fn b532(&mut self) -> B532_W<'_>[src]

Bit 20 - B532

pub fn b533(&mut self) -> B533_W<'_>[src]

Bit 21 - B533

pub fn b534(&mut self) -> B534_W<'_>[src]

Bit 22 - B534

pub fn b535(&mut self) -> B535_W<'_>[src]

Bit 23 - B535

pub fn b536(&mut self) -> B536_W<'_>[src]

Bit 24 - B536

pub fn b537(&mut self) -> B537_W<'_>[src]

Bit 25 - B537

pub fn b538(&mut self) -> B538_W<'_>[src]

Bit 26 - B538

pub fn b539(&mut self) -> B539_W<'_>[src]

Bit 27 - B539

pub fn b540(&mut self) -> B540_W<'_>[src]

Bit 28 - B540

pub fn b541(&mut self) -> B541_W<'_>[src]

Bit 29 - B541

pub fn b542(&mut self) -> B542_W<'_>[src]

Bit 30 - B542

pub fn b543(&mut self) -> B543_W<'_>[src]

Bit 31 - B543

impl W<u32, Reg<u32, _MPCBB2_VCTR17>>[src]

pub fn b544(&mut self) -> B544_W<'_>[src]

Bit 0 - B544

pub fn b545(&mut self) -> B545_W<'_>[src]

Bit 1 - B545

pub fn b546(&mut self) -> B546_W<'_>[src]

Bit 2 - B546

pub fn b547(&mut self) -> B547_W<'_>[src]

Bit 3 - B547

pub fn b548(&mut self) -> B548_W<'_>[src]

Bit 4 - B548

pub fn b549(&mut self) -> B549_W<'_>[src]

Bit 5 - B549

pub fn b550(&mut self) -> B550_W<'_>[src]

Bit 6 - B550

pub fn b551(&mut self) -> B551_W<'_>[src]

Bit 7 - B551

pub fn b552(&mut self) -> B552_W<'_>[src]

Bit 8 - B552

pub fn b553(&mut self) -> B553_W<'_>[src]

Bit 9 - B553

pub fn b554(&mut self) -> B554_W<'_>[src]

Bit 10 - B554

pub fn b555(&mut self) -> B555_W<'_>[src]

Bit 11 - B555

pub fn b556(&mut self) -> B556_W<'_>[src]

Bit 12 - B556

pub fn b557(&mut self) -> B557_W<'_>[src]

Bit 13 - B557

pub fn b558(&mut self) -> B558_W<'_>[src]

Bit 14 - B558

pub fn b559(&mut self) -> B559_W<'_>[src]

Bit 15 - B559

pub fn b560(&mut self) -> B560_W<'_>[src]

Bit 16 - B560

pub fn b561(&mut self) -> B561_W<'_>[src]

Bit 17 - B561

pub fn b562(&mut self) -> B562_W<'_>[src]

Bit 18 - B562

pub fn b563(&mut self) -> B563_W<'_>[src]

Bit 19 - B563

pub fn b564(&mut self) -> B564_W<'_>[src]

Bit 20 - B564

pub fn b565(&mut self) -> B565_W<'_>[src]

Bit 21 - B565

pub fn b566(&mut self) -> B566_W<'_>[src]

Bit 22 - B566

pub fn b567(&mut self) -> B567_W<'_>[src]

Bit 23 - B567

pub fn b568(&mut self) -> B568_W<'_>[src]

Bit 24 - B568

pub fn b569(&mut self) -> B569_W<'_>[src]

Bit 25 - B569

pub fn b570(&mut self) -> B570_W<'_>[src]

Bit 26 - B570

pub fn b571(&mut self) -> B571_W<'_>[src]

Bit 27 - B571

pub fn b572(&mut self) -> B572_W<'_>[src]

Bit 28 - B572

pub fn b573(&mut self) -> B573_W<'_>[src]

Bit 29 - B573

pub fn b574(&mut self) -> B574_W<'_>[src]

Bit 30 - B574

pub fn b575(&mut self) -> B575_W<'_>[src]

Bit 31 - B575

impl W<u32, Reg<u32, _MPCBB2_VCTR18>>[src]

pub fn b576(&mut self) -> B576_W<'_>[src]

Bit 0 - B576

pub fn b577(&mut self) -> B577_W<'_>[src]

Bit 1 - B577

pub fn b578(&mut self) -> B578_W<'_>[src]

Bit 2 - B578

pub fn b579(&mut self) -> B579_W<'_>[src]

Bit 3 - B579

pub fn b580(&mut self) -> B580_W<'_>[src]

Bit 4 - B580

pub fn b581(&mut self) -> B581_W<'_>[src]

Bit 5 - B581

pub fn b582(&mut self) -> B582_W<'_>[src]

Bit 6 - B582

pub fn b583(&mut self) -> B583_W<'_>[src]

Bit 7 - B583

pub fn b584(&mut self) -> B584_W<'_>[src]

Bit 8 - B584

pub fn b585(&mut self) -> B585_W<'_>[src]

Bit 9 - B585

pub fn b586(&mut self) -> B586_W<'_>[src]

Bit 10 - B586

pub fn b587(&mut self) -> B587_W<'_>[src]

Bit 11 - B587

pub fn b588(&mut self) -> B588_W<'_>[src]

Bit 12 - B588

pub fn b589(&mut self) -> B589_W<'_>[src]

Bit 13 - B589

pub fn b590(&mut self) -> B590_W<'_>[src]

Bit 14 - B590

pub fn b591(&mut self) -> B591_W<'_>[src]

Bit 15 - B591

pub fn b592(&mut self) -> B592_W<'_>[src]

Bit 16 - B592

pub fn b593(&mut self) -> B593_W<'_>[src]

Bit 17 - B593

pub fn b594(&mut self) -> B594_W<'_>[src]

Bit 18 - B594

pub fn b595(&mut self) -> B595_W<'_>[src]

Bit 19 - B595

pub fn b596(&mut self) -> B596_W<'_>[src]

Bit 20 - B596

pub fn b597(&mut self) -> B597_W<'_>[src]

Bit 21 - B597

pub fn b598(&mut self) -> B598_W<'_>[src]

Bit 22 - B598

pub fn b599(&mut self) -> B599_W<'_>[src]

Bit 23 - B599

pub fn b600(&mut self) -> B600_W<'_>[src]

Bit 24 - B600

pub fn b601(&mut self) -> B601_W<'_>[src]

Bit 25 - B601

pub fn b602(&mut self) -> B602_W<'_>[src]

Bit 26 - B602

pub fn b603(&mut self) -> B603_W<'_>[src]

Bit 27 - B603

pub fn b604(&mut self) -> B604_W<'_>[src]

Bit 28 - B604

pub fn b605(&mut self) -> B605_W<'_>[src]

Bit 29 - B605

pub fn b606(&mut self) -> B606_W<'_>[src]

Bit 30 - B606

pub fn b607(&mut self) -> B607_W<'_>[src]

Bit 31 - B607

impl W<u32, Reg<u32, _MPCBB2_VCTR19>>[src]

pub fn b608(&mut self) -> B608_W<'_>[src]

Bit 0 - B608

pub fn b609(&mut self) -> B609_W<'_>[src]

Bit 1 - B609

pub fn b610(&mut self) -> B610_W<'_>[src]

Bit 2 - B610

pub fn b611(&mut self) -> B611_W<'_>[src]

Bit 3 - B611

pub fn b612(&mut self) -> B612_W<'_>[src]

Bit 4 - B612

pub fn b613(&mut self) -> B613_W<'_>[src]

Bit 5 - B613

pub fn b614(&mut self) -> B614_W<'_>[src]

Bit 6 - B614

pub fn b615(&mut self) -> B615_W<'_>[src]

Bit 7 - B615

pub fn b616(&mut self) -> B616_W<'_>[src]

Bit 8 - B616

pub fn b617(&mut self) -> B617_W<'_>[src]

Bit 9 - B617

pub fn b618(&mut self) -> B618_W<'_>[src]

Bit 10 - B618

pub fn b619(&mut self) -> B619_W<'_>[src]

Bit 11 - B619

pub fn b620(&mut self) -> B620_W<'_>[src]

Bit 12 - B620

pub fn b621(&mut self) -> B621_W<'_>[src]

Bit 13 - B621

pub fn b622(&mut self) -> B622_W<'_>[src]

Bit 14 - B622

pub fn b623(&mut self) -> B623_W<'_>[src]

Bit 15 - B623

pub fn b624(&mut self) -> B624_W<'_>[src]

Bit 16 - B624

pub fn b625(&mut self) -> B625_W<'_>[src]

Bit 17 - B625

pub fn b626(&mut self) -> B626_W<'_>[src]

Bit 18 - B626

pub fn b627(&mut self) -> B627_W<'_>[src]

Bit 19 - B627

pub fn b628(&mut self) -> B628_W<'_>[src]

Bit 20 - B628

pub fn b629(&mut self) -> B629_W<'_>[src]

Bit 21 - B629

pub fn b630(&mut self) -> B630_W<'_>[src]

Bit 22 - B630

pub fn b631(&mut self) -> B631_W<'_>[src]

Bit 23 - B631

pub fn b632(&mut self) -> B632_W<'_>[src]

Bit 24 - B632

pub fn b633(&mut self) -> B633_W<'_>[src]

Bit 25 - B633

pub fn b634(&mut self) -> B634_W<'_>[src]

Bit 26 - B634

pub fn b635(&mut self) -> B635_W<'_>[src]

Bit 27 - B635

pub fn b636(&mut self) -> B636_W<'_>[src]

Bit 28 - B636

pub fn b637(&mut self) -> B637_W<'_>[src]

Bit 29 - B637

pub fn b638(&mut self) -> B638_W<'_>[src]

Bit 30 - B638

pub fn b639(&mut self) -> B639_W<'_>[src]

Bit 31 - B639

impl W<u32, Reg<u32, _MPCBB2_VCTR20>>[src]

pub fn b640(&mut self) -> B640_W<'_>[src]

Bit 0 - B640

pub fn b641(&mut self) -> B641_W<'_>[src]

Bit 1 - B641

pub fn b642(&mut self) -> B642_W<'_>[src]

Bit 2 - B642

pub fn b643(&mut self) -> B643_W<'_>[src]

Bit 3 - B643

pub fn b644(&mut self) -> B644_W<'_>[src]

Bit 4 - B644

pub fn b645(&mut self) -> B645_W<'_>[src]

Bit 5 - B645

pub fn b646(&mut self) -> B646_W<'_>[src]

Bit 6 - B646

pub fn b647(&mut self) -> B647_W<'_>[src]

Bit 7 - B647

pub fn b648(&mut self) -> B648_W<'_>[src]

Bit 8 - B648

pub fn b649(&mut self) -> B649_W<'_>[src]

Bit 9 - B649

pub fn b650(&mut self) -> B650_W<'_>[src]

Bit 10 - B650

pub fn b651(&mut self) -> B651_W<'_>[src]

Bit 11 - B651

pub fn b652(&mut self) -> B652_W<'_>[src]

Bit 12 - B652

pub fn b653(&mut self) -> B653_W<'_>[src]

Bit 13 - B653

pub fn b654(&mut self) -> B654_W<'_>[src]

Bit 14 - B654

pub fn b655(&mut self) -> B655_W<'_>[src]

Bit 15 - B655

pub fn b656(&mut self) -> B656_W<'_>[src]

Bit 16 - B656

pub fn b657(&mut self) -> B657_W<'_>[src]

Bit 17 - B657

pub fn b658(&mut self) -> B658_W<'_>[src]

Bit 18 - B658

pub fn b659(&mut self) -> B659_W<'_>[src]

Bit 19 - B659

pub fn b660(&mut self) -> B660_W<'_>[src]

Bit 20 - B660

pub fn b661(&mut self) -> B661_W<'_>[src]

Bit 21 - B661

pub fn b662(&mut self) -> B662_W<'_>[src]

Bit 22 - B662

pub fn b663(&mut self) -> B663_W<'_>[src]

Bit 23 - B663

pub fn b664(&mut self) -> B664_W<'_>[src]

Bit 24 - B664

pub fn b665(&mut self) -> B665_W<'_>[src]

Bit 25 - B665

pub fn b666(&mut self) -> B666_W<'_>[src]

Bit 26 - B666

pub fn b667(&mut self) -> B667_W<'_>[src]

Bit 27 - B667

pub fn b668(&mut self) -> B668_W<'_>[src]

Bit 28 - B668

pub fn b669(&mut self) -> B669_W<'_>[src]

Bit 29 - B669

pub fn b670(&mut self) -> B670_W<'_>[src]

Bit 30 - B670

pub fn b671(&mut self) -> B671_W<'_>[src]

Bit 31 - B671

impl W<u32, Reg<u32, _MPCBB2_VCTR21>>[src]

pub fn b672(&mut self) -> B672_W<'_>[src]

Bit 0 - B672

pub fn b673(&mut self) -> B673_W<'_>[src]

Bit 1 - B673

pub fn b674(&mut self) -> B674_W<'_>[src]

Bit 2 - B674

pub fn b675(&mut self) -> B675_W<'_>[src]

Bit 3 - B675

pub fn b676(&mut self) -> B676_W<'_>[src]

Bit 4 - B676

pub fn b677(&mut self) -> B677_W<'_>[src]

Bit 5 - B677

pub fn b678(&mut self) -> B678_W<'_>[src]

Bit 6 - B678

pub fn b679(&mut self) -> B679_W<'_>[src]

Bit 7 - B679

pub fn b680(&mut self) -> B680_W<'_>[src]

Bit 8 - B680

pub fn b681(&mut self) -> B681_W<'_>[src]

Bit 9 - B681

pub fn b682(&mut self) -> B682_W<'_>[src]

Bit 10 - B682

pub fn b683(&mut self) -> B683_W<'_>[src]

Bit 11 - B683

pub fn b684(&mut self) -> B684_W<'_>[src]

Bit 12 - B684

pub fn b685(&mut self) -> B685_W<'_>[src]

Bit 13 - B685

pub fn b686(&mut self) -> B686_W<'_>[src]

Bit 14 - B686

pub fn b687(&mut self) -> B687_W<'_>[src]

Bit 15 - B687

pub fn b688(&mut self) -> B688_W<'_>[src]

Bit 16 - B688

pub fn b689(&mut self) -> B689_W<'_>[src]

Bit 17 - B689

pub fn b690(&mut self) -> B690_W<'_>[src]

Bit 18 - B690

pub fn b691(&mut self) -> B691_W<'_>[src]

Bit 19 - B691

pub fn b692(&mut self) -> B692_W<'_>[src]

Bit 20 - B692

pub fn b693(&mut self) -> B693_W<'_>[src]

Bit 21 - B693

pub fn b694(&mut self) -> B694_W<'_>[src]

Bit 22 - B694

pub fn b695(&mut self) -> B695_W<'_>[src]

Bit 23 - B695

pub fn b696(&mut self) -> B696_W<'_>[src]

Bit 24 - B696

pub fn b697(&mut self) -> B697_W<'_>[src]

Bit 25 - B697

pub fn b698(&mut self) -> B698_W<'_>[src]

Bit 26 - B698

pub fn b699(&mut self) -> B699_W<'_>[src]

Bit 27 - B699

pub fn b700(&mut self) -> B700_W<'_>[src]

Bit 28 - B700

pub fn b701(&mut self) -> B701_W<'_>[src]

Bit 29 - B701

pub fn b702(&mut self) -> B702_W<'_>[src]

Bit 30 - B702

pub fn b703(&mut self) -> B703_W<'_>[src]

Bit 31 - B703

impl W<u32, Reg<u32, _MPCBB2_VCTR22>>[src]

pub fn b704(&mut self) -> B704_W<'_>[src]

Bit 0 - B704

pub fn b705(&mut self) -> B705_W<'_>[src]

Bit 1 - B705

pub fn b706(&mut self) -> B706_W<'_>[src]

Bit 2 - B706

pub fn b707(&mut self) -> B707_W<'_>[src]

Bit 3 - B707

pub fn b708(&mut self) -> B708_W<'_>[src]

Bit 4 - B708

pub fn b709(&mut self) -> B709_W<'_>[src]

Bit 5 - B709

pub fn b710(&mut self) -> B710_W<'_>[src]

Bit 6 - B710

pub fn b711(&mut self) -> B711_W<'_>[src]

Bit 7 - B711

pub fn b712(&mut self) -> B712_W<'_>[src]

Bit 8 - B712

pub fn b713(&mut self) -> B713_W<'_>[src]

Bit 9 - B713

pub fn b714(&mut self) -> B714_W<'_>[src]

Bit 10 - B714

pub fn b715(&mut self) -> B715_W<'_>[src]

Bit 11 - B715

pub fn b716(&mut self) -> B716_W<'_>[src]

Bit 12 - B716

pub fn b717(&mut self) -> B717_W<'_>[src]

Bit 13 - B717

pub fn b718(&mut self) -> B718_W<'_>[src]

Bit 14 - B718

pub fn b719(&mut self) -> B719_W<'_>[src]

Bit 15 - B719

pub fn b720(&mut self) -> B720_W<'_>[src]

Bit 16 - B720

pub fn b721(&mut self) -> B721_W<'_>[src]

Bit 17 - B721

pub fn b722(&mut self) -> B722_W<'_>[src]

Bit 18 - B722

pub fn b723(&mut self) -> B723_W<'_>[src]

Bit 19 - B723

pub fn b724(&mut self) -> B724_W<'_>[src]

Bit 20 - B724

pub fn b725(&mut self) -> B725_W<'_>[src]

Bit 21 - B725

pub fn b726(&mut self) -> B726_W<'_>[src]

Bit 22 - B726

pub fn b727(&mut self) -> B727_W<'_>[src]

Bit 23 - B727

pub fn b728(&mut self) -> B728_W<'_>[src]

Bit 24 - B728

pub fn b729(&mut self) -> B729_W<'_>[src]

Bit 25 - B729

pub fn b730(&mut self) -> B730_W<'_>[src]

Bit 26 - B730

pub fn b731(&mut self) -> B731_W<'_>[src]

Bit 27 - B731

pub fn b732(&mut self) -> B732_W<'_>[src]

Bit 28 - B732

pub fn b733(&mut self) -> B733_W<'_>[src]

Bit 29 - B733

pub fn b734(&mut self) -> B734_W<'_>[src]

Bit 30 - B734

pub fn b735(&mut self) -> B735_W<'_>[src]

Bit 31 - B735

impl W<u32, Reg<u32, _MPCBB2_VCTR23>>[src]

pub fn b736(&mut self) -> B736_W<'_>[src]

Bit 0 - B736

pub fn b737(&mut self) -> B737_W<'_>[src]

Bit 1 - B737

pub fn b738(&mut self) -> B738_W<'_>[src]

Bit 2 - B738

pub fn b739(&mut self) -> B739_W<'_>[src]

Bit 3 - B739

pub fn b740(&mut self) -> B740_W<'_>[src]

Bit 4 - B740

pub fn b741(&mut self) -> B741_W<'_>[src]

Bit 5 - B741

pub fn b742(&mut self) -> B742_W<'_>[src]

Bit 6 - B742

pub fn b743(&mut self) -> B743_W<'_>[src]

Bit 7 - B743

pub fn b744(&mut self) -> B744_W<'_>[src]

Bit 8 - B744

pub fn b745(&mut self) -> B745_W<'_>[src]

Bit 9 - B745

pub fn b746(&mut self) -> B746_W<'_>[src]

Bit 10 - B746

pub fn b747(&mut self) -> B747_W<'_>[src]

Bit 11 - B747

pub fn b748(&mut self) -> B748_W<'_>[src]

Bit 12 - B748

pub fn b749(&mut self) -> B749_W<'_>[src]

Bit 13 - B749

pub fn b750(&mut self) -> B750_W<'_>[src]

Bit 14 - B750

pub fn b751(&mut self) -> B751_W<'_>[src]

Bit 15 - B751

pub fn b752(&mut self) -> B752_W<'_>[src]

Bit 16 - B752

pub fn b753(&mut self) -> B753_W<'_>[src]

Bit 17 - B753

pub fn b754(&mut self) -> B754_W<'_>[src]

Bit 18 - B754

pub fn b755(&mut self) -> B755_W<'_>[src]

Bit 19 - B755

pub fn b756(&mut self) -> B756_W<'_>[src]

Bit 20 - B756

pub fn b757(&mut self) -> B757_W<'_>[src]

Bit 21 - B757

pub fn b758(&mut self) -> B758_W<'_>[src]

Bit 22 - B758

pub fn b759(&mut self) -> B759_W<'_>[src]

Bit 23 - B759

pub fn b760(&mut self) -> B760_W<'_>[src]

Bit 24 - B760

pub fn b761(&mut self) -> B761_W<'_>[src]

Bit 25 - B761

pub fn b762(&mut self) -> B762_W<'_>[src]

Bit 26 - B762

pub fn b763(&mut self) -> B763_W<'_>[src]

Bit 27 - B763

pub fn b764(&mut self) -> B764_W<'_>[src]

Bit 28 - B764

pub fn b765(&mut self) -> B765_W<'_>[src]

Bit 29 - B765

pub fn b766(&mut self) -> B766_W<'_>[src]

Bit 30 - B766

pub fn b767(&mut self) -> B767_W<'_>[src]

Bit 31 - B767

impl W<u32, Reg<u32, _MPCBB2_VCTR24>>[src]

pub fn b768(&mut self) -> B768_W<'_>[src]

Bit 0 - B768

pub fn b769(&mut self) -> B769_W<'_>[src]

Bit 1 - B769

pub fn b770(&mut self) -> B770_W<'_>[src]

Bit 2 - B770

pub fn b771(&mut self) -> B771_W<'_>[src]

Bit 3 - B771

pub fn b772(&mut self) -> B772_W<'_>[src]

Bit 4 - B772

pub fn b773(&mut self) -> B773_W<'_>[src]

Bit 5 - B773

pub fn b774(&mut self) -> B774_W<'_>[src]

Bit 6 - B774

pub fn b775(&mut self) -> B775_W<'_>[src]

Bit 7 - B775

pub fn b776(&mut self) -> B776_W<'_>[src]

Bit 8 - B776

pub fn b777(&mut self) -> B777_W<'_>[src]

Bit 9 - B777

pub fn b778(&mut self) -> B778_W<'_>[src]

Bit 10 - B778

pub fn b779(&mut self) -> B779_W<'_>[src]

Bit 11 - B779

pub fn b780(&mut self) -> B780_W<'_>[src]

Bit 12 - B780

pub fn b781(&mut self) -> B781_W<'_>[src]

Bit 13 - B781

pub fn b782(&mut self) -> B782_W<'_>[src]

Bit 14 - B782

pub fn b783(&mut self) -> B783_W<'_>[src]

Bit 15 - B783

pub fn b784(&mut self) -> B784_W<'_>[src]

Bit 16 - B784

pub fn b785(&mut self) -> B785_W<'_>[src]

Bit 17 - B785

pub fn b786(&mut self) -> B786_W<'_>[src]

Bit 18 - B786

pub fn b787(&mut self) -> B787_W<'_>[src]

Bit 19 - B787

pub fn b788(&mut self) -> B788_W<'_>[src]

Bit 20 - B788

pub fn b789(&mut self) -> B789_W<'_>[src]

Bit 21 - B789

pub fn b790(&mut self) -> B790_W<'_>[src]

Bit 22 - B790

pub fn b791(&mut self) -> B791_W<'_>[src]

Bit 23 - B791

pub fn b792(&mut self) -> B792_W<'_>[src]

Bit 24 - B792

pub fn b793(&mut self) -> B793_W<'_>[src]

Bit 25 - B793

pub fn b794(&mut self) -> B794_W<'_>[src]

Bit 26 - B794

pub fn b795(&mut self) -> B795_W<'_>[src]

Bit 27 - B795

pub fn b796(&mut self) -> B796_W<'_>[src]

Bit 28 - B796

pub fn b797(&mut self) -> B797_W<'_>[src]

Bit 29 - B797

pub fn b798(&mut self) -> B798_W<'_>[src]

Bit 30 - B798

pub fn b799(&mut self) -> B799_W<'_>[src]

Bit 31 - B799

impl W<u32, Reg<u32, _MPCBB2_VCTR25>>[src]

pub fn b800(&mut self) -> B800_W<'_>[src]

Bit 0 - B800

pub fn b801(&mut self) -> B801_W<'_>[src]

Bit 1 - B801

pub fn b802(&mut self) -> B802_W<'_>[src]

Bit 2 - B802

pub fn b803(&mut self) -> B803_W<'_>[src]

Bit 3 - B803

pub fn b804(&mut self) -> B804_W<'_>[src]

Bit 4 - B804

pub fn b805(&mut self) -> B805_W<'_>[src]

Bit 5 - B805

pub fn b806(&mut self) -> B806_W<'_>[src]

Bit 6 - B806

pub fn b807(&mut self) -> B807_W<'_>[src]

Bit 7 - B807

pub fn b808(&mut self) -> B808_W<'_>[src]

Bit 8 - B808

pub fn b809(&mut self) -> B809_W<'_>[src]

Bit 9 - B809

pub fn b810(&mut self) -> B810_W<'_>[src]

Bit 10 - B810

pub fn b811(&mut self) -> B811_W<'_>[src]

Bit 11 - B811

pub fn b812(&mut self) -> B812_W<'_>[src]

Bit 12 - B812

pub fn b813(&mut self) -> B813_W<'_>[src]

Bit 13 - B813

pub fn b814(&mut self) -> B814_W<'_>[src]

Bit 14 - B814

pub fn b815(&mut self) -> B815_W<'_>[src]

Bit 15 - B815

pub fn b816(&mut self) -> B816_W<'_>[src]

Bit 16 - B816

pub fn b817(&mut self) -> B817_W<'_>[src]

Bit 17 - B817

pub fn b818(&mut self) -> B818_W<'_>[src]

Bit 18 - B818

pub fn b819(&mut self) -> B819_W<'_>[src]

Bit 19 - B819

pub fn b820(&mut self) -> B820_W<'_>[src]

Bit 20 - B820

pub fn b821(&mut self) -> B821_W<'_>[src]

Bit 21 - B821

pub fn b822(&mut self) -> B822_W<'_>[src]

Bit 22 - B822

pub fn b823(&mut self) -> B823_W<'_>[src]

Bit 23 - B823

pub fn b824(&mut self) -> B824_W<'_>[src]

Bit 24 - B824

pub fn b825(&mut self) -> B825_W<'_>[src]

Bit 25 - B825

pub fn b826(&mut self) -> B826_W<'_>[src]

Bit 26 - B826

pub fn b827(&mut self) -> B827_W<'_>[src]

Bit 27 - B827

pub fn b828(&mut self) -> B828_W<'_>[src]

Bit 28 - B828

pub fn b829(&mut self) -> B829_W<'_>[src]

Bit 29 - B829

pub fn b830(&mut self) -> B830_W<'_>[src]

Bit 30 - B830

pub fn b831(&mut self) -> B831_W<'_>[src]

Bit 31 - B831

impl W<u32, Reg<u32, _MPCBB2_VCTR26>>[src]

pub fn b832(&mut self) -> B832_W<'_>[src]

Bit 0 - B832

pub fn b833(&mut self) -> B833_W<'_>[src]

Bit 1 - B833

pub fn b834(&mut self) -> B834_W<'_>[src]

Bit 2 - B834

pub fn b835(&mut self) -> B835_W<'_>[src]

Bit 3 - B835

pub fn b836(&mut self) -> B836_W<'_>[src]

Bit 4 - B836

pub fn b837(&mut self) -> B837_W<'_>[src]

Bit 5 - B837

pub fn b838(&mut self) -> B838_W<'_>[src]

Bit 6 - B838

pub fn b839(&mut self) -> B839_W<'_>[src]

Bit 7 - B839

pub fn b840(&mut self) -> B840_W<'_>[src]

Bit 8 - B840

pub fn b841(&mut self) -> B841_W<'_>[src]

Bit 9 - B841

pub fn b842(&mut self) -> B842_W<'_>[src]

Bit 10 - B842

pub fn b843(&mut self) -> B843_W<'_>[src]

Bit 11 - B843

pub fn b844(&mut self) -> B844_W<'_>[src]

Bit 12 - B844

pub fn b845(&mut self) -> B845_W<'_>[src]

Bit 13 - B845

pub fn b846(&mut self) -> B846_W<'_>[src]

Bit 14 - B846

pub fn b847(&mut self) -> B847_W<'_>[src]

Bit 15 - B847

pub fn b848(&mut self) -> B848_W<'_>[src]

Bit 16 - B848

pub fn b849(&mut self) -> B849_W<'_>[src]

Bit 17 - B849

pub fn b850(&mut self) -> B850_W<'_>[src]

Bit 18 - B850

pub fn b851(&mut self) -> B851_W<'_>[src]

Bit 19 - B851

pub fn b852(&mut self) -> B852_W<'_>[src]

Bit 20 - B852

pub fn b853(&mut self) -> B853_W<'_>[src]

Bit 21 - B853

pub fn b854(&mut self) -> B854_W<'_>[src]

Bit 22 - B854

pub fn b855(&mut self) -> B855_W<'_>[src]

Bit 23 - B855

pub fn b856(&mut self) -> B856_W<'_>[src]

Bit 24 - B856

pub fn b857(&mut self) -> B857_W<'_>[src]

Bit 25 - B857

pub fn b858(&mut self) -> B858_W<'_>[src]

Bit 26 - B858

pub fn b859(&mut self) -> B859_W<'_>[src]

Bit 27 - B859

pub fn b860(&mut self) -> B860_W<'_>[src]

Bit 28 - B860

pub fn b861(&mut self) -> B861_W<'_>[src]

Bit 29 - B861

pub fn b862(&mut self) -> B862_W<'_>[src]

Bit 30 - B862

pub fn b863(&mut self) -> B863_W<'_>[src]

Bit 31 - B863

impl W<u32, Reg<u32, _MPCBB2_VCTR27>>[src]

pub fn b864(&mut self) -> B864_W<'_>[src]

Bit 0 - B864

pub fn b865(&mut self) -> B865_W<'_>[src]

Bit 1 - B865

pub fn b866(&mut self) -> B866_W<'_>[src]

Bit 2 - B866

pub fn b867(&mut self) -> B867_W<'_>[src]

Bit 3 - B867

pub fn b868(&mut self) -> B868_W<'_>[src]

Bit 4 - B868

pub fn b869(&mut self) -> B869_W<'_>[src]

Bit 5 - B869

pub fn b870(&mut self) -> B870_W<'_>[src]

Bit 6 - B870

pub fn b871(&mut self) -> B871_W<'_>[src]

Bit 7 - B871

pub fn b872(&mut self) -> B872_W<'_>[src]

Bit 8 - B872

pub fn b873(&mut self) -> B873_W<'_>[src]

Bit 9 - B873

pub fn b874(&mut self) -> B874_W<'_>[src]

Bit 10 - B874

pub fn b875(&mut self) -> B875_W<'_>[src]

Bit 11 - B875

pub fn b876(&mut self) -> B876_W<'_>[src]

Bit 12 - B876

pub fn b877(&mut self) -> B877_W<'_>[src]

Bit 13 - B877

pub fn b878(&mut self) -> B878_W<'_>[src]

Bit 14 - B878

pub fn b879(&mut self) -> B879_W<'_>[src]

Bit 15 - B879

pub fn b880(&mut self) -> B880_W<'_>[src]

Bit 16 - B880

pub fn b881(&mut self) -> B881_W<'_>[src]

Bit 17 - B881

pub fn b882(&mut self) -> B882_W<'_>[src]

Bit 18 - B882

pub fn b883(&mut self) -> B883_W<'_>[src]

Bit 19 - B883

pub fn b884(&mut self) -> B884_W<'_>[src]

Bit 20 - B884

pub fn b885(&mut self) -> B885_W<'_>[src]

Bit 21 - B885

pub fn b886(&mut self) -> B886_W<'_>[src]

Bit 22 - B886

pub fn b887(&mut self) -> B887_W<'_>[src]

Bit 23 - B887

pub fn b888(&mut self) -> B888_W<'_>[src]

Bit 24 - B888

pub fn b889(&mut self) -> B889_W<'_>[src]

Bit 25 - B889

pub fn b890(&mut self) -> B890_W<'_>[src]

Bit 26 - B890

pub fn b891(&mut self) -> B891_W<'_>[src]

Bit 27 - B891

pub fn b892(&mut self) -> B892_W<'_>[src]

Bit 28 - B892

pub fn b893(&mut self) -> B893_W<'_>[src]

Bit 29 - B893

pub fn b894(&mut self) -> B894_W<'_>[src]

Bit 30 - B894

pub fn b895(&mut self) -> B895_W<'_>[src]

Bit 31 - B895

impl W<u32, Reg<u32, _MPCBB2_VCTR28>>[src]

pub fn b896(&mut self) -> B896_W<'_>[src]

Bit 0 - B896

pub fn b897(&mut self) -> B897_W<'_>[src]

Bit 1 - B897

pub fn b898(&mut self) -> B898_W<'_>[src]

Bit 2 - B898

pub fn b899(&mut self) -> B899_W<'_>[src]

Bit 3 - B899

pub fn b900(&mut self) -> B900_W<'_>[src]

Bit 4 - B900

pub fn b901(&mut self) -> B901_W<'_>[src]

Bit 5 - B901

pub fn b902(&mut self) -> B902_W<'_>[src]

Bit 6 - B902

pub fn b903(&mut self) -> B903_W<'_>[src]

Bit 7 - B903

pub fn b904(&mut self) -> B904_W<'_>[src]

Bit 8 - B904

pub fn b905(&mut self) -> B905_W<'_>[src]

Bit 9 - B905

pub fn b906(&mut self) -> B906_W<'_>[src]

Bit 10 - B906

pub fn b907(&mut self) -> B907_W<'_>[src]

Bit 11 - B907

pub fn b908(&mut self) -> B908_W<'_>[src]

Bit 12 - B908

pub fn b909(&mut self) -> B909_W<'_>[src]

Bit 13 - B909

pub fn b910(&mut self) -> B910_W<'_>[src]

Bit 14 - B910

pub fn b911(&mut self) -> B911_W<'_>[src]

Bit 15 - B911

pub fn b912(&mut self) -> B912_W<'_>[src]

Bit 16 - B912

pub fn b913(&mut self) -> B913_W<'_>[src]

Bit 17 - B913

pub fn b914(&mut self) -> B914_W<'_>[src]

Bit 18 - B914

pub fn b915(&mut self) -> B915_W<'_>[src]

Bit 19 - B915

pub fn b916(&mut self) -> B916_W<'_>[src]

Bit 20 - B916

pub fn b917(&mut self) -> B917_W<'_>[src]

Bit 21 - B917

pub fn b918(&mut self) -> B918_W<'_>[src]

Bit 22 - B918

pub fn b919(&mut self) -> B919_W<'_>[src]

Bit 23 - B919

pub fn b920(&mut self) -> B920_W<'_>[src]

Bit 24 - B920

pub fn b921(&mut self) -> B921_W<'_>[src]

Bit 25 - B921

pub fn b922(&mut self) -> B922_W<'_>[src]

Bit 26 - B922

pub fn b923(&mut self) -> B923_W<'_>[src]

Bit 27 - B923

pub fn b924(&mut self) -> B924_W<'_>[src]

Bit 28 - B924

pub fn b925(&mut self) -> B925_W<'_>[src]

Bit 29 - B925

pub fn b926(&mut self) -> B926_W<'_>[src]

Bit 30 - B926

pub fn b927(&mut self) -> B927_W<'_>[src]

Bit 31 - B927

impl W<u32, Reg<u32, _MPCBB2_VCTR29>>[src]

pub fn b928(&mut self) -> B928_W<'_>[src]

Bit 0 - B928

pub fn b929(&mut self) -> B929_W<'_>[src]

Bit 1 - B929

pub fn b930(&mut self) -> B930_W<'_>[src]

Bit 2 - B930

pub fn b931(&mut self) -> B931_W<'_>[src]

Bit 3 - B931

pub fn b932(&mut self) -> B932_W<'_>[src]

Bit 4 - B932

pub fn b933(&mut self) -> B933_W<'_>[src]

Bit 5 - B933

pub fn b934(&mut self) -> B934_W<'_>[src]

Bit 6 - B934

pub fn b935(&mut self) -> B935_W<'_>[src]

Bit 7 - B935

pub fn b936(&mut self) -> B936_W<'_>[src]

Bit 8 - B936

pub fn b937(&mut self) -> B937_W<'_>[src]

Bit 9 - B937

pub fn b938(&mut self) -> B938_W<'_>[src]

Bit 10 - B938

pub fn b939(&mut self) -> B939_W<'_>[src]

Bit 11 - B939

pub fn b940(&mut self) -> B940_W<'_>[src]

Bit 12 - B940

pub fn b941(&mut self) -> B941_W<'_>[src]

Bit 13 - B941

pub fn b942(&mut self) -> B942_W<'_>[src]

Bit 14 - B942

pub fn b943(&mut self) -> B943_W<'_>[src]

Bit 15 - B943

pub fn b944(&mut self) -> B944_W<'_>[src]

Bit 16 - B944

pub fn b945(&mut self) -> B945_W<'_>[src]

Bit 17 - B945

pub fn b946(&mut self) -> B946_W<'_>[src]

Bit 18 - B946

pub fn b947(&mut self) -> B947_W<'_>[src]

Bit 19 - B947

pub fn b948(&mut self) -> B948_W<'_>[src]

Bit 20 - B948

pub fn b949(&mut self) -> B949_W<'_>[src]

Bit 21 - B949

pub fn b950(&mut self) -> B950_W<'_>[src]

Bit 22 - B950

pub fn b951(&mut self) -> B951_W<'_>[src]

Bit 23 - B951

pub fn b952(&mut self) -> B952_W<'_>[src]

Bit 24 - B952

pub fn b953(&mut self) -> B953_W<'_>[src]

Bit 25 - B953

pub fn b954(&mut self) -> B954_W<'_>[src]

Bit 26 - B954

pub fn b955(&mut self) -> B955_W<'_>[src]

Bit 27 - B955

pub fn b956(&mut self) -> B956_W<'_>[src]

Bit 28 - B956

pub fn b957(&mut self) -> B957_W<'_>[src]

Bit 29 - B957

pub fn b958(&mut self) -> B958_W<'_>[src]

Bit 30 - B958

pub fn b959(&mut self) -> B959_W<'_>[src]

Bit 31 - B959

impl W<u32, Reg<u32, _MPCBB2_VCTR30>>[src]

pub fn b960(&mut self) -> B960_W<'_>[src]

Bit 0 - B960

pub fn b961(&mut self) -> B961_W<'_>[src]

Bit 1 - B961

pub fn b962(&mut self) -> B962_W<'_>[src]

Bit 2 - B962

pub fn b963(&mut self) -> B963_W<'_>[src]

Bit 3 - B963

pub fn b964(&mut self) -> B964_W<'_>[src]

Bit 4 - B964

pub fn b965(&mut self) -> B965_W<'_>[src]

Bit 5 - B965

pub fn b966(&mut self) -> B966_W<'_>[src]

Bit 6 - B966

pub fn b967(&mut self) -> B967_W<'_>[src]

Bit 7 - B967

pub fn b968(&mut self) -> B968_W<'_>[src]

Bit 8 - B968

pub fn b969(&mut self) -> B969_W<'_>[src]

Bit 9 - B969

pub fn b970(&mut self) -> B970_W<'_>[src]

Bit 10 - B970

pub fn b971(&mut self) -> B971_W<'_>[src]

Bit 11 - B971

pub fn b972(&mut self) -> B972_W<'_>[src]

Bit 12 - B972

pub fn b973(&mut self) -> B973_W<'_>[src]

Bit 13 - B973

pub fn b974(&mut self) -> B974_W<'_>[src]

Bit 14 - B974

pub fn b975(&mut self) -> B975_W<'_>[src]

Bit 15 - B975

pub fn b976(&mut self) -> B976_W<'_>[src]

Bit 16 - B976

pub fn b977(&mut self) -> B977_W<'_>[src]

Bit 17 - B977

pub fn b978(&mut self) -> B978_W<'_>[src]

Bit 18 - B978

pub fn b979(&mut self) -> B979_W<'_>[src]

Bit 19 - B979

pub fn b980(&mut self) -> B980_W<'_>[src]

Bit 20 - B980

pub fn b981(&mut self) -> B981_W<'_>[src]

Bit 21 - B981

pub fn b982(&mut self) -> B982_W<'_>[src]

Bit 22 - B982

pub fn b983(&mut self) -> B983_W<'_>[src]

Bit 23 - B983

pub fn b984(&mut self) -> B984_W<'_>[src]

Bit 24 - B984

pub fn b985(&mut self) -> B985_W<'_>[src]

Bit 25 - B985

pub fn b986(&mut self) -> B986_W<'_>[src]

Bit 26 - B986

pub fn b987(&mut self) -> B987_W<'_>[src]

Bit 27 - B987

pub fn b988(&mut self) -> B988_W<'_>[src]

Bit 28 - B988

pub fn b989(&mut self) -> B989_W<'_>[src]

Bit 29 - B989

pub fn b990(&mut self) -> B990_W<'_>[src]

Bit 30 - B990

pub fn b991(&mut self) -> B991_W<'_>[src]

Bit 31 - B991

impl W<u32, Reg<u32, _MPCBB2_VCTR31>>[src]

pub fn b992(&mut self) -> B992_W<'_>[src]

Bit 0 - B992

pub fn b993(&mut self) -> B993_W<'_>[src]

Bit 1 - B993

pub fn b994(&mut self) -> B994_W<'_>[src]

Bit 2 - B994

pub fn b995(&mut self) -> B995_W<'_>[src]

Bit 3 - B995

pub fn b996(&mut self) -> B996_W<'_>[src]

Bit 4 - B996

pub fn b997(&mut self) -> B997_W<'_>[src]

Bit 5 - B997

pub fn b998(&mut self) -> B998_W<'_>[src]

Bit 6 - B998

pub fn b999(&mut self) -> B999_W<'_>[src]

Bit 7 - B999

pub fn b1000(&mut self) -> B1000_W<'_>[src]

Bit 8 - B1000

pub fn b1001(&mut self) -> B1001_W<'_>[src]

Bit 9 - B1001

pub fn b1002(&mut self) -> B1002_W<'_>[src]

Bit 10 - B1002

pub fn b1003(&mut self) -> B1003_W<'_>[src]

Bit 11 - B1003

pub fn b1004(&mut self) -> B1004_W<'_>[src]

Bit 12 - B1004

pub fn b1005(&mut self) -> B1005_W<'_>[src]

Bit 13 - B1005

pub fn b1006(&mut self) -> B1006_W<'_>[src]

Bit 14 - B1006

pub fn b1007(&mut self) -> B1007_W<'_>[src]

Bit 15 - B1007

pub fn b1008(&mut self) -> B1008_W<'_>[src]

Bit 16 - B1008

pub fn b1009(&mut self) -> B1009_W<'_>[src]

Bit 17 - B1009

pub fn b1010(&mut self) -> B1010_W<'_>[src]

Bit 18 - B1010

pub fn b1011(&mut self) -> B1011_W<'_>[src]

Bit 19 - B1011

pub fn b1012(&mut self) -> B1012_W<'_>[src]

Bit 20 - B1012

pub fn b1013(&mut self) -> B1013_W<'_>[src]

Bit 21 - B1013

pub fn b1014(&mut self) -> B1014_W<'_>[src]

Bit 22 - B1014

pub fn b1015(&mut self) -> B1015_W<'_>[src]

Bit 23 - B1015

pub fn b1016(&mut self) -> B1016_W<'_>[src]

Bit 24 - B1016

pub fn b1017(&mut self) -> B1017_W<'_>[src]

Bit 25 - B1017

pub fn b1018(&mut self) -> B1018_W<'_>[src]

Bit 26 - B1018

pub fn b1019(&mut self) -> B1019_W<'_>[src]

Bit 27 - B1019

pub fn b1020(&mut self) -> B1020_W<'_>[src]

Bit 28 - B1020

pub fn b1021(&mut self) -> B1021_W<'_>[src]

Bit 29 - B1021

pub fn b1022(&mut self) -> B1022_W<'_>[src]

Bit 30 - B1022

pub fn b1023(&mut self) -> B1023_W<'_>[src]

Bit 31 - B1023

impl W<u32, Reg<u32, _MPCBB2_VCTR32>>[src]

pub fn b1024(&mut self) -> B1024_W<'_>[src]

Bit 0 - B1024

pub fn b1025(&mut self) -> B1025_W<'_>[src]

Bit 1 - B1025

pub fn b1026(&mut self) -> B1026_W<'_>[src]

Bit 2 - B1026

pub fn b1027(&mut self) -> B1027_W<'_>[src]

Bit 3 - B1027

pub fn b1028(&mut self) -> B1028_W<'_>[src]

Bit 4 - B1028

pub fn b1029(&mut self) -> B1029_W<'_>[src]

Bit 5 - B1029

pub fn b1030(&mut self) -> B1030_W<'_>[src]

Bit 6 - B1030

pub fn b1031(&mut self) -> B1031_W<'_>[src]

Bit 7 - B1031

pub fn b1032(&mut self) -> B1032_W<'_>[src]

Bit 8 - B1032

pub fn b1033(&mut self) -> B1033_W<'_>[src]

Bit 9 - B1033

pub fn b1034(&mut self) -> B1034_W<'_>[src]

Bit 10 - B1034

pub fn b1035(&mut self) -> B1035_W<'_>[src]

Bit 11 - B1035

pub fn b1036(&mut self) -> B1036_W<'_>[src]

Bit 12 - B1036

pub fn b1037(&mut self) -> B1037_W<'_>[src]

Bit 13 - B1037

pub fn b1038(&mut self) -> B1038_W<'_>[src]

Bit 14 - B1038

pub fn b1039(&mut self) -> B1039_W<'_>[src]

Bit 15 - B1039

pub fn b1040(&mut self) -> B1040_W<'_>[src]

Bit 16 - B1040

pub fn b1041(&mut self) -> B1041_W<'_>[src]

Bit 17 - B1041

pub fn b1042(&mut self) -> B1042_W<'_>[src]

Bit 18 - B1042

pub fn b1043(&mut self) -> B1043_W<'_>[src]

Bit 19 - B1043

pub fn b1044(&mut self) -> B1044_W<'_>[src]

Bit 20 - B1044

pub fn b1045(&mut self) -> B1045_W<'_>[src]

Bit 21 - B1045

pub fn b1046(&mut self) -> B1046_W<'_>[src]

Bit 22 - B1046

pub fn b1047(&mut self) -> B1047_W<'_>[src]

Bit 23 - B1047

pub fn b1048(&mut self) -> B1048_W<'_>[src]

Bit 24 - B1048

pub fn b1049(&mut self) -> B1049_W<'_>[src]

Bit 25 - B1049

pub fn b1050(&mut self) -> B1050_W<'_>[src]

Bit 26 - B1050

pub fn b1051(&mut self) -> B1051_W<'_>[src]

Bit 27 - B1051

pub fn b1052(&mut self) -> B1052_W<'_>[src]

Bit 28 - B1052

pub fn b1053(&mut self) -> B1053_W<'_>[src]

Bit 29 - B1053

pub fn b1054(&mut self) -> B1054_W<'_>[src]

Bit 30 - B1054

pub fn b1055(&mut self) -> B1055_W<'_>[src]

Bit 31 - B1055

impl W<u32, Reg<u32, _MPCBB2_VCTR33>>[src]

pub fn b1056(&mut self) -> B1056_W<'_>[src]

Bit 0 - B1056

pub fn b1057(&mut self) -> B1057_W<'_>[src]

Bit 1 - B1057

pub fn b1058(&mut self) -> B1058_W<'_>[src]

Bit 2 - B1058

pub fn b1059(&mut self) -> B1059_W<'_>[src]

Bit 3 - B1059

pub fn b1060(&mut self) -> B1060_W<'_>[src]

Bit 4 - B1060

pub fn b1061(&mut self) -> B1061_W<'_>[src]

Bit 5 - B1061

pub fn b1062(&mut self) -> B1062_W<'_>[src]

Bit 6 - B1062

pub fn b1063(&mut self) -> B1063_W<'_>[src]

Bit 7 - B1063

pub fn b1064(&mut self) -> B1064_W<'_>[src]

Bit 8 - B1064

pub fn b1065(&mut self) -> B1065_W<'_>[src]

Bit 9 - B1065

pub fn b1066(&mut self) -> B1066_W<'_>[src]

Bit 10 - B1066

pub fn b1067(&mut self) -> B1067_W<'_>[src]

Bit 11 - B1067

pub fn b1068(&mut self) -> B1068_W<'_>[src]

Bit 12 - B1068

pub fn b1069(&mut self) -> B1069_W<'_>[src]

Bit 13 - B1069

pub fn b1070(&mut self) -> B1070_W<'_>[src]

Bit 14 - B1070

pub fn b1071(&mut self) -> B1071_W<'_>[src]

Bit 15 - B1071

pub fn b1072(&mut self) -> B1072_W<'_>[src]

Bit 16 - B1072

pub fn b1073(&mut self) -> B1073_W<'_>[src]

Bit 17 - B1073

pub fn b1074(&mut self) -> B1074_W<'_>[src]

Bit 18 - B1074

pub fn b1075(&mut self) -> B1075_W<'_>[src]

Bit 19 - B1075

pub fn b1076(&mut self) -> B1076_W<'_>[src]

Bit 20 - B1076

pub fn b1077(&mut self) -> B1077_W<'_>[src]

Bit 21 - B1077

pub fn b1078(&mut self) -> B1078_W<'_>[src]

Bit 22 - B1078

pub fn b1079(&mut self) -> B1079_W<'_>[src]

Bit 23 - B1079

pub fn b1080(&mut self) -> B1080_W<'_>[src]

Bit 24 - B1080

pub fn b1081(&mut self) -> B1081_W<'_>[src]

Bit 25 - B1081

pub fn b1082(&mut self) -> B1082_W<'_>[src]

Bit 26 - B1082

pub fn b1083(&mut self) -> B1083_W<'_>[src]

Bit 27 - B1083

pub fn b1084(&mut self) -> B1084_W<'_>[src]

Bit 28 - B1084

pub fn b1085(&mut self) -> B1085_W<'_>[src]

Bit 29 - B1085

pub fn b1086(&mut self) -> B1086_W<'_>[src]

Bit 30 - B1086

pub fn b1087(&mut self) -> B1087_W<'_>[src]

Bit 31 - B1087

impl W<u32, Reg<u32, _MPCBB2_VCTR34>>[src]

pub fn b1088(&mut self) -> B1088_W<'_>[src]

Bit 0 - B1088

pub fn b1089(&mut self) -> B1089_W<'_>[src]

Bit 1 - B1089

pub fn b1090(&mut self) -> B1090_W<'_>[src]

Bit 2 - B1090

pub fn b1091(&mut self) -> B1091_W<'_>[src]

Bit 3 - B1091

pub fn b1092(&mut self) -> B1092_W<'_>[src]

Bit 4 - B1092

pub fn b1093(&mut self) -> B1093_W<'_>[src]

Bit 5 - B1093

pub fn b1094(&mut self) -> B1094_W<'_>[src]

Bit 6 - B1094

pub fn b1095(&mut self) -> B1095_W<'_>[src]

Bit 7 - B1095

pub fn b1096(&mut self) -> B1096_W<'_>[src]

Bit 8 - B1096

pub fn b1097(&mut self) -> B1097_W<'_>[src]

Bit 9 - B1097

pub fn b1098(&mut self) -> B1098_W<'_>[src]

Bit 10 - B1098

pub fn b1099(&mut self) -> B1099_W<'_>[src]

Bit 11 - B1099

pub fn b1100(&mut self) -> B1100_W<'_>[src]

Bit 12 - B1100

pub fn b1101(&mut self) -> B1101_W<'_>[src]

Bit 13 - B1101

pub fn b1102(&mut self) -> B1102_W<'_>[src]

Bit 14 - B1102

pub fn b1103(&mut self) -> B1103_W<'_>[src]

Bit 15 - B1103

pub fn b1104(&mut self) -> B1104_W<'_>[src]

Bit 16 - B1104

pub fn b1105(&mut self) -> B1105_W<'_>[src]

Bit 17 - B1105

pub fn b1106(&mut self) -> B1106_W<'_>[src]

Bit 18 - B1106

pub fn b1107(&mut self) -> B1107_W<'_>[src]

Bit 19 - B1107

pub fn b1108(&mut self) -> B1108_W<'_>[src]

Bit 20 - B1108

pub fn b1109(&mut self) -> B1109_W<'_>[src]

Bit 21 - B1109

pub fn b1110(&mut self) -> B1110_W<'_>[src]

Bit 22 - B1110

pub fn b1111(&mut self) -> B1111_W<'_>[src]

Bit 23 - B1111

pub fn b1112(&mut self) -> B1112_W<'_>[src]

Bit 24 - B1112

pub fn b1113(&mut self) -> B1113_W<'_>[src]

Bit 25 - B1113

pub fn b1114(&mut self) -> B1114_W<'_>[src]

Bit 26 - B1114

pub fn b1115(&mut self) -> B1115_W<'_>[src]

Bit 27 - B1115

pub fn b1116(&mut self) -> B1116_W<'_>[src]

Bit 28 - B1116

pub fn b1117(&mut self) -> B1117_W<'_>[src]

Bit 29 - B1117

pub fn b1118(&mut self) -> B1118_W<'_>[src]

Bit 30 - B1118

pub fn b1119(&mut self) -> B1119_W<'_>[src]

Bit 31 - B1119

impl W<u32, Reg<u32, _MPCBB2_VCTR35>>[src]

pub fn b1120(&mut self) -> B1120_W<'_>[src]

Bit 0 - B1120

pub fn b1121(&mut self) -> B1121_W<'_>[src]

Bit 1 - B1121

pub fn b1122(&mut self) -> B1122_W<'_>[src]

Bit 2 - B1122

pub fn b1123(&mut self) -> B1123_W<'_>[src]

Bit 3 - B1123

pub fn b1124(&mut self) -> B1124_W<'_>[src]

Bit 4 - B1124

pub fn b1125(&mut self) -> B1125_W<'_>[src]

Bit 5 - B1125

pub fn b1126(&mut self) -> B1126_W<'_>[src]

Bit 6 - B1126

pub fn b1127(&mut self) -> B1127_W<'_>[src]

Bit 7 - B1127

pub fn b1128(&mut self) -> B1128_W<'_>[src]

Bit 8 - B1128

pub fn b1129(&mut self) -> B1129_W<'_>[src]

Bit 9 - B1129

pub fn b1130(&mut self) -> B1130_W<'_>[src]

Bit 10 - B1130

pub fn b1131(&mut self) -> B1131_W<'_>[src]

Bit 11 - B1131

pub fn b1132(&mut self) -> B1132_W<'_>[src]

Bit 12 - B1132

pub fn b1133(&mut self) -> B1133_W<'_>[src]

Bit 13 - B1133

pub fn b1134(&mut self) -> B1134_W<'_>[src]

Bit 14 - B1134

pub fn b1135(&mut self) -> B1135_W<'_>[src]

Bit 15 - B1135

pub fn b1136(&mut self) -> B1136_W<'_>[src]

Bit 16 - B1136

pub fn b1137(&mut self) -> B1137_W<'_>[src]

Bit 17 - B1137

pub fn b1138(&mut self) -> B1138_W<'_>[src]

Bit 18 - B1138

pub fn b1139(&mut self) -> B1139_W<'_>[src]

Bit 19 - B1139

pub fn b1140(&mut self) -> B1140_W<'_>[src]

Bit 20 - B1140

pub fn b1141(&mut self) -> B1141_W<'_>[src]

Bit 21 - B1141

pub fn b1142(&mut self) -> B1142_W<'_>[src]

Bit 22 - B1142

pub fn b1143(&mut self) -> B1143_W<'_>[src]

Bit 23 - B1143

pub fn b1144(&mut self) -> B1144_W<'_>[src]

Bit 24 - B1144

pub fn b1145(&mut self) -> B1145_W<'_>[src]

Bit 25 - B1145

pub fn b1146(&mut self) -> B1146_W<'_>[src]

Bit 26 - B1146

pub fn b1147(&mut self) -> B1147_W<'_>[src]

Bit 27 - B1147

pub fn b1148(&mut self) -> B1148_W<'_>[src]

Bit 28 - B1148

pub fn b1149(&mut self) -> B1149_W<'_>[src]

Bit 29 - B1149

pub fn b1150(&mut self) -> B1150_W<'_>[src]

Bit 30 - B1150

pub fn b1151(&mut self) -> B1151_W<'_>[src]

Bit 31 - B1151

impl W<u32, Reg<u32, _MPCBB2_VCTR36>>[src]

pub fn b1152(&mut self) -> B1152_W<'_>[src]

Bit 0 - B1152

pub fn b1153(&mut self) -> B1153_W<'_>[src]

Bit 1 - B1153

pub fn b1154(&mut self) -> B1154_W<'_>[src]

Bit 2 - B1154

pub fn b1155(&mut self) -> B1155_W<'_>[src]

Bit 3 - B1155

pub fn b1156(&mut self) -> B1156_W<'_>[src]

Bit 4 - B1156

pub fn b1157(&mut self) -> B1157_W<'_>[src]

Bit 5 - B1157

pub fn b1158(&mut self) -> B1158_W<'_>[src]

Bit 6 - B1158

pub fn b1159(&mut self) -> B1159_W<'_>[src]

Bit 7 - B1159

pub fn b1160(&mut self) -> B1160_W<'_>[src]

Bit 8 - B1160

pub fn b1161(&mut self) -> B1161_W<'_>[src]

Bit 9 - B1161

pub fn b1162(&mut self) -> B1162_W<'_>[src]

Bit 10 - B1162

pub fn b1163(&mut self) -> B1163_W<'_>[src]

Bit 11 - B1163

pub fn b1164(&mut self) -> B1164_W<'_>[src]

Bit 12 - B1164

pub fn b1165(&mut self) -> B1165_W<'_>[src]

Bit 13 - B1165

pub fn b1166(&mut self) -> B1166_W<'_>[src]

Bit 14 - B1166

pub fn b1167(&mut self) -> B1167_W<'_>[src]

Bit 15 - B1167

pub fn b1168(&mut self) -> B1168_W<'_>[src]

Bit 16 - B1168

pub fn b1169(&mut self) -> B1169_W<'_>[src]

Bit 17 - B1169

pub fn b1170(&mut self) -> B1170_W<'_>[src]

Bit 18 - B1170

pub fn b1171(&mut self) -> B1171_W<'_>[src]

Bit 19 - B1171

pub fn b1172(&mut self) -> B1172_W<'_>[src]

Bit 20 - B1172

pub fn b1173(&mut self) -> B1173_W<'_>[src]

Bit 21 - B1173

pub fn b1174(&mut self) -> B1174_W<'_>[src]

Bit 22 - B1174

pub fn b1175(&mut self) -> B1175_W<'_>[src]

Bit 23 - B1175

pub fn b1176(&mut self) -> B1176_W<'_>[src]

Bit 24 - B1176

pub fn b1177(&mut self) -> B1177_W<'_>[src]

Bit 25 - B1177

pub fn b1178(&mut self) -> B1178_W<'_>[src]

Bit 26 - B1178

pub fn b1179(&mut self) -> B1179_W<'_>[src]

Bit 27 - B1179

pub fn b1180(&mut self) -> B1180_W<'_>[src]

Bit 28 - B1180

pub fn b1181(&mut self) -> B1181_W<'_>[src]

Bit 29 - B1181

pub fn b1182(&mut self) -> B1182_W<'_>[src]

Bit 30 - B1182

pub fn b1183(&mut self) -> B1183_W<'_>[src]

Bit 31 - B1183

impl W<u32, Reg<u32, _MPCBB2_VCTR37>>[src]

pub fn b1184(&mut self) -> B1184_W<'_>[src]

Bit 0 - B1184

pub fn b1185(&mut self) -> B1185_W<'_>[src]

Bit 1 - B1185

pub fn b1186(&mut self) -> B1186_W<'_>[src]

Bit 2 - B1186

pub fn b1187(&mut self) -> B1187_W<'_>[src]

Bit 3 - B1187

pub fn b1188(&mut self) -> B1188_W<'_>[src]

Bit 4 - B1188

pub fn b1189(&mut self) -> B1189_W<'_>[src]

Bit 5 - B1189

pub fn b1190(&mut self) -> B1190_W<'_>[src]

Bit 6 - B1190

pub fn b1191(&mut self) -> B1191_W<'_>[src]

Bit 7 - B1191

pub fn b1192(&mut self) -> B1192_W<'_>[src]

Bit 8 - B1192

pub fn b1193(&mut self) -> B1193_W<'_>[src]

Bit 9 - B1193

pub fn b1194(&mut self) -> B1194_W<'_>[src]

Bit 10 - B1194

pub fn b1195(&mut self) -> B1195_W<'_>[src]

Bit 11 - B1195

pub fn b1196(&mut self) -> B1196_W<'_>[src]

Bit 12 - B1196

pub fn b1197(&mut self) -> B1197_W<'_>[src]

Bit 13 - B1197

pub fn b1198(&mut self) -> B1198_W<'_>[src]

Bit 14 - B1198

pub fn b1199(&mut self) -> B1199_W<'_>[src]

Bit 15 - B1199

pub fn b1200(&mut self) -> B1200_W<'_>[src]

Bit 16 - B1200

pub fn b1201(&mut self) -> B1201_W<'_>[src]

Bit 17 - B1201

pub fn b1202(&mut self) -> B1202_W<'_>[src]

Bit 18 - B1202

pub fn b1203(&mut self) -> B1203_W<'_>[src]

Bit 19 - B1203

pub fn b1204(&mut self) -> B1204_W<'_>[src]

Bit 20 - B1204

pub fn b1205(&mut self) -> B1205_W<'_>[src]

Bit 21 - B1205

pub fn b1206(&mut self) -> B1206_W<'_>[src]

Bit 22 - B1206

pub fn b1207(&mut self) -> B1207_W<'_>[src]

Bit 23 - B1207

pub fn b1208(&mut self) -> B1208_W<'_>[src]

Bit 24 - B1208

pub fn b1209(&mut self) -> B1209_W<'_>[src]

Bit 25 - B1209

pub fn b1210(&mut self) -> B1210_W<'_>[src]

Bit 26 - B1210

pub fn b1211(&mut self) -> B1211_W<'_>[src]

Bit 27 - B1211

pub fn b1212(&mut self) -> B1212_W<'_>[src]

Bit 28 - B1212

pub fn b1213(&mut self) -> B1213_W<'_>[src]

Bit 29 - B1213

pub fn b1214(&mut self) -> B1214_W<'_>[src]

Bit 30 - B1214

pub fn b1215(&mut self) -> B1215_W<'_>[src]

Bit 31 - B1215

impl W<u32, Reg<u32, _MPCBB2_VCTR38>>[src]

pub fn b1216(&mut self) -> B1216_W<'_>[src]

Bit 0 - B1216

pub fn b1217(&mut self) -> B1217_W<'_>[src]

Bit 1 - B1217

pub fn b1218(&mut self) -> B1218_W<'_>[src]

Bit 2 - B1218

pub fn b1219(&mut self) -> B1219_W<'_>[src]

Bit 3 - B1219

pub fn b1220(&mut self) -> B1220_W<'_>[src]

Bit 4 - B1220

pub fn b1221(&mut self) -> B1221_W<'_>[src]

Bit 5 - B1221

pub fn b1222(&mut self) -> B1222_W<'_>[src]

Bit 6 - B1222

pub fn b1223(&mut self) -> B1223_W<'_>[src]

Bit 7 - B1223

pub fn b1224(&mut self) -> B1224_W<'_>[src]

Bit 8 - B1224

pub fn b1225(&mut self) -> B1225_W<'_>[src]

Bit 9 - B1225

pub fn b1226(&mut self) -> B1226_W<'_>[src]

Bit 10 - B1226

pub fn b1227(&mut self) -> B1227_W<'_>[src]

Bit 11 - B1227

pub fn b1228(&mut self) -> B1228_W<'_>[src]

Bit 12 - B1228

pub fn b1229(&mut self) -> B1229_W<'_>[src]

Bit 13 - B1229

pub fn b1230(&mut self) -> B1230_W<'_>[src]

Bit 14 - B1230

pub fn b1231(&mut self) -> B1231_W<'_>[src]

Bit 15 - B1231

pub fn b1232(&mut self) -> B1232_W<'_>[src]

Bit 16 - B1232

pub fn b1233(&mut self) -> B1233_W<'_>[src]

Bit 17 - B1233

pub fn b1234(&mut self) -> B1234_W<'_>[src]

Bit 18 - B1234

pub fn b1235(&mut self) -> B1235_W<'_>[src]

Bit 19 - B1235

pub fn b1236(&mut self) -> B1236_W<'_>[src]

Bit 20 - B1236

pub fn b1237(&mut self) -> B1237_W<'_>[src]

Bit 21 - B1237

pub fn b1238(&mut self) -> B1238_W<'_>[src]

Bit 22 - B1238

pub fn b1239(&mut self) -> B1239_W<'_>[src]

Bit 23 - B1239

pub fn b1240(&mut self) -> B1240_W<'_>[src]

Bit 24 - B1240

pub fn b1241(&mut self) -> B1241_W<'_>[src]

Bit 25 - B1241

pub fn b1242(&mut self) -> B1242_W<'_>[src]

Bit 26 - B1242

pub fn b1243(&mut self) -> B1243_W<'_>[src]

Bit 27 - B1243

pub fn b1244(&mut self) -> B1244_W<'_>[src]

Bit 28 - B1244

pub fn b1245(&mut self) -> B1245_W<'_>[src]

Bit 29 - B1245

pub fn b1246(&mut self) -> B1246_W<'_>[src]

Bit 30 - B1246

pub fn b1247(&mut self) -> B1247_W<'_>[src]

Bit 31 - B1247

impl W<u32, Reg<u32, _MPCBB2_VCTR39>>[src]

pub fn b1248(&mut self) -> B1248_W<'_>[src]

Bit 0 - B1248

pub fn b1249(&mut self) -> B1249_W<'_>[src]

Bit 1 - B1249

pub fn b1250(&mut self) -> B1250_W<'_>[src]

Bit 2 - B1250

pub fn b1251(&mut self) -> B1251_W<'_>[src]

Bit 3 - B1251

pub fn b1252(&mut self) -> B1252_W<'_>[src]

Bit 4 - B1252

pub fn b1253(&mut self) -> B1253_W<'_>[src]

Bit 5 - B1253

pub fn b1254(&mut self) -> B1254_W<'_>[src]

Bit 6 - B1254

pub fn b1255(&mut self) -> B1255_W<'_>[src]

Bit 7 - B1255

pub fn b1256(&mut self) -> B1256_W<'_>[src]

Bit 8 - B1256

pub fn b1257(&mut self) -> B1257_W<'_>[src]

Bit 9 - B1257

pub fn b1258(&mut self) -> B1258_W<'_>[src]

Bit 10 - B1258

pub fn b1259(&mut self) -> B1259_W<'_>[src]

Bit 11 - B1259

pub fn b1260(&mut self) -> B1260_W<'_>[src]

Bit 12 - B1260

pub fn b1261(&mut self) -> B1261_W<'_>[src]

Bit 13 - B1261

pub fn b1262(&mut self) -> B1262_W<'_>[src]

Bit 14 - B1262

pub fn b1263(&mut self) -> B1263_W<'_>[src]

Bit 15 - B1263

pub fn b1264(&mut self) -> B1264_W<'_>[src]

Bit 16 - B1264

pub fn b1265(&mut self) -> B1265_W<'_>[src]

Bit 17 - B1265

pub fn b1266(&mut self) -> B1266_W<'_>[src]

Bit 18 - B1266

pub fn b1267(&mut self) -> B1267_W<'_>[src]

Bit 19 - B1267

pub fn b1268(&mut self) -> B1268_W<'_>[src]

Bit 20 - B1268

pub fn b1269(&mut self) -> B1269_W<'_>[src]

Bit 21 - B1269

pub fn b1270(&mut self) -> B1270_W<'_>[src]

Bit 22 - B1270

pub fn b1271(&mut self) -> B1271_W<'_>[src]

Bit 23 - B1271

pub fn b1272(&mut self) -> B1272_W<'_>[src]

Bit 24 - B1272

pub fn b1273(&mut self) -> B1273_W<'_>[src]

Bit 25 - B1273

pub fn b1274(&mut self) -> B1274_W<'_>[src]

Bit 26 - B1274

pub fn b1275(&mut self) -> B1275_W<'_>[src]

Bit 27 - B1275

pub fn b1276(&mut self) -> B1276_W<'_>[src]

Bit 28 - B1276

pub fn b1277(&mut self) -> B1277_W<'_>[src]

Bit 29 - B1277

pub fn b1278(&mut self) -> B1278_W<'_>[src]

Bit 30 - B1278

pub fn b1279(&mut self) -> B1279_W<'_>[src]

Bit 31 - B1279

impl W<u32, Reg<u32, _MPCBB2_VCTR40>>[src]

pub fn b1280(&mut self) -> B1280_W<'_>[src]

Bit 0 - B1280

pub fn b1281(&mut self) -> B1281_W<'_>[src]

Bit 1 - B1281

pub fn b1282(&mut self) -> B1282_W<'_>[src]

Bit 2 - B1282

pub fn b1283(&mut self) -> B1283_W<'_>[src]

Bit 3 - B1283

pub fn b1284(&mut self) -> B1284_W<'_>[src]

Bit 4 - B1284

pub fn b1285(&mut self) -> B1285_W<'_>[src]

Bit 5 - B1285

pub fn b1286(&mut self) -> B1286_W<'_>[src]

Bit 6 - B1286

pub fn b1287(&mut self) -> B1287_W<'_>[src]

Bit 7 - B1287

pub fn b1288(&mut self) -> B1288_W<'_>[src]

Bit 8 - B1288

pub fn b1289(&mut self) -> B1289_W<'_>[src]

Bit 9 - B1289

pub fn b1290(&mut self) -> B1290_W<'_>[src]

Bit 10 - B1290

pub fn b1291(&mut self) -> B1291_W<'_>[src]

Bit 11 - B1291

pub fn b1292(&mut self) -> B1292_W<'_>[src]

Bit 12 - B1292

pub fn b1293(&mut self) -> B1293_W<'_>[src]

Bit 13 - B1293

pub fn b1294(&mut self) -> B1294_W<'_>[src]

Bit 14 - B1294

pub fn b1295(&mut self) -> B1295_W<'_>[src]

Bit 15 - B1295

pub fn b1296(&mut self) -> B1296_W<'_>[src]

Bit 16 - B1296

pub fn b1297(&mut self) -> B1297_W<'_>[src]

Bit 17 - B1297

pub fn b1298(&mut self) -> B1298_W<'_>[src]

Bit 18 - B1298

pub fn b1299(&mut self) -> B1299_W<'_>[src]

Bit 19 - B1299

pub fn b1300(&mut self) -> B1300_W<'_>[src]

Bit 20 - B1300

pub fn b1301(&mut self) -> B1301_W<'_>[src]

Bit 21 - B1301

pub fn b1302(&mut self) -> B1302_W<'_>[src]

Bit 22 - B1302

pub fn b1303(&mut self) -> B1303_W<'_>[src]

Bit 23 - B1303

pub fn b1304(&mut self) -> B1304_W<'_>[src]

Bit 24 - B1304

pub fn b1305(&mut self) -> B1305_W<'_>[src]

Bit 25 - B1305

pub fn b1306(&mut self) -> B1306_W<'_>[src]

Bit 26 - B1306

pub fn b1307(&mut self) -> B1307_W<'_>[src]

Bit 27 - B1307

pub fn b1308(&mut self) -> B1308_W<'_>[src]

Bit 28 - B1308

pub fn b1309(&mut self) -> B1309_W<'_>[src]

Bit 29 - B1309

pub fn b1310(&mut self) -> B1310_W<'_>[src]

Bit 30 - B1310

pub fn b1311(&mut self) -> B1311_W<'_>[src]

Bit 31 - B1311

impl W<u32, Reg<u32, _MPCBB2_VCTR41>>[src]

pub fn b1312(&mut self) -> B1312_W<'_>[src]

Bit 0 - B1312

pub fn b1313(&mut self) -> B1313_W<'_>[src]

Bit 1 - B1313

pub fn b1314(&mut self) -> B1314_W<'_>[src]

Bit 2 - B1314

pub fn b1315(&mut self) -> B1315_W<'_>[src]

Bit 3 - B1315

pub fn b1316(&mut self) -> B1316_W<'_>[src]

Bit 4 - B1316

pub fn b1317(&mut self) -> B1317_W<'_>[src]

Bit 5 - B1317

pub fn b1318(&mut self) -> B1318_W<'_>[src]

Bit 6 - B1318

pub fn b1319(&mut self) -> B1319_W<'_>[src]

Bit 7 - B1319

pub fn b1320(&mut self) -> B1320_W<'_>[src]

Bit 8 - B1320

pub fn b1321(&mut self) -> B1321_W<'_>[src]

Bit 9 - B1321

pub fn b1322(&mut self) -> B1322_W<'_>[src]

Bit 10 - B1322

pub fn b1323(&mut self) -> B1323_W<'_>[src]

Bit 11 - B1323

pub fn b1324(&mut self) -> B1324_W<'_>[src]

Bit 12 - B1324

pub fn b1325(&mut self) -> B1325_W<'_>[src]

Bit 13 - B1325

pub fn b1326(&mut self) -> B1326_W<'_>[src]

Bit 14 - B1326

pub fn b1327(&mut self) -> B1327_W<'_>[src]

Bit 15 - B1327

pub fn b1328(&mut self) -> B1328_W<'_>[src]

Bit 16 - B1328

pub fn b1329(&mut self) -> B1329_W<'_>[src]

Bit 17 - B1329

pub fn b1330(&mut self) -> B1330_W<'_>[src]

Bit 18 - B1330

pub fn b1331(&mut self) -> B1331_W<'_>[src]

Bit 19 - B1331

pub fn b1332(&mut self) -> B1332_W<'_>[src]

Bit 20 - B1332

pub fn b1333(&mut self) -> B1333_W<'_>[src]

Bit 21 - B1333

pub fn b1334(&mut self) -> B1334_W<'_>[src]

Bit 22 - B1334

pub fn b1335(&mut self) -> B1335_W<'_>[src]

Bit 23 - B1335

pub fn b1336(&mut self) -> B1336_W<'_>[src]

Bit 24 - B1336

pub fn b1337(&mut self) -> B1337_W<'_>[src]

Bit 25 - B1337

pub fn b1338(&mut self) -> B1338_W<'_>[src]

Bit 26 - B1338

pub fn b1339(&mut self) -> B1339_W<'_>[src]

Bit 27 - B1339

pub fn b1340(&mut self) -> B1340_W<'_>[src]

Bit 28 - B1340

pub fn b1341(&mut self) -> B1341_W<'_>[src]

Bit 29 - B1341

pub fn b1342(&mut self) -> B1342_W<'_>[src]

Bit 30 - B1342

pub fn b1343(&mut self) -> B1343_W<'_>[src]

Bit 31 - B1343

impl W<u32, Reg<u32, _MPCBB2_VCTR42>>[src]

pub fn b1344(&mut self) -> B1344_W<'_>[src]

Bit 0 - B1344

pub fn b1345(&mut self) -> B1345_W<'_>[src]

Bit 1 - B1345

pub fn b1346(&mut self) -> B1346_W<'_>[src]

Bit 2 - B1346

pub fn b1347(&mut self) -> B1347_W<'_>[src]

Bit 3 - B1347

pub fn b1348(&mut self) -> B1348_W<'_>[src]

Bit 4 - B1348

pub fn b1349(&mut self) -> B1349_W<'_>[src]

Bit 5 - B1349

pub fn b1350(&mut self) -> B1350_W<'_>[src]

Bit 6 - B1350

pub fn b1351(&mut self) -> B1351_W<'_>[src]

Bit 7 - B1351

pub fn b1352(&mut self) -> B1352_W<'_>[src]

Bit 8 - B1352

pub fn b1353(&mut self) -> B1353_W<'_>[src]

Bit 9 - B1353

pub fn b1354(&mut self) -> B1354_W<'_>[src]

Bit 10 - B1354

pub fn b1355(&mut self) -> B1355_W<'_>[src]

Bit 11 - B1355

pub fn b1356(&mut self) -> B1356_W<'_>[src]

Bit 12 - B1356

pub fn b1357(&mut self) -> B1357_W<'_>[src]

Bit 13 - B1357

pub fn b1358(&mut self) -> B1358_W<'_>[src]

Bit 14 - B1358

pub fn b1359(&mut self) -> B1359_W<'_>[src]

Bit 15 - B1359

pub fn b1360(&mut self) -> B1360_W<'_>[src]

Bit 16 - B1360

pub fn b1361(&mut self) -> B1361_W<'_>[src]

Bit 17 - B1361

pub fn b1362(&mut self) -> B1362_W<'_>[src]

Bit 18 - B1362

pub fn b1363(&mut self) -> B1363_W<'_>[src]

Bit 19 - B1363

pub fn b1364(&mut self) -> B1364_W<'_>[src]

Bit 20 - B1364

pub fn b1365(&mut self) -> B1365_W<'_>[src]

Bit 21 - B1365

pub fn b1366(&mut self) -> B1366_W<'_>[src]

Bit 22 - B1366

pub fn b1367(&mut self) -> B1367_W<'_>[src]

Bit 23 - B1367

pub fn b1368(&mut self) -> B1368_W<'_>[src]

Bit 24 - B1368

pub fn b1369(&mut self) -> B1369_W<'_>[src]

Bit 25 - B1369

pub fn b1370(&mut self) -> B1370_W<'_>[src]

Bit 26 - B1370

pub fn b1371(&mut self) -> B1371_W<'_>[src]

Bit 27 - B1371

pub fn b1372(&mut self) -> B1372_W<'_>[src]

Bit 28 - B1372

pub fn b1373(&mut self) -> B1373_W<'_>[src]

Bit 29 - B1373

pub fn b1374(&mut self) -> B1374_W<'_>[src]

Bit 30 - B1374

pub fn b1375(&mut self) -> B1375_W<'_>[src]

Bit 31 - B1375

impl W<u32, Reg<u32, _MPCBB2_VCTR43>>[src]

pub fn b1376(&mut self) -> B1376_W<'_>[src]

Bit 0 - B1376

pub fn b1377(&mut self) -> B1377_W<'_>[src]

Bit 1 - B1377

pub fn b1378(&mut self) -> B1378_W<'_>[src]

Bit 2 - B1378

pub fn b1379(&mut self) -> B1379_W<'_>[src]

Bit 3 - B1379

pub fn b1380(&mut self) -> B1380_W<'_>[src]

Bit 4 - B1380

pub fn b1381(&mut self) -> B1381_W<'_>[src]

Bit 5 - B1381

pub fn b1382(&mut self) -> B1382_W<'_>[src]

Bit 6 - B1382

pub fn b1383(&mut self) -> B1383_W<'_>[src]

Bit 7 - B1383

pub fn b1384(&mut self) -> B1384_W<'_>[src]

Bit 8 - B1384

pub fn b1385(&mut self) -> B1385_W<'_>[src]

Bit 9 - B1385

pub fn b1386(&mut self) -> B1386_W<'_>[src]

Bit 10 - B1386

pub fn b1387(&mut self) -> B1387_W<'_>[src]

Bit 11 - B1387

pub fn b1388(&mut self) -> B1388_W<'_>[src]

Bit 12 - B1388

pub fn b1389(&mut self) -> B1389_W<'_>[src]

Bit 13 - B1389

pub fn b1390(&mut self) -> B1390_W<'_>[src]

Bit 14 - B1390

pub fn b1391(&mut self) -> B1391_W<'_>[src]

Bit 15 - B1391

pub fn b1392(&mut self) -> B1392_W<'_>[src]

Bit 16 - B1392

pub fn b1393(&mut self) -> B1393_W<'_>[src]

Bit 17 - B1393

pub fn b1394(&mut self) -> B1394_W<'_>[src]

Bit 18 - B1394

pub fn b1395(&mut self) -> B1395_W<'_>[src]

Bit 19 - B1395

pub fn b1396(&mut self) -> B1396_W<'_>[src]

Bit 20 - B1396

pub fn b1397(&mut self) -> B1397_W<'_>[src]

Bit 21 - B1397

pub fn b1398(&mut self) -> B1398_W<'_>[src]

Bit 22 - B1398

pub fn b1399(&mut self) -> B1399_W<'_>[src]

Bit 23 - B1399

pub fn b1400(&mut self) -> B1400_W<'_>[src]

Bit 24 - B1400

pub fn b1401(&mut self) -> B1401_W<'_>[src]

Bit 25 - B1401

pub fn b1402(&mut self) -> B1402_W<'_>[src]

Bit 26 - B1402

pub fn b1403(&mut self) -> B1403_W<'_>[src]

Bit 27 - B1403

pub fn b1404(&mut self) -> B1404_W<'_>[src]

Bit 28 - B1404

pub fn b1405(&mut self) -> B1405_W<'_>[src]

Bit 29 - B1405

pub fn b1406(&mut self) -> B1406_W<'_>[src]

Bit 30 - B1406

pub fn b1407(&mut self) -> B1407_W<'_>[src]

Bit 31 - B1407

impl W<u32, Reg<u32, _MPCBB2_VCTR44>>[src]

pub fn b1408(&mut self) -> B1408_W<'_>[src]

Bit 0 - B1408

pub fn b1409(&mut self) -> B1409_W<'_>[src]

Bit 1 - B1409

pub fn b1410(&mut self) -> B1410_W<'_>[src]

Bit 2 - B1410

pub fn b1411(&mut self) -> B1411_W<'_>[src]

Bit 3 - B1411

pub fn b1412(&mut self) -> B1412_W<'_>[src]

Bit 4 - B1412

pub fn b1413(&mut self) -> B1413_W<'_>[src]

Bit 5 - B1413

pub fn b1414(&mut self) -> B1414_W<'_>[src]

Bit 6 - B1414

pub fn b1415(&mut self) -> B1415_W<'_>[src]

Bit 7 - B1415

pub fn b1416(&mut self) -> B1416_W<'_>[src]

Bit 8 - B1416

pub fn b1417(&mut self) -> B1417_W<'_>[src]

Bit 9 - B1417

pub fn b1418(&mut self) -> B1418_W<'_>[src]

Bit 10 - B1418

pub fn b1419(&mut self) -> B1419_W<'_>[src]

Bit 11 - B1419

pub fn b1420(&mut self) -> B1420_W<'_>[src]

Bit 12 - B1420

pub fn b1421(&mut self) -> B1421_W<'_>[src]

Bit 13 - B1421

pub fn b1422(&mut self) -> B1422_W<'_>[src]

Bit 14 - B1422

pub fn b1423(&mut self) -> B1423_W<'_>[src]

Bit 15 - B1423

pub fn b1424(&mut self) -> B1424_W<'_>[src]

Bit 16 - B1424

pub fn b1425(&mut self) -> B1425_W<'_>[src]

Bit 17 - B1425

pub fn b1426(&mut self) -> B1426_W<'_>[src]

Bit 18 - B1426

pub fn b1427(&mut self) -> B1427_W<'_>[src]

Bit 19 - B1427

pub fn b1428(&mut self) -> B1428_W<'_>[src]

Bit 20 - B1428

pub fn b1429(&mut self) -> B1429_W<'_>[src]

Bit 21 - B1429

pub fn b1430(&mut self) -> B1430_W<'_>[src]

Bit 22 - B1430

pub fn b1431(&mut self) -> B1431_W<'_>[src]

Bit 23 - B1431

pub fn b1432(&mut self) -> B1432_W<'_>[src]

Bit 24 - B1432

pub fn b1433(&mut self) -> B1433_W<'_>[src]

Bit 25 - B1433

pub fn b1434(&mut self) -> B1434_W<'_>[src]

Bit 26 - B1434

pub fn b1435(&mut self) -> B1435_W<'_>[src]

Bit 27 - B1435

pub fn b1436(&mut self) -> B1436_W<'_>[src]

Bit 28 - B1436

pub fn b1437(&mut self) -> B1437_W<'_>[src]

Bit 29 - B1437

pub fn b1438(&mut self) -> B1438_W<'_>[src]

Bit 30 - B1438

pub fn b1439(&mut self) -> B1439_W<'_>[src]

Bit 31 - B1439

impl W<u32, Reg<u32, _MPCBB2_VCTR45>>[src]

pub fn b1440(&mut self) -> B1440_W<'_>[src]

Bit 0 - B1440

pub fn b1441(&mut self) -> B1441_W<'_>[src]

Bit 1 - B1441

pub fn b1442(&mut self) -> B1442_W<'_>[src]

Bit 2 - B1442

pub fn b1443(&mut self) -> B1443_W<'_>[src]

Bit 3 - B1443

pub fn b1444(&mut self) -> B1444_W<'_>[src]

Bit 4 - B1444

pub fn b1445(&mut self) -> B1445_W<'_>[src]

Bit 5 - B1445

pub fn b1446(&mut self) -> B1446_W<'_>[src]

Bit 6 - B1446

pub fn b1447(&mut self) -> B1447_W<'_>[src]

Bit 7 - B1447

pub fn b1448(&mut self) -> B1448_W<'_>[src]

Bit 8 - B1448

pub fn b1449(&mut self) -> B1449_W<'_>[src]

Bit 9 - B1449

pub fn b1450(&mut self) -> B1450_W<'_>[src]

Bit 10 - B1450

pub fn b1451(&mut self) -> B1451_W<'_>[src]

Bit 11 - B1451

pub fn b1452(&mut self) -> B1452_W<'_>[src]

Bit 12 - B1452

pub fn b1453(&mut self) -> B1453_W<'_>[src]

Bit 13 - B1453

pub fn b1454(&mut self) -> B1454_W<'_>[src]

Bit 14 - B1454

pub fn b1455(&mut self) -> B1455_W<'_>[src]

Bit 15 - B1455

pub fn b1456(&mut self) -> B1456_W<'_>[src]

Bit 16 - B1456

pub fn b1457(&mut self) -> B1457_W<'_>[src]

Bit 17 - B1457

pub fn b1458(&mut self) -> B1458_W<'_>[src]

Bit 18 - B1458

pub fn b1459(&mut self) -> B1459_W<'_>[src]

Bit 19 - B1459

pub fn b1460(&mut self) -> B1460_W<'_>[src]

Bit 20 - B1460

pub fn b1461(&mut self) -> B1461_W<'_>[src]

Bit 21 - B1461

pub fn b1462(&mut self) -> B1462_W<'_>[src]

Bit 22 - B1462

pub fn b1463(&mut self) -> B1463_W<'_>[src]

Bit 23 - B1463

pub fn b1464(&mut self) -> B1464_W<'_>[src]

Bit 24 - B1464

pub fn b1465(&mut self) -> B1465_W<'_>[src]

Bit 25 - B1465

pub fn b1466(&mut self) -> B1466_W<'_>[src]

Bit 26 - B1466

pub fn b1467(&mut self) -> B1467_W<'_>[src]

Bit 27 - B1467

pub fn b1468(&mut self) -> B1468_W<'_>[src]

Bit 28 - B1468

pub fn b1469(&mut self) -> B1469_W<'_>[src]

Bit 29 - B1469

pub fn b1470(&mut self) -> B1470_W<'_>[src]

Bit 30 - B1470

pub fn b1471(&mut self) -> B1471_W<'_>[src]

Bit 31 - B1471

impl W<u32, Reg<u32, _MPCBB2_VCTR46>>[src]

pub fn b1472(&mut self) -> B1472_W<'_>[src]

Bit 0 - B1472

pub fn b1473(&mut self) -> B1473_W<'_>[src]

Bit 1 - B1473

pub fn b1474(&mut self) -> B1474_W<'_>[src]

Bit 2 - B1474

pub fn b1475(&mut self) -> B1475_W<'_>[src]

Bit 3 - B1475

pub fn b1476(&mut self) -> B1476_W<'_>[src]

Bit 4 - B1476

pub fn b1477(&mut self) -> B1477_W<'_>[src]

Bit 5 - B1477

pub fn b1478(&mut self) -> B1478_W<'_>[src]

Bit 6 - B1478

pub fn b1479(&mut self) -> B1479_W<'_>[src]

Bit 7 - B1479

pub fn b1480(&mut self) -> B1480_W<'_>[src]

Bit 8 - B1480

pub fn b1481(&mut self) -> B1481_W<'_>[src]

Bit 9 - B1481

pub fn b1482(&mut self) -> B1482_W<'_>[src]

Bit 10 - B1482

pub fn b1483(&mut self) -> B1483_W<'_>[src]

Bit 11 - B1483

pub fn b1484(&mut self) -> B1484_W<'_>[src]

Bit 12 - B1484

pub fn b1485(&mut self) -> B1485_W<'_>[src]

Bit 13 - B1485

pub fn b1486(&mut self) -> B1486_W<'_>[src]

Bit 14 - B1486

pub fn b1487(&mut self) -> B1487_W<'_>[src]

Bit 15 - B1487

pub fn b1488(&mut self) -> B1488_W<'_>[src]

Bit 16 - B1488

pub fn b1489(&mut self) -> B1489_W<'_>[src]

Bit 17 - B1489

pub fn b1490(&mut self) -> B1490_W<'_>[src]

Bit 18 - B1490

pub fn b1491(&mut self) -> B1491_W<'_>[src]

Bit 19 - B1491

pub fn b1492(&mut self) -> B1492_W<'_>[src]

Bit 20 - B1492

pub fn b1493(&mut self) -> B1493_W<'_>[src]

Bit 21 - B1493

pub fn b1494(&mut self) -> B1494_W<'_>[src]

Bit 22 - B1494

pub fn b1495(&mut self) -> B1495_W<'_>[src]

Bit 23 - B1495

pub fn b1496(&mut self) -> B1496_W<'_>[src]

Bit 24 - B1496

pub fn b1497(&mut self) -> B1497_W<'_>[src]

Bit 25 - B1497

pub fn b1498(&mut self) -> B1498_W<'_>[src]

Bit 26 - B1498

pub fn b1499(&mut self) -> B1499_W<'_>[src]

Bit 27 - B1499

pub fn b1500(&mut self) -> B1500_W<'_>[src]

Bit 28 - B1500

pub fn b1501(&mut self) -> B1501_W<'_>[src]

Bit 29 - B1501

pub fn b1502(&mut self) -> B1502_W<'_>[src]

Bit 30 - B1502

pub fn b1503(&mut self) -> B1503_W<'_>[src]

Bit 31 - B1503

impl W<u32, Reg<u32, _MPCBB2_VCTR47>>[src]

pub fn b1504(&mut self) -> B1504_W<'_>[src]

Bit 0 - B1504

pub fn b1505(&mut self) -> B1505_W<'_>[src]

Bit 1 - B1505

pub fn b1506(&mut self) -> B1506_W<'_>[src]

Bit 2 - B1506

pub fn b1507(&mut self) -> B1507_W<'_>[src]

Bit 3 - B1507

pub fn b1508(&mut self) -> B1508_W<'_>[src]

Bit 4 - B1508

pub fn b1509(&mut self) -> B1509_W<'_>[src]

Bit 5 - B1509

pub fn b1510(&mut self) -> B1510_W<'_>[src]

Bit 6 - B1510

pub fn b1511(&mut self) -> B1511_W<'_>[src]

Bit 7 - B1511

pub fn b1512(&mut self) -> B1512_W<'_>[src]

Bit 8 - B1512

pub fn b1513(&mut self) -> B1513_W<'_>[src]

Bit 9 - B1513

pub fn b1514(&mut self) -> B1514_W<'_>[src]

Bit 10 - B1514

pub fn b1515(&mut self) -> B1515_W<'_>[src]

Bit 11 - B1515

pub fn b1516(&mut self) -> B1516_W<'_>[src]

Bit 12 - B1516

pub fn b1517(&mut self) -> B1517_W<'_>[src]

Bit 13 - B1517

pub fn b1518(&mut self) -> B1518_W<'_>[src]

Bit 14 - B1518

pub fn b1519(&mut self) -> B1519_W<'_>[src]

Bit 15 - B1519

pub fn b1520(&mut self) -> B1520_W<'_>[src]

Bit 16 - B1520

pub fn b1521(&mut self) -> B1521_W<'_>[src]

Bit 17 - B1521

pub fn b1522(&mut self) -> B1522_W<'_>[src]

Bit 18 - B1522

pub fn b1523(&mut self) -> B1523_W<'_>[src]

Bit 19 - B1523

pub fn b1524(&mut self) -> B1524_W<'_>[src]

Bit 20 - B1524

pub fn b1525(&mut self) -> B1525_W<'_>[src]

Bit 21 - B1525

pub fn b1526(&mut self) -> B1526_W<'_>[src]

Bit 22 - B1526

pub fn b1527(&mut self) -> B1527_W<'_>[src]

Bit 23 - B1527

pub fn b1528(&mut self) -> B1528_W<'_>[src]

Bit 24 - B1528

pub fn b1529(&mut self) -> B1529_W<'_>[src]

Bit 25 - B1529

pub fn b1530(&mut self) -> B1530_W<'_>[src]

Bit 26 - B1530

pub fn b1531(&mut self) -> B1531_W<'_>[src]

Bit 27 - B1531

pub fn b1532(&mut self) -> B1532_W<'_>[src]

Bit 28 - B1532

pub fn b1533(&mut self) -> B1533_W<'_>[src]

Bit 29 - B1533

pub fn b1534(&mut self) -> B1534_W<'_>[src]

Bit 30 - B1534

pub fn b1535(&mut self) -> B1535_W<'_>[src]

Bit 31 - B1535

impl W<u32, Reg<u32, _MPCBB2_VCTR48>>[src]

pub fn b1536(&mut self) -> B1536_W<'_>[src]

Bit 0 - B1536

pub fn b1537(&mut self) -> B1537_W<'_>[src]

Bit 1 - B1537

pub fn b1538(&mut self) -> B1538_W<'_>[src]

Bit 2 - B1538

pub fn b1539(&mut self) -> B1539_W<'_>[src]

Bit 3 - B1539

pub fn b1540(&mut self) -> B1540_W<'_>[src]

Bit 4 - B1540

pub fn b1541(&mut self) -> B1541_W<'_>[src]

Bit 5 - B1541

pub fn b1542(&mut self) -> B1542_W<'_>[src]

Bit 6 - B1542

pub fn b1543(&mut self) -> B1543_W<'_>[src]

Bit 7 - B1543

pub fn b1544(&mut self) -> B1544_W<'_>[src]

Bit 8 - B1544

pub fn b1545(&mut self) -> B1545_W<'_>[src]

Bit 9 - B1545

pub fn b1546(&mut self) -> B1546_W<'_>[src]

Bit 10 - B1546

pub fn b1547(&mut self) -> B1547_W<'_>[src]

Bit 11 - B1547

pub fn b1548(&mut self) -> B1548_W<'_>[src]

Bit 12 - B1548

pub fn b1549(&mut self) -> B1549_W<'_>[src]

Bit 13 - B1549

pub fn b1550(&mut self) -> B1550_W<'_>[src]

Bit 14 - B1550

pub fn b1551(&mut self) -> B1551_W<'_>[src]

Bit 15 - B1551

pub fn b1552(&mut self) -> B1552_W<'_>[src]

Bit 16 - B1552

pub fn b1553(&mut self) -> B1553_W<'_>[src]

Bit 17 - B1553

pub fn b1554(&mut self) -> B1554_W<'_>[src]

Bit 18 - B1554

pub fn b1555(&mut self) -> B1555_W<'_>[src]

Bit 19 - B1555

pub fn b1556(&mut self) -> B1556_W<'_>[src]

Bit 20 - B1556

pub fn b1557(&mut self) -> B1557_W<'_>[src]

Bit 21 - B1557

pub fn b1558(&mut self) -> B1558_W<'_>[src]

Bit 22 - B1558

pub fn b1559(&mut self) -> B1559_W<'_>[src]

Bit 23 - B1559

pub fn b1560(&mut self) -> B1560_W<'_>[src]

Bit 24 - B1560

pub fn b1561(&mut self) -> B1561_W<'_>[src]

Bit 25 - B1561

pub fn b1562(&mut self) -> B1562_W<'_>[src]

Bit 26 - B1562

pub fn b1563(&mut self) -> B1563_W<'_>[src]

Bit 27 - B1563

pub fn b1564(&mut self) -> B1564_W<'_>[src]

Bit 28 - B1564

pub fn b1565(&mut self) -> B1565_W<'_>[src]

Bit 29 - B1565

pub fn b1566(&mut self) -> B1566_W<'_>[src]

Bit 30 - B1566

pub fn b1567(&mut self) -> B1567_W<'_>[src]

Bit 31 - B1567

impl W<u32, Reg<u32, _MPCBB2_VCTR49>>[src]

pub fn b1568(&mut self) -> B1568_W<'_>[src]

Bit 0 - B1568

pub fn b1569(&mut self) -> B1569_W<'_>[src]

Bit 1 - B1569

pub fn b1570(&mut self) -> B1570_W<'_>[src]

Bit 2 - B1570

pub fn b1571(&mut self) -> B1571_W<'_>[src]

Bit 3 - B1571

pub fn b1572(&mut self) -> B1572_W<'_>[src]

Bit 4 - B1572

pub fn b1573(&mut self) -> B1573_W<'_>[src]

Bit 5 - B1573

pub fn b1574(&mut self) -> B1574_W<'_>[src]

Bit 6 - B1574

pub fn b1575(&mut self) -> B1575_W<'_>[src]

Bit 7 - B1575

pub fn b1576(&mut self) -> B1576_W<'_>[src]

Bit 8 - B1576

pub fn b1577(&mut self) -> B1577_W<'_>[src]

Bit 9 - B1577

pub fn b1578(&mut self) -> B1578_W<'_>[src]

Bit 10 - B1578

pub fn b1579(&mut self) -> B1579_W<'_>[src]

Bit 11 - B1579

pub fn b1580(&mut self) -> B1580_W<'_>[src]

Bit 12 - B1580

pub fn b1581(&mut self) -> B1581_W<'_>[src]

Bit 13 - B1581

pub fn b1582(&mut self) -> B1582_W<'_>[src]

Bit 14 - B1582

pub fn b1583(&mut self) -> B1583_W<'_>[src]

Bit 15 - B1583

pub fn b1584(&mut self) -> B1584_W<'_>[src]

Bit 16 - B1584

pub fn b1585(&mut self) -> B1585_W<'_>[src]

Bit 17 - B1585

pub fn b1586(&mut self) -> B1586_W<'_>[src]

Bit 18 - B1586

pub fn b1587(&mut self) -> B1587_W<'_>[src]

Bit 19 - B1587

pub fn b1588(&mut self) -> B1588_W<'_>[src]

Bit 20 - B1588

pub fn b1589(&mut self) -> B1589_W<'_>[src]

Bit 21 - B1589

pub fn b1590(&mut self) -> B1590_W<'_>[src]

Bit 22 - B1590

pub fn b1591(&mut self) -> B1591_W<'_>[src]

Bit 23 - B1591

pub fn b1592(&mut self) -> B1592_W<'_>[src]

Bit 24 - B1592

pub fn b1593(&mut self) -> B1593_W<'_>[src]

Bit 25 - B1593

pub fn b1594(&mut self) -> B1594_W<'_>[src]

Bit 26 - B1594

pub fn b1595(&mut self) -> B1595_W<'_>[src]

Bit 27 - B1595

pub fn b1596(&mut self) -> B1596_W<'_>[src]

Bit 28 - B1596

pub fn b1597(&mut self) -> B1597_W<'_>[src]

Bit 29 - B1597

pub fn b1598(&mut self) -> B1598_W<'_>[src]

Bit 30 - B1598

pub fn b1599(&mut self) -> B1599_W<'_>[src]

Bit 31 - B1599

impl W<u32, Reg<u32, _MPCBB2_VCTR50>>[src]

pub fn b1600(&mut self) -> B1600_W<'_>[src]

Bit 0 - B1600

pub fn b1601(&mut self) -> B1601_W<'_>[src]

Bit 1 - B1601

pub fn b1602(&mut self) -> B1602_W<'_>[src]

Bit 2 - B1602

pub fn b1603(&mut self) -> B1603_W<'_>[src]

Bit 3 - B1603

pub fn b1604(&mut self) -> B1604_W<'_>[src]

Bit 4 - B1604

pub fn b1605(&mut self) -> B1605_W<'_>[src]

Bit 5 - B1605

pub fn b1606(&mut self) -> B1606_W<'_>[src]

Bit 6 - B1606

pub fn b1607(&mut self) -> B1607_W<'_>[src]

Bit 7 - B1607

pub fn b1608(&mut self) -> B1608_W<'_>[src]

Bit 8 - B1608

pub fn b1609(&mut self) -> B1609_W<'_>[src]

Bit 9 - B1609

pub fn b1610(&mut self) -> B1610_W<'_>[src]

Bit 10 - B1610

pub fn b1611(&mut self) -> B1611_W<'_>[src]

Bit 11 - B1611

pub fn b1612(&mut self) -> B1612_W<'_>[src]

Bit 12 - B1612

pub fn b1613(&mut self) -> B1613_W<'_>[src]

Bit 13 - B1613

pub fn b1614(&mut self) -> B1614_W<'_>[src]

Bit 14 - B1614

pub fn b1615(&mut self) -> B1615_W<'_>[src]

Bit 15 - B1615

pub fn b1616(&mut self) -> B1616_W<'_>[src]

Bit 16 - B1616

pub fn b1617(&mut self) -> B1617_W<'_>[src]

Bit 17 - B1617

pub fn b1618(&mut self) -> B1618_W<'_>[src]

Bit 18 - B1618

pub fn b1619(&mut self) -> B1619_W<'_>[src]

Bit 19 - B1619

pub fn b1620(&mut self) -> B1620_W<'_>[src]

Bit 20 - B1620

pub fn b1621(&mut self) -> B1621_W<'_>[src]

Bit 21 - B1621

pub fn b1622(&mut self) -> B1622_W<'_>[src]

Bit 22 - B1622

pub fn b1623(&mut self) -> B1623_W<'_>[src]

Bit 23 - B1623

pub fn b1624(&mut self) -> B1624_W<'_>[src]

Bit 24 - B1624

pub fn b1625(&mut self) -> B1625_W<'_>[src]

Bit 25 - B1625

pub fn b1626(&mut self) -> B1626_W<'_>[src]

Bit 26 - B1626

pub fn b1627(&mut self) -> B1627_W<'_>[src]

Bit 27 - B1627

pub fn b1628(&mut self) -> B1628_W<'_>[src]

Bit 28 - B1628

pub fn b1629(&mut self) -> B1629_W<'_>[src]

Bit 29 - B1629

pub fn b1630(&mut self) -> B1630_W<'_>[src]

Bit 30 - B1630

pub fn b1631(&mut self) -> B1631_W<'_>[src]

Bit 31 - B1631

impl W<u32, Reg<u32, _MPCBB2_VCTR51>>[src]

pub fn b1632(&mut self) -> B1632_W<'_>[src]

Bit 0 - B1632

pub fn b1633(&mut self) -> B1633_W<'_>[src]

Bit 1 - B1633

pub fn b1634(&mut self) -> B1634_W<'_>[src]

Bit 2 - B1634

pub fn b1635(&mut self) -> B1635_W<'_>[src]

Bit 3 - B1635

pub fn b1636(&mut self) -> B1636_W<'_>[src]

Bit 4 - B1636

pub fn b1637(&mut self) -> B1637_W<'_>[src]

Bit 5 - B1637

pub fn b1638(&mut self) -> B1638_W<'_>[src]

Bit 6 - B1638

pub fn b1639(&mut self) -> B1639_W<'_>[src]

Bit 7 - B1639

pub fn b1640(&mut self) -> B1640_W<'_>[src]

Bit 8 - B1640

pub fn b1641(&mut self) -> B1641_W<'_>[src]

Bit 9 - B1641

pub fn b1642(&mut self) -> B1642_W<'_>[src]

Bit 10 - B1642

pub fn b1643(&mut self) -> B1643_W<'_>[src]

Bit 11 - B1643

pub fn b1644(&mut self) -> B1644_W<'_>[src]

Bit 12 - B1644

pub fn b1645(&mut self) -> B1645_W<'_>[src]

Bit 13 - B1645

pub fn b1646(&mut self) -> B1646_W<'_>[src]

Bit 14 - B1646

pub fn b1647(&mut self) -> B1647_W<'_>[src]

Bit 15 - B1647

pub fn b1648(&mut self) -> B1648_W<'_>[src]

Bit 16 - B1648

pub fn b1649(&mut self) -> B1649_W<'_>[src]

Bit 17 - B1649

pub fn b1650(&mut self) -> B1650_W<'_>[src]

Bit 18 - B1650

pub fn b1651(&mut self) -> B1651_W<'_>[src]

Bit 19 - B1651

pub fn b1652(&mut self) -> B1652_W<'_>[src]

Bit 20 - B1652

pub fn b1653(&mut self) -> B1653_W<'_>[src]

Bit 21 - B1653

pub fn b1654(&mut self) -> B1654_W<'_>[src]

Bit 22 - B1654

pub fn b1655(&mut self) -> B1655_W<'_>[src]

Bit 23 - B1655

pub fn b1656(&mut self) -> B1656_W<'_>[src]

Bit 24 - B1656

pub fn b1657(&mut self) -> B1657_W<'_>[src]

Bit 25 - B1657

pub fn b1658(&mut self) -> B1658_W<'_>[src]

Bit 26 - B1658

pub fn b1659(&mut self) -> B1659_W<'_>[src]

Bit 27 - B1659

pub fn b1660(&mut self) -> B1660_W<'_>[src]

Bit 28 - B1660

pub fn b1661(&mut self) -> B1661_W<'_>[src]

Bit 29 - B1661

pub fn b1662(&mut self) -> B1662_W<'_>[src]

Bit 30 - B1662

pub fn b1663(&mut self) -> B1663_W<'_>[src]

Bit 31 - B1663

impl W<u32, Reg<u32, _MPCBB2_VCTR52>>[src]

pub fn b1664(&mut self) -> B1664_W<'_>[src]

Bit 0 - B1664

pub fn b1665(&mut self) -> B1665_W<'_>[src]

Bit 1 - B1665

pub fn b1666(&mut self) -> B1666_W<'_>[src]

Bit 2 - B1666

pub fn b1667(&mut self) -> B1667_W<'_>[src]

Bit 3 - B1667

pub fn b1668(&mut self) -> B1668_W<'_>[src]

Bit 4 - B1668

pub fn b1669(&mut self) -> B1669_W<'_>[src]

Bit 5 - B1669

pub fn b1670(&mut self) -> B1670_W<'_>[src]

Bit 6 - B1670

pub fn b1671(&mut self) -> B1671_W<'_>[src]

Bit 7 - B1671

pub fn b1672(&mut self) -> B1672_W<'_>[src]

Bit 8 - B1672

pub fn b1673(&mut self) -> B1673_W<'_>[src]

Bit 9 - B1673

pub fn b1674(&mut self) -> B1674_W<'_>[src]

Bit 10 - B1674

pub fn b1675(&mut self) -> B1675_W<'_>[src]

Bit 11 - B1675

pub fn b1676(&mut self) -> B1676_W<'_>[src]

Bit 12 - B1676

pub fn b1677(&mut self) -> B1677_W<'_>[src]

Bit 13 - B1677

pub fn b1678(&mut self) -> B1678_W<'_>[src]

Bit 14 - B1678

pub fn b1679(&mut self) -> B1679_W<'_>[src]

Bit 15 - B1679

pub fn b1680(&mut self) -> B1680_W<'_>[src]

Bit 16 - B1680

pub fn b1681(&mut self) -> B1681_W<'_>[src]

Bit 17 - B1681

pub fn b1682(&mut self) -> B1682_W<'_>[src]

Bit 18 - B1682

pub fn b1683(&mut self) -> B1683_W<'_>[src]

Bit 19 - B1683

pub fn b1684(&mut self) -> B1684_W<'_>[src]

Bit 20 - B1684

pub fn b1685(&mut self) -> B1685_W<'_>[src]

Bit 21 - B1685

pub fn b1686(&mut self) -> B1686_W<'_>[src]

Bit 22 - B1686

pub fn b1687(&mut self) -> B1687_W<'_>[src]

Bit 23 - B1687

pub fn b1688(&mut self) -> B1688_W<'_>[src]

Bit 24 - B1688

pub fn b1689(&mut self) -> B1689_W<'_>[src]

Bit 25 - B1689

pub fn b1690(&mut self) -> B1690_W<'_>[src]

Bit 26 - B1690

pub fn b1691(&mut self) -> B1691_W<'_>[src]

Bit 27 - B1691

pub fn b1692(&mut self) -> B1692_W<'_>[src]

Bit 28 - B1692

pub fn b1693(&mut self) -> B1693_W<'_>[src]

Bit 29 - B1693

pub fn b1694(&mut self) -> B1694_W<'_>[src]

Bit 30 - B1694

pub fn b1695(&mut self) -> B1695_W<'_>[src]

Bit 31 - B1695

impl W<u32, Reg<u32, _MPCBB2_VCTR53>>[src]

pub fn b1696(&mut self) -> B1696_W<'_>[src]

Bit 0 - B1696

pub fn b1697(&mut self) -> B1697_W<'_>[src]

Bit 1 - B1697

pub fn b1698(&mut self) -> B1698_W<'_>[src]

Bit 2 - B1698

pub fn b1699(&mut self) -> B1699_W<'_>[src]

Bit 3 - B1699

pub fn b1700(&mut self) -> B1700_W<'_>[src]

Bit 4 - B1700

pub fn b1701(&mut self) -> B1701_W<'_>[src]

Bit 5 - B1701

pub fn b1702(&mut self) -> B1702_W<'_>[src]

Bit 6 - B1702

pub fn b1703(&mut self) -> B1703_W<'_>[src]

Bit 7 - B1703

pub fn b1704(&mut self) -> B1704_W<'_>[src]

Bit 8 - B1704

pub fn b1705(&mut self) -> B1705_W<'_>[src]

Bit 9 - B1705

pub fn b1706(&mut self) -> B1706_W<'_>[src]

Bit 10 - B1706

pub fn b1707(&mut self) -> B1707_W<'_>[src]

Bit 11 - B1707

pub fn b1708(&mut self) -> B1708_W<'_>[src]

Bit 12 - B1708

pub fn b1709(&mut self) -> B1709_W<'_>[src]

Bit 13 - B1709

pub fn b1710(&mut self) -> B1710_W<'_>[src]

Bit 14 - B1710

pub fn b1711(&mut self) -> B1711_W<'_>[src]

Bit 15 - B1711

pub fn b1712(&mut self) -> B1712_W<'_>[src]

Bit 16 - B1712

pub fn b1713(&mut self) -> B1713_W<'_>[src]

Bit 17 - B1713

pub fn b1714(&mut self) -> B1714_W<'_>[src]

Bit 18 - B1714

pub fn b1715(&mut self) -> B1715_W<'_>[src]

Bit 19 - B1715

pub fn b1716(&mut self) -> B1716_W<'_>[src]

Bit 20 - B1716

pub fn b1717(&mut self) -> B1717_W<'_>[src]

Bit 21 - B1717

pub fn b1718(&mut self) -> B1718_W<'_>[src]

Bit 22 - B1718

pub fn b1719(&mut self) -> B1719_W<'_>[src]

Bit 23 - B1719

pub fn b1720(&mut self) -> B1720_W<'_>[src]

Bit 24 - B1720

pub fn b1721(&mut self) -> B1721_W<'_>[src]

Bit 25 - B1721

pub fn b1722(&mut self) -> B1722_W<'_>[src]

Bit 26 - B1722

pub fn b1723(&mut self) -> B1723_W<'_>[src]

Bit 27 - B1723

pub fn b1724(&mut self) -> B1724_W<'_>[src]

Bit 28 - B1724

pub fn b1725(&mut self) -> B1725_W<'_>[src]

Bit 29 - B1725

pub fn b1726(&mut self) -> B1726_W<'_>[src]

Bit 30 - B1726

pub fn b1727(&mut self) -> B1727_W<'_>[src]

Bit 31 - B1727

impl W<u32, Reg<u32, _MPCBB2_VCTR54>>[src]

pub fn b1728(&mut self) -> B1728_W<'_>[src]

Bit 0 - B1728

pub fn b1729(&mut self) -> B1729_W<'_>[src]

Bit 1 - B1729

pub fn b1730(&mut self) -> B1730_W<'_>[src]

Bit 2 - B1730

pub fn b1731(&mut self) -> B1731_W<'_>[src]

Bit 3 - B1731

pub fn b1732(&mut self) -> B1732_W<'_>[src]

Bit 4 - B1732

pub fn b1733(&mut self) -> B1733_W<'_>[src]

Bit 5 - B1733

pub fn b1734(&mut self) -> B1734_W<'_>[src]

Bit 6 - B1734

pub fn b1735(&mut self) -> B1735_W<'_>[src]

Bit 7 - B1735

pub fn b1736(&mut self) -> B1736_W<'_>[src]

Bit 8 - B1736

pub fn b1737(&mut self) -> B1737_W<'_>[src]

Bit 9 - B1737

pub fn b1738(&mut self) -> B1738_W<'_>[src]

Bit 10 - B1738

pub fn b1739(&mut self) -> B1739_W<'_>[src]

Bit 11 - B1739

pub fn b1740(&mut self) -> B1740_W<'_>[src]

Bit 12 - B1740

pub fn b1741(&mut self) -> B1741_W<'_>[src]

Bit 13 - B1741

pub fn b1742(&mut self) -> B1742_W<'_>[src]

Bit 14 - B1742

pub fn b1743(&mut self) -> B1743_W<'_>[src]

Bit 15 - B1743

pub fn b1744(&mut self) -> B1744_W<'_>[src]

Bit 16 - B1744

pub fn b1745(&mut self) -> B1745_W<'_>[src]

Bit 17 - B1745

pub fn b1746(&mut self) -> B1746_W<'_>[src]

Bit 18 - B1746

pub fn b1747(&mut self) -> B1747_W<'_>[src]

Bit 19 - B1747

pub fn b1748(&mut self) -> B1748_W<'_>[src]

Bit 20 - B1748

pub fn b1749(&mut self) -> B1749_W<'_>[src]

Bit 21 - B1749

pub fn b1750(&mut self) -> B1750_W<'_>[src]

Bit 22 - B1750

pub fn b1751(&mut self) -> B1751_W<'_>[src]

Bit 23 - B1751

pub fn b1752(&mut self) -> B1752_W<'_>[src]

Bit 24 - B1752

pub fn b1753(&mut self) -> B1753_W<'_>[src]

Bit 25 - B1753

pub fn b1754(&mut self) -> B1754_W<'_>[src]

Bit 26 - B1754

pub fn b1755(&mut self) -> B1755_W<'_>[src]

Bit 27 - B1755

pub fn b1756(&mut self) -> B1756_W<'_>[src]

Bit 28 - B1756

pub fn b1757(&mut self) -> B1757_W<'_>[src]

Bit 29 - B1757

pub fn b1758(&mut self) -> B1758_W<'_>[src]

Bit 30 - B1758

pub fn b1759(&mut self) -> B1759_W<'_>[src]

Bit 31 - B1759

impl W<u32, Reg<u32, _MPCBB2_VCTR55>>[src]

pub fn b1760(&mut self) -> B1760_W<'_>[src]

Bit 0 - B1760

pub fn b1761(&mut self) -> B1761_W<'_>[src]

Bit 1 - B1761

pub fn b1762(&mut self) -> B1762_W<'_>[src]

Bit 2 - B1762

pub fn b1763(&mut self) -> B1763_W<'_>[src]

Bit 3 - B1763

pub fn b1764(&mut self) -> B1764_W<'_>[src]

Bit 4 - B1764

pub fn b1765(&mut self) -> B1765_W<'_>[src]

Bit 5 - B1765

pub fn b1766(&mut self) -> B1766_W<'_>[src]

Bit 6 - B1766

pub fn b1767(&mut self) -> B1767_W<'_>[src]

Bit 7 - B1767

pub fn b1768(&mut self) -> B1768_W<'_>[src]

Bit 8 - B1768

pub fn b1769(&mut self) -> B1769_W<'_>[src]

Bit 9 - B1769

pub fn b1770(&mut self) -> B1770_W<'_>[src]

Bit 10 - B1770

pub fn b1771(&mut self) -> B1771_W<'_>[src]

Bit 11 - B1771

pub fn b1772(&mut self) -> B1772_W<'_>[src]

Bit 12 - B1772

pub fn b1773(&mut self) -> B1773_W<'_>[src]

Bit 13 - B1773

pub fn b1774(&mut self) -> B1774_W<'_>[src]

Bit 14 - B1774

pub fn b1775(&mut self) -> B1775_W<'_>[src]

Bit 15 - B1775

pub fn b1776(&mut self) -> B1776_W<'_>[src]

Bit 16 - B1776

pub fn b1777(&mut self) -> B1777_W<'_>[src]

Bit 17 - B1777

pub fn b1778(&mut self) -> B1778_W<'_>[src]

Bit 18 - B1778

pub fn b1779(&mut self) -> B1779_W<'_>[src]

Bit 19 - B1779

pub fn b1780(&mut self) -> B1780_W<'_>[src]

Bit 20 - B1780

pub fn b1781(&mut self) -> B1781_W<'_>[src]

Bit 21 - B1781

pub fn b1782(&mut self) -> B1782_W<'_>[src]

Bit 22 - B1782

pub fn b1783(&mut self) -> B1783_W<'_>[src]

Bit 23 - B1783

pub fn b1784(&mut self) -> B1784_W<'_>[src]

Bit 24 - B1784

pub fn b1785(&mut self) -> B1785_W<'_>[src]

Bit 25 - B1785

pub fn b1786(&mut self) -> B1786_W<'_>[src]

Bit 26 - B1786

pub fn b1787(&mut self) -> B1787_W<'_>[src]

Bit 27 - B1787

pub fn b1788(&mut self) -> B1788_W<'_>[src]

Bit 28 - B1788

pub fn b1789(&mut self) -> B1789_W<'_>[src]

Bit 29 - B1789

pub fn b1790(&mut self) -> B1790_W<'_>[src]

Bit 30 - B1790

pub fn b1791(&mut self) -> B1791_W<'_>[src]

Bit 31 - B1791

impl W<u32, Reg<u32, _MPCBB2_VCTR56>>[src]

pub fn b1792(&mut self) -> B1792_W<'_>[src]

Bit 0 - B1792

pub fn b1793(&mut self) -> B1793_W<'_>[src]

Bit 1 - B1793

pub fn b1794(&mut self) -> B1794_W<'_>[src]

Bit 2 - B1794

pub fn b1795(&mut self) -> B1795_W<'_>[src]

Bit 3 - B1795

pub fn b1796(&mut self) -> B1796_W<'_>[src]

Bit 4 - B1796

pub fn b1797(&mut self) -> B1797_W<'_>[src]

Bit 5 - B1797

pub fn b1798(&mut self) -> B1798_W<'_>[src]

Bit 6 - B1798

pub fn b1799(&mut self) -> B1799_W<'_>[src]

Bit 7 - B1799

pub fn b1800(&mut self) -> B1800_W<'_>[src]

Bit 8 - B1800

pub fn b1801(&mut self) -> B1801_W<'_>[src]

Bit 9 - B1801

pub fn b1802(&mut self) -> B1802_W<'_>[src]

Bit 10 - B1802

pub fn b1803(&mut self) -> B1803_W<'_>[src]

Bit 11 - B1803

pub fn b1804(&mut self) -> B1804_W<'_>[src]

Bit 12 - B1804

pub fn b1805(&mut self) -> B1805_W<'_>[src]

Bit 13 - B1805

pub fn b1806(&mut self) -> B1806_W<'_>[src]

Bit 14 - B1806

pub fn b1807(&mut self) -> B1807_W<'_>[src]

Bit 15 - B1807

pub fn b1808(&mut self) -> B1808_W<'_>[src]

Bit 16 - B1808

pub fn b1809(&mut self) -> B1809_W<'_>[src]

Bit 17 - B1809

pub fn b1810(&mut self) -> B1810_W<'_>[src]

Bit 18 - B1810

pub fn b1811(&mut self) -> B1811_W<'_>[src]

Bit 19 - B1811

pub fn b1812(&mut self) -> B1812_W<'_>[src]

Bit 20 - B1812

pub fn b1813(&mut self) -> B1813_W<'_>[src]

Bit 21 - B1813

pub fn b1814(&mut self) -> B1814_W<'_>[src]

Bit 22 - B1814

pub fn b1815(&mut self) -> B1815_W<'_>[src]

Bit 23 - B1815

pub fn b1816(&mut self) -> B1816_W<'_>[src]

Bit 24 - B1816

pub fn b1817(&mut self) -> B1817_W<'_>[src]

Bit 25 - B1817

pub fn b1818(&mut self) -> B1818_W<'_>[src]

Bit 26 - B1818

pub fn b1819(&mut self) -> B1819_W<'_>[src]

Bit 27 - B1819

pub fn b1820(&mut self) -> B1820_W<'_>[src]

Bit 28 - B1820

pub fn b1821(&mut self) -> B1821_W<'_>[src]

Bit 29 - B1821

pub fn b1822(&mut self) -> B1822_W<'_>[src]

Bit 30 - B1822

pub fn b1823(&mut self) -> B1823_W<'_>[src]

Bit 31 - B1823

impl W<u32, Reg<u32, _MPCBB2_VCTR57>>[src]

pub fn b1824(&mut self) -> B1824_W<'_>[src]

Bit 0 - B1824

pub fn b1825(&mut self) -> B1825_W<'_>[src]

Bit 1 - B1825

pub fn b1826(&mut self) -> B1826_W<'_>[src]

Bit 2 - B1826

pub fn b1827(&mut self) -> B1827_W<'_>[src]

Bit 3 - B1827

pub fn b1828(&mut self) -> B1828_W<'_>[src]

Bit 4 - B1828

pub fn b1829(&mut self) -> B1829_W<'_>[src]

Bit 5 - B1829

pub fn b1830(&mut self) -> B1830_W<'_>[src]

Bit 6 - B1830

pub fn b1831(&mut self) -> B1831_W<'_>[src]

Bit 7 - B1831

pub fn b1832(&mut self) -> B1832_W<'_>[src]

Bit 8 - B1832

pub fn b1833(&mut self) -> B1833_W<'_>[src]

Bit 9 - B1833

pub fn b1834(&mut self) -> B1834_W<'_>[src]

Bit 10 - B1834

pub fn b1835(&mut self) -> B1835_W<'_>[src]

Bit 11 - B1835

pub fn b1836(&mut self) -> B1836_W<'_>[src]

Bit 12 - B1836

pub fn b1837(&mut self) -> B1837_W<'_>[src]

Bit 13 - B1837

pub fn b1838(&mut self) -> B1838_W<'_>[src]

Bit 14 - B1838

pub fn b1839(&mut self) -> B1839_W<'_>[src]

Bit 15 - B1839

pub fn b1840(&mut self) -> B1840_W<'_>[src]

Bit 16 - B1840

pub fn b1841(&mut self) -> B1841_W<'_>[src]

Bit 17 - B1841

pub fn b1842(&mut self) -> B1842_W<'_>[src]

Bit 18 - B1842

pub fn b1843(&mut self) -> B1843_W<'_>[src]

Bit 19 - B1843

pub fn b1844(&mut self) -> B1844_W<'_>[src]

Bit 20 - B1844

pub fn b1845(&mut self) -> B1845_W<'_>[src]

Bit 21 - B1845

pub fn b1846(&mut self) -> B1846_W<'_>[src]

Bit 22 - B1846

pub fn b1847(&mut self) -> B1847_W<'_>[src]

Bit 23 - B1847

pub fn b1848(&mut self) -> B1848_W<'_>[src]

Bit 24 - B1848

pub fn b1849(&mut self) -> B1849_W<'_>[src]

Bit 25 - B1849

pub fn b1850(&mut self) -> B1850_W<'_>[src]

Bit 26 - B1850

pub fn b1851(&mut self) -> B1851_W<'_>[src]

Bit 27 - B1851

pub fn b1852(&mut self) -> B1852_W<'_>[src]

Bit 28 - B1852

pub fn b1853(&mut self) -> B1853_W<'_>[src]

Bit 29 - B1853

pub fn b1854(&mut self) -> B1854_W<'_>[src]

Bit 30 - B1854

pub fn b1855(&mut self) -> B1855_W<'_>[src]

Bit 31 - B1855

impl W<u32, Reg<u32, _MPCBB2_VCTR58>>[src]

pub fn b1856(&mut self) -> B1856_W<'_>[src]

Bit 0 - B1856

pub fn b1857(&mut self) -> B1857_W<'_>[src]

Bit 1 - B1857

pub fn b1858(&mut self) -> B1858_W<'_>[src]

Bit 2 - B1858

pub fn b1859(&mut self) -> B1859_W<'_>[src]

Bit 3 - B1859

pub fn b1860(&mut self) -> B1860_W<'_>[src]

Bit 4 - B1860

pub fn b1861(&mut self) -> B1861_W<'_>[src]

Bit 5 - B1861

pub fn b1862(&mut self) -> B1862_W<'_>[src]

Bit 6 - B1862

pub fn b1863(&mut self) -> B1863_W<'_>[src]

Bit 7 - B1863

pub fn b1864(&mut self) -> B1864_W<'_>[src]

Bit 8 - B1864

pub fn b1865(&mut self) -> B1865_W<'_>[src]

Bit 9 - B1865

pub fn b1866(&mut self) -> B1866_W<'_>[src]

Bit 10 - B1866

pub fn b1867(&mut self) -> B1867_W<'_>[src]

Bit 11 - B1867

pub fn b1868(&mut self) -> B1868_W<'_>[src]

Bit 12 - B1868

pub fn b1869(&mut self) -> B1869_W<'_>[src]

Bit 13 - B1869

pub fn b1870(&mut self) -> B1870_W<'_>[src]

Bit 14 - B1870

pub fn b1871(&mut self) -> B1871_W<'_>[src]

Bit 15 - B1871

pub fn b1872(&mut self) -> B1872_W<'_>[src]

Bit 16 - B1872

pub fn b1873(&mut self) -> B1873_W<'_>[src]

Bit 17 - B1873

pub fn b1874(&mut self) -> B1874_W<'_>[src]

Bit 18 - B1874

pub fn b1875(&mut self) -> B1875_W<'_>[src]

Bit 19 - B1875

pub fn b1876(&mut self) -> B1876_W<'_>[src]

Bit 20 - B1876

pub fn b1877(&mut self) -> B1877_W<'_>[src]

Bit 21 - B1877

pub fn b1878(&mut self) -> B1878_W<'_>[src]

Bit 22 - B1878

pub fn b1879(&mut self) -> B1879_W<'_>[src]

Bit 23 - B1879

pub fn b1880(&mut self) -> B1880_W<'_>[src]

Bit 24 - B1880

pub fn b1881(&mut self) -> B1881_W<'_>[src]

Bit 25 - B1881

pub fn b1882(&mut self) -> B1882_W<'_>[src]

Bit 26 - B1882

pub fn b1883(&mut self) -> B1883_W<'_>[src]

Bit 27 - B1883

pub fn b1884(&mut self) -> B1884_W<'_>[src]

Bit 28 - B1884

pub fn b1885(&mut self) -> B1885_W<'_>[src]

Bit 29 - B1885

pub fn b1886(&mut self) -> B1886_W<'_>[src]

Bit 30 - B1886

pub fn b1887(&mut self) -> B1887_W<'_>[src]

Bit 31 - B1887

impl W<u32, Reg<u32, _MPCBB2_VCTR59>>[src]

pub fn b1888(&mut self) -> B1888_W<'_>[src]

Bit 0 - B1888

pub fn b1889(&mut self) -> B1889_W<'_>[src]

Bit 1 - B1889

pub fn b1890(&mut self) -> B1890_W<'_>[src]

Bit 2 - B1890

pub fn b1891(&mut self) -> B1891_W<'_>[src]

Bit 3 - B1891

pub fn b1892(&mut self) -> B1892_W<'_>[src]

Bit 4 - B1892

pub fn b1893(&mut self) -> B1893_W<'_>[src]

Bit 5 - B1893

pub fn b1894(&mut self) -> B1894_W<'_>[src]

Bit 6 - B1894

pub fn b1895(&mut self) -> B1895_W<'_>[src]

Bit 7 - B1895

pub fn b1896(&mut self) -> B1896_W<'_>[src]

Bit 8 - B1896

pub fn b1897(&mut self) -> B1897_W<'_>[src]

Bit 9 - B1897

pub fn b1898(&mut self) -> B1898_W<'_>[src]

Bit 10 - B1898

pub fn b1899(&mut self) -> B1899_W<'_>[src]

Bit 11 - B1899

pub fn b1900(&mut self) -> B1900_W<'_>[src]

Bit 12 - B1900

pub fn b1901(&mut self) -> B1901_W<'_>[src]

Bit 13 - B1901

pub fn b1902(&mut self) -> B1902_W<'_>[src]

Bit 14 - B1902

pub fn b1903(&mut self) -> B1903_W<'_>[src]

Bit 15 - B1903

pub fn b1904(&mut self) -> B1904_W<'_>[src]

Bit 16 - B1904

pub fn b1905(&mut self) -> B1905_W<'_>[src]

Bit 17 - B1905

pub fn b1906(&mut self) -> B1906_W<'_>[src]

Bit 18 - B1906

pub fn b1907(&mut self) -> B1907_W<'_>[src]

Bit 19 - B1907

pub fn b1908(&mut self) -> B1908_W<'_>[src]

Bit 20 - B1908

pub fn b1909(&mut self) -> B1909_W<'_>[src]

Bit 21 - B1909

pub fn b1910(&mut self) -> B1910_W<'_>[src]

Bit 22 - B1910

pub fn b1911(&mut self) -> B1911_W<'_>[src]

Bit 23 - B1911

pub fn b1912(&mut self) -> B1912_W<'_>[src]

Bit 24 - B1912

pub fn b1913(&mut self) -> B1913_W<'_>[src]

Bit 25 - B1913

pub fn b1914(&mut self) -> B1914_W<'_>[src]

Bit 26 - B1914

pub fn b1915(&mut self) -> B1915_W<'_>[src]

Bit 27 - B1915

pub fn b1916(&mut self) -> B1916_W<'_>[src]

Bit 28 - B1916

pub fn b1917(&mut self) -> B1917_W<'_>[src]

Bit 29 - B1917

pub fn b1918(&mut self) -> B1918_W<'_>[src]

Bit 30 - B1918

pub fn b1919(&mut self) -> B1919_W<'_>[src]

Bit 31 - B1919

impl W<u32, Reg<u32, _MPCBB2_VCTR60>>[src]

pub fn b1920(&mut self) -> B1920_W<'_>[src]

Bit 0 - B1920

pub fn b1921(&mut self) -> B1921_W<'_>[src]

Bit 1 - B1921

pub fn b1922(&mut self) -> B1922_W<'_>[src]

Bit 2 - B1922

pub fn b1923(&mut self) -> B1923_W<'_>[src]

Bit 3 - B1923

pub fn b1924(&mut self) -> B1924_W<'_>[src]

Bit 4 - B1924

pub fn b1925(&mut self) -> B1925_W<'_>[src]

Bit 5 - B1925

pub fn b1926(&mut self) -> B1926_W<'_>[src]

Bit 6 - B1926

pub fn b1927(&mut self) -> B1927_W<'_>[src]

Bit 7 - B1927

pub fn b1928(&mut self) -> B1928_W<'_>[src]

Bit 8 - B1928

pub fn b1929(&mut self) -> B1929_W<'_>[src]

Bit 9 - B1929

pub fn b1930(&mut self) -> B1930_W<'_>[src]

Bit 10 - B1930

pub fn b1931(&mut self) -> B1931_W<'_>[src]

Bit 11 - B1931

pub fn b1932(&mut self) -> B1932_W<'_>[src]

Bit 12 - B1932

pub fn b1933(&mut self) -> B1933_W<'_>[src]

Bit 13 - B1933

pub fn b1934(&mut self) -> B1934_W<'_>[src]

Bit 14 - B1934

pub fn b1935(&mut self) -> B1935_W<'_>[src]

Bit 15 - B1935

pub fn b1936(&mut self) -> B1936_W<'_>[src]

Bit 16 - B1936

pub fn b1937(&mut self) -> B1937_W<'_>[src]

Bit 17 - B1937

pub fn b1938(&mut self) -> B1938_W<'_>[src]

Bit 18 - B1938

pub fn b1939(&mut self) -> B1939_W<'_>[src]

Bit 19 - B1939

pub fn b1940(&mut self) -> B1940_W<'_>[src]

Bit 20 - B1940

pub fn b1941(&mut self) -> B1941_W<'_>[src]

Bit 21 - B1941

pub fn b1942(&mut self) -> B1942_W<'_>[src]

Bit 22 - B1942

pub fn b1943(&mut self) -> B1943_W<'_>[src]

Bit 23 - B1943

pub fn b1944(&mut self) -> B1944_W<'_>[src]

Bit 24 - B1944

pub fn b1945(&mut self) -> B1945_W<'_>[src]

Bit 25 - B1945

pub fn b1946(&mut self) -> B1946_W<'_>[src]

Bit 26 - B1946

pub fn b1947(&mut self) -> B1947_W<'_>[src]

Bit 27 - B1947

pub fn b1948(&mut self) -> B1948_W<'_>[src]

Bit 28 - B1948

pub fn b1949(&mut self) -> B1949_W<'_>[src]

Bit 29 - B1949

pub fn b1950(&mut self) -> B1950_W<'_>[src]

Bit 30 - B1950

pub fn b1951(&mut self) -> B1951_W<'_>[src]

Bit 31 - B1951

impl W<u32, Reg<u32, _MPCBB2_VCTR61>>[src]

pub fn b1952(&mut self) -> B1952_W<'_>[src]

Bit 0 - B1952

pub fn b1953(&mut self) -> B1953_W<'_>[src]

Bit 1 - B1953

pub fn b1954(&mut self) -> B1954_W<'_>[src]

Bit 2 - B1954

pub fn b1955(&mut self) -> B1955_W<'_>[src]

Bit 3 - B1955

pub fn b1956(&mut self) -> B1956_W<'_>[src]

Bit 4 - B1956

pub fn b1957(&mut self) -> B1957_W<'_>[src]

Bit 5 - B1957

pub fn b1958(&mut self) -> B1958_W<'_>[src]

Bit 6 - B1958

pub fn b1959(&mut self) -> B1959_W<'_>[src]

Bit 7 - B1959

pub fn b1960(&mut self) -> B1960_W<'_>[src]

Bit 8 - B1960

pub fn b1961(&mut self) -> B1961_W<'_>[src]

Bit 9 - B1961

pub fn b1962(&mut self) -> B1962_W<'_>[src]

Bit 10 - B1962

pub fn b1963(&mut self) -> B1963_W<'_>[src]

Bit 11 - B1963

pub fn b1964(&mut self) -> B1964_W<'_>[src]

Bit 12 - B1964

pub fn b1965(&mut self) -> B1965_W<'_>[src]

Bit 13 - B1965

pub fn b1966(&mut self) -> B1966_W<'_>[src]

Bit 14 - B1966

pub fn b1967(&mut self) -> B1967_W<'_>[src]

Bit 15 - B1967

pub fn b1968(&mut self) -> B1968_W<'_>[src]

Bit 16 - B1968

pub fn b1969(&mut self) -> B1969_W<'_>[src]

Bit 17 - B1969

pub fn b1970(&mut self) -> B1970_W<'_>[src]

Bit 18 - B1970

pub fn b1971(&mut self) -> B1971_W<'_>[src]

Bit 19 - B1971

pub fn b1972(&mut self) -> B1972_W<'_>[src]

Bit 20 - B1972

pub fn b1973(&mut self) -> B1973_W<'_>[src]

Bit 21 - B1973

pub fn b1974(&mut self) -> B1974_W<'_>[src]

Bit 22 - B1974

pub fn b1975(&mut self) -> B1975_W<'_>[src]

Bit 23 - B1975

pub fn b1976(&mut self) -> B1976_W<'_>[src]

Bit 24 - B1976

pub fn b1977(&mut self) -> B1977_W<'_>[src]

Bit 25 - B1977

pub fn b1978(&mut self) -> B1978_W<'_>[src]

Bit 26 - B1978

pub fn b1979(&mut self) -> B1979_W<'_>[src]

Bit 27 - B1979

pub fn b1980(&mut self) -> B1980_W<'_>[src]

Bit 28 - B1980

pub fn b1981(&mut self) -> B1981_W<'_>[src]

Bit 29 - B1981

pub fn b1982(&mut self) -> B1982_W<'_>[src]

Bit 30 - B1982

pub fn b1983(&mut self) -> B1983_W<'_>[src]

Bit 31 - B1983

impl W<u32, Reg<u32, _MPCBB2_VCTR62>>[src]

pub fn b1984(&mut self) -> B1984_W<'_>[src]

Bit 0 - B1984

pub fn b1985(&mut self) -> B1985_W<'_>[src]

Bit 1 - B1985

pub fn b1986(&mut self) -> B1986_W<'_>[src]

Bit 2 - B1986

pub fn b1987(&mut self) -> B1987_W<'_>[src]

Bit 3 - B1987

pub fn b1988(&mut self) -> B1988_W<'_>[src]

Bit 4 - B1988

pub fn b1989(&mut self) -> B1989_W<'_>[src]

Bit 5 - B1989

pub fn b1990(&mut self) -> B1990_W<'_>[src]

Bit 6 - B1990

pub fn b1991(&mut self) -> B1991_W<'_>[src]

Bit 7 - B1991

pub fn b1992(&mut self) -> B1992_W<'_>[src]

Bit 8 - B1992

pub fn b1993(&mut self) -> B1993_W<'_>[src]

Bit 9 - B1993

pub fn b1994(&mut self) -> B1994_W<'_>[src]

Bit 10 - B1994

pub fn b1995(&mut self) -> B1995_W<'_>[src]

Bit 11 - B1995

pub fn b1996(&mut self) -> B1996_W<'_>[src]

Bit 12 - B1996

pub fn b1997(&mut self) -> B1997_W<'_>[src]

Bit 13 - B1997

pub fn b1998(&mut self) -> B1998_W<'_>[src]

Bit 14 - B1998

pub fn b1999(&mut self) -> B1999_W<'_>[src]

Bit 15 - B1999

pub fn b2000(&mut self) -> B2000_W<'_>[src]

Bit 16 - B2000

pub fn b2001(&mut self) -> B2001_W<'_>[src]

Bit 17 - B2001

pub fn b2002(&mut self) -> B2002_W<'_>[src]

Bit 18 - B2002

pub fn b2003(&mut self) -> B2003_W<'_>[src]

Bit 19 - B2003

pub fn b2004(&mut self) -> B2004_W<'_>[src]

Bit 20 - B2004

pub fn b2005(&mut self) -> B2005_W<'_>[src]

Bit 21 - B2005

pub fn b2006(&mut self) -> B2006_W<'_>[src]

Bit 22 - B2006

pub fn b2007(&mut self) -> B2007_W<'_>[src]

Bit 23 - B2007

pub fn b2008(&mut self) -> B2008_W<'_>[src]

Bit 24 - B2008

pub fn b2009(&mut self) -> B2009_W<'_>[src]

Bit 25 - B2009

pub fn b2010(&mut self) -> B2010_W<'_>[src]

Bit 26 - B2010

pub fn b2011(&mut self) -> B2011_W<'_>[src]

Bit 27 - B2011

pub fn b2012(&mut self) -> B2012_W<'_>[src]

Bit 28 - B2012

pub fn b2013(&mut self) -> B2013_W<'_>[src]

Bit 29 - B2013

pub fn b2014(&mut self) -> B2014_W<'_>[src]

Bit 30 - B2014

pub fn b2015(&mut self) -> B2015_W<'_>[src]

Bit 31 - B2015

impl W<u32, Reg<u32, _MPCBB2_VCTR63>>[src]

pub fn b2016(&mut self) -> B2016_W<'_>[src]

Bit 0 - B2016

pub fn b2017(&mut self) -> B2017_W<'_>[src]

Bit 1 - B2017

pub fn b2018(&mut self) -> B2018_W<'_>[src]

Bit 2 - B2018

pub fn b2019(&mut self) -> B2019_W<'_>[src]

Bit 3 - B2019

pub fn b2020(&mut self) -> B2020_W<'_>[src]

Bit 4 - B2020

pub fn b2021(&mut self) -> B2021_W<'_>[src]

Bit 5 - B2021

pub fn b2022(&mut self) -> B2022_W<'_>[src]

Bit 6 - B2022

pub fn b2023(&mut self) -> B2023_W<'_>[src]

Bit 7 - B2023

pub fn b2024(&mut self) -> B2024_W<'_>[src]

Bit 8 - B2024

pub fn b2025(&mut self) -> B2025_W<'_>[src]

Bit 9 - B2025

pub fn b2026(&mut self) -> B2026_W<'_>[src]

Bit 10 - B2026

pub fn b2027(&mut self) -> B2027_W<'_>[src]

Bit 11 - B2027

pub fn b2028(&mut self) -> B2028_W<'_>[src]

Bit 12 - B2028

pub fn b2029(&mut self) -> B2029_W<'_>[src]

Bit 13 - B2029

pub fn b2030(&mut self) -> B2030_W<'_>[src]

Bit 14 - B2030

pub fn b2031(&mut self) -> B2031_W<'_>[src]

Bit 15 - B2031

pub fn b2032(&mut self) -> B2032_W<'_>[src]

Bit 16 - B2032

pub fn b2033(&mut self) -> B2033_W<'_>[src]

Bit 17 - B2033

pub fn b2034(&mut self) -> B2034_W<'_>[src]

Bit 18 - B2034

pub fn b2035(&mut self) -> B2035_W<'_>[src]

Bit 19 - B2035

pub fn b2036(&mut self) -> B2036_W<'_>[src]

Bit 20 - B2036

pub fn b2037(&mut self) -> B2037_W<'_>[src]

Bit 21 - B2037

pub fn b2038(&mut self) -> B2038_W<'_>[src]

Bit 22 - B2038

pub fn b2039(&mut self) -> B2039_W<'_>[src]

Bit 23 - B2039

pub fn b2040(&mut self) -> B2040_W<'_>[src]

Bit 24 - B2040

pub fn b2041(&mut self) -> B2041_W<'_>[src]

Bit 25 - B2041

pub fn b2042(&mut self) -> B2042_W<'_>[src]

Bit 26 - B2042

pub fn b2043(&mut self) -> B2043_W<'_>[src]

Bit 27 - B2043

pub fn b2044(&mut self) -> B2044_W<'_>[src]

Bit 28 - B2044

pub fn b2045(&mut self) -> B2045_W<'_>[src]

Bit 29 - B2045

pub fn b2046(&mut self) -> B2046_W<'_>[src]

Bit 30 - B2046

pub fn b2047(&mut self) -> B2047_W<'_>[src]

Bit 31 - B2047

impl W<u32, Reg<u32, _CR1>>[src]

pub fn bidimode(&mut self) -> BIDIMODE_W<'_>[src]

Bit 15 - Bidirectional data mode enable

pub fn bidioe(&mut self) -> BIDIOE_W<'_>[src]

Bit 14 - Output enable in bidirectional mode

pub fn crcen(&mut self) -> CRCEN_W<'_>[src]

Bit 13 - Hardware CRC calculation enable

pub fn crcnext(&mut self) -> CRCNEXT_W<'_>[src]

Bit 12 - CRC transfer next

pub fn dff(&mut self) -> DFF_W<'_>[src]

Bit 11 - Data frame format

pub fn rxonly(&mut self) -> RXONLY_W<'_>[src]

Bit 10 - Receive only

pub fn ssm(&mut self) -> SSM_W<'_>[src]

Bit 9 - Software slave management

pub fn ssi(&mut self) -> SSI_W<'_>[src]

Bit 8 - Internal slave select

pub fn lsbfirst(&mut self) -> LSBFIRST_W<'_>[src]

Bit 7 - Frame format

pub fn spe(&mut self) -> SPE_W<'_>[src]

Bit 6 - SPI enable

pub fn br(&mut self) -> BR_W<'_>[src]

Bits 3:5 - Baud rate control

pub fn mstr(&mut self) -> MSTR_W<'_>[src]

Bit 2 - Master selection

pub fn cpol(&mut self) -> CPOL_W<'_>[src]

Bit 1 - Clock polarity

pub fn cpha(&mut self) -> CPHA_W<'_>[src]

Bit 0 - Clock phase

impl W<u32, Reg<u32, _CR2>>[src]

pub fn rxdmaen(&mut self) -> RXDMAEN_W<'_>[src]

Bit 0 - Rx buffer DMA enable

pub fn txdmaen(&mut self) -> TXDMAEN_W<'_>[src]

Bit 1 - Tx buffer DMA enable

pub fn ssoe(&mut self) -> SSOE_W<'_>[src]

Bit 2 - SS output enable

pub fn nssp(&mut self) -> NSSP_W<'_>[src]

Bit 3 - NSS pulse management

pub fn frf(&mut self) -> FRF_W<'_>[src]

Bit 4 - Frame format

pub fn errie(&mut self) -> ERRIE_W<'_>[src]

Bit 5 - Error interrupt enable

pub fn rxneie(&mut self) -> RXNEIE_W<'_>[src]

Bit 6 - RX buffer not empty interrupt enable

pub fn txeie(&mut self) -> TXEIE_W<'_>[src]

Bit 7 - Tx buffer empty interrupt enable

pub fn ds(&mut self) -> DS_W<'_>[src]

Bits 8:11 - Data size

pub fn frxth(&mut self) -> FRXTH_W<'_>[src]

Bit 12 - FIFO reception threshold

pub fn ldma_rx(&mut self) -> LDMA_RX_W<'_>[src]

Bit 13 - Last DMA transfer for reception

pub fn ldma_tx(&mut self) -> LDMA_TX_W<'_>[src]

Bit 14 - Last DMA transfer for transmission

impl W<u32, Reg<u32, _SR>>[src]

pub fn crcerr(&mut self) -> CRCERR_W<'_>[src]

Bit 4 - CRC error flag

impl W<u32, Reg<u32, _DR>>[src]

pub fn dr(&mut self) -> DR_W<'_>[src]

Bits 0:15 - Data register

impl W<u32, Reg<u32, _CRCPR>>[src]

pub fn crcpoly(&mut self) -> CRCPOLY_W<'_>[src]

Bits 0:15 - CRC polynomial register

impl W<u32, Reg<u32, _CR1>>[src]

pub fn ckd(&mut self) -> CKD_W<'_>[src]

Bits 8:9 - Clock division

pub fn arpe(&mut self) -> ARPE_W<'_>[src]

Bit 7 - Auto-reload preload enable

pub fn cms(&mut self) -> CMS_W<'_>[src]

Bits 5:6 - Center-aligned mode selection

pub fn dir(&mut self) -> DIR_W<'_>[src]

Bit 4 - Direction

pub fn opm(&mut self) -> OPM_W<'_>[src]

Bit 3 - One-pulse mode

pub fn urs(&mut self) -> URS_W<'_>[src]

Bit 2 - Update request source

pub fn udis(&mut self) -> UDIS_W<'_>[src]

Bit 1 - Update disable

pub fn cen(&mut self) -> CEN_W<'_>[src]

Bit 0 - Counter enable

pub fn uifremap(&mut self) -> UIFREMAP_W<'_>[src]

Bit 11 - UIF status bit remapping

impl W<u32, Reg<u32, _CR2>>[src]

pub fn ois4(&mut self) -> OIS4_W<'_>[src]

Bit 14 - Output Idle state 4

pub fn ois3n(&mut self) -> OIS3N_W<'_>[src]

Bit 13 - Output Idle state 3

pub fn ois3(&mut self) -> OIS3_W<'_>[src]

Bit 12 - Output Idle state 3

pub fn ois2n(&mut self) -> OIS2N_W<'_>[src]

Bit 11 - Output Idle state 2

pub fn ois2(&mut self) -> OIS2_W<'_>[src]

Bit 10 - Output Idle state 2

pub fn ois1n(&mut self) -> OIS1N_W<'_>[src]

Bit 9 - Output Idle state 1

pub fn ois1(&mut self) -> OIS1_W<'_>[src]

Bit 8 - Output Idle state 1

pub fn ti1s(&mut self) -> TI1S_W<'_>[src]

Bit 7 - TI1 selection

pub fn mms(&mut self) -> MMS_W<'_>[src]

Bits 4:6 - Master mode selection

pub fn ccds(&mut self) -> CCDS_W<'_>[src]

Bit 3 - Capture/compare DMA selection

pub fn ccus(&mut self) -> CCUS_W<'_>[src]

Bit 2 - Capture/compare control update selection

pub fn ccpc(&mut self) -> CCPC_W<'_>[src]

Bit 0 - Capture/compare preloaded control

pub fn ois5(&mut self) -> OIS5_W<'_>[src]

Bit 15 - Output Idle state 5 (OC5 output)

pub fn ois6(&mut self) -> OIS6_W<'_>[src]

Bit 16 - Output Idle state 6

pub fn mms2(&mut self) -> MMS2_W<'_>[src]

Bits 20:23 - Master mode selection 2

impl W<u32, Reg<u32, _SMCR>>[src]

pub fn etp(&mut self) -> ETP_W<'_>[src]

Bit 15 - External trigger polarity

pub fn ece(&mut self) -> ECE_W<'_>[src]

Bit 14 - External clock enable

pub fn etps(&mut self) -> ETPS_W<'_>[src]

Bits 12:13 - External trigger prescaler

pub fn etf(&mut self) -> ETF_W<'_>[src]

Bits 8:11 - External trigger filter

pub fn msm(&mut self) -> MSM_W<'_>[src]

Bit 7 - Master/Slave mode

pub fn ts(&mut self) -> TS_W<'_>[src]

Bits 4:6 - Trigger selection

pub fn sms(&mut self) -> SMS_W<'_>[src]

Bits 0:2 - Slave mode selection

pub fn sms_bit3(&mut self) -> SMS_BIT3_W<'_>[src]

Bit 16 - Slave mode selection - bit 3

impl W<u32, Reg<u32, _DIER>>[src]

pub fn tde(&mut self) -> TDE_W<'_>[src]

Bit 14 - Trigger DMA request enable

pub fn comde(&mut self) -> COMDE_W<'_>[src]

Bit 13 - COM DMA request enable

pub fn cc4de(&mut self) -> CC4DE_W<'_>[src]

Bit 12 - Capture/Compare 4 DMA request enable

pub fn cc3de(&mut self) -> CC3DE_W<'_>[src]

Bit 11 - Capture/Compare 3 DMA request enable

pub fn cc2de(&mut self) -> CC2DE_W<'_>[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&mut self) -> CC1DE_W<'_>[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&mut self) -> UDE_W<'_>[src]

Bit 8 - Update DMA request enable

pub fn tie(&mut self) -> TIE_W<'_>[src]

Bit 6 - Trigger interrupt enable

pub fn cc4ie(&mut self) -> CC4IE_W<'_>[src]

Bit 4 - Capture/Compare 4 interrupt enable

pub fn cc3ie(&mut self) -> CC3IE_W<'_>[src]

Bit 3 - Capture/Compare 3 interrupt enable

pub fn cc2ie(&mut self) -> CC2IE_W<'_>[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&mut self) -> CC1IE_W<'_>[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&mut self) -> UIE_W<'_>[src]

Bit 0 - Update interrupt enable

pub fn bie(&mut self) -> BIE_W<'_>[src]

Bit 7 - Break interrupt enable

pub fn comie(&mut self) -> COMIE_W<'_>[src]

Bit 5 - COM interrupt enable

impl W<u32, Reg<u32, _SR>>[src]

pub fn cc4of(&mut self) -> CC4OF_W<'_>[src]

Bit 12 - Capture/Compare 4 overcapture flag

pub fn cc3of(&mut self) -> CC3OF_W<'_>[src]

Bit 11 - Capture/Compare 3 overcapture flag

pub fn cc2of(&mut self) -> CC2OF_W<'_>[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&mut self) -> CC1OF_W<'_>[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn bif(&mut self) -> BIF_W<'_>[src]

Bit 7 - Break interrupt flag

pub fn tif(&mut self) -> TIF_W<'_>[src]

Bit 6 - Trigger interrupt flag

pub fn comif(&mut self) -> COMIF_W<'_>[src]

Bit 5 - COM interrupt flag

pub fn cc4if(&mut self) -> CC4IF_W<'_>[src]

Bit 4 - Capture/Compare 4 interrupt flag

pub fn cc3if(&mut self) -> CC3IF_W<'_>[src]

Bit 3 - Capture/Compare 3 interrupt flag

pub fn cc2if(&mut self) -> CC2IF_W<'_>[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&mut self) -> CC1IF_W<'_>[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&mut self) -> UIF_W<'_>[src]

Bit 0 - Update interrupt flag

pub fn sbif(&mut self) -> SBIF_W<'_>[src]

Bit 13 - System Break interrupt flag

pub fn cc5if(&mut self) -> CC5IF_W<'_>[src]

Bit 16 - Compare 5 interrupt flag

pub fn cc6if(&mut self) -> CC6IF_W<'_>[src]

Bit 17 - Compare 6 interrupt flag

impl W<u32, Reg<u32, _EGR>>[src]

pub fn bg(&mut self) -> BG_W<'_>[src]

Bit 7 - Break generation

pub fn tg(&mut self) -> TG_W<'_>[src]

Bit 6 - Trigger generation

pub fn comg(&mut self) -> COMG_W<'_>[src]

Bit 5 - Capture/Compare control update generation

pub fn cc4g(&mut self) -> CC4G_W<'_>[src]

Bit 4 - Capture/compare 4 generation

pub fn cc3g(&mut self) -> CC3G_W<'_>[src]

Bit 3 - Capture/compare 3 generation

pub fn cc2g(&mut self) -> CC2G_W<'_>[src]

Bit 2 - Capture/compare 2 generation

pub fn cc1g(&mut self) -> CC1G_W<'_>[src]

Bit 1 - Capture/compare 1 generation

pub fn ug(&mut self) -> UG_W<'_>[src]

Bit 0 - Update generation

pub fn b2g(&mut self) -> B2G_W<'_>[src]

Bit 8 - Break 2 generation

impl W<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc2ce(&mut self) -> OC2CE_W<'_>[src]

Bit 15 - Output Compare 2 clear enable

pub fn oc2m(&mut self) -> OC2M_W<'_>[src]

Bits 12:14 - Output Compare 2 mode

pub fn oc2pe(&mut self) -> OC2PE_W<'_>[src]

Bit 11 - Output Compare 2 preload enable

pub fn oc2fe(&mut self) -> OC2FE_W<'_>[src]

Bit 10 - Output Compare 2 fast enable

pub fn cc2s(&mut self) -> CC2S_W<'_>[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1ce(&mut self) -> OC1CE_W<'_>[src]

Bit 7 - Output Compare 1 clear enable

pub fn oc1m(&mut self) -> OC1M_W<'_>[src]

Bits 4:6 - Output Compare 1 mode

pub fn oc1pe(&mut self) -> OC1PE_W<'_>[src]

Bit 3 - Output Compare 1 preload enable

pub fn oc1fe(&mut self) -> OC1FE_W<'_>[src]

Bit 2 - Output Compare 1 fast enable

pub fn cc1s(&mut self) -> CC1S_W<'_>[src]

Bits 0:1 - Capture/Compare 1 selection

pub fn oc1m_bit3(&mut self) -> OC1M_BIT3_W<'_>[src]

Bit 16 - Output Compare 1 mode - bit 3

pub fn oc2m_bit3(&mut self) -> OC2M_BIT3_W<'_>[src]

Bit 24 - Output Compare 2 mode - bit 3

impl W<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&mut self) -> IC2F_W<'_>[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2pcs(&mut self) -> IC2PCS_W<'_>[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&mut self) -> CC2S_W<'_>[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn ic1f(&mut self) -> IC1F_W<'_>[src]

Bits 4:7 - Input capture 1 filter

pub fn icpcs(&mut self) -> ICPCS_W<'_>[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&mut self) -> CC1S_W<'_>[src]

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCMR2_OUTPUT>>[src]

pub fn oc4ce(&mut self) -> OC4CE_W<'_>[src]

Bit 15 - Output compare 4 clear enable

pub fn oc4m(&mut self) -> OC4M_W<'_>[src]

Bits 12:14 - Output compare 4 mode

pub fn oc4pe(&mut self) -> OC4PE_W<'_>[src]

Bit 11 - Output compare 4 preload enable

pub fn oc4fe(&mut self) -> OC4FE_W<'_>[src]

Bit 10 - Output compare 4 fast enable

pub fn cc4s(&mut self) -> CC4S_W<'_>[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn oc3ce(&mut self) -> OC3CE_W<'_>[src]

Bit 7 - Output compare 3 clear enable

pub fn oc3m(&mut self) -> OC3M_W<'_>[src]

Bits 4:6 - Output compare 3 mode

pub fn oc3pe(&mut self) -> OC3PE_W<'_>[src]

Bit 3 - Output compare 3 preload enable

pub fn oc3fe(&mut self) -> OC3FE_W<'_>[src]

Bit 2 - Output compare 3 fast enable

pub fn cc3s(&mut self) -> CC3S_W<'_>[src]

Bits 0:1 - Capture/Compare 3 selection

pub fn oc3m_bit3(&mut self) -> OC3M_BIT3_W<'_>[src]

Bit 16 - Output Compare 3 mode - bit 3

pub fn oc4m_bit3(&mut self) -> OC4M_BIT3_W<'_>[src]

Bit 24 - Output Compare 4 mode - bit 3

impl W<u32, Reg<u32, _CCMR2_INPUT>>[src]

pub fn ic4f(&mut self) -> IC4F_W<'_>[src]

Bits 12:15 - Input capture 4 filter

pub fn ic4psc(&mut self) -> IC4PSC_W<'_>[src]

Bits 10:11 - Input capture 4 prescaler

pub fn cc4s(&mut self) -> CC4S_W<'_>[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn ic3f(&mut self) -> IC3F_W<'_>[src]

Bits 4:7 - Input capture 3 filter

pub fn ic3psc(&mut self) -> IC3PSC_W<'_>[src]

Bits 2:3 - Input capture 3 prescaler

pub fn cc3s(&mut self) -> CC3S_W<'_>[src]

Bits 0:1 - Capture/compare 3 selection

impl W<u32, Reg<u32, _CCER>>[src]

pub fn cc4p(&mut self) -> CC4P_W<'_>[src]

Bit 13 - Capture/Compare 3 output Polarity

pub fn cc4e(&mut self) -> CC4E_W<'_>[src]

Bit 12 - Capture/Compare 4 output enable

pub fn cc3np(&mut self) -> CC3NP_W<'_>[src]

Bit 11 - Capture/Compare 3 output Polarity

pub fn cc3ne(&mut self) -> CC3NE_W<'_>[src]

Bit 10 - Capture/Compare 3 complementary output enable

pub fn cc3p(&mut self) -> CC3P_W<'_>[src]

Bit 9 - Capture/Compare 3 output Polarity

pub fn cc3e(&mut self) -> CC3E_W<'_>[src]

Bit 8 - Capture/Compare 3 output enable

pub fn cc2np(&mut self) -> CC2NP_W<'_>[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc2ne(&mut self) -> CC2NE_W<'_>[src]

Bit 6 - Capture/Compare 2 complementary output enable

pub fn cc2p(&mut self) -> CC2P_W<'_>[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2e(&mut self) -> CC2E_W<'_>[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc1np(&mut self) -> CC1NP_W<'_>[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1ne(&mut self) -> CC1NE_W<'_>[src]

Bit 2 - Capture/Compare 1 complementary output enable

pub fn cc1p(&mut self) -> CC1P_W<'_>[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&mut self) -> CC1E_W<'_>[src]

Bit 0 - Capture/Compare 1 output enable

pub fn cc4np(&mut self) -> CC4NP_W<'_>[src]

Bit 15 - Capture/Compare 4 complementary output polarity

pub fn cc5e(&mut self) -> CC5E_W<'_>[src]

Bit 16 - Capture/Compare 5 output enable

pub fn cc5p(&mut self) -> CC5P_W<'_>[src]

Bit 17 - Capture/Compare 5 output polarity

pub fn cc6e(&mut self) -> CC6E_W<'_>[src]

Bit 20 - Capture/Compare 6 output enable

pub fn cc6p(&mut self) -> CC6P_W<'_>[src]

Bit 21 - Capture/Compare 6 output polarity

impl W<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&mut self) -> CNT_W<'_>[src]

Bits 0:15 - counter value

impl W<u32, Reg<u32, _PSC>>[src]

pub fn psc(&mut self) -> PSC_W<'_>[src]

Bits 0:15 - Prescaler value

impl W<u32, Reg<u32, _ARR>>[src]

pub fn arr(&mut self) -> ARR_W<'_>[src]

Bits 0:15 - Auto-reload value

impl W<u32, Reg<u32, _RCR>>[src]

pub fn rep(&mut self) -> REP_W<'_>[src]

Bits 0:7 - Repetition counter value

impl W<u32, Reg<u32, _CCR1>>[src]

pub fn ccr1(&mut self) -> CCR1_W<'_>[src]

Bits 0:15 - Capture/Compare 1 value

impl W<u32, Reg<u32, _CCR2>>[src]

pub fn ccr2(&mut self) -> CCR2_W<'_>[src]

Bits 0:15 - Capture/Compare 2 value

impl W<u32, Reg<u32, _CCR3>>[src]

pub fn ccr3(&mut self) -> CCR3_W<'_>[src]

Bits 0:15 - Capture/Compare value

impl W<u32, Reg<u32, _CCR4>>[src]

pub fn ccr4(&mut self) -> CCR4_W<'_>[src]

Bits 0:15 - Capture/Compare value

impl W<u32, Reg<u32, _BDTR>>[src]

pub fn moe(&mut self) -> MOE_W<'_>[src]

Bit 15 - Main output enable

pub fn aoe(&mut self) -> AOE_W<'_>[src]

Bit 14 - Automatic output enable

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bit 13 - Break polarity

pub fn bke(&mut self) -> BKE_W<'_>[src]

Bit 12 - Break enable

pub fn ossr(&mut self) -> OSSR_W<'_>[src]

Bit 11 - Off-state selection for Run mode

pub fn ossi(&mut self) -> OSSI_W<'_>[src]

Bit 10 - Off-state selection for Idle mode

pub fn lock(&mut self) -> LOCK_W<'_>[src]

Bits 8:9 - Lock configuration

pub fn dtg(&mut self) -> DTG_W<'_>[src]

Bits 0:7 - Dead-time generator setup

pub fn bkf(&mut self) -> BKF_W<'_>[src]

Bits 16:19 - Break filter

pub fn bk2f(&mut self) -> BK2F_W<'_>[src]

Bits 20:23 - Break 2 filter

pub fn bk2e(&mut self) -> BK2E_W<'_>[src]

Bit 24 - Break 2 enable

pub fn bk2p(&mut self) -> BK2P_W<'_>[src]

Bit 25 - Break 2 polarity

pub fn bkdsrm(&mut self) -> BKDSRM_W<'_>[src]

Bit 26 - Break Disarm

pub fn bk2dsrm(&mut self) -> BK2DSRM_W<'_>[src]

Bit 27 - Break2 Disarm

pub fn bkbid(&mut self) -> BKBID_W<'_>[src]

Bit 28 - Break Bidirectional

pub fn bk2bid(&mut self) -> BK2BID_W<'_>[src]

Bit 29 - Break2 bidirectional

impl W<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&mut self) -> DBL_W<'_>[src]

Bits 8:12 - DMA burst length

pub fn dba(&mut self) -> DBA_W<'_>[src]

Bits 0:4 - DMA base address

impl W<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&mut self) -> DMAB_W<'_>[src]

Bits 0:31 - DMA register for burst accesses

impl W<u32, Reg<u32, _OR1>>[src]

pub fn etr_adc1_rmp(&mut self) -> ETR_ADC1_RMP_W<'_>[src]

Bits 0:1 - External trigger remap on ADC1 analog watchdog

pub fn ti1_rmp(&mut self) -> TI1_RMP_W<'_>[src]

Bit 4 - Input Capture 1 remap

impl W<u32, Reg<u32, _CCMR3_OUTPUT>>[src]

pub fn oc6m_bit3(&mut self) -> OC6M_BIT3_W<'_>[src]

Bit 24 - Output Compare 6 mode bit 3

pub fn oc5m_bit3(&mut self) -> OC5M_BIT3_W<'_>[src]

Bits 16:18 - Output Compare 5 mode bit 3

pub fn oc6ce(&mut self) -> OC6CE_W<'_>[src]

Bit 15 - Output compare 6 clear enable

pub fn oc6m(&mut self) -> OC6M_W<'_>[src]

Bits 12:14 - Output compare 6 mode

pub fn oc6pe(&mut self) -> OC6PE_W<'_>[src]

Bit 11 - Output compare 6 preload enable

pub fn oc6fe(&mut self) -> OC6FE_W<'_>[src]

Bit 10 - Output compare 6 fast enable

pub fn oc5ce(&mut self) -> OC5CE_W<'_>[src]

Bit 7 - Output compare 5 clear enable

pub fn oc5m(&mut self) -> OC5M_W<'_>[src]

Bits 4:6 - Output compare 5 mode

pub fn oc5pe(&mut self) -> OC5PE_W<'_>[src]

Bit 3 - Output compare 5 preload enable

pub fn oc5fe(&mut self) -> OC5FE_W<'_>[src]

Bit 2 - Output compare 5 fast enable

impl W<u32, Reg<u32, _CCR5>>[src]

pub fn ccr5(&mut self) -> CCR5_W<'_>[src]

Bits 0:15 - Capture/Compare value

pub fn gc5c1(&mut self) -> GC5C1_W<'_>[src]

Bit 29 - Group Channel 5 and Channel 1

pub fn gc5c2(&mut self) -> GC5C2_W<'_>[src]

Bit 30 - Group Channel 5 and Channel 2

pub fn gc5c3(&mut self) -> GC5C3_W<'_>[src]

Bit 31 - Group Channel 5 and Channel 3

impl W<u32, Reg<u32, _CCR6>>[src]

pub fn ccr6(&mut self) -> CCR6_W<'_>[src]

Bits 0:15 - Capture/Compare value

impl W<u32, Reg<u32, _OR2>>[src]

pub fn bkine(&mut self) -> BKINE_W<'_>[src]

Bit 0 - BRK BKIN input enable

pub fn bkcmp1e(&mut self) -> BKCMP1E_W<'_>[src]

Bit 1 - BRK COMP1 enable

pub fn bkcmp2e(&mut self) -> BKCMP2E_W<'_>[src]

Bit 2 - BRK COMP2 enable

pub fn bkdfbk0e(&mut self) -> BKDFBK0E_W<'_>[src]

Bit 8 - BRK DFSDM_BREAK0 enable

pub fn bkinp(&mut self) -> BKINP_W<'_>[src]

Bit 9 - BRK BKIN input polarity

pub fn bkcmp1p(&mut self) -> BKCMP1P_W<'_>[src]

Bit 10 - BRK COMP1 input polarity

pub fn bkcmp2p(&mut self) -> BKCMP2P_W<'_>[src]

Bit 11 - BRK COMP2 input polarity

pub fn etrsel(&mut self) -> ETRSEL_W<'_>[src]

Bits 14:16 - ETR source selection

impl W<u32, Reg<u32, _OR3>>[src]

pub fn bk2ine(&mut self) -> BK2INE_W<'_>[src]

Bit 0 - BRK2 BKIN input enable

pub fn bk2cmp1e(&mut self) -> BK2CMP1E_W<'_>[src]

Bit 1 - BRK2 COMP1 enable

pub fn bk2cmp2e(&mut self) -> BK2CMP2E_W<'_>[src]

Bit 2 - BRK2 COMP2 enable

pub fn bk2dfbk0e(&mut self) -> BK2DFBK0E_W<'_>[src]

Bit 8 - BRK2 DFSDM_BREAK0 enable

pub fn bk2inp(&mut self) -> BK2INP_W<'_>[src]

Bit 9 - BRK2 BKIN input polarity

pub fn bk2cmp1p(&mut self) -> BK2CMP1P_W<'_>[src]

Bit 10 - BRK2 COMP1 input polarity

pub fn bk2cmp2p(&mut self) -> BK2CMP2P_W<'_>[src]

Bit 11 - BRK2 COMP2 input polarity

impl W<u32, Reg<u32, _CR1>>[src]

pub fn cen(&mut self) -> CEN_W<'_>[src]

Bit 0 - Counter enable

pub fn udis(&mut self) -> UDIS_W<'_>[src]

Bit 1 - Update disable

pub fn urs(&mut self) -> URS_W<'_>[src]

Bit 2 - Update request source

pub fn opm(&mut self) -> OPM_W<'_>[src]

Bit 3 - One-pulse mode

pub fn arpe(&mut self) -> ARPE_W<'_>[src]

Bit 7 - Auto-reload preload enable

pub fn ckd(&mut self) -> CKD_W<'_>[src]

Bits 8:9 - Clock division

pub fn uifremap(&mut self) -> UIFREMAP_W<'_>[src]

Bit 11 - UIF status bit remapping

impl W<u32, Reg<u32, _CR2>>[src]

pub fn ois1n(&mut self) -> OIS1N_W<'_>[src]

Bit 9 - Output Idle state 1

pub fn ois1(&mut self) -> OIS1_W<'_>[src]

Bit 8 - Output Idle state 1

pub fn ccds(&mut self) -> CCDS_W<'_>[src]

Bit 3 - Capture/compare DMA selection

pub fn ccus(&mut self) -> CCUS_W<'_>[src]

Bit 2 - Capture/compare control update selection

pub fn ccpc(&mut self) -> CCPC_W<'_>[src]

Bit 0 - Capture/compare preloaded control

pub fn mms(&mut self) -> MMS_W<'_>[src]

Bits 4:5 - Master mode selection

pub fn ti1s(&mut self) -> TI1S_W<'_>[src]

Bit 7 - TI1 selection

pub fn ois2(&mut self) -> OIS2_W<'_>[src]

Bit 10 - Output idle state 2 (OC2 output)

impl W<u32, Reg<u32, _DIER>>[src]

pub fn tde(&mut self) -> TDE_W<'_>[src]

Bit 14 - Trigger DMA request enable

pub fn comde(&mut self) -> COMDE_W<'_>[src]

Bit 13 - COM DMA request enable

pub fn cc1de(&mut self) -> CC1DE_W<'_>[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&mut self) -> UDE_W<'_>[src]

Bit 8 - Update DMA request enable

pub fn bie(&mut self) -> BIE_W<'_>[src]

Bit 7 - Break interrupt enable

pub fn tie(&mut self) -> TIE_W<'_>[src]

Bit 6 - Trigger interrupt enable

pub fn comie(&mut self) -> COMIE_W<'_>[src]

Bit 5 - COM interrupt enable

pub fn cc1ie(&mut self) -> CC1IE_W<'_>[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&mut self) -> UIE_W<'_>[src]

Bit 0 - Update interrupt enable

pub fn cc2de(&mut self) -> CC2DE_W<'_>[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc2ie(&mut self) -> CC2IE_W<'_>[src]

Bit 2 - Capture/Compare 2 interrupt enable

impl W<u32, Reg<u32, _SR>>[src]

pub fn cc1of(&mut self) -> CC1OF_W<'_>[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn bif(&mut self) -> BIF_W<'_>[src]

Bit 7 - Break interrupt flag

pub fn tif(&mut self) -> TIF_W<'_>[src]

Bit 6 - Trigger interrupt flag

pub fn comif(&mut self) -> COMIF_W<'_>[src]

Bit 5 - COM interrupt flag

pub fn cc1if(&mut self) -> CC1IF_W<'_>[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&mut self) -> UIF_W<'_>[src]

Bit 0 - Update interrupt flag

pub fn cc2of(&mut self) -> CC2OF_W<'_>[src]

Bit 10 - Capture/Compare 2 overcapture flag

pub fn cc2if(&mut self) -> CC2IF_W<'_>[src]

Bit 2 - Capture/Compare 2 interrupt flag

impl W<u32, Reg<u32, _EGR>>[src]

pub fn bg(&mut self) -> BG_W<'_>[src]

Bit 7 - Break generation

pub fn tg(&mut self) -> TG_W<'_>[src]

Bit 6 - Trigger generation

pub fn comg(&mut self) -> COMG_W<'_>[src]

Bit 5 - Capture/Compare control update generation

pub fn cc1g(&mut self) -> CC1G_W<'_>[src]

Bit 1 - Capture/compare 1 generation

pub fn ug(&mut self) -> UG_W<'_>[src]

Bit 0 - Update generation

pub fn cc2g(&mut self) -> CC2G_W<'_>[src]

Bit 2 - Capture/Compare 2 generation

impl W<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc1m_bit3(&mut self) -> OC1M_BIT3_W<'_>[src]

Bit 16 - Output Compare 1 mode

pub fn oc1m(&mut self) -> OC1M_W<'_>[src]

Bits 4:6 - Output Compare 1 mode

pub fn oc1pe(&mut self) -> OC1PE_W<'_>[src]

Bit 3 - Output Compare 1 preload enable

pub fn oc1fe(&mut self) -> OC1FE_W<'_>[src]

Bit 2 - Output Compare 1 fast enable

pub fn cc1s(&mut self) -> CC1S_W<'_>[src]

Bits 0:1 - Capture/Compare 1 selection

pub fn oc2m_bit3(&mut self) -> OC2M_BIT3_W<'_>[src]

Bit 24 - Output Compare 2 mode - bit 3

pub fn oc2m(&mut self) -> OC2M_W<'_>[src]

Bits 12:14 - Output Compare 2 mode

pub fn oc2pe(&mut self) -> OC2PE_W<'_>[src]

Bit 11 - Output Compare 2 preload enable

pub fn cc2s(&mut self) -> CC2S_W<'_>[src]

Bits 8:9 - Capture/Compare 2 selection

impl W<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic1f(&mut self) -> IC1F_W<'_>[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&mut self) -> IC1PSC_W<'_>[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&mut self) -> CC1S_W<'_>[src]

Bits 0:1 - Capture/Compare 1 selection

pub fn ic2f(&mut self) -> IC2F_W<'_>[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&mut self) -> IC2PSC_W<'_>[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&mut self) -> CC2S_W<'_>[src]

Bits 8:9 - Capture/Compare 2 selection

impl W<u32, Reg<u32, _CCER>>[src]

pub fn cc1np(&mut self) -> CC1NP_W<'_>[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1ne(&mut self) -> CC1NE_W<'_>[src]

Bit 2 - Capture/Compare 1 complementary output enable

pub fn cc1p(&mut self) -> CC1P_W<'_>[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&mut self) -> CC1E_W<'_>[src]

Bit 0 - Capture/Compare 1 output enable

pub fn cc2np(&mut self) -> CC2NP_W<'_>[src]

Bit 7 - Capture/Compare 2 complementary output polarity

pub fn cc2p(&mut self) -> CC2P_W<'_>[src]

Bit 5 - Capture/Compare 2 output polarity

pub fn cc2e(&mut self) -> CC2E_W<'_>[src]

Bit 4 - Capture/Compare 2 output enable

impl W<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&mut self) -> CNT_W<'_>[src]

Bits 0:15 - counter value

impl W<u32, Reg<u32, _PSC>>[src]

pub fn psc(&mut self) -> PSC_W<'_>[src]

Bits 0:15 - Prescaler value

impl W<u32, Reg<u32, _ARR>>[src]

pub fn arr(&mut self) -> ARR_W<'_>[src]

Bits 0:15 - Auto-reload value

impl W<u32, Reg<u32, _RCR>>[src]

pub fn rep(&mut self) -> REP_W<'_>[src]

Bits 0:7 - Repetition counter value

impl W<u32, Reg<u32, _CCR1>>[src]

pub fn ccr1(&mut self) -> CCR1_W<'_>[src]

Bits 0:15 - Capture/Compare 1 value

impl W<u32, Reg<u32, _BDTR>>[src]

pub fn dtg(&mut self) -> DTG_W<'_>[src]

Bits 0:7 - Dead-time generator setup

pub fn lock(&mut self) -> LOCK_W<'_>[src]

Bits 8:9 - Lock configuration

pub fn ossi(&mut self) -> OSSI_W<'_>[src]

Bit 10 - Off-state selection for Idle mode

pub fn ossr(&mut self) -> OSSR_W<'_>[src]

Bit 11 - Off-state selection for Run mode

pub fn bke(&mut self) -> BKE_W<'_>[src]

Bit 12 - Break enable

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bit 13 - Break polarity

pub fn aoe(&mut self) -> AOE_W<'_>[src]

Bit 14 - Automatic output enable

pub fn moe(&mut self) -> MOE_W<'_>[src]

Bit 15 - Main output enable

pub fn bkbid(&mut self) -> BKBID_W<'_>[src]

Bit 28 - Break Bidirectional

pub fn bkdsrm(&mut self) -> BKDSRM_W<'_>[src]

Bit 26 - Break Disarm

impl W<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&mut self) -> DBL_W<'_>[src]

Bits 8:12 - DMA burst length

pub fn dba(&mut self) -> DBA_W<'_>[src]

Bits 0:4 - DMA base address

impl W<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&mut self) -> DMAB_W<'_>[src]

Bits 0:15 - DMA register for burst accesses

impl W<u32, Reg<u32, _SMCR>>[src]

pub fn sms(&mut self) -> SMS_W<'_>[src]

Bits 0:2 - Slave mode selection

pub fn ts(&mut self) -> TS_W<'_>[src]

Bits 4:6 - Trigger selection

pub fn msm(&mut self) -> MSM_W<'_>[src]

Bit 7 - Master/slave mode

pub fn sms_bit3(&mut self) -> SMS_BIT3_W<'_>[src]

Bit 16 - Slave mode selection - bit 3

impl W<u32, Reg<u32, _OR1>>[src]

pub fn encoder_mode(&mut self) -> ENCODER_MODE_W<'_>[src]

Bits 1:2 - Encoder mode

pub fn ti1_rmp(&mut self) -> TI1_RMP_W<'_>[src]

Bit 0 - Input capture 1 remap

impl W<u32, Reg<u32, _OR2>>[src]

pub fn bkcmp2p(&mut self) -> BKCMP2P_W<'_>[src]

Bit 11 - BRK COMP2 input polarity

pub fn bkcmp1p(&mut self) -> BKCMP1P_W<'_>[src]

Bit 10 - BRK COMP1 input polarity

pub fn bkinp(&mut self) -> BKINP_W<'_>[src]

Bit 9 - BRK BKIN input polarity

pub fn bkdf1bk0e(&mut self) -> BKDF1BK0E_W<'_>[src]

Bit 8 - BRK dfsdm1_break[0] enable

pub fn bkcmp2e(&mut self) -> BKCMP2E_W<'_>[src]

Bit 2 - BRK COMP2 enable

pub fn bkcmp1e(&mut self) -> BKCMP1E_W<'_>[src]

Bit 1 - BRK COMP1 enable

pub fn bkine(&mut self) -> BKINE_W<'_>[src]

Bit 0 - BRK BKIN input enable

impl W<u32, Reg<u32, _CCR2>>[src]

pub fn ccr2(&mut self) -> CCR2_W<'_>[src]

Bits 0:15 - Capture/Compare 2 value

impl W<u32, Reg<u32, _CR1>>[src]

pub fn cen(&mut self) -> CEN_W<'_>[src]

Bit 0 - Counter enable

pub fn udis(&mut self) -> UDIS_W<'_>[src]

Bit 1 - Update disable

pub fn urs(&mut self) -> URS_W<'_>[src]

Bit 2 - Update request source

pub fn opm(&mut self) -> OPM_W<'_>[src]

Bit 3 - One-pulse mode

pub fn arpe(&mut self) -> ARPE_W<'_>[src]

Bit 7 - Auto-reload preload enable

pub fn ckd(&mut self) -> CKD_W<'_>[src]

Bits 8:9 - Clock division

pub fn uifremap(&mut self) -> UIFREMAP_W<'_>[src]

Bit 11 - UIF status bit remapping

impl W<u32, Reg<u32, _CR2>>[src]

pub fn ois1n(&mut self) -> OIS1N_W<'_>[src]

Bit 9 - Output Idle state 1

pub fn ois1(&mut self) -> OIS1_W<'_>[src]

Bit 8 - Output Idle state 1

pub fn ccds(&mut self) -> CCDS_W<'_>[src]

Bit 3 - Capture/compare DMA selection

pub fn ccus(&mut self) -> CCUS_W<'_>[src]

Bit 2 - Capture/compare control update selection

pub fn ccpc(&mut self) -> CCPC_W<'_>[src]

Bit 0 - Capture/compare preloaded control

impl W<u32, Reg<u32, _DIER>>[src]

pub fn comde(&mut self) -> COMDE_W<'_>[src]

Bit 13 - COM DMA request enable

pub fn cc1de(&mut self) -> CC1DE_W<'_>[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&mut self) -> UDE_W<'_>[src]

Bit 8 - Update DMA request enable

pub fn bie(&mut self) -> BIE_W<'_>[src]

Bit 7 - Break interrupt enable

pub fn comie(&mut self) -> COMIE_W<'_>[src]

Bit 5 - COM interrupt enable

pub fn cc1ie(&mut self) -> CC1IE_W<'_>[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&mut self) -> UIE_W<'_>[src]

Bit 0 - Update interrupt enable

impl W<u32, Reg<u32, _SR>>[src]

pub fn cc1of(&mut self) -> CC1OF_W<'_>[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn bif(&mut self) -> BIF_W<'_>[src]

Bit 7 - Break interrupt flag

pub fn comif(&mut self) -> COMIF_W<'_>[src]

Bit 5 - COM interrupt flag

pub fn cc1if(&mut self) -> CC1IF_W<'_>[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&mut self) -> UIF_W<'_>[src]

Bit 0 - Update interrupt flag

impl W<u32, Reg<u32, _EGR>>[src]

pub fn bg(&mut self) -> BG_W<'_>[src]

Bit 7 - Break generation

pub fn comg(&mut self) -> COMG_W<'_>[src]

Bit 5 - Capture/Compare control update generation

pub fn cc1g(&mut self) -> CC1G_W<'_>[src]

Bit 1 - Capture/compare 1 generation

pub fn ug(&mut self) -> UG_W<'_>[src]

Bit 0 - Update generation

impl W<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc1m_2(&mut self) -> OC1M_2_W<'_>[src]

Bit 16 - Output Compare 1 mode

pub fn oc1m(&mut self) -> OC1M_W<'_>[src]

Bits 4:6 - Output Compare 1 mode

pub fn oc1pe(&mut self) -> OC1PE_W<'_>[src]

Bit 3 - Output Compare 1 preload enable

pub fn oc1fe(&mut self) -> OC1FE_W<'_>[src]

Bit 2 - Output Compare 1 fast enable

pub fn cc1s(&mut self) -> CC1S_W<'_>[src]

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic1f(&mut self) -> IC1F_W<'_>[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&mut self) -> IC1PSC_W<'_>[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&mut self) -> CC1S_W<'_>[src]

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCER>>[src]

pub fn cc1np(&mut self) -> CC1NP_W<'_>[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1ne(&mut self) -> CC1NE_W<'_>[src]

Bit 2 - Capture/Compare 1 complementary output enable

pub fn cc1p(&mut self) -> CC1P_W<'_>[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&mut self) -> CC1E_W<'_>[src]

Bit 0 - Capture/Compare 1 output enable

impl W<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&mut self) -> CNT_W<'_>[src]

Bits 0:15 - counter value

impl W<u32, Reg<u32, _PSC>>[src]

pub fn psc(&mut self) -> PSC_W<'_>[src]

Bits 0:15 - Prescaler value

impl W<u32, Reg<u32, _ARR>>[src]

pub fn arr(&mut self) -> ARR_W<'_>[src]

Bits 0:15 - Auto-reload value

impl W<u32, Reg<u32, _RCR>>[src]

pub fn rep(&mut self) -> REP_W<'_>[src]

Bits 0:7 - Repetition counter value

impl W<u32, Reg<u32, _CCR1>>[src]

pub fn ccr1(&mut self) -> CCR1_W<'_>[src]

Bits 0:15 - Capture/Compare 1 value

impl W<u32, Reg<u32, _BDTR>>[src]

pub fn dtg(&mut self) -> DTG_W<'_>[src]

Bits 0:7 - Dead-time generator setup

pub fn lock(&mut self) -> LOCK_W<'_>[src]

Bits 8:9 - Lock configuration

pub fn ossi(&mut self) -> OSSI_W<'_>[src]

Bit 10 - Off-state selection for Idle mode

pub fn ossr(&mut self) -> OSSR_W<'_>[src]

Bit 11 - Off-state selection for Run mode

pub fn bke(&mut self) -> BKE_W<'_>[src]

Bit 12 - Break enable

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bit 13 - Break polarity

pub fn aoe(&mut self) -> AOE_W<'_>[src]

Bit 14 - Automatic output enable

pub fn moe(&mut self) -> MOE_W<'_>[src]

Bit 15 - Main output enable

pub fn bkbid(&mut self) -> BKBID_W<'_>[src]

Bit 28 - Break Bidirectional

pub fn bkdsrm(&mut self) -> BKDSRM_W<'_>[src]

Bit 26 - Break Disarm

impl W<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&mut self) -> DBL_W<'_>[src]

Bits 8:12 - DMA burst length

pub fn dba(&mut self) -> DBA_W<'_>[src]

Bits 0:4 - DMA base address

impl W<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&mut self) -> DMAB_W<'_>[src]

Bits 0:15 - DMA register for burst accesses

impl W<u32, Reg<u32, _OR1>>[src]

pub fn ti1_rmp(&mut self) -> TI1_RMP_W<'_>[src]

Bits 0:1 - Input capture 1 remap

impl W<u32, Reg<u32, _OR2>>[src]

pub fn bkine(&mut self) -> BKINE_W<'_>[src]

Bit 0 - BRK BKIN input enable

pub fn bkcmp1e(&mut self) -> BKCMP1E_W<'_>[src]

Bit 1 - BRK COMP1 enable

pub fn bkcmp2e(&mut self) -> BKCMP2E_W<'_>[src]

Bit 2 - BRK COMP2 enable

pub fn bkdf1bk1e(&mut self) -> BKDF1BK1E_W<'_>[src]

Bit 8 - BRK dfsdm1_break[1] enable

pub fn bkinp(&mut self) -> BKINP_W<'_>[src]

Bit 9 - BRK BKIN input polarity

pub fn bkcmp1p(&mut self) -> BKCMP1P_W<'_>[src]

Bit 10 - BRK COMP1 input polarity

pub fn bkcmp2p(&mut self) -> BKCMP2P_W<'_>[src]

Bit 11 - BRK COMP2 input polarit

impl W<u32, Reg<u32, _CR1>>[src]

pub fn cen(&mut self) -> CEN_W<'_>[src]

Bit 0 - Counter enable

pub fn udis(&mut self) -> UDIS_W<'_>[src]

Bit 1 - Update disable

pub fn urs(&mut self) -> URS_W<'_>[src]

Bit 2 - Update request source

pub fn opm(&mut self) -> OPM_W<'_>[src]

Bit 3 - One-pulse mode

pub fn arpe(&mut self) -> ARPE_W<'_>[src]

Bit 7 - Auto-reload preload enable

pub fn ckd(&mut self) -> CKD_W<'_>[src]

Bits 8:9 - Clock division

pub fn uifremap(&mut self) -> UIFREMAP_W<'_>[src]

Bit 11 - UIF status bit remapping

impl W<u32, Reg<u32, _CR2>>[src]

pub fn ois1n(&mut self) -> OIS1N_W<'_>[src]

Bit 9 - Output Idle state 1

pub fn ois1(&mut self) -> OIS1_W<'_>[src]

Bit 8 - Output Idle state 1

pub fn ccds(&mut self) -> CCDS_W<'_>[src]

Bit 3 - Capture/compare DMA selection

pub fn ccus(&mut self) -> CCUS_W<'_>[src]

Bit 2 - Capture/compare control update selection

pub fn ccpc(&mut self) -> CCPC_W<'_>[src]

Bit 0 - Capture/compare preloaded control

impl W<u32, Reg<u32, _DIER>>[src]

pub fn comde(&mut self) -> COMDE_W<'_>[src]

Bit 13 - COM DMA request enable

pub fn cc1de(&mut self) -> CC1DE_W<'_>[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&mut self) -> UDE_W<'_>[src]

Bit 8 - Update DMA request enable

pub fn bie(&mut self) -> BIE_W<'_>[src]

Bit 7 - Break interrupt enable

pub fn comie(&mut self) -> COMIE_W<'_>[src]

Bit 5 - COM interrupt enable

pub fn cc1ie(&mut self) -> CC1IE_W<'_>[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&mut self) -> UIE_W<'_>[src]

Bit 0 - Update interrupt enable

impl W<u32, Reg<u32, _SR>>[src]

pub fn cc1of(&mut self) -> CC1OF_W<'_>[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn bif(&mut self) -> BIF_W<'_>[src]

Bit 7 - Break interrupt flag

pub fn comif(&mut self) -> COMIF_W<'_>[src]

Bit 5 - COM interrupt flag

pub fn cc1if(&mut self) -> CC1IF_W<'_>[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&mut self) -> UIF_W<'_>[src]

Bit 0 - Update interrupt flag

impl W<u32, Reg<u32, _EGR>>[src]

pub fn bg(&mut self) -> BG_W<'_>[src]

Bit 7 - Break generation

pub fn comg(&mut self) -> COMG_W<'_>[src]

Bit 5 - Capture/Compare control update generation

pub fn cc1g(&mut self) -> CC1G_W<'_>[src]

Bit 1 - Capture/compare 1 generation

pub fn ug(&mut self) -> UG_W<'_>[src]

Bit 0 - Update generation

impl W<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc1m_2(&mut self) -> OC1M_2_W<'_>[src]

Bit 16 - Output Compare 1 mode

pub fn oc1m(&mut self) -> OC1M_W<'_>[src]

Bits 4:6 - Output Compare 1 mode

pub fn oc1pe(&mut self) -> OC1PE_W<'_>[src]

Bit 3 - Output Compare 1 preload enable

pub fn oc1fe(&mut self) -> OC1FE_W<'_>[src]

Bit 2 - Output Compare 1 fast enable

pub fn cc1s(&mut self) -> CC1S_W<'_>[src]

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic1f(&mut self) -> IC1F_W<'_>[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&mut self) -> IC1PSC_W<'_>[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&mut self) -> CC1S_W<'_>[src]

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCER>>[src]

pub fn cc1np(&mut self) -> CC1NP_W<'_>[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1ne(&mut self) -> CC1NE_W<'_>[src]

Bit 2 - Capture/Compare 1 complementary output enable

pub fn cc1p(&mut self) -> CC1P_W<'_>[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&mut self) -> CC1E_W<'_>[src]

Bit 0 - Capture/Compare 1 output enable

impl W<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&mut self) -> CNT_W<'_>[src]

Bits 0:15 - counter value

impl W<u32, Reg<u32, _PSC>>[src]

pub fn psc(&mut self) -> PSC_W<'_>[src]

Bits 0:15 - Prescaler value

impl W<u32, Reg<u32, _ARR>>[src]

pub fn arr(&mut self) -> ARR_W<'_>[src]

Bits 0:15 - Auto-reload value

impl W<u32, Reg<u32, _RCR>>[src]

pub fn rep(&mut self) -> REP_W<'_>[src]

Bits 0:7 - Repetition counter value

impl W<u32, Reg<u32, _CCR1>>[src]

pub fn ccr1(&mut self) -> CCR1_W<'_>[src]

Bits 0:15 - Capture/Compare 1 value

impl W<u32, Reg<u32, _BDTR>>[src]

pub fn dtg(&mut self) -> DTG_W<'_>[src]

Bits 0:7 - Dead-time generator setup

pub fn lock(&mut self) -> LOCK_W<'_>[src]

Bits 8:9 - Lock configuration

pub fn ossi(&mut self) -> OSSI_W<'_>[src]

Bit 10 - Off-state selection for Idle mode

pub fn ossr(&mut self) -> OSSR_W<'_>[src]

Bit 11 - Off-state selection for Run mode

pub fn bke(&mut self) -> BKE_W<'_>[src]

Bit 12 - Break enable

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bit 13 - Break polarity

pub fn aoe(&mut self) -> AOE_W<'_>[src]

Bit 14 - Automatic output enable

pub fn moe(&mut self) -> MOE_W<'_>[src]

Bit 15 - Main output enable

pub fn bkbid(&mut self) -> BKBID_W<'_>[src]

Bit 28 - Break Bidirectional

pub fn bkdsrm(&mut self) -> BKDSRM_W<'_>[src]

Bit 26 - Break Disarm

impl W<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&mut self) -> DBL_W<'_>[src]

Bits 8:12 - DMA burst length

pub fn dba(&mut self) -> DBA_W<'_>[src]

Bits 0:4 - DMA base address

impl W<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&mut self) -> DMAB_W<'_>[src]

Bits 0:15 - DMA register for burst accesses

impl W<u32, Reg<u32, _OR1>>[src]

pub fn ti1_rmp(&mut self) -> TI1_RMP_W<'_>[src]

Bits 0:1 - Input capture 1 remap

impl W<u32, Reg<u32, _OR2>>[src]

pub fn bkine(&mut self) -> BKINE_W<'_>[src]

Bit 0 - BRK BKIN input enable

pub fn bkcmp1e(&mut self) -> BKCMP1E_W<'_>[src]

Bit 1 - BRK COMP1 enable

pub fn bkcmp2e(&mut self) -> BKCMP2E_W<'_>[src]

Bit 2 - BRK COMP2 enable

pub fn bkdf1bk2e(&mut self) -> BKDF1BK2E_W<'_>[src]

Bit 8 - BRK dfsdm1_break[2] enable

pub fn bkinp(&mut self) -> BKINP_W<'_>[src]

Bit 9 - BRK BKIN input polarity

pub fn bkcmp1p(&mut self) -> BKCMP1P_W<'_>[src]

Bit 10 - BRK COMP1 input polarity

pub fn bkcmp2p(&mut self) -> BKCMP2P_W<'_>[src]

Bit 11 - BRK COMP2 input polarit

impl W<u32, Reg<u32, _CR1>>[src]

pub fn ckd(&mut self) -> CKD_W<'_>[src]

Bits 8:9 - Clock division

pub fn arpe(&mut self) -> ARPE_W<'_>[src]

Bit 7 - Auto-reload preload enable

pub fn cms(&mut self) -> CMS_W<'_>[src]

Bits 5:6 - Center-aligned mode selection

pub fn dir(&mut self) -> DIR_W<'_>[src]

Bit 4 - Direction

pub fn opm(&mut self) -> OPM_W<'_>[src]

Bit 3 - One-pulse mode

pub fn urs(&mut self) -> URS_W<'_>[src]

Bit 2 - Update request source

pub fn udis(&mut self) -> UDIS_W<'_>[src]

Bit 1 - Update disable

pub fn cen(&mut self) -> CEN_W<'_>[src]

Bit 0 - Counter enable

pub fn uifremap(&mut self) -> UIFREMAP_W<'_>[src]

Bit 11 - UIF status bit remapping

impl W<u32, Reg<u32, _CR2>>[src]

pub fn ti1s(&mut self) -> TI1S_W<'_>[src]

Bit 7 - TI1 selection

pub fn mms(&mut self) -> MMS_W<'_>[src]

Bits 4:6 - Master mode selection

pub fn ccds(&mut self) -> CCDS_W<'_>[src]

Bit 3 - Capture/compare DMA selection

impl W<u32, Reg<u32, _SMCR>>[src]

pub fn etp(&mut self) -> ETP_W<'_>[src]

Bit 15 - External trigger polarity

pub fn ece(&mut self) -> ECE_W<'_>[src]

Bit 14 - External clock enable

pub fn etps(&mut self) -> ETPS_W<'_>[src]

Bits 12:13 - External trigger prescaler

pub fn etf(&mut self) -> ETF_W<'_>[src]

Bits 8:11 - External trigger filter

pub fn msm(&mut self) -> MSM_W<'_>[src]

Bit 7 - Master/Slave mode

pub fn ts(&mut self) -> TS_W<'_>[src]

Bits 4:6 - Trigger selection

pub fn sms(&mut self) -> SMS_W<'_>[src]

Bits 0:2 - Slave mode selection

pub fn sms_bit3(&mut self) -> SMS_BIT3_W<'_>[src]

Bit 16 - Slave mode selection - bit 3

impl W<u32, Reg<u32, _DIER>>[src]

pub fn tde(&mut self) -> TDE_W<'_>[src]

Bit 14 - Trigger DMA request enable

pub fn cc4de(&mut self) -> CC4DE_W<'_>[src]

Bit 12 - Capture/Compare 4 DMA request enable

pub fn cc3de(&mut self) -> CC3DE_W<'_>[src]

Bit 11 - Capture/Compare 3 DMA request enable

pub fn cc2de(&mut self) -> CC2DE_W<'_>[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&mut self) -> CC1DE_W<'_>[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&mut self) -> UDE_W<'_>[src]

Bit 8 - Update DMA request enable

pub fn tie(&mut self) -> TIE_W<'_>[src]

Bit 6 - Trigger interrupt enable

pub fn cc4ie(&mut self) -> CC4IE_W<'_>[src]

Bit 4 - Capture/Compare 4 interrupt enable

pub fn cc3ie(&mut self) -> CC3IE_W<'_>[src]

Bit 3 - Capture/Compare 3 interrupt enable

pub fn cc2ie(&mut self) -> CC2IE_W<'_>[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&mut self) -> CC1IE_W<'_>[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&mut self) -> UIE_W<'_>[src]

Bit 0 - Update interrupt enable

impl W<u32, Reg<u32, _SR>>[src]

pub fn cc4of(&mut self) -> CC4OF_W<'_>[src]

Bit 12 - Capture/Compare 4 overcapture flag

pub fn cc3of(&mut self) -> CC3OF_W<'_>[src]

Bit 11 - Capture/Compare 3 overcapture flag

pub fn cc2of(&mut self) -> CC2OF_W<'_>[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&mut self) -> CC1OF_W<'_>[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&mut self) -> TIF_W<'_>[src]

Bit 6 - Trigger interrupt flag

pub fn cc4if(&mut self) -> CC4IF_W<'_>[src]

Bit 4 - Capture/Compare 4 interrupt flag

pub fn cc3if(&mut self) -> CC3IF_W<'_>[src]

Bit 3 - Capture/Compare 3 interrupt flag

pub fn cc2if(&mut self) -> CC2IF_W<'_>[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&mut self) -> CC1IF_W<'_>[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&mut self) -> UIF_W<'_>[src]

Bit 0 - Update interrupt flag

impl W<u32, Reg<u32, _EGR>>[src]

pub fn tg(&mut self) -> TG_W<'_>[src]

Bit 6 - Trigger generation

pub fn cc4g(&mut self) -> CC4G_W<'_>[src]

Bit 4 - Capture/compare 4 generation

pub fn cc3g(&mut self) -> CC3G_W<'_>[src]

Bit 3 - Capture/compare 3 generation

pub fn cc2g(&mut self) -> CC2G_W<'_>[src]

Bit 2 - Capture/compare 2 generation

pub fn cc1g(&mut self) -> CC1G_W<'_>[src]

Bit 1 - Capture/compare 1 generation

pub fn ug(&mut self) -> UG_W<'_>[src]

Bit 0 - Update generation

impl W<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc2ce(&mut self) -> OC2CE_W<'_>[src]

Bit 15 - Output compare 2 clear enable

pub fn oc2m(&mut self) -> OC2M_W<'_>[src]

Bits 12:14 - Output compare 2 mode

pub fn oc2pe(&mut self) -> OC2PE_W<'_>[src]

Bit 11 - Output compare 2 preload enable

pub fn oc2fe(&mut self) -> OC2FE_W<'_>[src]

Bit 10 - Output compare 2 fast enable

pub fn cc2s(&mut self) -> CC2S_W<'_>[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1ce(&mut self) -> OC1CE_W<'_>[src]

Bit 7 - Output compare 1 clear enable

pub fn oc1m(&mut self) -> OC1M_W<'_>[src]

Bits 4:6 - Output compare 1 mode

pub fn oc1pe(&mut self) -> OC1PE_W<'_>[src]

Bit 3 - Output compare 1 preload enable

pub fn oc1fe(&mut self) -> OC1FE_W<'_>[src]

Bit 2 - Output compare 1 fast enable

pub fn cc1s(&mut self) -> CC1S_W<'_>[src]

Bits 0:1 - Capture/Compare 1 selection

pub fn oc2m_bit3(&mut self) -> OC2M_BIT3_W<'_>[src]

Bit 24 - Output Compare 2 mode - bit 3

pub fn oc1m_bit3(&mut self) -> OC1M_BIT3_W<'_>[src]

Bit 16 - Output Compare 1 mode - bit 3

impl W<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&mut self) -> IC2F_W<'_>[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&mut self) -> IC2PSC_W<'_>[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&mut self) -> CC2S_W<'_>[src]

Bits 8:9 - Capture/compare 2 selection

pub fn ic1f(&mut self) -> IC1F_W<'_>[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&mut self) -> IC1PSC_W<'_>[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&mut self) -> CC1S_W<'_>[src]

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCMR2_OUTPUT>>[src]

pub fn oc4ce(&mut self) -> OC4CE_W<'_>[src]

Bit 15 - Output compare 4 clear enable

pub fn oc4m(&mut self) -> OC4M_W<'_>[src]

Bits 12:14 - Output compare 4 mode

pub fn oc4pe(&mut self) -> OC4PE_W<'_>[src]

Bit 11 - Output compare 4 preload enable

pub fn oc4fe(&mut self) -> OC4FE_W<'_>[src]

Bit 10 - Output compare 4 fast enable

pub fn cc4s(&mut self) -> CC4S_W<'_>[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn oc3ce(&mut self) -> OC3CE_W<'_>[src]

Bit 7 - Output compare 3 clear enable

pub fn oc3m(&mut self) -> OC3M_W<'_>[src]

Bits 4:6 - Output compare 3 mode

pub fn oc3pe(&mut self) -> OC3PE_W<'_>[src]

Bit 3 - Output compare 3 preload enable

pub fn oc3fe(&mut self) -> OC3FE_W<'_>[src]

Bit 2 - Output compare 3 fast enable

pub fn cc3s(&mut self) -> CC3S_W<'_>[src]

Bits 0:1 - Capture/Compare 3 selection

pub fn oc4m_bit3(&mut self) -> OC4M_BIT3_W<'_>[src]

Bit 24 - Output Compare 2 mode - bit 3

pub fn oc3m_bit3(&mut self) -> OC3M_BIT3_W<'_>[src]

Bit 16 - Output Compare 1 mode - bit 3

impl W<u32, Reg<u32, _CCMR2_INPUT>>[src]

pub fn ic4f(&mut self) -> IC4F_W<'_>[src]

Bits 12:15 - Input capture 4 filter

pub fn ic4psc(&mut self) -> IC4PSC_W<'_>[src]

Bits 10:11 - Input capture 4 prescaler

pub fn cc4s(&mut self) -> CC4S_W<'_>[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn ic3f(&mut self) -> IC3F_W<'_>[src]

Bits 4:7 - Input capture 3 filter

pub fn ic3psc(&mut self) -> IC3PSC_W<'_>[src]

Bits 2:3 - Input capture 3 prescaler

pub fn cc3s(&mut self) -> CC3S_W<'_>[src]

Bits 0:1 - Capture/Compare 3 selection

impl W<u32, Reg<u32, _CCER>>[src]

pub fn cc4np(&mut self) -> CC4NP_W<'_>[src]

Bit 15 - Capture/Compare 4 output Polarity

pub fn cc4p(&mut self) -> CC4P_W<'_>[src]

Bit 13 - Capture/Compare 3 output Polarity

pub fn cc4e(&mut self) -> CC4E_W<'_>[src]

Bit 12 - Capture/Compare 4 output enable

pub fn cc3np(&mut self) -> CC3NP_W<'_>[src]

Bit 11 - Capture/Compare 3 output Polarity

pub fn cc3p(&mut self) -> CC3P_W<'_>[src]

Bit 9 - Capture/Compare 3 output Polarity

pub fn cc3e(&mut self) -> CC3E_W<'_>[src]

Bit 8 - Capture/Compare 3 output enable

pub fn cc2np(&mut self) -> CC2NP_W<'_>[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc2p(&mut self) -> CC2P_W<'_>[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2e(&mut self) -> CC2E_W<'_>[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc1np(&mut self) -> CC1NP_W<'_>[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1p(&mut self) -> CC1P_W<'_>[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&mut self) -> CC1E_W<'_>[src]

Bit 0 - Capture/Compare 1 output enable

impl W<u32, Reg<u32, _CNT>>[src]

pub fn cnt_h(&mut self) -> CNT_H_W<'_>[src]

Bits 16:30 - Most significant part counter value (on TIM2 and TIM5)

pub fn cnt_l(&mut self) -> CNT_L_W<'_>[src]

Bits 0:15 - Least significant part of counter value

pub fn cnt_bit31(&mut self) -> CNT_BIT31_W<'_>[src]

Bit 31 - Most significant bit of counter value (on TIM2 and TIM5)

impl W<u32, Reg<u32, _PSC>>[src]

pub fn psc(&mut self) -> PSC_W<'_>[src]

Bits 0:15 - Prescaler value

impl W<u32, Reg<u32, _ARR>>[src]

pub fn arr_h(&mut self) -> ARR_H_W<'_>[src]

Bits 16:31 - High Auto-reload value (TIM2 only)

pub fn arr_l(&mut self) -> ARR_L_W<'_>[src]

Bits 0:15 - Low Auto-reload value

impl W<u32, Reg<u32, _CCR1>>[src]

pub fn ccr1_h(&mut self) -> CCR1_H_W<'_>[src]

Bits 16:31 - High Capture/Compare 1 value (TIM2 only)

pub fn ccr1_l(&mut self) -> CCR1_L_W<'_>[src]

Bits 0:15 - Low Capture/Compare 1 value

impl W<u32, Reg<u32, _CCR2>>[src]

pub fn ccr2_h(&mut self) -> CCR2_H_W<'_>[src]

Bits 16:31 - High Capture/Compare 2 value (TIM2 only)

pub fn ccr2_l(&mut self) -> CCR2_L_W<'_>[src]

Bits 0:15 - Low Capture/Compare 2 value

impl W<u32, Reg<u32, _CCR3>>[src]

pub fn ccr3_h(&mut self) -> CCR3_H_W<'_>[src]

Bits 16:31 - High Capture/Compare value (TIM2 only)

pub fn ccr3_l(&mut self) -> CCR3_L_W<'_>[src]

Bits 0:15 - Low Capture/Compare value

impl W<u32, Reg<u32, _CCR4>>[src]

pub fn ccr4_h(&mut self) -> CCR4_H_W<'_>[src]

Bits 16:31 - High Capture/Compare value (TIM2 only)

pub fn ccr4_l(&mut self) -> CCR4_L_W<'_>[src]

Bits 0:15 - Low Capture/Compare value

impl W<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&mut self) -> DBL_W<'_>[src]

Bits 8:12 - DMA burst length

pub fn dba(&mut self) -> DBA_W<'_>[src]

Bits 0:4 - DMA base address

impl W<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&mut self) -> DMAB_W<'_>[src]

Bits 0:15 - Low Capture/Compare 2 value

impl W<u32, Reg<u32, _OR1>>[src]

pub fn itr1_rmp(&mut self) -> ITR1_RMP_W<'_>[src]

Bit 0 - Internal trigger 1 remap

pub fn ti4_rmp(&mut self) -> TI4_RMP_W<'_>[src]

Bits 2:3 - Input Capture 4 remap

pub fn etr1_rmp(&mut self) -> ETR1_RMP_W<'_>[src]

Bit 1 - External trigger remap

impl W<u32, Reg<u32, _OR2>>[src]

pub fn etrsel(&mut self) -> ETRSEL_W<'_>[src]

Bits 14:16 - ETR source selection

impl W<u32, Reg<u32, _CR1>>[src]

pub fn ckd(&mut self) -> CKD_W<'_>[src]

Bits 8:9 - Clock division

pub fn arpe(&mut self) -> ARPE_W<'_>[src]

Bit 7 - Auto-reload preload enable

pub fn cms(&mut self) -> CMS_W<'_>[src]

Bits 5:6 - Center-aligned mode selection

pub fn dir(&mut self) -> DIR_W<'_>[src]

Bit 4 - Direction

pub fn opm(&mut self) -> OPM_W<'_>[src]

Bit 3 - One-pulse mode

pub fn urs(&mut self) -> URS_W<'_>[src]

Bit 2 - Update request source

pub fn udis(&mut self) -> UDIS_W<'_>[src]

Bit 1 - Update disable

pub fn cen(&mut self) -> CEN_W<'_>[src]

Bit 0 - Counter enable

pub fn uifremap(&mut self) -> UIFREMAP_W<'_>[src]

Bit 11 - UIF status bit remapping

impl W<u32, Reg<u32, _CR2>>[src]

pub fn ti1s(&mut self) -> TI1S_W<'_>[src]

Bit 7 - TI1 selection

pub fn mms(&mut self) -> MMS_W<'_>[src]

Bits 4:6 - Master mode selection

pub fn ccds(&mut self) -> CCDS_W<'_>[src]

Bit 3 - Capture/compare DMA selection

impl W<u32, Reg<u32, _SMCR>>[src]

pub fn etp(&mut self) -> ETP_W<'_>[src]

Bit 15 - External trigger polarity

pub fn ece(&mut self) -> ECE_W<'_>[src]

Bit 14 - External clock enable

pub fn etps(&mut self) -> ETPS_W<'_>[src]

Bits 12:13 - External trigger prescaler

pub fn etf(&mut self) -> ETF_W<'_>[src]

Bits 8:11 - External trigger filter

pub fn msm(&mut self) -> MSM_W<'_>[src]

Bit 7 - Master/Slave mode

pub fn ts(&mut self) -> TS_W<'_>[src]

Bits 4:6 - Trigger selection

pub fn sms(&mut self) -> SMS_W<'_>[src]

Bits 0:2 - Slave mode selection

pub fn sms_bit3(&mut self) -> SMS_BIT3_W<'_>[src]

Bit 16 - Slave mode selection - bit 3

impl W<u32, Reg<u32, _DIER>>[src]

pub fn tde(&mut self) -> TDE_W<'_>[src]

Bit 14 - Trigger DMA request enable

pub fn cc4de(&mut self) -> CC4DE_W<'_>[src]

Bit 12 - Capture/Compare 4 DMA request enable

pub fn cc3de(&mut self) -> CC3DE_W<'_>[src]

Bit 11 - Capture/Compare 3 DMA request enable

pub fn cc2de(&mut self) -> CC2DE_W<'_>[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&mut self) -> CC1DE_W<'_>[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&mut self) -> UDE_W<'_>[src]

Bit 8 - Update DMA request enable

pub fn tie(&mut self) -> TIE_W<'_>[src]

Bit 6 - Trigger interrupt enable

pub fn cc4ie(&mut self) -> CC4IE_W<'_>[src]

Bit 4 - Capture/Compare 4 interrupt enable

pub fn cc3ie(&mut self) -> CC3IE_W<'_>[src]

Bit 3 - Capture/Compare 3 interrupt enable

pub fn cc2ie(&mut self) -> CC2IE_W<'_>[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&mut self) -> CC1IE_W<'_>[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&mut self) -> UIE_W<'_>[src]

Bit 0 - Update interrupt enable

impl W<u32, Reg<u32, _SR>>[src]

pub fn cc4of(&mut self) -> CC4OF_W<'_>[src]

Bit 12 - Capture/Compare 4 overcapture flag

pub fn cc3of(&mut self) -> CC3OF_W<'_>[src]

Bit 11 - Capture/Compare 3 overcapture flag

pub fn cc2of(&mut self) -> CC2OF_W<'_>[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&mut self) -> CC1OF_W<'_>[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&mut self) -> TIF_W<'_>[src]

Bit 6 - Trigger interrupt flag

pub fn cc4if(&mut self) -> CC4IF_W<'_>[src]

Bit 4 - Capture/Compare 4 interrupt flag

pub fn cc3if(&mut self) -> CC3IF_W<'_>[src]

Bit 3 - Capture/Compare 3 interrupt flag

pub fn cc2if(&mut self) -> CC2IF_W<'_>[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&mut self) -> CC1IF_W<'_>[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&mut self) -> UIF_W<'_>[src]

Bit 0 - Update interrupt flag

impl W<u32, Reg<u32, _EGR>>[src]

pub fn tg(&mut self) -> TG_W<'_>[src]

Bit 6 - Trigger generation

pub fn cc4g(&mut self) -> CC4G_W<'_>[src]

Bit 4 - Capture/compare 4 generation

pub fn cc3g(&mut self) -> CC3G_W<'_>[src]

Bit 3 - Capture/compare 3 generation

pub fn cc2g(&mut self) -> CC2G_W<'_>[src]

Bit 2 - Capture/compare 2 generation

pub fn cc1g(&mut self) -> CC1G_W<'_>[src]

Bit 1 - Capture/compare 1 generation

pub fn ug(&mut self) -> UG_W<'_>[src]

Bit 0 - Update generation

impl W<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc2ce(&mut self) -> OC2CE_W<'_>[src]

Bit 15 - Output compare 2 clear enable

pub fn oc2m(&mut self) -> OC2M_W<'_>[src]

Bits 12:14 - Output compare 2 mode

pub fn oc2pe(&mut self) -> OC2PE_W<'_>[src]

Bit 11 - Output compare 2 preload enable

pub fn oc2fe(&mut self) -> OC2FE_W<'_>[src]

Bit 10 - Output compare 2 fast enable

pub fn cc2s(&mut self) -> CC2S_W<'_>[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1ce(&mut self) -> OC1CE_W<'_>[src]

Bit 7 - Output compare 1 clear enable

pub fn oc1m(&mut self) -> OC1M_W<'_>[src]

Bits 4:6 - Output compare 1 mode

pub fn oc1pe(&mut self) -> OC1PE_W<'_>[src]

Bit 3 - Output compare 1 preload enable

pub fn oc1fe(&mut self) -> OC1FE_W<'_>[src]

Bit 2 - Output compare 1 fast enable

pub fn cc1s(&mut self) -> CC1S_W<'_>[src]

Bits 0:1 - Capture/Compare 1 selection

pub fn oc2m_bit3(&mut self) -> OC2M_BIT3_W<'_>[src]

Bit 24 - Output Compare 2 mode - bit 3

pub fn oc1m_bit3(&mut self) -> OC1M_BIT3_W<'_>[src]

Bit 16 - Output Compare 1 mode - bit 3

impl W<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&mut self) -> IC2F_W<'_>[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&mut self) -> IC2PSC_W<'_>[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&mut self) -> CC2S_W<'_>[src]

Bits 8:9 - Capture/compare 2 selection

pub fn ic1f(&mut self) -> IC1F_W<'_>[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&mut self) -> IC1PSC_W<'_>[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&mut self) -> CC1S_W<'_>[src]

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCMR2_OUTPUT>>[src]

pub fn oc4ce(&mut self) -> OC4CE_W<'_>[src]

Bit 15 - Output compare 4 clear enable

pub fn oc4m(&mut self) -> OC4M_W<'_>[src]

Bits 12:14 - Output compare 4 mode

pub fn oc4pe(&mut self) -> OC4PE_W<'_>[src]

Bit 11 - Output compare 4 preload enable

pub fn oc4fe(&mut self) -> OC4FE_W<'_>[src]

Bit 10 - Output compare 4 fast enable

pub fn cc4s(&mut self) -> CC4S_W<'_>[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn oc3ce(&mut self) -> OC3CE_W<'_>[src]

Bit 7 - Output compare 3 clear enable

pub fn oc3m(&mut self) -> OC3M_W<'_>[src]

Bits 4:6 - Output compare 3 mode

pub fn oc3pe(&mut self) -> OC3PE_W<'_>[src]

Bit 3 - Output compare 3 preload enable

pub fn oc3fe(&mut self) -> OC3FE_W<'_>[src]

Bit 2 - Output compare 3 fast enable

pub fn cc3s(&mut self) -> CC3S_W<'_>[src]

Bits 0:1 - Capture/Compare 3 selection

pub fn oc4m_bit3(&mut self) -> OC4M_BIT3_W<'_>[src]

Bit 24 - Output Compare 2 mode - bit 3

pub fn oc3m_bit3(&mut self) -> OC3M_BIT3_W<'_>[src]

Bit 16 - Output Compare 1 mode - bit 3

impl W<u32, Reg<u32, _CCMR2_INPUT>>[src]

pub fn ic4f(&mut self) -> IC4F_W<'_>[src]

Bits 12:15 - Input capture 4 filter

pub fn ic4psc(&mut self) -> IC4PSC_W<'_>[src]

Bits 10:11 - Input capture 4 prescaler

pub fn cc4s(&mut self) -> CC4S_W<'_>[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn ic3f(&mut self) -> IC3F_W<'_>[src]

Bits 4:7 - Input capture 3 filter

pub fn ic3psc(&mut self) -> IC3PSC_W<'_>[src]

Bits 2:3 - Input capture 3 prescaler

pub fn cc3s(&mut self) -> CC3S_W<'_>[src]

Bits 0:1 - Capture/Compare 3 selection

impl W<u32, Reg<u32, _CCER>>[src]

pub fn cc4np(&mut self) -> CC4NP_W<'_>[src]

Bit 15 - Capture/Compare 4 output Polarity

pub fn cc4p(&mut self) -> CC4P_W<'_>[src]

Bit 13 - Capture/Compare 3 output Polarity

pub fn cc4e(&mut self) -> CC4E_W<'_>[src]

Bit 12 - Capture/Compare 4 output enable

pub fn cc3np(&mut self) -> CC3NP_W<'_>[src]

Bit 11 - Capture/Compare 3 output Polarity

pub fn cc3p(&mut self) -> CC3P_W<'_>[src]

Bit 9 - Capture/Compare 3 output Polarity

pub fn cc3e(&mut self) -> CC3E_W<'_>[src]

Bit 8 - Capture/Compare 3 output enable

pub fn cc2np(&mut self) -> CC2NP_W<'_>[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc2p(&mut self) -> CC2P_W<'_>[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2e(&mut self) -> CC2E_W<'_>[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc1np(&mut self) -> CC1NP_W<'_>[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1p(&mut self) -> CC1P_W<'_>[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&mut self) -> CC1E_W<'_>[src]

Bit 0 - Capture/Compare 1 output enable

impl W<u32, Reg<u32, _CNT>>[src]

pub fn cnt_h(&mut self) -> CNT_H_W<'_>[src]

Bits 16:30 - Most significant part counter value (on TIM2 and TIM5)

pub fn cnt_l(&mut self) -> CNT_L_W<'_>[src]

Bits 0:15 - Least significant part of counter value

pub fn cnt_bit31(&mut self) -> CNT_BIT31_W<'_>[src]

Bit 31 - Most significant bit of counter value (on TIM2 and TIM5)

impl W<u32, Reg<u32, _PSC>>[src]

pub fn psc(&mut self) -> PSC_W<'_>[src]

Bits 0:15 - Prescaler value

impl W<u32, Reg<u32, _ARR>>[src]

pub fn arr_h(&mut self) -> ARR_H_W<'_>[src]

Bits 16:31 - High Auto-reload value (TIM2 only)

pub fn arr_l(&mut self) -> ARR_L_W<'_>[src]

Bits 0:15 - Low Auto-reload value

impl W<u32, Reg<u32, _CCR1>>[src]

pub fn ccr1_h(&mut self) -> CCR1_H_W<'_>[src]

Bits 16:31 - High Capture/Compare 1 value (TIM2 only)

pub fn ccr1_l(&mut self) -> CCR1_L_W<'_>[src]

Bits 0:15 - Low Capture/Compare 1 value

impl W<u32, Reg<u32, _CCR2>>[src]

pub fn ccr2_h(&mut self) -> CCR2_H_W<'_>[src]

Bits 16:31 - High Capture/Compare 2 value (TIM2 only)

pub fn ccr2_l(&mut self) -> CCR2_L_W<'_>[src]

Bits 0:15 - Low Capture/Compare 2 value

impl W<u32, Reg<u32, _CCR3>>[src]

pub fn ccr3_h(&mut self) -> CCR3_H_W<'_>[src]

Bits 16:31 - High Capture/Compare value (TIM2 only)

pub fn ccr3_l(&mut self) -> CCR3_L_W<'_>[src]

Bits 0:15 - Low Capture/Compare value

impl W<u32, Reg<u32, _CCR4>>[src]

pub fn ccr4_h(&mut self) -> CCR4_H_W<'_>[src]

Bits 16:31 - High Capture/Compare value (TIM2 only)

pub fn ccr4_l(&mut self) -> CCR4_L_W<'_>[src]

Bits 0:15 - Low Capture/Compare value

impl W<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&mut self) -> DBL_W<'_>[src]

Bits 8:12 - DMA burst length

pub fn dba(&mut self) -> DBA_W<'_>[src]

Bits 0:4 - DMA base address

impl W<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&mut self) -> DMAB_W<'_>[src]

Bits 0:15 - Low Capture/Compare 2 value

impl W<u32, Reg<u32, _OR1>>[src]

pub fn itr1_rmp(&mut self) -> ITR1_RMP_W<'_>[src]

Bit 0 - Internal trigger 1 remap

impl W<u32, Reg<u32, _OR2>>[src]

pub fn etrsel(&mut self) -> ETRSEL_W<'_>[src]

Bits 14:16 - ETR source selection

impl W<u32, Reg<u32, _CR1>>[src]

pub fn ckd(&mut self) -> CKD_W<'_>[src]

Bits 8:9 - Clock division

pub fn arpe(&mut self) -> ARPE_W<'_>[src]

Bit 7 - Auto-reload preload enable

pub fn cms(&mut self) -> CMS_W<'_>[src]

Bits 5:6 - Center-aligned mode selection

pub fn dir(&mut self) -> DIR_W<'_>[src]

Bit 4 - Direction

pub fn opm(&mut self) -> OPM_W<'_>[src]

Bit 3 - One-pulse mode

pub fn urs(&mut self) -> URS_W<'_>[src]

Bit 2 - Update request source

pub fn udis(&mut self) -> UDIS_W<'_>[src]

Bit 1 - Update disable

pub fn cen(&mut self) -> CEN_W<'_>[src]

Bit 0 - Counter enable

pub fn uifremap(&mut self) -> UIFREMAP_W<'_>[src]

Bit 11 - UIF status bit remapping

impl W<u32, Reg<u32, _CR2>>[src]

pub fn ti1s(&mut self) -> TI1S_W<'_>[src]

Bit 7 - TI1 selection

pub fn mms(&mut self) -> MMS_W<'_>[src]

Bits 4:6 - Master mode selection

pub fn ccds(&mut self) -> CCDS_W<'_>[src]

Bit 3 - Capture/compare DMA selection

impl W<u32, Reg<u32, _SMCR>>[src]

pub fn etp(&mut self) -> ETP_W<'_>[src]

Bit 15 - External trigger polarity

pub fn ece(&mut self) -> ECE_W<'_>[src]

Bit 14 - External clock enable

pub fn etps(&mut self) -> ETPS_W<'_>[src]

Bits 12:13 - External trigger prescaler

pub fn etf(&mut self) -> ETF_W<'_>[src]

Bits 8:11 - External trigger filter

pub fn msm(&mut self) -> MSM_W<'_>[src]

Bit 7 - Master/Slave mode

pub fn ts(&mut self) -> TS_W<'_>[src]

Bits 4:6 - Trigger selection

pub fn sms(&mut self) -> SMS_W<'_>[src]

Bits 0:2 - Slave mode selection

pub fn sms_bit3(&mut self) -> SMS_BIT3_W<'_>[src]

Bit 16 - Slave mode selection - bit 3

impl W<u32, Reg<u32, _DIER>>[src]

pub fn tde(&mut self) -> TDE_W<'_>[src]

Bit 14 - Trigger DMA request enable

pub fn cc4de(&mut self) -> CC4DE_W<'_>[src]

Bit 12 - Capture/Compare 4 DMA request enable

pub fn cc3de(&mut self) -> CC3DE_W<'_>[src]

Bit 11 - Capture/Compare 3 DMA request enable

pub fn cc2de(&mut self) -> CC2DE_W<'_>[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&mut self) -> CC1DE_W<'_>[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&mut self) -> UDE_W<'_>[src]

Bit 8 - Update DMA request enable

pub fn tie(&mut self) -> TIE_W<'_>[src]

Bit 6 - Trigger interrupt enable

pub fn cc4ie(&mut self) -> CC4IE_W<'_>[src]

Bit 4 - Capture/Compare 4 interrupt enable

pub fn cc3ie(&mut self) -> CC3IE_W<'_>[src]

Bit 3 - Capture/Compare 3 interrupt enable

pub fn cc2ie(&mut self) -> CC2IE_W<'_>[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&mut self) -> CC1IE_W<'_>[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&mut self) -> UIE_W<'_>[src]

Bit 0 - Update interrupt enable

impl W<u32, Reg<u32, _SR>>[src]

pub fn cc4of(&mut self) -> CC4OF_W<'_>[src]

Bit 12 - Capture/Compare 4 overcapture flag

pub fn cc3of(&mut self) -> CC3OF_W<'_>[src]

Bit 11 - Capture/Compare 3 overcapture flag

pub fn cc2of(&mut self) -> CC2OF_W<'_>[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&mut self) -> CC1OF_W<'_>[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&mut self) -> TIF_W<'_>[src]

Bit 6 - Trigger interrupt flag

pub fn cc4if(&mut self) -> CC4IF_W<'_>[src]

Bit 4 - Capture/Compare 4 interrupt flag

pub fn cc3if(&mut self) -> CC3IF_W<'_>[src]

Bit 3 - Capture/Compare 3 interrupt flag

pub fn cc2if(&mut self) -> CC2IF_W<'_>[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&mut self) -> CC1IF_W<'_>[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&mut self) -> UIF_W<'_>[src]

Bit 0 - Update interrupt flag

impl W<u32, Reg<u32, _EGR>>[src]

pub fn tg(&mut self) -> TG_W<'_>[src]

Bit 6 - Trigger generation

pub fn cc4g(&mut self) -> CC4G_W<'_>[src]

Bit 4 - Capture/compare 4 generation

pub fn cc3g(&mut self) -> CC3G_W<'_>[src]

Bit 3 - Capture/compare 3 generation

pub fn cc2g(&mut self) -> CC2G_W<'_>[src]

Bit 2 - Capture/compare 2 generation

pub fn cc1g(&mut self) -> CC1G_W<'_>[src]

Bit 1 - Capture/compare 1 generation

pub fn ug(&mut self) -> UG_W<'_>[src]

Bit 0 - Update generation

impl W<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc2ce(&mut self) -> OC2CE_W<'_>[src]

Bit 15 - Output compare 2 clear enable

pub fn oc2m(&mut self) -> OC2M_W<'_>[src]

Bits 12:14 - Output compare 2 mode

pub fn oc2pe(&mut self) -> OC2PE_W<'_>[src]

Bit 11 - Output compare 2 preload enable

pub fn oc2fe(&mut self) -> OC2FE_W<'_>[src]

Bit 10 - Output compare 2 fast enable

pub fn cc2s(&mut self) -> CC2S_W<'_>[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1ce(&mut self) -> OC1CE_W<'_>[src]

Bit 7 - Output compare 1 clear enable

pub fn oc1m(&mut self) -> OC1M_W<'_>[src]

Bits 4:6 - Output compare 1 mode

pub fn oc1pe(&mut self) -> OC1PE_W<'_>[src]

Bit 3 - Output compare 1 preload enable

pub fn oc1fe(&mut self) -> OC1FE_W<'_>[src]

Bit 2 - Output compare 1 fast enable

pub fn cc1s(&mut self) -> CC1S_W<'_>[src]

Bits 0:1 - Capture/Compare 1 selection

pub fn oc2m_bit3(&mut self) -> OC2M_BIT3_W<'_>[src]

Bit 24 - Output Compare 2 mode - bit 3

pub fn oc1m_bit3(&mut self) -> OC1M_BIT3_W<'_>[src]

Bit 16 - Output Compare 1 mode - bit 3

impl W<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&mut self) -> IC2F_W<'_>[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&mut self) -> IC2PSC_W<'_>[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&mut self) -> CC2S_W<'_>[src]

Bits 8:9 - Capture/compare 2 selection

pub fn ic1f(&mut self) -> IC1F_W<'_>[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&mut self) -> IC1PSC_W<'_>[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&mut self) -> CC1S_W<'_>[src]

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCMR2_OUTPUT>>[src]

pub fn oc4ce(&mut self) -> OC4CE_W<'_>[src]

Bit 15 - Output compare 4 clear enable

pub fn oc4m(&mut self) -> OC4M_W<'_>[src]

Bits 12:14 - Output compare 4 mode

pub fn oc4pe(&mut self) -> OC4PE_W<'_>[src]

Bit 11 - Output compare 4 preload enable

pub fn oc4fe(&mut self) -> OC4FE_W<'_>[src]

Bit 10 - Output compare 4 fast enable

pub fn cc4s(&mut self) -> CC4S_W<'_>[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn oc3ce(&mut self) -> OC3CE_W<'_>[src]

Bit 7 - Output compare 3 clear enable

pub fn oc3m(&mut self) -> OC3M_W<'_>[src]

Bits 4:6 - Output compare 3 mode

pub fn oc3pe(&mut self) -> OC3PE_W<'_>[src]

Bit 3 - Output compare 3 preload enable

pub fn oc3fe(&mut self) -> OC3FE_W<'_>[src]

Bit 2 - Output compare 3 fast enable

pub fn cc3s(&mut self) -> CC3S_W<'_>[src]

Bits 0:1 - Capture/Compare 3 selection

pub fn oc4m_bit3(&mut self) -> OC4M_BIT3_W<'_>[src]

Bit 24 - Output Compare 2 mode - bit 3

pub fn oc3m_bit3(&mut self) -> OC3M_BIT3_W<'_>[src]

Bit 16 - Output Compare 1 mode - bit 3

impl W<u32, Reg<u32, _CCMR2_INPUT>>[src]

pub fn ic4f(&mut self) -> IC4F_W<'_>[src]

Bits 12:15 - Input capture 4 filter

pub fn ic4psc(&mut self) -> IC4PSC_W<'_>[src]

Bits 10:11 - Input capture 4 prescaler

pub fn cc4s(&mut self) -> CC4S_W<'_>[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn ic3f(&mut self) -> IC3F_W<'_>[src]

Bits 4:7 - Input capture 3 filter

pub fn ic3psc(&mut self) -> IC3PSC_W<'_>[src]

Bits 2:3 - Input capture 3 prescaler

pub fn cc3s(&mut self) -> CC3S_W<'_>[src]

Bits 0:1 - Capture/Compare 3 selection

impl W<u32, Reg<u32, _CCER>>[src]

pub fn cc4np(&mut self) -> CC4NP_W<'_>[src]

Bit 15 - Capture/Compare 4 output Polarity

pub fn cc4p(&mut self) -> CC4P_W<'_>[src]

Bit 13 - Capture/Compare 3 output Polarity

pub fn cc4e(&mut self) -> CC4E_W<'_>[src]

Bit 12 - Capture/Compare 4 output enable

pub fn cc3np(&mut self) -> CC3NP_W<'_>[src]

Bit 11 - Capture/Compare 3 output Polarity

pub fn cc3p(&mut self) -> CC3P_W<'_>[src]

Bit 9 - Capture/Compare 3 output Polarity

pub fn cc3e(&mut self) -> CC3E_W<'_>[src]

Bit 8 - Capture/Compare 3 output enable

pub fn cc2np(&mut self) -> CC2NP_W<'_>[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc2p(&mut self) -> CC2P_W<'_>[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2e(&mut self) -> CC2E_W<'_>[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc1np(&mut self) -> CC1NP_W<'_>[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1p(&mut self) -> CC1P_W<'_>[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&mut self) -> CC1E_W<'_>[src]

Bit 0 - Capture/Compare 1 output enable

impl W<u32, Reg<u32, _CNT>>[src]

pub fn cnt_h(&mut self) -> CNT_H_W<'_>[src]

Bits 16:30 - Most significant part counter value (on TIM2 and TIM5)

pub fn cnt_l(&mut self) -> CNT_L_W<'_>[src]

Bits 0:15 - Least significant part of counter value

pub fn cnt_bit31(&mut self) -> CNT_BIT31_W<'_>[src]

Bit 31 - Most significant bit of counter value (on TIM2 and TIM5)

impl W<u32, Reg<u32, _PSC>>[src]

pub fn psc(&mut self) -> PSC_W<'_>[src]

Bits 0:15 - Prescaler value

impl W<u32, Reg<u32, _ARR>>[src]

pub fn arr_h(&mut self) -> ARR_H_W<'_>[src]

Bits 16:31 - High Auto-reload value (TIM2 only)

pub fn arr_l(&mut self) -> ARR_L_W<'_>[src]

Bits 0:15 - Low Auto-reload value

impl W<u32, Reg<u32, _CCR1>>[src]

pub fn ccr1_h(&mut self) -> CCR1_H_W<'_>[src]

Bits 16:31 - High Capture/Compare 1 value (TIM2 only)

pub fn ccr1_l(&mut self) -> CCR1_L_W<'_>[src]

Bits 0:15 - Low Capture/Compare 1 value

impl W<u32, Reg<u32, _CCR2>>[src]

pub fn ccr2_h(&mut self) -> CCR2_H_W<'_>[src]

Bits 16:31 - High Capture/Compare 2 value (TIM2 only)

pub fn ccr2_l(&mut self) -> CCR2_L_W<'_>[src]

Bits 0:15 - Low Capture/Compare 2 value

impl W<u32, Reg<u32, _CCR3>>[src]

pub fn ccr3_h(&mut self) -> CCR3_H_W<'_>[src]

Bits 16:31 - High Capture/Compare value (TIM2 only)

pub fn ccr3_l(&mut self) -> CCR3_L_W<'_>[src]

Bits 0:15 - Low Capture/Compare value

impl W<u32, Reg<u32, _CCR4>>[src]

pub fn ccr4_h(&mut self) -> CCR4_H_W<'_>[src]

Bits 16:31 - High Capture/Compare value (TIM2 only)

pub fn ccr4_l(&mut self) -> CCR4_L_W<'_>[src]

Bits 0:15 - Low Capture/Compare value

impl W<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&mut self) -> DBL_W<'_>[src]

Bits 8:12 - DMA burst length

pub fn dba(&mut self) -> DBA_W<'_>[src]

Bits 0:4 - DMA base address

impl W<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&mut self) -> DMAB_W<'_>[src]

Bits 0:15 - Low Capture/Compare 2 value

impl W<u32, Reg<u32, _CR1>>[src]

pub fn arpe(&mut self) -> ARPE_W<'_>[src]

Bit 7 - Auto-reload preload enable

pub fn opm(&mut self) -> OPM_W<'_>[src]

Bit 3 - One-pulse mode

pub fn urs(&mut self) -> URS_W<'_>[src]

Bit 2 - Update request source

pub fn udis(&mut self) -> UDIS_W<'_>[src]

Bit 1 - Update disable

pub fn cen(&mut self) -> CEN_W<'_>[src]

Bit 0 - Counter enable

pub fn uifrema(&mut self) -> UIFREMA_W<'_>[src]

Bit 11 - UIF status bit remapping

impl W<u32, Reg<u32, _CR2>>[src]

pub fn mms(&mut self) -> MMS_W<'_>[src]

Bits 4:6 - Master mode selection

impl W<u32, Reg<u32, _DIER>>[src]

pub fn ude(&mut self) -> UDE_W<'_>[src]

Bit 8 - Update DMA request enable

pub fn uie(&mut self) -> UIE_W<'_>[src]

Bit 0 - Update interrupt enable

impl W<u32, Reg<u32, _SR>>[src]

pub fn uif(&mut self) -> UIF_W<'_>[src]

Bit 0 - Update interrupt flag

impl W<u32, Reg<u32, _EGR>>[src]

pub fn ug(&mut self) -> UG_W<'_>[src]

Bit 0 - Update generation

impl W<u32, Reg<u32, _CNT>>[src]

pub fn cnt_bit0(&mut self) -> CNT_BIT0_W<'_>[src]

Bits 0:15 - CNT

pub fn uifcpy(&mut self) -> UIFCPY_W<'_>[src]

Bit 31 - UIFCPY or Res

impl W<u32, Reg<u32, _PSC>>[src]

pub fn psc(&mut self) -> PSC_W<'_>[src]

Bits 0:15 - Prescaler value

impl W<u32, Reg<u32, _ARR>>[src]

pub fn arr_bit0(&mut self) -> ARR_BIT0_W<'_>[src]

Bits 0:15 - ARR_bit0

impl W<u32, Reg<u32, _CR1>>[src]

pub fn arpe(&mut self) -> ARPE_W<'_>[src]

Bit 7 - Auto-reload preload enable

pub fn opm(&mut self) -> OPM_W<'_>[src]

Bit 3 - One-pulse mode

pub fn urs(&mut self) -> URS_W<'_>[src]

Bit 2 - Update request source

pub fn udis(&mut self) -> UDIS_W<'_>[src]

Bit 1 - Update disable

pub fn cen(&mut self) -> CEN_W<'_>[src]

Bit 0 - Counter enable

pub fn uifrema(&mut self) -> UIFREMA_W<'_>[src]

Bit 11 - UIF status bit remapping

impl W<u32, Reg<u32, _CR2>>[src]

pub fn mms(&mut self) -> MMS_W<'_>[src]

Bits 4:6 - Master mode selection

impl W<u32, Reg<u32, _DIER>>[src]

pub fn ude(&mut self) -> UDE_W<'_>[src]

Bit 8 - Update DMA request enable

pub fn uie(&mut self) -> UIE_W<'_>[src]

Bit 0 - Update interrupt enable

impl W<u32, Reg<u32, _SR>>[src]

pub fn uif(&mut self) -> UIF_W<'_>[src]

Bit 0 - Update interrupt flag

impl W<u32, Reg<u32, _EGR>>[src]

pub fn ug(&mut self) -> UG_W<'_>[src]

Bit 0 - Update generation

impl W<u32, Reg<u32, _CNT>>[src]

pub fn cnt_bit0(&mut self) -> CNT_BIT0_W<'_>[src]

Bits 0:15 - CNT

pub fn uifcpy(&mut self) -> UIFCPY_W<'_>[src]

Bit 31 - UIFCPY or Res

impl W<u32, Reg<u32, _PSC>>[src]

pub fn psc(&mut self) -> PSC_W<'_>[src]

Bits 0:15 - Prescaler value

impl W<u32, Reg<u32, _ARR>>[src]

pub fn arr_bit0(&mut self) -> ARR_BIT0_W<'_>[src]

Bits 0:15 - ARR_bit0

impl W<u32, Reg<u32, _DAC_CR>>[src]

pub fn en1(&mut self) -> EN1_W<'_>[src]

Bit 0 - DAC channel1 enable This bit is set and cleared by software to enable/disable DAC channel1.

pub fn ten1(&mut self) -> TEN1_W<'_>[src]

Bit 1 - DAC channel1 trigger enable

pub fn tsel10(&mut self) -> TSEL10_W<'_>[src]

Bit 2 - TSEL10

pub fn tsel11(&mut self) -> TSEL11_W<'_>[src]

Bit 3 - TSEL11

pub fn tsel12(&mut self) -> TSEL12_W<'_>[src]

Bit 4 - TSEL12

pub fn tsel13(&mut self) -> TSEL13_W<'_>[src]

Bit 5 - TSEL13

pub fn wave1(&mut self) -> WAVE1_W<'_>[src]

Bits 6:7 - DAC channel1 noise/triangle wave generation enable These bits are set and cleared by software. Note: Only used if bit TEN1 = 1 (DAC channel1 trigger enabled).

pub fn mamp1(&mut self) -> MAMP1_W<'_>[src]

Bits 8:11 - DAC channel1 mask/amplitude selector These bits are written by software to select mask in wave generation mode or amplitude in triangle generation mode. = 1011: Unmask bits[11:0] of LFSR/ triangle amplitude equal to 4095

pub fn dmaen1(&mut self) -> DMAEN1_W<'_>[src]

Bit 12 - DAC channel1 DMA enable This bit is set and cleared by software.

pub fn dmaudrie1(&mut self) -> DMAUDRIE1_W<'_>[src]

Bit 13 - DAC channel1 DMA Underrun Interrupt enable This bit is set and cleared by software.

pub fn cen1(&mut self) -> CEN1_W<'_>[src]

Bit 14 - DAC Channel 1 calibration enable This bit is set and cleared by software to enable/disable DAC channel 1 calibration, it can be written only if bit EN1=0 into DAC_CR (the calibration mode can be entered/exit only when the DAC channel is disabled) Otherwise, the write operation is ignored.

pub fn hfsel(&mut self) -> HFSEL_W<'_>[src]

Bit 15 - HFSEL

pub fn en2(&mut self) -> EN2_W<'_>[src]

Bit 16 - DAC channel2 enable This bit is set and cleared by software to enable/disable DAC channel2.

pub fn ten2(&mut self) -> TEN2_W<'_>[src]

Bit 17 - DAC channel2 trigger enable

pub fn tsel20(&mut self) -> TSEL20_W<'_>[src]

Bit 18 - TSEL20

pub fn tsel21(&mut self) -> TSEL21_W<'_>[src]

Bit 19 - TSEL21

pub fn tsel22(&mut self) -> TSEL22_W<'_>[src]

Bit 20 - TSEL22

pub fn tsel23(&mut self) -> TSEL23_W<'_>[src]

Bit 21 - TSEL23

pub fn wave2(&mut self) -> WAVE2_W<'_>[src]

Bits 22:23 - DAC channel2 noise/triangle wave generation enable These bits are set/reset by software. 1x: Triangle wave generation enabled Note: Only used if bit TEN2 = 1 (DAC channel2 trigger enabled)

pub fn mamp2(&mut self) -> MAMP2_W<'_>[src]

Bits 24:27 - DAC channel2 mask/amplitude selector These bits are written by software to select mask in wave generation mode or amplitude in triangle generation mode. = 1011: Unmask bits[11:0] of LFSR/ triangle amplitude equal to 4095

pub fn dmaen2(&mut self) -> DMAEN2_W<'_>[src]

Bit 28 - DAC channel2 DMA enable This bit is set and cleared by software.

pub fn dmaudrie2(&mut self) -> DMAUDRIE2_W<'_>[src]

Bit 29 - DAC channel2 DMA underrun interrupt enable This bit is set and cleared by software.

pub fn cen2(&mut self) -> CEN2_W<'_>[src]

Bit 30 - DAC Channel 2 calibration enable This bit is set and cleared by software to enable/disable DAC channel 2 calibration, it can be written only if bit EN2=0 into DAC_CR (the calibration mode can be entered/exit only when the DAC channel is disabled) Otherwise, the write operation is ignored.

impl W<u32, Reg<u32, _DAC_SWTRGR>>[src]

pub fn swtrig1(&mut self) -> SWTRIG1_W<'_>[src]

Bit 0 - DAC channel1 software trigger This bit is set by software to trigger the DAC in software trigger mode. Note: This bit is cleared by hardware (one APB1 clock cycle later) once the DAC_DHR1 register value has been loaded into the DAC_DOR1 register.

pub fn swtrig2(&mut self) -> SWTRIG2_W<'_>[src]

Bit 1 - DAC channel2 software trigger This bit is set by software to trigger the DAC in software trigger mode. Note: This bit is cleared by hardware (one APB1 clock cycle later) once the DAC_DHR2 register value has been loaded into the DAC_DOR2 register.

impl W<u32, Reg<u32, _DAC_DHR12R1>>[src]

pub fn dacc1dhr(&mut self) -> DACC1DHR_W<'_>[src]

Bits 0:11 - DAC channel1 12-bit right-aligned data These bits are written by software which specifies 12-bit data for DAC channel1.

impl W<u32, Reg<u32, _DAC_DHR12L1>>[src]

pub fn dacc1dhr(&mut self) -> DACC1DHR_W<'_>[src]

Bits 4:15 - DAC channel1 12-bit left-aligned data These bits are written by software which specifies 12-bit data for DAC channel1.

impl W<u32, Reg<u32, _DAC_DHR8R1>>[src]

pub fn dacc1dhr(&mut self) -> DACC1DHR_W<'_>[src]

Bits 0:7 - DAC channel1 8-bit right-aligned data These bits are written by software which specifies 8-bit data for DAC channel1.

impl W<u32, Reg<u32, _DAC_DHR12R2>>[src]

pub fn dacc2dhr(&mut self) -> DACC2DHR_W<'_>[src]

Bits 0:11 - DAC channel2 12-bit right-aligned data These bits are written by software which specifies 12-bit data for DAC channel2.

impl W<u32, Reg<u32, _DAC_DHR12L2>>[src]

pub fn dacc2dhr(&mut self) -> DACC2DHR_W<'_>[src]

Bits 4:15 - DAC channel2 12-bit left-aligned data These bits are written by software which specify 12-bit data for DAC channel2.

impl W<u32, Reg<u32, _DAC_DHR8R2>>[src]

pub fn dacc2dhr(&mut self) -> DACC2DHR_W<'_>[src]

Bits 0:7 - DAC channel2 8-bit right-aligned data These bits are written by software which specifies 8-bit data for DAC channel2.

impl W<u32, Reg<u32, _DAC_DHR12RD>>[src]

pub fn dacc1dhr(&mut self) -> DACC1DHR_W<'_>[src]

Bits 0:11 - DAC channel1 12-bit right-aligned data These bits are written by software which specifies 12-bit data for DAC channel1.

pub fn dacc2dhr(&mut self) -> DACC2DHR_W<'_>[src]

Bits 16:27 - DAC channel2 12-bit right-aligned data These bits are written by software which specifies 12-bit data for DAC channel2.

impl W<u32, Reg<u32, _DAC_DHR12LD>>[src]

pub fn dacc1dhr(&mut self) -> DACC1DHR_W<'_>[src]

Bits 4:15 - DAC channel1 12-bit left-aligned data These bits are written by software which specifies 12-bit data for DAC channel1.

pub fn dacc2dhr(&mut self) -> DACC2DHR_W<'_>[src]

Bits 20:31 - DAC channel2 12-bit left-aligned data These bits are written by software which specifies 12-bit data for DAC channel2.

impl W<u32, Reg<u32, _DAC_DHR8RD>>[src]

pub fn dacc1dhr(&mut self) -> DACC1DHR_W<'_>[src]

Bits 0:7 - DAC channel1 8-bit right-aligned data These bits are written by software which specifies 8-bit data for DAC channel1.

pub fn dacc2dhr(&mut self) -> DACC2DHR_W<'_>[src]

Bits 8:15 - DAC channel2 8-bit right-aligned data These bits are written by software which specifies 8-bit data for DAC channel2.

impl W<u32, Reg<u32, _DAC_SR>>[src]

pub fn dmaudr1(&mut self) -> DMAUDR1_W<'_>[src]

Bit 13 - DAC channel1 DMA underrun flag This bit is set by hardware and cleared by software (by writing it to 1).

pub fn dmaudr2(&mut self) -> DMAUDR2_W<'_>[src]

Bit 29 - DAC channel2 DMA underrun flag This bit is set by hardware and cleared by software (by writing it to 1).

impl W<u32, Reg<u32, _DAC_CCR>>[src]

pub fn otrim1(&mut self) -> OTRIM1_W<'_>[src]

Bits 0:4 - DAC Channel 1 offset trimming value

pub fn otrim2(&mut self) -> OTRIM2_W<'_>[src]

Bits 16:20 - DAC Channel 2 offset trimming value

impl W<u32, Reg<u32, _DAC_MCR>>[src]

pub fn mode1(&mut self) -> MODE1_W<'_>[src]

Bits 0:2 - DAC Channel 1 mode These bits can be written only when the DAC is disabled and not in the calibration mode (when bit EN1=0 and bit CEN1 =0 in the DAC_CR register). If EN1=1 or CEN1 =1 the write operation is ignored. They can be set and cleared by software to select the DAC Channel 1 mode: DAC Channel 1 in normal Mode DAC Channel 1 in sample & hold mode

pub fn mode2(&mut self) -> MODE2_W<'_>[src]

Bits 16:18 - DAC Channel 2 mode These bits can be written only when the DAC is disabled and not in the calibration mode (when bit EN2=0 and bit CEN2 =0 in the DAC_CR register). If EN2=1 or CEN2 =1 the write operation is ignored. They can be set and cleared by software to select the DAC Channel 2 mode: DAC Channel 2 in normal Mode DAC Channel 2 in sample & hold mode

impl W<u32, Reg<u32, _DAC_SHSR1>>[src]

pub fn tsample1(&mut self) -> TSAMPLE1_W<'_>[src]

Bits 0:9 - DAC Channel 1 sample Time (only valid in sample & hold mode) These bits can be written when the DAC channel1 is disabled or also during normal operation. in the latter case, the write can be done only when BWSTx of DAC_SR register is low, If BWSTx=1, the write operation is ignored.

impl W<u32, Reg<u32, _DAC_SHSR2>>[src]

pub fn tsample2(&mut self) -> TSAMPLE2_W<'_>[src]

Bits 0:9 - DAC Channel 2 sample Time (only valid in sample & hold mode) These bits can be written when the DAC channel2 is disabled or also during normal operation. in the latter case, the write can be done only when BWSTx of DAC_SR register is low, if BWSTx=1, the write operation is ignored.

impl W<u32, Reg<u32, _DAC_SHHR>>[src]

pub fn thold1(&mut self) -> THOLD1_W<'_>[src]

Bits 0:9 - DAC Channel 1 hold Time (only valid in sample & hold mode) Hold time= (THOLD[9:0]) x T LSI

pub fn thold2(&mut self) -> THOLD2_W<'_>[src]

Bits 16:25 - DAC Channel 2 hold time (only valid in sample & hold mode). Hold time= (THOLD[9:0]) x T LSI

impl W<u32, Reg<u32, _DAC_SHRR>>[src]

pub fn trefresh1(&mut self) -> TREFRESH1_W<'_>[src]

Bits 0:7 - DAC Channel 1 refresh Time (only valid in sample & hold mode) Refresh time= (TREFRESH[7:0]) x T LSI

pub fn trefresh2(&mut self) -> TREFRESH2_W<'_>[src]

Bits 16:23 - DAC Channel 2 refresh Time (only valid in sample & hold mode) Refresh time= (TREFRESH[7:0]) x T LSI

impl W<u32, Reg<u32, _OPAMP1_CSR>>[src]

pub fn opaen(&mut self) -> OPAEN_W<'_>[src]

Bit 0 - Operational amplifier Enable

pub fn opalpm(&mut self) -> OPALPM_W<'_>[src]

Bit 1 - Operational amplifier Low Power Mode

pub fn opamode(&mut self) -> OPAMODE_W<'_>[src]

Bits 2:3 - Operational amplifier PGA mode

pub fn pga_gain(&mut self) -> PGA_GAIN_W<'_>[src]

Bits 4:5 - Operational amplifier Programmable amplifier gain value

pub fn vm_sel(&mut self) -> VM_SEL_W<'_>[src]

Bits 8:9 - inverting input selection

pub fn vp_sel(&mut self) -> VP_SEL_W<'_>[src]

Bit 10 - non inverted input selection

pub fn calon(&mut self) -> CALON_W<'_>[src]

Bit 12 - calibration mode enable

pub fn calsel(&mut self) -> CALSEL_W<'_>[src]

Bit 13 - calibration selection

pub fn usertrim(&mut self) -> USERTRIM_W<'_>[src]

Bit 14 - User trimming enable

pub fn calout(&mut self) -> CALOUT_W<'_>[src]

Bit 15 - Operational amplifier calibration output

pub fn opa_range(&mut self) -> OPA_RANGE_W<'_>[src]

Bit 31 - Operational amplifier power supply range for stability

impl W<u32, Reg<u32, _OPAMP1_OTR>>[src]

pub fn trimoffsetn(&mut self) -> TRIMOFFSETN_W<'_>[src]

Bits 0:4 - Trim for NMOS differential pairs

pub fn trimoffsetp(&mut self) -> TRIMOFFSETP_W<'_>[src]

Bits 8:12 - Trim for PMOS differential pairs

impl W<u32, Reg<u32, _OPAMP1_LPOTR>>[src]

pub fn trimlpoffsetn(&mut self) -> TRIMLPOFFSETN_W<'_>[src]

Bits 0:4 - Trim for NMOS differential pairs

pub fn trimlpoffsetp(&mut self) -> TRIMLPOFFSETP_W<'_>[src]

Bits 8:12 - Trim for PMOS differential pairs

impl W<u32, Reg<u32, _OPAMP2_CRS>>[src]

pub fn opaen(&mut self) -> OPAEN_W<'_>[src]

Bit 0 - Operational amplifier Enable

pub fn opalpm(&mut self) -> OPALPM_W<'_>[src]

Bit 1 - Operational amplifier Low Power Mode

pub fn opamode(&mut self) -> OPAMODE_W<'_>[src]

Bits 2:3 - Operational amplifier PGA mode

pub fn pga_gain(&mut self) -> PGA_GAIN_W<'_>[src]

Bits 4:5 - Operational amplifier Programmable amplifier gain value

pub fn vm_sel(&mut self) -> VM_SEL_W<'_>[src]

Bits 8:9 - inverting input selection

pub fn vp_sel(&mut self) -> VP_SEL_W<'_>[src]

Bit 10 - non inverted input selection

pub fn calon(&mut self) -> CALON_W<'_>[src]

Bit 12 - calibration mode enable

pub fn calsel(&mut self) -> CALSEL_W<'_>[src]

Bit 13 - calibration selection

pub fn usertrim(&mut self) -> USERTRIM_W<'_>[src]

Bit 14 - User trimming enable

pub fn calout(&mut self) -> CALOUT_W<'_>[src]

Bit 15 - Operational amplifier calibration output

impl W<u32, Reg<u32, _OPAMP2_OTR>>[src]

pub fn trimoffsetn(&mut self) -> TRIMOFFSETN_W<'_>[src]

Bits 0:4 - Trim for NMOS differential pairs

pub fn trimoffsetp(&mut self) -> TRIMOFFSETP_W<'_>[src]

Bits 8:12 - Trim for PMOS differential pairs

impl W<u32, Reg<u32, _OPAMP2_LPOTR>>[src]

pub fn trimlpoffsetn(&mut self) -> TRIMLPOFFSETN_W<'_>[src]

Bits 0:4 - Trim for NMOS differential pairs

pub fn trimlpoffsetp(&mut self) -> TRIMLPOFFSETP_W<'_>[src]

Bits 8:12 - Trim for PMOS differential pairs

impl W<u32, Reg<u32, _CR>>[src]

pub fn npblb(&mut self) -> NPBLB_W<'_>[src]

Bits 20:23 - Number of padding bytes in last block of payload

pub fn keysize(&mut self) -> KEYSIZE_W<'_>[src]

Bit 18 - Key size selection

pub fn chmod2(&mut self) -> CHMOD2_W<'_>[src]

Bit 16 - AES chaining mode Bit2

pub fn gcmph(&mut self) -> GCMPH_W<'_>[src]

Bits 13:14 - Used only for GCM, CCM and GMAC algorithms and has no effect when other algorithms are selected

pub fn dmaouten(&mut self) -> DMAOUTEN_W<'_>[src]

Bit 12 - Enable DMA management of data output phase

pub fn dmainen(&mut self) -> DMAINEN_W<'_>[src]

Bit 11 - Enable DMA management of data input phase

pub fn errie(&mut self) -> ERRIE_W<'_>[src]

Bit 10 - Error interrupt enable

pub fn ccfie(&mut self) -> CCFIE_W<'_>[src]

Bit 9 - CCF flag interrupt enable

pub fn errc(&mut self) -> ERRC_W<'_>[src]

Bit 8 - Error clear

pub fn ccfc(&mut self) -> CCFC_W<'_>[src]

Bit 7 - Computation Complete Flag Clear

pub fn chmod(&mut self) -> CHMOD_W<'_>[src]

Bits 5:6 - AES chaining mode selection Bit1 Bit0

pub fn mode(&mut self) -> MODE_W<'_>[src]

Bits 3:4 - AES operating mode

pub fn datatype(&mut self) -> DATATYPE_W<'_>[src]

Bits 1:2 - Data type selection (for data in and data out to/from the cryptographic block)

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - AES enable

impl W<u32, Reg<u32, _DINR>>[src]

pub fn din(&mut self) -> DIN_W<'_>[src]

Bits 0:31 - Data Input Register

impl W<u32, Reg<u32, _KEYR0>>[src]

pub fn key(&mut self) -> KEY_W<'_>[src]

Bits 0:31 - Cryptographic key, bits[31:0]

impl W<u32, Reg<u32, _KEYR1>>[src]

pub fn key(&mut self) -> KEY_W<'_>[src]

Bits 0:31 - Cryptographic key, bits [63:32])

impl W<u32, Reg<u32, _KEYR2>>[src]

pub fn key(&mut self) -> KEY_W<'_>[src]

Bits 0:31 - Cryptographic key, bits [95:64])

impl W<u32, Reg<u32, _KEYR3>>[src]

pub fn key(&mut self) -> KEY_W<'_>[src]

Bits 0:31 - Cryptographic key, bits [127:96])

impl W<u32, Reg<u32, _IVR0>>[src]

pub fn ivi(&mut self) -> IVI_W<'_>[src]

Bits 0:31 - initialization vector register (LSB IVR [31:0])

impl W<u32, Reg<u32, _IVR1>>[src]

pub fn ivi(&mut self) -> IVI_W<'_>[src]

Bits 0:31 - Initialization Vector Register (IVR [63:32])

impl W<u32, Reg<u32, _IVR2>>[src]

pub fn ivi(&mut self) -> IVI_W<'_>[src]

Bits 0:31 - Initialization Vector Register (IVR [95:64])

impl W<u32, Reg<u32, _IVR3>>[src]

pub fn ivi(&mut self) -> IVI_W<'_>[src]

Bits 0:31 - Initialization Vector Register (MSB IVR [127:96])

impl W<u32, Reg<u32, _KEYR4>>[src]

pub fn key(&mut self) -> KEY_W<'_>[src]

Bits 0:31 - Cryptographic key, bits [159:128])

impl W<u32, Reg<u32, _KEYR5>>[src]

pub fn key(&mut self) -> KEY_W<'_>[src]

Bits 0:31 - Cryptographic key, bits [191:160])

impl W<u32, Reg<u32, _KEYR6>>[src]

pub fn key(&mut self) -> KEY_W<'_>[src]

Bits 0:31 - Cryptographic key, bits [223:192])

impl W<u32, Reg<u32, _KEYR7>>[src]

pub fn key(&mut self) -> KEY_W<'_>[src]

Bits 0:31 - Cryptographic key, bits [255:224])

impl W<u32, Reg<u32, _SUSP0R>>[src]

pub fn aes_susp0r(&mut self) -> AES_SUSP0R_W<'_>[src]

Bits 0:31 - AES suspend register 0

impl W<u32, Reg<u32, _SUSP1R>>[src]

pub fn aes_susp1r(&mut self) -> AES_SUSP1R_W<'_>[src]

Bits 0:31 - AES suspend register 1

impl W<u32, Reg<u32, _SUSP2R>>[src]

pub fn aes_susp2r(&mut self) -> AES_SUSP2R_W<'_>[src]

Bits 0:31 - AES suspend register 2

impl W<u32, Reg<u32, _SUSP3R>>[src]

pub fn aes_susp3r(&mut self) -> AES_SUSP3R_W<'_>[src]

Bits 0:31 - AES suspend register 3

impl W<u32, Reg<u32, _SUSP4R>>[src]

pub fn aes_susp4r(&mut self) -> AES_SUSP4R_W<'_>[src]

Bits 0:31 - AES suspend register 4

impl W<u32, Reg<u32, _SUSP5R>>[src]

pub fn aes_susp5r(&mut self) -> AES_SUSP5R_W<'_>[src]

Bits 0:31 - AES suspend register 5

impl W<u32, Reg<u32, _SUSP6R>>[src]

pub fn aes_susp6r(&mut self) -> AES_SUSP6R_W<'_>[src]

Bits 0:31 - AES suspend register 6

impl W<u32, Reg<u32, _SUSP7R>>[src]

pub fn aes_susp7r(&mut self) -> AES_SUSP7R_W<'_>[src]

Bits 0:31 - AES suspend register 7

impl W<u32, Reg<u32, _PKA_CR>>[src]

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - PKA Enable

pub fn start(&mut self) -> START_W<'_>[src]

Bit 1 - Start the operation

pub fn mode(&mut self) -> MODE_W<'_>[src]

Bits 8:13 - PKA operation code

pub fn procendie(&mut self) -> PROCENDIE_W<'_>[src]

Bit 17 - End of operation interrupt enable

pub fn ramerrie(&mut self) -> RAMERRIE_W<'_>[src]

Bit 19 - RAM error interrupt enable

pub fn addrerrie(&mut self) -> ADDRERRIE_W<'_>[src]

Bit 20 - Address error interrupt enable

impl W<u32, Reg<u32, _PKA_CLRFR>>[src]

pub fn procendfc(&mut self) -> PROCENDFC_W<'_>[src]

Bit 17 - clear PKA end of operation flag

pub fn ramerrfc(&mut self) -> RAMERRFC_W<'_>[src]

Bit 19 - CLEAR PKA RAM ERROR FLAG

pub fn addrerrfc(&mut self) -> ADDRERRFC_W<'_>[src]

Bit 20 - clear address error flag

impl W<u32, Reg<u32, _CR>>[src]

pub fn enc(&mut self) -> ENC_W<'_>[src]

Bit 0 - Encryption mode bit

impl W<u32, Reg<u32, _R1CFGR>>[src]

pub fn reg_en(&mut self) -> REG_EN_W<'_>[src]

Bit 0 - region on-the-fly decryption enable

pub fn configlock(&mut self) -> CONFIGLOCK_W<'_>[src]

Bit 1 - region config lock

pub fn keylock(&mut self) -> KEYLOCK_W<'_>[src]

Bit 2 - region key lock

pub fn mode(&mut self) -> MODE_W<'_>[src]

Bits 4:5 - operating mode

pub fn regx_version(&mut self) -> REGX_VERSION_W<'_>[src]

Bits 16:31 - region firmware version

impl W<u32, Reg<u32, _R2CFGR>>[src]

pub fn reg_en(&mut self) -> REG_EN_W<'_>[src]

Bit 0 - region on-the-fly decryption enable

pub fn configlock(&mut self) -> CONFIGLOCK_W<'_>[src]

Bit 1 - region config lock

pub fn keylock(&mut self) -> KEYLOCK_W<'_>[src]

Bit 2 - region key lock

pub fn mode(&mut self) -> MODE_W<'_>[src]

Bits 4:5 - operating mode

pub fn regx_version(&mut self) -> REGX_VERSION_W<'_>[src]

Bits 16:31 - region firmware version

impl W<u32, Reg<u32, _R3CFGR>>[src]

pub fn reg_en(&mut self) -> REG_EN_W<'_>[src]

Bit 0 - region on-the-fly decryption enable

pub fn configlock(&mut self) -> CONFIGLOCK_W<'_>[src]

Bit 1 - region config lock

pub fn keylock(&mut self) -> KEYLOCK_W<'_>[src]

Bit 2 - region key lock

pub fn mode(&mut self) -> MODE_W<'_>[src]

Bits 4:5 - operating mode

pub fn regx_version(&mut self) -> REGX_VERSION_W<'_>[src]

Bits 16:31 - region firmware version

impl W<u32, Reg<u32, _R4CFGR>>[src]

pub fn reg_en(&mut self) -> REG_EN_W<'_>[src]

Bit 0 - region on-the-fly decryption enable

pub fn configlock(&mut self) -> CONFIGLOCK_W<'_>[src]

Bit 1 - region config lock

pub fn keylock(&mut self) -> KEYLOCK_W<'_>[src]

Bit 2 - region key lock

pub fn mode(&mut self) -> MODE_W<'_>[src]

Bits 4:5 - operating mode

pub fn regx_version(&mut self) -> REGX_VERSION_W<'_>[src]

Bits 16:31 - region firmware version

impl W<u32, Reg<u32, _R1STARTADDR>>[src]

pub fn regx_start_addr(&mut self) -> REGX_START_ADDR_W<'_>[src]

Bits 0:31 - Region AXI start address

impl W<u32, Reg<u32, _R2STARTADDR>>[src]

pub fn regx_start_addr(&mut self) -> REGX_START_ADDR_W<'_>[src]

Bits 0:31 - Region AXI start address

impl W<u32, Reg<u32, _R3STARTADDR>>[src]

pub fn regx_start_addr(&mut self) -> REGX_START_ADDR_W<'_>[src]

Bits 0:31 - Region AXI start address

impl W<u32, Reg<u32, _R4STARTADDR>>[src]

pub fn regx_start_addr(&mut self) -> REGX_START_ADDR_W<'_>[src]

Bits 0:31 - Region AXI start address

impl W<u32, Reg<u32, _R1ENDADDR>>[src]

pub fn regx_end_addr(&mut self) -> REGX_END_ADDR_W<'_>[src]

Bits 0:31 - Region AXI end address

impl W<u32, Reg<u32, _R2ENDADDR>>[src]

pub fn regx_end_addr(&mut self) -> REGX_END_ADDR_W<'_>[src]

Bits 0:31 - Region AXI end address

impl W<u32, Reg<u32, _R3ENDADDR>>[src]

pub fn regx_end_addr(&mut self) -> REGX_END_ADDR_W<'_>[src]

Bits 0:31 - Region AXI end address

impl W<u32, Reg<u32, _R4ENDADDR>>[src]

pub fn regx_end_addr(&mut self) -> REGX_END_ADDR_W<'_>[src]

Bits 0:31 - Region AXI end address

impl W<u32, Reg<u32, _R1NONCER0>>[src]

pub fn regx_nonce(&mut self) -> REGX_NONCE_W<'_>[src]

Bits 0:31 - REGx_NONCE

impl W<u32, Reg<u32, _R2NONCER0>>[src]

pub fn regx_nonce(&mut self) -> REGX_NONCE_W<'_>[src]

Bits 0:31 - REGx_NONCE

impl W<u32, Reg<u32, _R3NONCER0>>[src]

pub fn regx_nonce(&mut self) -> REGX_NONCE_W<'_>[src]

Bits 0:31 - REGx_NONCE

impl W<u32, Reg<u32, _R4NONCER0>>[src]

pub fn regx_nonce(&mut self) -> REGX_NONCE_W<'_>[src]

Bits 0:31 - REGx_NONCE

impl W<u32, Reg<u32, _R1NONCER1>>[src]

pub fn regx_nonce(&mut self) -> REGX_NONCE_W<'_>[src]

Bits 0:31 - Region nonce

impl W<u32, Reg<u32, _R2NONCER1>>[src]

pub fn regx_nonce(&mut self) -> REGX_NONCE_W<'_>[src]

Bits 0:31 - Region nonce, bits [63:32]REGx_NONCE[63:32]

impl W<u32, Reg<u32, _R3NONCER1>>[src]

pub fn regx_nonce(&mut self) -> REGX_NONCE_W<'_>[src]

Bits 0:31 - REGx_NONCE

impl W<u32, Reg<u32, _R4NONCER1>>[src]

pub fn regx_nonce(&mut self) -> REGX_NONCE_W<'_>[src]

Bits 0:31 - REGx_NONCE

impl W<u32, Reg<u32, _R1KEYR0>>[src]

pub fn regx_key(&mut self) -> REGX_KEY_W<'_>[src]

Bits 0:31 - REGx_KEY

impl W<u32, Reg<u32, _R2KEYR0>>[src]

pub fn regx_key(&mut self) -> REGX_KEY_W<'_>[src]

Bits 0:31 - REGx_KEY

impl W<u32, Reg<u32, _R3KEYR0>>[src]

pub fn regx_key(&mut self) -> REGX_KEY_W<'_>[src]

Bits 0:31 - REGx_KEY

impl W<u32, Reg<u32, _R4KEYR0>>[src]

pub fn regx_key(&mut self) -> REGX_KEY_W<'_>[src]

Bits 0:31 - REGx_KEY

impl W<u32, Reg<u32, _R1KEYR1>>[src]

pub fn regx_key(&mut self) -> REGX_KEY_W<'_>[src]

Bits 0:31 - REGx_KEY

impl W<u32, Reg<u32, _R2KEYR1>>[src]

pub fn regx_key(&mut self) -> REGX_KEY_W<'_>[src]

Bits 0:31 - REGx_KEY

impl W<u32, Reg<u32, _R3KEYR1>>[src]

pub fn regx_key(&mut self) -> REGX_KEY_W<'_>[src]

Bits 0:31 - REGx_KEY

impl W<u32, Reg<u32, _R4KEYR1>>[src]

pub fn regx_key(&mut self) -> REGX_KEY_W<'_>[src]

Bits 0:31 - REGx_KEY

impl W<u32, Reg<u32, _R1KEYR2>>[src]

pub fn regx_key(&mut self) -> REGX_KEY_W<'_>[src]

Bits 0:31 - REGx_KEY

impl W<u32, Reg<u32, _R2KEYR2>>[src]

pub fn regx_key_(&mut self) -> REGX_KEY__W<'_>[src]

Bits 0:31 - REGx_KEY

impl W<u32, Reg<u32, _R3KEYR2>>[src]

pub fn regx_key(&mut self) -> REGX_KEY_W<'_>[src]

Bits 0:31 - REGx_KEY

impl W<u32, Reg<u32, _R4KEYR2>>[src]

pub fn regx_key(&mut self) -> REGX_KEY_W<'_>[src]

Bits 0:31 - REGx_KEY

impl W<u32, Reg<u32, _R1KEYR3>>[src]

pub fn regx_key(&mut self) -> REGX_KEY_W<'_>[src]

Bits 0:31 - REGx_KEY

impl W<u32, Reg<u32, _R2KEYR3>>[src]

pub fn regx_key(&mut self) -> REGX_KEY_W<'_>[src]

Bits 0:31 - REGx_KEY

impl W<u32, Reg<u32, _R3KEYR3>>[src]

pub fn regx_key(&mut self) -> REGX_KEY_W<'_>[src]

Bits 0:31 - REGx_KEY

impl W<u32, Reg<u32, _R4KEYR3>>[src]

pub fn regx_key(&mut self) -> REGX_KEY_W<'_>[src]

Bits 0:31 - REGx_KEY

impl W<u32, Reg<u32, _ICR>>[src]

pub fn seif(&mut self) -> SEIF_W<'_>[src]

Bit 0 - SEIF

pub fn xoneif(&mut self) -> XONEIF_W<'_>[src]

Bit 1 - Execute-only execute-Never Error Interrupt Flag clear

pub fn keif(&mut self) -> KEIF_W<'_>[src]

Bit 2 - KEIF

impl W<u32, Reg<u32, _IER>>[src]

pub fn seie(&mut self) -> SEIE_W<'_>[src]

Bit 0 - Security Error Interrupt Enable

pub fn xoneie(&mut self) -> XONEIE_W<'_>[src]

Bit 1 - XONEIE

pub fn keie(&mut self) -> KEIE_W<'_>[src]

Bit 2 - KEIE

impl W<u32, Reg<u32, _CR1>>[src]

pub fn ckd(&mut self) -> CKD_W<'_>[src]

Bits 8:9 - Clock division

pub fn arpe(&mut self) -> ARPE_W<'_>[src]

Bit 7 - Auto-reload preload enable

pub fn cms(&mut self) -> CMS_W<'_>[src]

Bits 5:6 - Center-aligned mode selection

pub fn dir(&mut self) -> DIR_W<'_>[src]

Bit 4 - Direction

pub fn opm(&mut self) -> OPM_W<'_>[src]

Bit 3 - One-pulse mode

pub fn urs(&mut self) -> URS_W<'_>[src]

Bit 2 - Update request source

pub fn udis(&mut self) -> UDIS_W<'_>[src]

Bit 1 - Update disable

pub fn cen(&mut self) -> CEN_W<'_>[src]

Bit 0 - Counter enable

pub fn uifremap(&mut self) -> UIFREMAP_W<'_>[src]

Bit 11 - UIF status bit remapping

impl W<u32, Reg<u32, _CR2>>[src]

pub fn ois4(&mut self) -> OIS4_W<'_>[src]

Bit 14 - Output Idle state 4

pub fn ois3n(&mut self) -> OIS3N_W<'_>[src]

Bit 13 - Output Idle state 3

pub fn ois3(&mut self) -> OIS3_W<'_>[src]

Bit 12 - Output Idle state 3

pub fn ois2n(&mut self) -> OIS2N_W<'_>[src]

Bit 11 - Output Idle state 2

pub fn ois2(&mut self) -> OIS2_W<'_>[src]

Bit 10 - Output Idle state 2

pub fn ois1n(&mut self) -> OIS1N_W<'_>[src]

Bit 9 - Output Idle state 1

pub fn ois1(&mut self) -> OIS1_W<'_>[src]

Bit 8 - Output Idle state 1

pub fn ti1s(&mut self) -> TI1S_W<'_>[src]

Bit 7 - TI1 selection

pub fn mms(&mut self) -> MMS_W<'_>[src]

Bits 4:6 - Master mode selection

pub fn ccds(&mut self) -> CCDS_W<'_>[src]

Bit 3 - Capture/compare DMA selection

pub fn ccus(&mut self) -> CCUS_W<'_>[src]

Bit 2 - Capture/compare control update selection

pub fn ccpc(&mut self) -> CCPC_W<'_>[src]

Bit 0 - Capture/compare preloaded control

pub fn ois5(&mut self) -> OIS5_W<'_>[src]

Bit 15 - Output Idle state 5 (OC5 output)

pub fn ois6(&mut self) -> OIS6_W<'_>[src]

Bit 16 - Output Idle state 6

pub fn mms2(&mut self) -> MMS2_W<'_>[src]

Bits 20:23 - Master mode selection 2

impl W<u32, Reg<u32, _SMCR>>[src]

pub fn etp(&mut self) -> ETP_W<'_>[src]

Bit 15 - External trigger polarity

pub fn ece(&mut self) -> ECE_W<'_>[src]

Bit 14 - External clock enable

pub fn etps(&mut self) -> ETPS_W<'_>[src]

Bits 12:13 - External trigger prescaler

pub fn etf(&mut self) -> ETF_W<'_>[src]

Bits 8:11 - External trigger filter

pub fn msm(&mut self) -> MSM_W<'_>[src]

Bit 7 - Master/Slave mode

pub fn ts(&mut self) -> TS_W<'_>[src]

Bits 4:6 - Trigger selection

pub fn sms(&mut self) -> SMS_W<'_>[src]

Bits 0:2 - Slave mode selection

pub fn sms_bit3(&mut self) -> SMS_BIT3_W<'_>[src]

Bit 16 - Slave mode selection - bit 3

impl W<u32, Reg<u32, _DIER>>[src]

pub fn tde(&mut self) -> TDE_W<'_>[src]

Bit 14 - Trigger DMA request enable

pub fn comde(&mut self) -> COMDE_W<'_>[src]

Bit 13 - COM DMA request enable

pub fn cc4de(&mut self) -> CC4DE_W<'_>[src]

Bit 12 - Capture/Compare 4 DMA request enable

pub fn cc3de(&mut self) -> CC3DE_W<'_>[src]

Bit 11 - Capture/Compare 3 DMA request enable

pub fn cc2de(&mut self) -> CC2DE_W<'_>[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&mut self) -> CC1DE_W<'_>[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&mut self) -> UDE_W<'_>[src]

Bit 8 - Update DMA request enable

pub fn tie(&mut self) -> TIE_W<'_>[src]

Bit 6 - Trigger interrupt enable

pub fn cc4ie(&mut self) -> CC4IE_W<'_>[src]

Bit 4 - Capture/Compare 4 interrupt enable

pub fn cc3ie(&mut self) -> CC3IE_W<'_>[src]

Bit 3 - Capture/Compare 3 interrupt enable

pub fn cc2ie(&mut self) -> CC2IE_W<'_>[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&mut self) -> CC1IE_W<'_>[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&mut self) -> UIE_W<'_>[src]

Bit 0 - Update interrupt enable

pub fn bie(&mut self) -> BIE_W<'_>[src]

Bit 7 - Break interrupt enable

pub fn comie(&mut self) -> COMIE_W<'_>[src]

Bit 5 - COM interrupt enable

impl W<u32, Reg<u32, _SR>>[src]

pub fn cc4of(&mut self) -> CC4OF_W<'_>[src]

Bit 12 - Capture/Compare 4 overcapture flag

pub fn cc3of(&mut self) -> CC3OF_W<'_>[src]

Bit 11 - Capture/Compare 3 overcapture flag

pub fn cc2of(&mut self) -> CC2OF_W<'_>[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&mut self) -> CC1OF_W<'_>[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn bif(&mut self) -> BIF_W<'_>[src]

Bit 7 - Break interrupt flag

pub fn tif(&mut self) -> TIF_W<'_>[src]

Bit 6 - Trigger interrupt flag

pub fn comif(&mut self) -> COMIF_W<'_>[src]

Bit 5 - COM interrupt flag

pub fn cc4if(&mut self) -> CC4IF_W<'_>[src]

Bit 4 - Capture/Compare 4 interrupt flag

pub fn cc3if(&mut self) -> CC3IF_W<'_>[src]

Bit 3 - Capture/Compare 3 interrupt flag

pub fn cc2if(&mut self) -> CC2IF_W<'_>[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&mut self) -> CC1IF_W<'_>[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&mut self) -> UIF_W<'_>[src]

Bit 0 - Update interrupt flag

pub fn sbif(&mut self) -> SBIF_W<'_>[src]

Bit 13 - System Break interrupt flag

pub fn cc5if(&mut self) -> CC5IF_W<'_>[src]

Bit 16 - Compare 5 interrupt flag

pub fn cc6if(&mut self) -> CC6IF_W<'_>[src]

Bit 17 - Compare 6 interrupt flag

impl W<u32, Reg<u32, _EGR>>[src]

pub fn bg(&mut self) -> BG_W<'_>[src]

Bit 7 - Break generation

pub fn tg(&mut self) -> TG_W<'_>[src]

Bit 6 - Trigger generation

pub fn comg(&mut self) -> COMG_W<'_>[src]

Bit 5 - Capture/Compare control update generation

pub fn cc4g(&mut self) -> CC4G_W<'_>[src]

Bit 4 - Capture/compare 4 generation

pub fn cc3g(&mut self) -> CC3G_W<'_>[src]

Bit 3 - Capture/compare 3 generation

pub fn cc2g(&mut self) -> CC2G_W<'_>[src]

Bit 2 - Capture/compare 2 generation

pub fn cc1g(&mut self) -> CC1G_W<'_>[src]

Bit 1 - Capture/compare 1 generation

pub fn ug(&mut self) -> UG_W<'_>[src]

Bit 0 - Update generation

pub fn b2g(&mut self) -> B2G_W<'_>[src]

Bit 8 - Break 2 generation

impl W<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc2ce(&mut self) -> OC2CE_W<'_>[src]

Bit 15 - Output Compare 2 clear enable

pub fn oc2m(&mut self) -> OC2M_W<'_>[src]

Bits 12:14 - Output Compare 2 mode

pub fn oc2pe(&mut self) -> OC2PE_W<'_>[src]

Bit 11 - Output Compare 2 preload enable

pub fn oc2fe(&mut self) -> OC2FE_W<'_>[src]

Bit 10 - Output Compare 2 fast enable

pub fn cc2s(&mut self) -> CC2S_W<'_>[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1ce(&mut self) -> OC1CE_W<'_>[src]

Bit 7 - Output Compare 1 clear enable

pub fn oc1m(&mut self) -> OC1M_W<'_>[src]

Bits 4:6 - Output Compare 1 mode

pub fn oc1pe(&mut self) -> OC1PE_W<'_>[src]

Bit 3 - Output Compare 1 preload enable

pub fn oc1fe(&mut self) -> OC1FE_W<'_>[src]

Bit 2 - Output Compare 1 fast enable

pub fn cc1s(&mut self) -> CC1S_W<'_>[src]

Bits 0:1 - Capture/Compare 1 selection

pub fn oc1m_bit3(&mut self) -> OC1M_BIT3_W<'_>[src]

Bit 16 - Output Compare 1 mode - bit 3

pub fn oc2m_bit3(&mut self) -> OC2M_BIT3_W<'_>[src]

Bit 24 - Output Compare 2 mode - bit 3

impl W<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&mut self) -> IC2F_W<'_>[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2pcs(&mut self) -> IC2PCS_W<'_>[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&mut self) -> CC2S_W<'_>[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn ic1f(&mut self) -> IC1F_W<'_>[src]

Bits 4:7 - Input capture 1 filter

pub fn icpcs(&mut self) -> ICPCS_W<'_>[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&mut self) -> CC1S_W<'_>[src]

Bits 0:1 - Capture/Compare 1 selection

impl W<u32, Reg<u32, _CCMR2_OUTPUT>>[src]

pub fn oc4ce(&mut self) -> OC4CE_W<'_>[src]

Bit 15 - Output compare 4 clear enable

pub fn oc4m(&mut self) -> OC4M_W<'_>[src]

Bits 12:14 - Output compare 4 mode

pub fn oc4pe(&mut self) -> OC4PE_W<'_>[src]

Bit 11 - Output compare 4 preload enable

pub fn oc4fe(&mut self) -> OC4FE_W<'_>[src]

Bit 10 - Output compare 4 fast enable

pub fn cc4s(&mut self) -> CC4S_W<'_>[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn oc3ce(&mut self) -> OC3CE_W<'_>[src]

Bit 7 - Output compare 3 clear enable

pub fn oc3m(&mut self) -> OC3M_W<'_>[src]

Bits 4:6 - Output compare 3 mode

pub fn oc3pe(&mut self) -> OC3PE_W<'_>[src]

Bit 3 - Output compare 3 preload enable

pub fn oc3fe(&mut self) -> OC3FE_W<'_>[src]

Bit 2 - Output compare 3 fast enable

pub fn cc3s(&mut self) -> CC3S_W<'_>[src]

Bits 0:1 - Capture/Compare 3 selection

pub fn oc3m_bit3(&mut self) -> OC3M_BIT3_W<'_>[src]

Bit 16 - Output Compare 3 mode - bit 3

pub fn oc4m_bit3(&mut self) -> OC4M_BIT3_W<'_>[src]

Bit 24 - Output Compare 4 mode - bit 3

impl W<u32, Reg<u32, _CCMR2_INPUT>>[src]

pub fn ic4f(&mut self) -> IC4F_W<'_>[src]

Bits 12:15 - Input capture 4 filter

pub fn ic4psc(&mut self) -> IC4PSC_W<'_>[src]

Bits 10:11 - Input capture 4 prescaler

pub fn cc4s(&mut self) -> CC4S_W<'_>[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn ic3f(&mut self) -> IC3F_W<'_>[src]

Bits 4:7 - Input capture 3 filter

pub fn ic3psc(&mut self) -> IC3PSC_W<'_>[src]

Bits 2:3 - Input capture 3 prescaler

pub fn cc3s(&mut self) -> CC3S_W<'_>[src]

Bits 0:1 - Capture/compare 3 selection

impl W<u32, Reg<u32, _CCER>>[src]

pub fn cc4p(&mut self) -> CC4P_W<'_>[src]

Bit 13 - Capture/Compare 3 output Polarity

pub fn cc4e(&mut self) -> CC4E_W<'_>[src]

Bit 12 - Capture/Compare 4 output enable

pub fn cc3np(&mut self) -> CC3NP_W<'_>[src]

Bit 11 - Capture/Compare 3 output Polarity

pub fn cc3ne(&mut self) -> CC3NE_W<'_>[src]

Bit 10 - Capture/Compare 3 complementary output enable

pub fn cc3p(&mut self) -> CC3P_W<'_>[src]

Bit 9 - Capture/Compare 3 output Polarity

pub fn cc3e(&mut self) -> CC3E_W<'_>[src]

Bit 8 - Capture/Compare 3 output enable

pub fn cc2np(&mut self) -> CC2NP_W<'_>[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc2ne(&mut self) -> CC2NE_W<'_>[src]

Bit 6 - Capture/Compare 2 complementary output enable

pub fn cc2p(&mut self) -> CC2P_W<'_>[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2e(&mut self) -> CC2E_W<'_>[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc1np(&mut self) -> CC1NP_W<'_>[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1ne(&mut self) -> CC1NE_W<'_>[src]

Bit 2 - Capture/Compare 1 complementary output enable

pub fn cc1p(&mut self) -> CC1P_W<'_>[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&mut self) -> CC1E_W<'_>[src]

Bit 0 - Capture/Compare 1 output enable

pub fn cc4np(&mut self) -> CC4NP_W<'_>[src]

Bit 15 - Capture/Compare 4 complementary output polarity

pub fn cc5e(&mut self) -> CC5E_W<'_>[src]

Bit 16 - Capture/Compare 5 output enable

pub fn cc5p(&mut self) -> CC5P_W<'_>[src]

Bit 17 - Capture/Compare 5 output polarity

pub fn cc6e(&mut self) -> CC6E_W<'_>[src]

Bit 20 - Capture/Compare 6 output enable

pub fn cc6p(&mut self) -> CC6P_W<'_>[src]

Bit 21 - Capture/Compare 6 output polarity

impl W<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&mut self) -> CNT_W<'_>[src]

Bits 0:15 - counter value

impl W<u32, Reg<u32, _PSC>>[src]

pub fn psc(&mut self) -> PSC_W<'_>[src]

Bits 0:15 - Prescaler value

impl W<u32, Reg<u32, _ARR>>[src]

pub fn arr(&mut self) -> ARR_W<'_>[src]

Bits 0:15 - Auto-reload value

impl W<u32, Reg<u32, _RCR>>[src]

pub fn rep(&mut self) -> REP_W<'_>[src]

Bits 0:7 - Repetition counter value

impl W<u32, Reg<u32, _CCR1>>[src]

pub fn ccr1(&mut self) -> CCR1_W<'_>[src]

Bits 0:15 - Capture/Compare 1 value

impl W<u32, Reg<u32, _CCR2>>[src]

pub fn ccr2(&mut self) -> CCR2_W<'_>[src]

Bits 0:15 - Capture/Compare 2 value

impl W<u32, Reg<u32, _CCR3>>[src]

pub fn ccr3(&mut self) -> CCR3_W<'_>[src]

Bits 0:15 - Capture/Compare value

impl W<u32, Reg<u32, _CCR4>>[src]

pub fn ccr4(&mut self) -> CCR4_W<'_>[src]

Bits 0:15 - Capture/Compare value

impl W<u32, Reg<u32, _BDTR>>[src]

pub fn moe(&mut self) -> MOE_W<'_>[src]

Bit 15 - Main output enable

pub fn aoe(&mut self) -> AOE_W<'_>[src]

Bit 14 - Automatic output enable

pub fn bkp(&mut self) -> BKP_W<'_>[src]

Bit 13 - Break polarity

pub fn bke(&mut self) -> BKE_W<'_>[src]

Bit 12 - Break enable

pub fn ossr(&mut self) -> OSSR_W<'_>[src]

Bit 11 - Off-state selection for Run mode

pub fn ossi(&mut self) -> OSSI_W<'_>[src]

Bit 10 - Off-state selection for Idle mode

pub fn lock(&mut self) -> LOCK_W<'_>[src]

Bits 8:9 - Lock configuration

pub fn dtg(&mut self) -> DTG_W<'_>[src]

Bits 0:7 - Dead-time generator setup

pub fn bkf(&mut self) -> BKF_W<'_>[src]

Bits 16:19 - Break filter

pub fn bk2f(&mut self) -> BK2F_W<'_>[src]

Bits 20:23 - Break 2 filter

pub fn bk2e(&mut self) -> BK2E_W<'_>[src]

Bit 24 - Break 2 enable

pub fn bk2p(&mut self) -> BK2P_W<'_>[src]

Bit 25 - Break 2 polarity

pub fn bkdsrm(&mut self) -> BKDSRM_W<'_>[src]

Bit 26 - Break Disarm

pub fn bk2dsrm(&mut self) -> BK2DSRM_W<'_>[src]

Bit 27 - Break2 Disarm

pub fn bkbid(&mut self) -> BKBID_W<'_>[src]

Bit 28 - Break Bidirectional

pub fn bk2bid(&mut self) -> BK2BID_W<'_>[src]

Bit 29 - Break2 bidirectional

impl W<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&mut self) -> DBL_W<'_>[src]

Bits 8:12 - DMA burst length

pub fn dba(&mut self) -> DBA_W<'_>[src]

Bits 0:4 - DMA base address

impl W<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&mut self) -> DMAB_W<'_>[src]

Bits 0:31 - DMA register for burst accesses

impl W<u32, Reg<u32, _OR1>>[src]

pub fn ti1_rmp(&mut self) -> TI1_RMP_W<'_>[src]

Bit 4 - Input Capture 1 remap

impl W<u32, Reg<u32, _CCMR3_OUTPUT>>[src]

pub fn oc6m_bit3(&mut self) -> OC6M_BIT3_W<'_>[src]

Bit 24 - Output Compare 6 mode bit 3

pub fn oc5m_bit3(&mut self) -> OC5M_BIT3_W<'_>[src]

Bits 16:18 - Output Compare 5 mode bit 3

pub fn oc6ce(&mut self) -> OC6CE_W<'_>[src]

Bit 15 - Output compare 6 clear enable

pub fn oc6m(&mut self) -> OC6M_W<'_>[src]

Bits 12:14 - Output compare 6 mode

pub fn oc6pe(&mut self) -> OC6PE_W<'_>[src]

Bit 11 - Output compare 6 preload enable

pub fn oc6fe(&mut self) -> OC6FE_W<'_>[src]

Bit 10 - Output compare 6 fast enable

pub fn oc5ce(&mut self) -> OC5CE_W<'_>[src]

Bit 7 - Output compare 5 clear enable

pub fn oc5m(&mut self) -> OC5M_W<'_>[src]

Bits 4:6 - Output compare 5 mode

pub fn oc5pe(&mut self) -> OC5PE_W<'_>[src]

Bit 3 - Output compare 5 preload enable

pub fn oc5fe(&mut self) -> OC5FE_W<'_>[src]

Bit 2 - Output compare 5 fast enable

impl W<u32, Reg<u32, _CCR5>>[src]

pub fn ccr5(&mut self) -> CCR5_W<'_>[src]

Bits 0:15 - Capture/Compare value

pub fn gc5c1(&mut self) -> GC5C1_W<'_>[src]

Bit 29 - Group Channel 5 and Channel 1

pub fn gc5c2(&mut self) -> GC5C2_W<'_>[src]

Bit 30 - Group Channel 5 and Channel 2

pub fn gc5c3(&mut self) -> GC5C3_W<'_>[src]

Bit 31 - Group Channel 5 and Channel 3

impl W<u32, Reg<u32, _CCR6>>[src]

pub fn ccr6(&mut self) -> CCR6_W<'_>[src]

Bits 0:15 - Capture/Compare value

impl W<u32, Reg<u32, _OR2>>[src]

pub fn bkine(&mut self) -> BKINE_W<'_>[src]

Bit 0 - BRK BKIN input enable

pub fn bkcmp1e(&mut self) -> BKCMP1E_W<'_>[src]

Bit 1 - BRK COMP1 enable

pub fn bkcmp2e(&mut self) -> BKCMP2E_W<'_>[src]

Bit 2 - BRK COMP2 enable

pub fn bkdf1bk2e(&mut self) -> BKDF1BK2E_W<'_>[src]

Bit 8 - BRK dfsdm1_break[2] enable

pub fn bkinp(&mut self) -> BKINP_W<'_>[src]

Bit 9 - BRK BKIN input polarity

pub fn bkcmp1p(&mut self) -> BKCMP1P_W<'_>[src]

Bit 10 - BRK COMP1 input polarity

pub fn bkcmp2p(&mut self) -> BKCMP2P_W<'_>[src]

Bit 11 - BRK COMP2 input polarity

pub fn etrsel(&mut self) -> ETRSEL_W<'_>[src]

Bits 14:16 - ETR source selection

impl W<u32, Reg<u32, _OR3>>[src]

pub fn bk2ine(&mut self) -> BK2INE_W<'_>[src]

Bit 0 - BRK2 BKIN input enable

pub fn bk2cmp1e(&mut self) -> BK2CMP1E_W<'_>[src]

Bit 1 - BRK2 COMP1 enable

pub fn bk2cmp2e(&mut self) -> BK2CMP2E_W<'_>[src]

Bit 2 - BRK2 COMP2 enable

pub fn bk2dfbk3e(&mut self) -> BK2DFBK3E_W<'_>[src]

Bit 8 - BRK2 DFSDM_BREAK0 enable

pub fn bk2inp(&mut self) -> BK2INP_W<'_>[src]

Bit 9 - BRK2 BKIN input polarity

pub fn bk2cmp1p(&mut self) -> BK2CMP1P_W<'_>[src]

Bit 10 - BRK2 COMP1 input polarity

pub fn bk2cmp2p(&mut self) -> BK2CMP2P_W<'_>[src]

Bit 11 - BRK2 COMP2 input polarity

impl W<u32, Reg<u32, _IER1>>[src]

pub fn tim2ie(&mut self) -> TIM2IE_W<'_>[src]

Bit 0 - TIM2IE

pub fn tim3ie(&mut self) -> TIM3IE_W<'_>[src]

Bit 1 - TIM3IE

pub fn tim4ie(&mut self) -> TIM4IE_W<'_>[src]

Bit 2 - TIM4IE

pub fn tim5ie(&mut self) -> TIM5IE_W<'_>[src]

Bit 3 - TIM5IE

pub fn tim6ie(&mut self) -> TIM6IE_W<'_>[src]

Bit 4 - TIM6IE

pub fn tim7ie(&mut self) -> TIM7IE_W<'_>[src]

Bit 5 - TIM7IE

pub fn wwdgie(&mut self) -> WWDGIE_W<'_>[src]

Bit 6 - WWDGIE

pub fn iwdgie(&mut self) -> IWDGIE_W<'_>[src]

Bit 7 - IWDGIE

pub fn spi2ie(&mut self) -> SPI2IE_W<'_>[src]

Bit 8 - SPI2IE

pub fn spi3ie(&mut self) -> SPI3IE_W<'_>[src]

Bit 9 - SPI3IE

pub fn usart2ie(&mut self) -> USART2IE_W<'_>[src]

Bit 10 - USART2IE

pub fn usart3ie(&mut self) -> USART3IE_W<'_>[src]

Bit 11 - USART3IE

pub fn uart4ie(&mut self) -> UART4IE_W<'_>[src]

Bit 12 - UART4IE

pub fn uart5ie(&mut self) -> UART5IE_W<'_>[src]

Bit 13 - UART5IE

pub fn i2c1ie(&mut self) -> I2C1IE_W<'_>[src]

Bit 14 - I2C1IE

pub fn i2c2ie(&mut self) -> I2C2IE_W<'_>[src]

Bit 15 - I2C2IE

pub fn i2c3ie(&mut self) -> I2C3IE_W<'_>[src]

Bit 16 - I2C3IE

pub fn crsie(&mut self) -> CRSIE_W<'_>[src]

Bit 17 - CRSIE

pub fn dacie(&mut self) -> DACIE_W<'_>[src]

Bit 18 - DACIE

pub fn opampie(&mut self) -> OPAMPIE_W<'_>[src]

Bit 19 - OPAMPIE

pub fn lptim1ie(&mut self) -> LPTIM1IE_W<'_>[src]

Bit 20 - LPTIM1IE

pub fn lpuart1ie(&mut self) -> LPUART1IE_W<'_>[src]

Bit 21 - LPUART1IE

pub fn i2c4ie(&mut self) -> I2C4IE_W<'_>[src]

Bit 22 - I2C4IE

pub fn lptim2ie(&mut self) -> LPTIM2IE_W<'_>[src]

Bit 23 - LPTIM2IE

pub fn lptim3ie(&mut self) -> LPTIM3IE_W<'_>[src]

Bit 24 - LPTIM3IE

pub fn fdcan1ie(&mut self) -> FDCAN1IE_W<'_>[src]

Bit 25 - FDCAN1IE

pub fn usbfsie(&mut self) -> USBFSIE_W<'_>[src]

Bit 26 - USBFSIE

pub fn ucpd1ie(&mut self) -> UCPD1IE_W<'_>[src]

Bit 27 - UCPD1IE

pub fn vrefbufie(&mut self) -> VREFBUFIE_W<'_>[src]

Bit 28 - VREFBUFIE

pub fn compie(&mut self) -> COMPIE_W<'_>[src]

Bit 29 - COMPIE

pub fn tim1ie(&mut self) -> TIM1IE_W<'_>[src]

Bit 30 - TIM1IE

pub fn spi1ie(&mut self) -> SPI1IE_W<'_>[src]

Bit 31 - SPI1IE

impl W<u32, Reg<u32, _IER2>>[src]

pub fn tim8ie(&mut self) -> TIM8IE_W<'_>[src]

Bit 0 - TIM8IE

pub fn usart1ie(&mut self) -> USART1IE_W<'_>[src]

Bit 1 - USART1IE

pub fn tim15ie(&mut self) -> TIM15IE_W<'_>[src]

Bit 2 - TIM15IE

pub fn tim16ie(&mut self) -> TIM16IE_W<'_>[src]

Bit 3 - TIM16IE

pub fn tim17ie(&mut self) -> TIM17IE_W<'_>[src]

Bit 4 - TIM17IE

pub fn sai1ie(&mut self) -> SAI1IE_W<'_>[src]

Bit 5 - SAI1IE

pub fn sai2ie(&mut self) -> SAI2IE_W<'_>[src]

Bit 6 - SAI2IE

pub fn dfsdm1ie(&mut self) -> DFSDM1IE_W<'_>[src]

Bit 7 - DFSDM1IE

pub fn crcie(&mut self) -> CRCIE_W<'_>[src]

Bit 8 - CRCIE

pub fn tscie(&mut self) -> TSCIE_W<'_>[src]

Bit 9 - TSCIE

pub fn icacheie(&mut self) -> ICACHEIE_W<'_>[src]

Bit 10 - ICACHEIE

pub fn adcie(&mut self) -> ADCIE_W<'_>[src]

Bit 11 - ADCIE

pub fn aesie(&mut self) -> AESIE_W<'_>[src]

Bit 12 - AESIE

pub fn hashie(&mut self) -> HASHIE_W<'_>[src]

Bit 13 - HASHIE

pub fn rngie(&mut self) -> RNGIE_W<'_>[src]

Bit 14 - RNGIE

pub fn pkaie(&mut self) -> PKAIE_W<'_>[src]

Bit 15 - PKAIE

pub fn sdmmc1ie(&mut self) -> SDMMC1IE_W<'_>[src]

Bit 16 - SDMMC1IE

pub fn fmc_regie(&mut self) -> FMC_REGIE_W<'_>[src]

Bit 17 - FMC_REGIE

pub fn octospi1_regie(&mut self) -> OCTOSPI1_REGIE_W<'_>[src]

Bit 18 - OCTOSPI1_REGIE

pub fn rtcie(&mut self) -> RTCIE_W<'_>[src]

Bit 19 - RTCIE

pub fn pwrie(&mut self) -> PWRIE_W<'_>[src]

Bit 20 - PWRIE

pub fn syscfgie(&mut self) -> SYSCFGIE_W<'_>[src]

Bit 21 - SYSCFGIE

pub fn dma1ie(&mut self) -> DMA1IE_W<'_>[src]

Bit 22 - DMA1IE

pub fn dma2ie(&mut self) -> DMA2IE_W<'_>[src]

Bit 23 - DMA2IE

pub fn dmamux1ie(&mut self) -> DMAMUX1IE_W<'_>[src]

Bit 24 - DMAMUX1IE

pub fn rccie(&mut self) -> RCCIE_W<'_>[src]

Bit 25 - RCCIE

pub fn flashie(&mut self) -> FLASHIE_W<'_>[src]

Bit 26 - FLASHIE

pub fn flash_regie(&mut self) -> FLASH_REGIE_W<'_>[src]

Bit 27 - FLASH_REGIE

pub fn extiie(&mut self) -> EXTIIE_W<'_>[src]

Bit 28 - EXTIIE

pub fn otfdec1ie(&mut self) -> OTFDEC1IE_W<'_>[src]

Bit 29 - OTFDEC1IE

impl W<u32, Reg<u32, _IER3>>[src]

pub fn tzscie(&mut self) -> TZSCIE_W<'_>[src]

Bit 0 - TZSCIE

pub fn tzicie(&mut self) -> TZICIE_W<'_>[src]

Bit 1 - TZICIE

pub fn mpcwm1ie(&mut self) -> MPCWM1IE_W<'_>[src]

Bit 2 - MPCWM1IE

pub fn mpcwm2ie(&mut self) -> MPCWM2IE_W<'_>[src]

Bit 3 - MPCWM2IE

pub fn mpcbb1ie(&mut self) -> MPCBB1IE_W<'_>[src]

Bit 4 - MPCBB1IE

pub fn mpcbb1_regie(&mut self) -> MPCBB1_REGIE_W<'_>[src]

Bit 5 - MPCBB1_REGIE

pub fn mpcbb2ie(&mut self) -> MPCBB2IE_W<'_>[src]

Bit 6 - MPCBB2IE

pub fn mpcbb2_regie(&mut self) -> MPCBB2_REGIE_W<'_>[src]

Bit 7 - MPCBB2_REGIE

impl W<u32, Reg<u32, _SR2>>[src]

pub fn tim8f(&mut self) -> TIM8F_W<'_>[src]

Bit 0 - TIM8F

pub fn usart1f(&mut self) -> USART1F_W<'_>[src]

Bit 1 - USART1F

pub fn tim15f(&mut self) -> TIM15F_W<'_>[src]

Bit 2 - TIM15F

pub fn tim16f(&mut self) -> TIM16F_W<'_>[src]

Bit 3 - TIM16F

pub fn tim17f(&mut self) -> TIM17F_W<'_>[src]

Bit 4 - TIM17F

pub fn sai1f(&mut self) -> SAI1F_W<'_>[src]

Bit 5 - SAI1F

pub fn sai2f(&mut self) -> SAI2F_W<'_>[src]

Bit 6 - SAI2F

pub fn dfsdm1f(&mut self) -> DFSDM1F_W<'_>[src]

Bit 7 - DFSDM1F

pub fn crcf(&mut self) -> CRCF_W<'_>[src]

Bit 8 - CRCF

pub fn tscf(&mut self) -> TSCF_W<'_>[src]

Bit 9 - TSCF

pub fn icachef(&mut self) -> ICACHEF_W<'_>[src]

Bit 10 - ICACHEF

pub fn adcf(&mut self) -> ADCF_W<'_>[src]

Bit 11 - ADCF

pub fn aesf(&mut self) -> AESF_W<'_>[src]

Bit 12 - AESF

pub fn hashf(&mut self) -> HASHF_W<'_>[src]

Bit 13 - HASHF

pub fn rngf(&mut self) -> RNGF_W<'_>[src]

Bit 14 - RNGF

pub fn pkaf(&mut self) -> PKAF_W<'_>[src]

Bit 15 - PKAF

pub fn sdmmc1f(&mut self) -> SDMMC1F_W<'_>[src]

Bit 16 - SDMMC1F

pub fn fmc_regf(&mut self) -> FMC_REGF_W<'_>[src]

Bit 17 - FMC_REGF

pub fn octospi1_regf(&mut self) -> OCTOSPI1_REGF_W<'_>[src]

Bit 18 - OCTOSPI1_REGF

pub fn rtcf(&mut self) -> RTCF_W<'_>[src]

Bit 19 - RTCF

pub fn pwrf(&mut self) -> PWRF_W<'_>[src]

Bit 20 - PWRF

pub fn syscfgf(&mut self) -> SYSCFGF_W<'_>[src]

Bit 21 - SYSCFGF

pub fn dma1f(&mut self) -> DMA1F_W<'_>[src]

Bit 22 - DMA1F

pub fn dma2f(&mut self) -> DMA2F_W<'_>[src]

Bit 23 - DMA2F

pub fn dmamux1f(&mut self) -> DMAMUX1F_W<'_>[src]

Bit 24 - DMAMUX1F

pub fn rccf(&mut self) -> RCCF_W<'_>[src]

Bit 25 - RCCF

pub fn flashf(&mut self) -> FLASHF_W<'_>[src]

Bit 26 - FLASHF

pub fn flash_regf(&mut self) -> FLASH_REGF_W<'_>[src]

Bit 27 - FLASH_REGF

pub fn extif(&mut self) -> EXTIF_W<'_>[src]

Bit 28 - EXTIF

pub fn otfdec1f(&mut self) -> OTFDEC1F_W<'_>[src]

Bit 29 - OTFDEC1F

impl W<u32, Reg<u32, _SR3>>[src]

pub fn tzscf(&mut self) -> TZSCF_W<'_>[src]

Bit 0 - TZSCF

pub fn tzicf(&mut self) -> TZICF_W<'_>[src]

Bit 1 - TZICF

pub fn mpcwm1f(&mut self) -> MPCWM1F_W<'_>[src]

Bit 2 - MPCWM1F

pub fn mpcwm2f(&mut self) -> MPCWM2F_W<'_>[src]

Bit 3 - MPCWM2F

pub fn mpcbb1f(&mut self) -> MPCBB1F_W<'_>[src]

Bit 4 - MPCBB1F

pub fn mpcbb1_regf(&mut self) -> MPCBB1_REGF_W<'_>[src]

Bit 5 - MPCBB1_REGF

pub fn mpcbb2f(&mut self) -> MPCBB2F_W<'_>[src]

Bit 6 - MPCBB2F

pub fn mpcbb2_regf(&mut self) -> MPCBB2_REGF_W<'_>[src]

Bit 7 - MPCBB2_REGF

impl W<u32, Reg<u32, _FCR1>>[src]

pub fn tim2fc(&mut self) -> TIM2FC_W<'_>[src]

Bit 0 - TIM2FC

pub fn tim3fc(&mut self) -> TIM3FC_W<'_>[src]

Bit 1 - TIM3FC

pub fn tim4fc(&mut self) -> TIM4FC_W<'_>[src]

Bit 2 - TIM4FC

pub fn tim5fc(&mut self) -> TIM5FC_W<'_>[src]

Bit 3 - TIM5FC

pub fn tim6fc(&mut self) -> TIM6FC_W<'_>[src]

Bit 4 - TIM6FC

pub fn tim7fc(&mut self) -> TIM7FC_W<'_>[src]

Bit 5 - TIM7FC

pub fn wwdgfc(&mut self) -> WWDGFC_W<'_>[src]

Bit 6 - WWDGFC

pub fn iwdgfc(&mut self) -> IWDGFC_W<'_>[src]

Bit 7 - IWDGFC

pub fn spi2fc(&mut self) -> SPI2FC_W<'_>[src]

Bit 8 - SPI2FC

pub fn spi3fc(&mut self) -> SPI3FC_W<'_>[src]

Bit 9 - SPI3FC

pub fn usart2fc(&mut self) -> USART2FC_W<'_>[src]

Bit 10 - USART2FC

pub fn usart3fc(&mut self) -> USART3FC_W<'_>[src]

Bit 11 - USART3FC

pub fn uart4fc(&mut self) -> UART4FC_W<'_>[src]

Bit 12 - UART4FC

pub fn uart5fc(&mut self) -> UART5FC_W<'_>[src]

Bit 13 - UART5FC

pub fn i2c1fc(&mut self) -> I2C1FC_W<'_>[src]

Bit 14 - I2C1FC

pub fn i2c2fc(&mut self) -> I2C2FC_W<'_>[src]

Bit 15 - I2C2FC

pub fn i2c3fc(&mut self) -> I2C3FC_W<'_>[src]

Bit 16 - I2C3FC

pub fn crsfc(&mut self) -> CRSFC_W<'_>[src]

Bit 17 - CRSFC

pub fn dacfc(&mut self) -> DACFC_W<'_>[src]

Bit 18 - DACFC

pub fn opampfc(&mut self) -> OPAMPFC_W<'_>[src]

Bit 19 - OPAMPFC

pub fn lptim1fc(&mut self) -> LPTIM1FC_W<'_>[src]

Bit 20 - LPTIM1FC

pub fn lpuart1fc(&mut self) -> LPUART1FC_W<'_>[src]

Bit 21 - LPUART1FC

pub fn i2c4fc(&mut self) -> I2C4FC_W<'_>[src]

Bit 22 - I2C4FC

pub fn lptim2fc(&mut self) -> LPTIM2FC_W<'_>[src]

Bit 23 - LPTIM2FC

pub fn lptim3fc(&mut self) -> LPTIM3FC_W<'_>[src]

Bit 24 - LPTIM3FC

pub fn fdcan1fc(&mut self) -> FDCAN1FC_W<'_>[src]

Bit 25 - FDCAN1FC

pub fn usbfsfc(&mut self) -> USBFSFC_W<'_>[src]

Bit 26 - USBFSFC

pub fn ucpd1fc(&mut self) -> UCPD1FC_W<'_>[src]

Bit 27 - UCPD1FC

pub fn vrefbuffc(&mut self) -> VREFBUFFC_W<'_>[src]

Bit 28 - VREFBUFFC

pub fn compfc(&mut self) -> COMPFC_W<'_>[src]

Bit 29 - COMPFC

pub fn tim1fc(&mut self) -> TIM1FC_W<'_>[src]

Bit 30 - TIM1FC

pub fn spi1fc(&mut self) -> SPI1FC_W<'_>[src]

Bit 31 - SPI1FC

impl W<u32, Reg<u32, _FCR2>>[src]

pub fn tim8fc(&mut self) -> TIM8FC_W<'_>[src]

Bit 0 - TIM8FC

pub fn usart1fc(&mut self) -> USART1FC_W<'_>[src]

Bit 1 - USART1FC

pub fn tim15fc(&mut self) -> TIM15FC_W<'_>[src]

Bit 2 - TIM15FC

pub fn tim16fc(&mut self) -> TIM16FC_W<'_>[src]

Bit 3 - TIM16FC

pub fn tim17fc(&mut self) -> TIM17FC_W<'_>[src]

Bit 4 - TIM17FC

pub fn sai1fc(&mut self) -> SAI1FC_W<'_>[src]

Bit 5 - SAI1FC

pub fn sai2fc(&mut self) -> SAI2FC_W<'_>[src]

Bit 6 - SAI2FC

pub fn dfsdm1fc(&mut self) -> DFSDM1FC_W<'_>[src]

Bit 7 - DFSDM1FC

pub fn crcfc(&mut self) -> CRCFC_W<'_>[src]

Bit 8 - CRCFC

pub fn tscfc(&mut self) -> TSCFC_W<'_>[src]

Bit 9 - TSCFC

pub fn icachefc(&mut self) -> ICACHEFC_W<'_>[src]

Bit 10 - ICACHEFC

pub fn adcfc(&mut self) -> ADCFC_W<'_>[src]

Bit 11 - ADCFC

pub fn aesfc(&mut self) -> AESFC_W<'_>[src]

Bit 12 - AESFC

pub fn hashfc(&mut self) -> HASHFC_W<'_>[src]

Bit 13 - HASHFC

pub fn rngfc(&mut self) -> RNGFC_W<'_>[src]

Bit 14 - RNGFC

pub fn pkafc(&mut self) -> PKAFC_W<'_>[src]

Bit 15 - PKAFC

pub fn sdmmc1fc(&mut self) -> SDMMC1FC_W<'_>[src]

Bit 16 - SDMMC1FC

pub fn fmc_regfc(&mut self) -> FMC_REGFC_W<'_>[src]

Bit 17 - FMC_REGFC

pub fn octospi1_regfc(&mut self) -> OCTOSPI1_REGFC_W<'_>[src]

Bit 18 - OCTOSPI1_REGFC

pub fn rtcfc(&mut self) -> RTCFC_W<'_>[src]

Bit 19 - RTCFC

pub fn pwrfc(&mut self) -> PWRFC_W<'_>[src]

Bit 20 - PWRFC

pub fn syscfgfc(&mut self) -> SYSCFGFC_W<'_>[src]

Bit 21 - SYSCFGFC

pub fn dma1fc(&mut self) -> DMA1FC_W<'_>[src]

Bit 22 - DMA1FC

pub fn dma2fc(&mut self) -> DMA2FC_W<'_>[src]

Bit 23 - DMA2FC

pub fn dmamux1fc(&mut self) -> DMAMUX1FC_W<'_>[src]

Bit 24 - DMAMUX1FC

pub fn rccfc(&mut self) -> RCCFC_W<'_>[src]

Bit 25 - RCCFC

pub fn flashfc(&mut self) -> FLASHFC_W<'_>[src]

Bit 26 - FLASHFC

pub fn flash_regfc(&mut self) -> FLASH_REGFC_W<'_>[src]

Bit 27 - FLASH_REGFC

pub fn extifc(&mut self) -> EXTIFC_W<'_>[src]

Bit 28 - EXTIFC

pub fn otfdec1fc(&mut self) -> OTFDEC1FC_W<'_>[src]

Bit 29 - OTFDEC1FC

impl W<u32, Reg<u32, _FCR3>>[src]

pub fn tzscfc(&mut self) -> TZSCFC_W<'_>[src]

Bit 0 - TZSCFC

pub fn tzicfc(&mut self) -> TZICFC_W<'_>[src]

Bit 1 - TZICFC

pub fn mpcwm1fc(&mut self) -> MPCWM1FC_W<'_>[src]

Bit 2 - MPCWM1FC

pub fn mpcwm2fc(&mut self) -> MPCWM2FC_W<'_>[src]

Bit 3 - MPCWM2FC

pub fn mpcbb1fc(&mut self) -> MPCBB1FC_W<'_>[src]

Bit 4 - MPCBB1FC

pub fn mpcbb1_regfc(&mut self) -> MPCBB1_REGFC_W<'_>[src]

Bit 5 - MPCBB1_REGFC

pub fn mpcbb2fc(&mut self) -> MPCBB2FC_W<'_>[src]

Bit 6 - MPCBB2FC

pub fn mpcbb2_regfc(&mut self) -> MPCBB2_REGFC_W<'_>[src]

Bit 7 - MPCBB2_REGFC

impl W<u32, Reg<u32, _TZSC_CR>>[src]

pub fn lck(&mut self) -> LCK_W<'_>[src]

Bit 0 - LCK

impl W<u32, Reg<u32, _TZSC_SECCFGR1>>[src]

pub fn tim2sec(&mut self) -> TIM2SEC_W<'_>[src]

Bit 0 - TIM2SEC

pub fn tim3sec(&mut self) -> TIM3SEC_W<'_>[src]

Bit 1 - TIM3SEC

pub fn tim4sec(&mut self) -> TIM4SEC_W<'_>[src]

Bit 2 - TIM4SEC

pub fn tim5sec(&mut self) -> TIM5SEC_W<'_>[src]

Bit 3 - TIM5SEC

pub fn tim6sec(&mut self) -> TIM6SEC_W<'_>[src]

Bit 4 - TIM6SEC

pub fn tim7sec(&mut self) -> TIM7SEC_W<'_>[src]

Bit 5 - TIM7SEC

pub fn wwdgsec(&mut self) -> WWDGSEC_W<'_>[src]

Bit 6 - WWDGSEC

pub fn iwdgsec(&mut self) -> IWDGSEC_W<'_>[src]

Bit 7 - IWDGSEC

pub fn spi2sec(&mut self) -> SPI2SEC_W<'_>[src]

Bit 8 - SPI2SEC

pub fn spi3sec(&mut self) -> SPI3SEC_W<'_>[src]

Bit 9 - SPI3SEC

pub fn usart2sec(&mut self) -> USART2SEC_W<'_>[src]

Bit 10 - USART2SEC

pub fn usart3sec(&mut self) -> USART3SEC_W<'_>[src]

Bit 11 - USART3SEC

pub fn uart4sec(&mut self) -> UART4SEC_W<'_>[src]

Bit 12 - UART4SEC

pub fn uart5sec(&mut self) -> UART5SEC_W<'_>[src]

Bit 13 - UART5SEC

pub fn i2c1sec(&mut self) -> I2C1SEC_W<'_>[src]

Bit 14 - I2C1SEC

pub fn i2c2sec(&mut self) -> I2C2SEC_W<'_>[src]

Bit 15 - I2C2SEC

pub fn i2c3sec(&mut self) -> I2C3SEC_W<'_>[src]

Bit 16 - I2C3SEC

pub fn crssec(&mut self) -> CRSSEC_W<'_>[src]

Bit 17 - CRSSEC

pub fn dacsec(&mut self) -> DACSEC_W<'_>[src]

Bit 18 - DACSEC

pub fn opampsec(&mut self) -> OPAMPSEC_W<'_>[src]

Bit 19 - OPAMPSEC

pub fn lptim1sec(&mut self) -> LPTIM1SEC_W<'_>[src]

Bit 20 - LPTIM1SEC

pub fn lpuart1sec(&mut self) -> LPUART1SEC_W<'_>[src]

Bit 21 - LPUART1SEC

pub fn i2c4sec(&mut self) -> I2C4SEC_W<'_>[src]

Bit 22 - I2C4SEC

pub fn lptim2sec(&mut self) -> LPTIM2SEC_W<'_>[src]

Bit 23 - LPTIM2SEC

pub fn lptim3sec(&mut self) -> LPTIM3SEC_W<'_>[src]

Bit 24 - LPTIM3SEC

pub fn fdcan1sec(&mut self) -> FDCAN1SEC_W<'_>[src]

Bit 25 - FDCAN1SEC

pub fn usbfssec(&mut self) -> USBFSSEC_W<'_>[src]

Bit 26 - USBFSSEC

pub fn ucpd1sec(&mut self) -> UCPD1SEC_W<'_>[src]

Bit 27 - UCPD1SEC

pub fn vrefbufsec(&mut self) -> VREFBUFSEC_W<'_>[src]

Bit 28 - VREFBUFSEC

pub fn compsec(&mut self) -> COMPSEC_W<'_>[src]

Bit 29 - COMPSEC

pub fn tim1sec(&mut self) -> TIM1SEC_W<'_>[src]

Bit 30 - TIM1SEC

pub fn spi1sec(&mut self) -> SPI1SEC_W<'_>[src]

Bit 31 - SPI1SEC

impl W<u32, Reg<u32, _TZSC_SECCFGR2>>[src]

pub fn tim8sec(&mut self) -> TIM8SEC_W<'_>[src]

Bit 0 - TIM8SEC

pub fn usart1sec(&mut self) -> USART1SEC_W<'_>[src]

Bit 1 - USART1SEC

pub fn tim15sec(&mut self) -> TIM15SEC_W<'_>[src]

Bit 2 - TIM15SEC

pub fn tim16sec(&mut self) -> TIM16SEC_W<'_>[src]

Bit 3 - TIM16SEC

pub fn tim17sec(&mut self) -> TIM17SEC_W<'_>[src]

Bit 4 - TIM17SEC

pub fn sai1sec(&mut self) -> SAI1SEC_W<'_>[src]

Bit 5 - SAI1SEC

pub fn sai2sec(&mut self) -> SAI2SEC_W<'_>[src]

Bit 6 - SAI2SEC

pub fn dfsdm1sec(&mut self) -> DFSDM1SEC_W<'_>[src]

Bit 7 - DFSDM1SEC

pub fn crcsec(&mut self) -> CRCSEC_W<'_>[src]

Bit 8 - CRCSEC

pub fn tscsec(&mut self) -> TSCSEC_W<'_>[src]

Bit 9 - TSCSEC

pub fn icachesec(&mut self) -> ICACHESEC_W<'_>[src]

Bit 10 - ICACHESEC

pub fn adcsec(&mut self) -> ADCSEC_W<'_>[src]

Bit 11 - ADCSEC

pub fn aessec(&mut self) -> AESSEC_W<'_>[src]

Bit 12 - AESSEC

pub fn hashsec(&mut self) -> HASHSEC_W<'_>[src]

Bit 13 - HASHSEC

pub fn rngsec(&mut self) -> RNGSEC_W<'_>[src]

Bit 14 - RNGSEC

pub fn pkasec(&mut self) -> PKASEC_W<'_>[src]

Bit 15 - PKASEC

pub fn sdmmc1sec(&mut self) -> SDMMC1SEC_W<'_>[src]

Bit 16 - SDMMC1SEC

pub fn fsmc_regsec(&mut self) -> FSMC_REGSEC_W<'_>[src]

Bit 17 - FSMC_REGSEC

pub fn octospi1_regsec(&mut self) -> OCTOSPI1_REGSEC_W<'_>[src]

Bit 18 - OCTOSPI1_REGSEC

impl W<u32, Reg<u32, _TZSC_PRIVCFGR1>>[src]

pub fn tim2priv(&mut self) -> TIM2PRIV_W<'_>[src]

Bit 0 - TIM2PRIV

pub fn tim3priv(&mut self) -> TIM3PRIV_W<'_>[src]

Bit 1 - TIM3PRIV

pub fn tim4priv(&mut self) -> TIM4PRIV_W<'_>[src]

Bit 2 - TIM4PRIV

pub fn tim5priv(&mut self) -> TIM5PRIV_W<'_>[src]

Bit 3 - TIM5PRIV

pub fn tim6priv(&mut self) -> TIM6PRIV_W<'_>[src]

Bit 4 - TIM6PRIV

pub fn tim7priv(&mut self) -> TIM7PRIV_W<'_>[src]

Bit 5 - TIM7PRIV

pub fn wwdgpriv(&mut self) -> WWDGPRIV_W<'_>[src]

Bit 6 - WWDGPRIV

pub fn iwdgpriv(&mut self) -> IWDGPRIV_W<'_>[src]

Bit 7 - IWDGPRIV

pub fn spi2priv(&mut self) -> SPI2PRIV_W<'_>[src]

Bit 8 - SPI2PRIV

pub fn spi3priv(&mut self) -> SPI3PRIV_W<'_>[src]

Bit 9 - SPI3PRIV

pub fn usart2priv(&mut self) -> USART2PRIV_W<'_>[src]

Bit 10 - USART2PRIV

pub fn usart3priv(&mut self) -> USART3PRIV_W<'_>[src]

Bit 11 - USART3PRIV

pub fn uart4priv(&mut self) -> UART4PRIV_W<'_>[src]

Bit 12 - UART4PRIV

pub fn uart5priv(&mut self) -> UART5PRIV_W<'_>[src]

Bit 13 - UART5PRIV

pub fn i2c1priv(&mut self) -> I2C1PRIV_W<'_>[src]

Bit 14 - I2C1PRIV

pub fn i2c2priv(&mut self) -> I2C2PRIV_W<'_>[src]

Bit 15 - I2C2PRIV

pub fn i2c3priv(&mut self) -> I2C3PRIV_W<'_>[src]

Bit 16 - I2C3PRIV

pub fn crspriv(&mut self) -> CRSPRIV_W<'_>[src]

Bit 17 - CRSPRIV

pub fn dacpriv(&mut self) -> DACPRIV_W<'_>[src]

Bit 18 - DACPRIV

pub fn opamppriv(&mut self) -> OPAMPPRIV_W<'_>[src]

Bit 19 - OPAMPPRIV

pub fn lptim1priv(&mut self) -> LPTIM1PRIV_W<'_>[src]

Bit 20 - LPTIM1PRIV

pub fn lpuart1priv(&mut self) -> LPUART1PRIV_W<'_>[src]

Bit 21 - LPUART1PRIV

pub fn i2c4priv(&mut self) -> I2C4PRIV_W<'_>[src]

Bit 22 - I2C4PRIV

pub fn lptim2priv(&mut self) -> LPTIM2PRIV_W<'_>[src]

Bit 23 - LPTIM2PRIV

pub fn lptim3priv(&mut self) -> LPTIM3PRIV_W<'_>[src]

Bit 24 - LPTIM3PRIV

pub fn fdcan1priv(&mut self) -> FDCAN1PRIV_W<'_>[src]

Bit 25 - FDCAN1PRIV

pub fn usbfspriv(&mut self) -> USBFSPRIV_W<'_>[src]

Bit 26 - USBFSPRIV

pub fn ucpd1priv(&mut self) -> UCPD1PRIV_W<'_>[src]

Bit 27 - UCPD1PRIV

pub fn vrefbufpriv(&mut self) -> VREFBUFPRIV_W<'_>[src]

Bit 28 - VREFBUFPRIV

pub fn comppriv(&mut self) -> COMPPRIV_W<'_>[src]

Bit 29 - COMPPRIV

pub fn tim1priv(&mut self) -> TIM1PRIV_W<'_>[src]

Bit 30 - TIM1PRIV

pub fn spi1priv(&mut self) -> SPI1PRIV_W<'_>[src]

Bit 31 - SPI1PRIV

impl W<u32, Reg<u32, _TZSC_PRIVCFGR2>>[src]

pub fn tim8priv(&mut self) -> TIM8PRIV_W<'_>[src]

Bit 0 - TIM8PRIV

pub fn usart1priv(&mut self) -> USART1PRIV_W<'_>[src]

Bit 1 - USART1PRIV

pub fn tim15priv(&mut self) -> TIM15PRIV_W<'_>[src]

Bit 2 - TIM15PRIV

pub fn tim16priv(&mut self) -> TIM16PRIV_W<'_>[src]

Bit 3 - TIM16PRIV

pub fn tim17priv(&mut self) -> TIM17PRIV_W<'_>[src]

Bit 4 - TIM17PRIV

pub fn sai1priv(&mut self) -> SAI1PRIV_W<'_>[src]

Bit 5 - SAI1PRIV

pub fn sai2priv(&mut self) -> SAI2PRIV_W<'_>[src]

Bit 6 - SAI2PRIV

pub fn dfsdm1priv(&mut self) -> DFSDM1PRIV_W<'_>[src]

Bit 7 - DFSDM1PRIV

pub fn crcpriv(&mut self) -> CRCPRIV_W<'_>[src]

Bit 8 - CRCPRIV

pub fn tscpriv(&mut self) -> TSCPRIV_W<'_>[src]

Bit 9 - TSCPRIV

pub fn icachepriv(&mut self) -> ICACHEPRIV_W<'_>[src]

Bit 10 - ICACHEPRIV

pub fn adcpriv(&mut self) -> ADCPRIV_W<'_>[src]

Bit 11 - ADCPRIV

pub fn aespriv(&mut self) -> AESPRIV_W<'_>[src]

Bit 12 - AESPRIV

pub fn hashpriv(&mut self) -> HASHPRIV_W<'_>[src]

Bit 13 - HASHPRIV

pub fn rngpriv(&mut self) -> RNGPRIV_W<'_>[src]

Bit 14 - RNGPRIV

pub fn pkapriv(&mut self) -> PKAPRIV_W<'_>[src]

Bit 15 - PKAPRIV

pub fn sdmmc1priv(&mut self) -> SDMMC1PRIV_W<'_>[src]

Bit 16 - SDMMC1PRIV

pub fn fsmc_regpriv(&mut self) -> FSMC_REGPRIV_W<'_>[src]

Bit 17 - FSMC_REGPRIV

pub fn octospi1_regpriv(&mut self) -> OCTOSPI1_REGPRIV_W<'_>[src]

Bit 18 - OCTOSPI1_REGRIV

impl W<u32, Reg<u32, _TZSC_MPCWM1_NSWMR1>>[src]

pub fn nswm1strt(&mut self) -> NSWM1STRT_W<'_>[src]

Bits 0:10 - NSWM1STRT

pub fn nswm1lgth(&mut self) -> NSWM1LGTH_W<'_>[src]

Bits 16:27 - NSWM1LGTH

impl W<u32, Reg<u32, _TZSC_MPCWM1_NSWMR2>>[src]

pub fn nswm2strt(&mut self) -> NSWM2STRT_W<'_>[src]

Bits 0:10 - NSWM2STRT

pub fn nswm2lgth(&mut self) -> NSWM2LGTH_W<'_>[src]

Bits 16:27 - NSWM2LGTH

impl W<u32, Reg<u32, _TZSC_MPCWM2_NSWMR1>>[src]

pub fn nswm1strt(&mut self) -> NSWM1STRT_W<'_>[src]

Bits 0:10 - NSWM1STRT

pub fn nswm1lgth(&mut self) -> NSWM1LGTH_W<'_>[src]

Bits 16:27 - NSWM1LGTH

impl W<u32, Reg<u32, _TZSC_MPCWM3_NSWMR1>>[src]

pub fn nswm2strt(&mut self) -> NSWM2STRT_W<'_>[src]

Bits 0:10 - NSWM2STRT

pub fn nswm2lgth(&mut self) -> NSWM2LGTH_W<'_>[src]

Bits 16:27 - NSWM2LGTH

impl W<u32, Reg<u32, _TZSC_MPCWM2_NSWMR2>>[src]

pub fn nswm2strt(&mut self) -> NSWM2STRT_W<'_>[src]

Bits 0:10 - NSWM2STRT

pub fn nswm2lgth(&mut self) -> NSWM2LGTH_W<'_>[src]

Bits 16:27 - NSWM2LGTH

impl W<u32, Reg<u32, _CR>>[src]

pub fn wdga(&mut self) -> WDGA_W<'_>[src]

Bit 7 - Activation bit

pub fn t(&mut self) -> T_W<'_>[src]

Bits 0:6 - 7-bit counter (MSB to LSB)

impl W<u32, Reg<u32, _CFR>>[src]

pub fn ewi(&mut self) -> EWI_W<'_>[src]

Bit 9 - Early wakeup interrupt

pub fn wdgtb(&mut self) -> WDGTB_W<'_>[src]

Bits 7:8 - Timer base

pub fn w(&mut self) -> W_W<'_>[src]

Bits 0:6 - 7-bit window value

impl W<u32, Reg<u32, _SR>>[src]

pub fn ewif(&mut self) -> EWIF_W<'_>[src]

Bit 0 - Early wakeup interrupt flag

impl W<u32, Reg<u32, _SECCFGR>>[src]

pub fn sram2sec(&mut self) -> SRAM2SEC_W<'_>[src]

Bit 2 - SRAM2 security

pub fn classbsec(&mut self) -> CLASSBSEC_W<'_>[src]

Bit 1 - ClassB security

pub fn syscfgsec(&mut self) -> SYSCFGSEC_W<'_>[src]

Bit 0 - SYSCFG clock control security

pub fn fpusec(&mut self) -> FPUSEC_W<'_>[src]

Bit 3 - FPUSEC

impl W<u32, Reg<u32, _CFGR1>>[src]

pub fn i2c4_fmp(&mut self) -> I2C4_FMP_W<'_>[src]

Bit 23 - I2C4_FMP

pub fn i2c3_fmp(&mut self) -> I2C3_FMP_W<'_>[src]

Bit 22 - I2C3 Fast-mode Plus driving capability activation

pub fn i2c2_fmp(&mut self) -> I2C2_FMP_W<'_>[src]

Bit 21 - I2C2 Fast-mode Plus driving capability activation

pub fn i2c1_fmp(&mut self) -> I2C1_FMP_W<'_>[src]

Bit 20 - I2C1 Fast-mode Plus driving capability activation

pub fn i2c_pb9_fmp(&mut self) -> I2C_PB9_FMP_W<'_>[src]

Bit 19 - Fast-mode Plus (Fm+) driving capability activation on PB9

pub fn i2c_pb8_fmp(&mut self) -> I2C_PB8_FMP_W<'_>[src]

Bit 18 - Fast-mode Plus (Fm+) driving capability activation on PB8

pub fn i2c_pb7_fmp(&mut self) -> I2C_PB7_FMP_W<'_>[src]

Bit 17 - Fast-mode Plus (Fm+) driving capability activation on PB7

pub fn i2c_pb6_fmp(&mut self) -> I2C_PB6_FMP_W<'_>[src]

Bit 16 - Fast-mode Plus (Fm+) driving capability activation on PB6

pub fn boosten(&mut self) -> BOOSTEN_W<'_>[src]

Bit 8 - I/O analog switch voltage booster enable

pub fn anaswvdd(&mut self) -> ANASWVDD_W<'_>[src]

Bit 9 - GPIO analog switch control voltage selection

impl W<u32, Reg<u32, _FPUIMR>>[src]

pub fn fpu_ie(&mut self) -> FPU_IE_W<'_>[src]

Bits 0:5 - Floating point unit interrupts enable bits

impl W<u32, Reg<u32, _CNSLCKR>>[src]

pub fn locknsvtor(&mut self) -> LOCKNSVTOR_W<'_>[src]

Bit 0 - VTOR_NS register lock

pub fn locknsmpu(&mut self) -> LOCKNSMPU_W<'_>[src]

Bit 1 - Non-secure MPU registers lock

impl W<u32, Reg<u32, _CSLOCKR>>[src]

pub fn locksvtaircr(&mut self) -> LOCKSVTAIRCR_W<'_>[src]

Bit 0 - LOCKSVTAIRCR

pub fn locksmpu(&mut self) -> LOCKSMPU_W<'_>[src]

Bit 1 - LOCKSMPU

pub fn locksau(&mut self) -> LOCKSAU_W<'_>[src]

Bit 2 - LOCKSAU

impl W<u32, Reg<u32, _SCSR>>[src]

pub fn sram2er(&mut self) -> SRAM2ER_W<'_>[src]

Bit 0 - SRAM2 Erase

impl W<u32, Reg<u32, _CFGR2>>[src]

pub fn spf(&mut self) -> SPF_W<'_>[src]

Bit 8 - SRAM2 parity error flag

pub fn eccl(&mut self) -> ECCL_W<'_>[src]

Bit 3 - ECC Lock

pub fn pvdl(&mut self) -> PVDL_W<'_>[src]

Bit 2 - PVD lock enable bit

pub fn spl(&mut self) -> SPL_W<'_>[src]

Bit 1 - SRAM2 parity lock bit

pub fn cll(&mut self) -> CLL_W<'_>[src]

Bit 0 - LOCKUP (hardfault) output enable bit

impl W<u32, Reg<u32, _SWPR>>[src]

pub fn p31wp(&mut self) -> P31WP_W<'_>[src]

Bit 31 - SRAM2 page 31 write protection

pub fn p30wp(&mut self) -> P30WP_W<'_>[src]

Bit 30 - P30WP

pub fn p29wp(&mut self) -> P29WP_W<'_>[src]

Bit 29 - P29WP

pub fn p28wp(&mut self) -> P28WP_W<'_>[src]

Bit 28 - P28WP

pub fn p27wp(&mut self) -> P27WP_W<'_>[src]

Bit 27 - P27WP

pub fn p26wp(&mut self) -> P26WP_W<'_>[src]

Bit 26 - P26WP

pub fn p25wp(&mut self) -> P25WP_W<'_>[src]

Bit 25 - P25WP

pub fn p24wp(&mut self) -> P24WP_W<'_>[src]

Bit 24 - P24WP

pub fn p23wp(&mut self) -> P23WP_W<'_>[src]

Bit 23 - P23WP

pub fn p22wp(&mut self) -> P22WP_W<'_>[src]

Bit 22 - P22WP

pub fn p21wp(&mut self) -> P21WP_W<'_>[src]

Bit 21 - P21WP

pub fn p20wp(&mut self) -> P20WP_W<'_>[src]

Bit 20 - P20WP

pub fn p19wp(&mut self) -> P19WP_W<'_>[src]

Bit 19 - P19WP

pub fn p18wp(&mut self) -> P18WP_W<'_>[src]

Bit 18 - P18WP

pub fn p17wp(&mut self) -> P17WP_W<'_>[src]

Bit 17 - P17WP

pub fn p16wp(&mut self) -> P16WP_W<'_>[src]

Bit 16 - P16WP

pub fn p15wp(&mut self) -> P15WP_W<'_>[src]

Bit 15 - P15WP

pub fn p14wp(&mut self) -> P14WP_W<'_>[src]

Bit 14 - P14WP

pub fn p13wp(&mut self) -> P13WP_W<'_>[src]

Bit 13 - P13WP

pub fn p12wp(&mut self) -> P12WP_W<'_>[src]

Bit 12 - P12WP

pub fn p11wp(&mut self) -> P11WP_W<'_>[src]

Bit 11 - P11WP

pub fn p10wp(&mut self) -> P10WP_W<'_>[src]

Bit 10 - P10WP

pub fn p9wp(&mut self) -> P9WP_W<'_>[src]

Bit 9 - P9WP

pub fn p8wp(&mut self) -> P8WP_W<'_>[src]

Bit 8 - P8WP

pub fn p7wp(&mut self) -> P7WP_W<'_>[src]

Bit 7 - P7WP

pub fn p6wp(&mut self) -> P6WP_W<'_>[src]

Bit 6 - P6WP

pub fn p5wp(&mut self) -> P5WP_W<'_>[src]

Bit 5 - P5WP

pub fn p4wp(&mut self) -> P4WP_W<'_>[src]

Bit 4 - P4WP

pub fn p3wp(&mut self) -> P3WP_W<'_>[src]

Bit 3 - P3WP

pub fn p2wp(&mut self) -> P2WP_W<'_>[src]

Bit 2 - P2WP

pub fn p1wp(&mut self) -> P1WP_W<'_>[src]

Bit 1 - P1WP

pub fn p0wp(&mut self) -> P0WP_W<'_>[src]

Bit 0 - P0WP

impl W<u32, Reg<u32, _SKR>>[src]

pub fn key(&mut self) -> KEY_W<'_>[src]

Bits 0:7 - SRAM2 write protection key for software erase

impl W<u32, Reg<u32, _SWPR2>>[src]

pub fn p32wp(&mut self) -> P32WP_W<'_>[src]

Bit 0 - P32WP

pub fn p33wp(&mut self) -> P33WP_W<'_>[src]

Bit 1 - P33WP

pub fn p34wp(&mut self) -> P34WP_W<'_>[src]

Bit 2 - P34WP

pub fn p35wp(&mut self) -> P35WP_W<'_>[src]

Bit 3 - P35WP

pub fn p36wp(&mut self) -> P36WP_W<'_>[src]

Bit 4 - P36WP

pub fn p37wp(&mut self) -> P37WP_W<'_>[src]

Bit 5 - P37WP

pub fn p38wp(&mut self) -> P38WP_W<'_>[src]

Bit 6 - P38WP

pub fn p39wp(&mut self) -> P39WP_W<'_>[src]

Bit 7 - P39WP

pub fn p40wp(&mut self) -> P40WP_W<'_>[src]

Bit 8 - P40WP

pub fn p41wp(&mut self) -> P41WP_W<'_>[src]

Bit 9 - P41WP

pub fn p42wp(&mut self) -> P42WP_W<'_>[src]

Bit 10 - P42WP

pub fn p43wp(&mut self) -> P43WP_W<'_>[src]

Bit 11 - P43WP

pub fn p44wp(&mut self) -> P44WP_W<'_>[src]

Bit 12 - P44WP

pub fn p45wp(&mut self) -> P45WP_W<'_>[src]

Bit 13 - P45WP

pub fn p46wp(&mut self) -> P46WP_W<'_>[src]

Bit 14 - P46WP

pub fn p47wp(&mut self) -> P47WP_W<'_>[src]

Bit 15 - P47WP

pub fn p48wp(&mut self) -> P48WP_W<'_>[src]

Bit 16 - P48WP

pub fn p49wp(&mut self) -> P49WP_W<'_>[src]

Bit 17 - P49WP

pub fn p50wp(&mut self) -> P50WP_W<'_>[src]

Bit 18 - P50WP

pub fn p51wp(&mut self) -> P51WP_W<'_>[src]

Bit 19 - P51WP

pub fn p52wp(&mut self) -> P52WP_W<'_>[src]

Bit 20 - P52WP

pub fn p53wp(&mut self) -> P53WP_W<'_>[src]

Bit 21 - P53WP

pub fn p54wp(&mut self) -> P54WP_W<'_>[src]

Bit 22 - P54WP

pub fn p55wp(&mut self) -> P55WP_W<'_>[src]

Bit 23 - P55WP

pub fn p56wp(&mut self) -> P56WP_W<'_>[src]

Bit 24 - P56WP

pub fn p57wp(&mut self) -> P57WP_W<'_>[src]

Bit 25 - P57WP

pub fn p58wp(&mut self) -> P58WP_W<'_>[src]

Bit 26 - P58WP

pub fn p59wp(&mut self) -> P59WP_W<'_>[src]

Bit 27 - P59WP

pub fn p60wp(&mut self) -> P60WP_W<'_>[src]

Bit 28 - P60WP

pub fn p61wp(&mut self) -> P61WP_W<'_>[src]

Bit 29 - P61WP

pub fn p62wp(&mut self) -> P62WP_W<'_>[src]

Bit 30 - P62WP

pub fn p63wp(&mut self) -> P63WP_W<'_>[src]

Bit 31 - P63WP

impl W<u32, Reg<u32, _RSSCMDR>>[src]

pub fn rsscmd(&mut self) -> RSSCMD_W<'_>[src]

Bits 0:7 - RSS commands

impl W<u32, Reg<u32, _CR>>[src]

pub fn dbg_stop(&mut self) -> DBG_STOP_W<'_>[src]

Bit 1 - Debug Stop mode

pub fn dbg_standby(&mut self) -> DBG_STANDBY_W<'_>[src]

Bit 2 - Debug Standby mode

pub fn trace_ioen(&mut self) -> TRACE_IOEN_W<'_>[src]

Bit 4 - Trace pin assignment control

pub fn trace_mode(&mut self) -> TRACE_MODE_W<'_>[src]

Bits 6:7 - Trace pin assignment control

pub fn trace_en(&mut self) -> TRACE_EN_W<'_>[src]

Bit 5 - trace port and clock enable

impl W<u32, Reg<u32, _APB1LFZR>>[src]

pub fn dbg_tim2_stop(&mut self) -> DBG_TIM2_STOP_W<'_>[src]

Bit 0 - TIM2 counter stopped when core is halted

pub fn dbg_tim6_stop(&mut self) -> DBG_TIM6_STOP_W<'_>[src]

Bit 4 - TIM6 counter stopped when core is halted

pub fn dbg_tim7_stop(&mut self) -> DBG_TIM7_STOP_W<'_>[src]

Bit 5 - TIM7 counter stopped when core is halted

pub fn dbg_rtc_stop(&mut self) -> DBG_RTC_STOP_W<'_>[src]

Bit 10 - RTC counter stopped when core is halted

pub fn dbg_wwdg_stop(&mut self) -> DBG_WWDG_STOP_W<'_>[src]

Bit 11 - Window watchdog counter stopped when core is halted

pub fn dbg_iwdg_stop(&mut self) -> DBG_IWDG_STOP_W<'_>[src]

Bit 12 - Independent watchdog counter stopped when core is halted

pub fn dbg_i2c1_stop(&mut self) -> DBG_I2C1_STOP_W<'_>[src]

Bit 21 - I2C1 SMBUS timeout counter stopped when core is halted

pub fn dbg_i2c2_stop(&mut self) -> DBG_I2C2_STOP_W<'_>[src]

Bit 22 - I2C2 SMBUS timeout counter stopped when core is halted

pub fn dbg_i2c3_stop(&mut self) -> DBG_I2C3_STOP_W<'_>[src]

Bit 23 - I2C3 SMBUS timeout counter stopped when core is halted

pub fn dbg_lptim1_stop(&mut self) -> DBG_LPTIM1_STOP_W<'_>[src]

Bit 31 - LPTIM1 counter stopped when core is halted

pub fn dbg_tim3_stop(&mut self) -> DBG_TIM3_STOP_W<'_>[src]

Bit 1 - TIM3 stop in debug

pub fn dbg_tim4_stop(&mut self) -> DBG_TIM4_STOP_W<'_>[src]

Bit 2 - TIM4 stop in debug

pub fn dbg_tim5_stop(&mut self) -> DBG_TIM5_STOP_W<'_>[src]

Bit 3 - TIM5 stop in debug

impl W<u32, Reg<u32, _APB1HFZR>>[src]

pub fn dbg_lptim2_stop(&mut self) -> DBG_LPTIM2_STOP_W<'_>[src]

Bit 5 - LPTIM2 counter stopped when core is halted

pub fn dbg_i2c4_stop(&mut self) -> DBG_I2C4_STOP_W<'_>[src]

Bit 1 - I2C4 stop in debug

pub fn dbg_lptim3_stop(&mut self) -> DBG_LPTIM3_STOP_W<'_>[src]

Bit 6 - LPTIM3 stop in debug

impl W<u32, Reg<u32, _APB2FZR>>[src]

pub fn dbg_tim1_stop(&mut self) -> DBG_TIM1_STOP_W<'_>[src]

Bit 11 - TIM1 counter stopped when core is halted

pub fn dbg_tim15_stop(&mut self) -> DBG_TIM15_STOP_W<'_>[src]

Bit 16 - TIM15 counter stopped when core is halted

pub fn dbg_tim16_stop(&mut self) -> DBG_TIM16_STOP_W<'_>[src]

Bit 17 - TIM16 counter stopped when core is halted

pub fn dbg_tim8_stop(&mut self) -> DBG_TIM8_STOP_W<'_>[src]

Bit 13 - TIM8 stop in debug

pub fn dbg_tim17_stop(&mut self) -> DBG_TIM17_STOP_W<'_>[src]

Bit 18 - DBG_TIM17_STOP

impl W<u16, Reg<u16, _EP0R>>[src]

pub fn ea(&mut self) -> EA_W<'_>[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&mut self) -> STAT_TX_W<'_>[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&mut self) -> DTOG_TX_W<'_>[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&mut self) -> CTR_TX_W<'_>[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&mut self) -> EP_KIND_W<'_>[src]

Bit 8 - Endpoint kind

pub fn ep_type(&mut self) -> EP_TYPE_W<'_>[src]

Bits 9:10 - Endpoint type

pub fn setup(&mut self) -> SETUP_W<'_>[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&mut self) -> STAT_RX_W<'_>[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&mut self) -> DTOG_RX_W<'_>[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&mut self) -> CTR_RX_W<'_>[src]

Bit 15 - Correct transfer for reception

impl W<u16, Reg<u16, _EP1R>>[src]

pub fn ea(&mut self) -> EA_W<'_>[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&mut self) -> STAT_TX_W<'_>[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&mut self) -> DTOG_TX_W<'_>[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&mut self) -> CTR_TX_W<'_>[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&mut self) -> EP_KIND_W<'_>[src]

Bit 8 - Endpoint kind

pub fn ep_type(&mut self) -> EP_TYPE_W<'_>[src]

Bits 9:10 - Endpoint type

pub fn setup(&mut self) -> SETUP_W<'_>[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&mut self) -> STAT_RX_W<'_>[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&mut self) -> DTOG_RX_W<'_>[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&mut self) -> CTR_RX_W<'_>[src]

Bit 15 - Correct transfer for reception

impl W<u16, Reg<u16, _EP2R>>[src]

pub fn ea(&mut self) -> EA_W<'_>[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&mut self) -> STAT_TX_W<'_>[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&mut self) -> DTOG_TX_W<'_>[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&mut self) -> CTR_TX_W<'_>[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&mut self) -> EP_KIND_W<'_>[src]

Bit 8 - Endpoint kind

pub fn ep_type(&mut self) -> EP_TYPE_W<'_>[src]

Bits 9:10 - Endpoint type

pub fn setup(&mut self) -> SETUP_W<'_>[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&mut self) -> STAT_RX_W<'_>[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&mut self) -> DTOG_RX_W<'_>[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&mut self) -> CTR_RX_W<'_>[src]

Bit 15 - Correct transfer for reception

impl W<u16, Reg<u16, _EP3R>>[src]

pub fn ea(&mut self) -> EA_W<'_>[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&mut self) -> STAT_TX_W<'_>[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&mut self) -> DTOG_TX_W<'_>[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&mut self) -> CTR_TX_W<'_>[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&mut self) -> EP_KIND_W<'_>[src]

Bit 8 - Endpoint kind

pub fn ep_type(&mut self) -> EP_TYPE_W<'_>[src]

Bits 9:10 - Endpoint type

pub fn setup(&mut self) -> SETUP_W<'_>[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&mut self) -> STAT_RX_W<'_>[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&mut self) -> DTOG_RX_W<'_>[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&mut self) -> CTR_RX_W<'_>[src]

Bit 15 - Correct transfer for reception

impl W<u16, Reg<u16, _EP4R>>[src]

pub fn ea(&mut self) -> EA_W<'_>[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&mut self) -> STAT_TX_W<'_>[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&mut self) -> DTOG_TX_W<'_>[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&mut self) -> CTR_TX_W<'_>[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&mut self) -> EP_KIND_W<'_>[src]

Bit 8 - Endpoint kind

pub fn ep_type(&mut self) -> EP_TYPE_W<'_>[src]

Bits 9:10 - Endpoint type

pub fn setup(&mut self) -> SETUP_W<'_>[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&mut self) -> STAT_RX_W<'_>[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&mut self) -> DTOG_RX_W<'_>[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&mut self) -> CTR_RX_W<'_>[src]

Bit 15 - Correct transfer for reception

impl W<u16, Reg<u16, _EP5R>>[src]

pub fn ea(&mut self) -> EA_W<'_>[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&mut self) -> STAT_TX_W<'_>[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&mut self) -> DTOG_TX_W<'_>[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&mut self) -> CTR_TX_W<'_>[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&mut self) -> EP_KIND_W<'_>[src]

Bit 8 - Endpoint kind

pub fn ep_type(&mut self) -> EP_TYPE_W<'_>[src]

Bits 9:10 - Endpoint type

pub fn setup(&mut self) -> SETUP_W<'_>[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&mut self) -> STAT_RX_W<'_>[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&mut self) -> DTOG_RX_W<'_>[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&mut self) -> CTR_RX_W<'_>[src]

Bit 15 - Correct transfer for reception

impl W<u16, Reg<u16, _EP6R>>[src]

pub fn ea(&mut self) -> EA_W<'_>[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&mut self) -> STAT_TX_W<'_>[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&mut self) -> DTOG_TX_W<'_>[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&mut self) -> CTR_TX_W<'_>[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&mut self) -> EP_KIND_W<'_>[src]

Bit 8 - Endpoint kind

pub fn ep_type(&mut self) -> EP_TYPE_W<'_>[src]

Bits 9:10 - Endpoint type

pub fn setup(&mut self) -> SETUP_W<'_>[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&mut self) -> STAT_RX_W<'_>[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&mut self) -> DTOG_RX_W<'_>[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&mut self) -> CTR_RX_W<'_>[src]

Bit 15 - Correct transfer for reception

impl W<u16, Reg<u16, _EP7R>>[src]

pub fn ea(&mut self) -> EA_W<'_>[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&mut self) -> STAT_TX_W<'_>[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&mut self) -> DTOG_TX_W<'_>[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&mut self) -> CTR_TX_W<'_>[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&mut self) -> EP_KIND_W<'_>[src]

Bit 8 - Endpoint kind

pub fn ep_type(&mut self) -> EP_TYPE_W<'_>[src]

Bits 9:10 - Endpoint type

pub fn setup(&mut self) -> SETUP_W<'_>[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&mut self) -> STAT_RX_W<'_>[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&mut self) -> DTOG_RX_W<'_>[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&mut self) -> CTR_RX_W<'_>[src]

Bit 15 - Correct transfer for reception

impl W<u16, Reg<u16, _CNTR>>[src]

pub fn fres(&mut self) -> FRES_W<'_>[src]

Bit 0 - Force USB Reset

pub fn pdwn(&mut self) -> PDWN_W<'_>[src]

Bit 1 - Power down

pub fn lpmode(&mut self) -> LPMODE_W<'_>[src]

Bit 2 - Low-power mode

pub fn fsusp(&mut self) -> FSUSP_W<'_>[src]

Bit 3 - Force suspend

pub fn resume(&mut self) -> RESUME_W<'_>[src]

Bit 4 - Resume request

pub fn l1resume(&mut self) -> L1RESUME_W<'_>[src]

Bit 5 - LPM L1 Resume request

pub fn l1reqm(&mut self) -> L1REQM_W<'_>[src]

Bit 7 - LPM L1 state request interrupt mask

pub fn esofm(&mut self) -> ESOFM_W<'_>[src]

Bit 8 - Expected start of frame interrupt mask

pub fn sofm(&mut self) -> SOFM_W<'_>[src]

Bit 9 - Start of frame interrupt mask

pub fn resetm(&mut self) -> RESETM_W<'_>[src]

Bit 10 - USB reset interrupt mask

pub fn suspm(&mut self) -> SUSPM_W<'_>[src]

Bit 11 - Suspend mode interrupt mask

pub fn wkupm(&mut self) -> WKUPM_W<'_>[src]

Bit 12 - Wakeup interrupt mask

pub fn errm(&mut self) -> ERRM_W<'_>[src]

Bit 13 - Error interrupt mask

pub fn pmaovrm(&mut self) -> PMAOVRM_W<'_>[src]

Bit 14 - Packet memory area over / underrun interrupt mask

pub fn ctrm(&mut self) -> CTRM_W<'_>[src]

Bit 15 - Correct transfer interrupt mask

impl W<u16, Reg<u16, _ISTR>>[src]

pub fn l1req(&mut self) -> L1REQ_W<'_>[src]

Bit 7 - LPM L1 state request

pub fn esof(&mut self) -> ESOF_W<'_>[src]

Bit 8 - Expected start frame

pub fn sof(&mut self) -> SOF_W<'_>[src]

Bit 9 - start of frame

pub fn reset(&mut self) -> RESET_W<'_>[src]

Bit 10 - reset request

pub fn susp(&mut self) -> SUSP_W<'_>[src]

Bit 11 - Suspend mode request

pub fn wkup(&mut self) -> WKUP_W<'_>[src]

Bit 12 - Wakeup

pub fn err(&mut self) -> ERR_W<'_>[src]

Bit 13 - Error

pub fn pmaovr(&mut self) -> PMAOVR_W<'_>[src]

Bit 14 - Packet memory area over / underrun

impl W<u16, Reg<u16, _DADDR>>[src]

pub fn add(&mut self) -> ADD_W<'_>[src]

Bits 0:6 - Device address

pub fn ef(&mut self) -> EF_W<'_>[src]

Bit 7 - Enable function

impl W<u16, Reg<u16, _BTABLE>>[src]

pub fn btable(&mut self) -> BTABLE_W<'_>[src]

Bits 3:15 - Buffer table

impl W<u16, Reg<u16, _LPMCSR>>[src]

pub fn lpmen(&mut self) -> LPMEN_W<'_>[src]

Bit 0 - LPM support enable

pub fn lpmack(&mut self) -> LPMACK_W<'_>[src]

Bit 1 - LPM Token acknowledge enable

pub fn remwake(&mut self) -> REMWAKE_W<'_>[src]

Bit 3 - RemoteWake value

pub fn besl(&mut self) -> BESL_W<'_>[src]

Bits 4:7 - BESL value

impl W<u16, Reg<u16, _BCDR>>[src]

pub fn bcden(&mut self) -> BCDEN_W<'_>[src]

Bit 0 - Battery charging detector (BCD) enable

pub fn dcden(&mut self) -> DCDEN_W<'_>[src]

Bit 1 - Data contact detection (DCD) mode enable

pub fn pden(&mut self) -> PDEN_W<'_>[src]

Bit 2 - Primary detection (PD) mode enable

pub fn sden(&mut self) -> SDEN_W<'_>[src]

Bit 3 - Secondary detection (SD) mode enable

pub fn dcdet(&mut self) -> DCDET_W<'_>[src]

Bit 4 - Data contact detection (DCD) status

pub fn pdet(&mut self) -> PDET_W<'_>[src]

Bit 5 - Primary detection (PD) status

pub fn sdet(&mut self) -> SDET_W<'_>[src]

Bit 6 - Secondary detection (SD) status

pub fn ps2det(&mut self) -> PS2DET_W<'_>[src]

Bit 7 - DM pull-up detection status

pub fn dppu(&mut self) -> DPPU_W<'_>[src]

Bit 15 - DP pull-up control

impl W<u16, Reg<u16, _COUNT0_TX>>[src]

pub fn count0_tx(&mut self) -> COUNT0_TX_W<'_>[src]

Bits 0:9 - Transmission byte count

impl W<u16, Reg<u16, _COUNT1_TX>>[src]

pub fn count1_tx(&mut self) -> COUNT1_TX_W<'_>[src]

Bits 0:9 - Transmission byte count

impl W<u16, Reg<u16, _COUNT2_TX>>[src]

pub fn count2_tx(&mut self) -> COUNT2_TX_W<'_>[src]

Bits 0:9 - Transmission byte count

impl W<u16, Reg<u16, _COUNT3_TX>>[src]

pub fn count3_tx(&mut self) -> COUNT3_TX_W<'_>[src]

Bits 0:9 - Transmission byte count

impl W<u16, Reg<u16, _COUNT4_TX>>[src]

pub fn count4_tx(&mut self) -> COUNT4_TX_W<'_>[src]

Bits 0:9 - Transmission byte count

impl W<u16, Reg<u16, _COUNT5_TX>>[src]

pub fn count5_tx(&mut self) -> COUNT5_TX_W<'_>[src]

Bits 0:9 - Transmission byte count

impl W<u16, Reg<u16, _COUNT6_TX>>[src]

pub fn count6_tx(&mut self) -> COUNT6_TX_W<'_>[src]

Bits 0:9 - Transmission byte count

impl W<u16, Reg<u16, _COUNT7_TX>>[src]

pub fn count7_tx(&mut self) -> COUNT7_TX_W<'_>[src]

Bits 0:9 - Transmission byte count

impl W<u16, Reg<u16, _ADDR0_RX>>[src]

pub fn addr0_rx(&mut self) -> ADDR0_RX_W<'_>[src]

Bits 1:15 - Reception buffer address

impl W<u16, Reg<u16, _ADDR1_RX>>[src]

pub fn addr1_rx(&mut self) -> ADDR1_RX_W<'_>[src]

Bits 1:15 - Reception buffer address

impl W<u16, Reg<u16, _ADDR2_RX>>[src]

pub fn addr2_rx(&mut self) -> ADDR2_RX_W<'_>[src]

Bits 1:15 - Reception buffer address

impl W<u16, Reg<u16, _ADDR3_RX>>[src]

pub fn addr3_rx(&mut self) -> ADDR3_RX_W<'_>[src]

Bits 1:15 - Reception buffer address

impl W<u16, Reg<u16, _ADDR4_RX>>[src]

pub fn addr4_rx(&mut self) -> ADDR4_RX_W<'_>[src]

Bits 1:15 - Reception buffer address

impl W<u16, Reg<u16, _ADDR5_RX>>[src]

pub fn addr5_rx(&mut self) -> ADDR5_RX_W<'_>[src]

Bits 1:15 - Reception buffer address

impl W<u16, Reg<u16, _ADDR6_RX>>[src]

pub fn addr6_rx(&mut self) -> ADDR6_RX_W<'_>[src]

Bits 1:15 - Reception buffer address

impl W<u16, Reg<u16, _ADDR7_RX>>[src]

pub fn addr7_rx(&mut self) -> ADDR7_RX_W<'_>[src]

Bits 1:15 - Reception buffer address

impl W<u16, Reg<u16, _COUNT0_RX>>[src]

pub fn num_block(&mut self) -> NUM_BLOCK_W<'_>[src]

Bits 10:14 - Number of blocks

pub fn bl_size(&mut self) -> BL_SIZE_W<'_>[src]

Bit 15 - Block size

impl W<u16, Reg<u16, _COUNT1_RX>>[src]

pub fn num_block(&mut self) -> NUM_BLOCK_W<'_>[src]

Bits 10:14 - Number of blocks

pub fn bl_size(&mut self) -> BL_SIZE_W<'_>[src]

Bit 15 - Block size

impl W<u16, Reg<u16, _COUNT2_RX>>[src]

pub fn num_block(&mut self) -> NUM_BLOCK_W<'_>[src]

Bits 10:14 - Number of blocks

pub fn bl_size(&mut self) -> BL_SIZE_W<'_>[src]

Bit 15 - Block size

impl W<u16, Reg<u16, _COUNT3_RX>>[src]

pub fn num_block(&mut self) -> NUM_BLOCK_W<'_>[src]

Bits 10:14 - Number of blocks

pub fn bl_size(&mut self) -> BL_SIZE_W<'_>[src]

Bit 15 - Block size

impl W<u16, Reg<u16, _COUNT4_RX>>[src]

pub fn num_block(&mut self) -> NUM_BLOCK_W<'_>[src]

Bits 10:14 - Number of blocks

pub fn bl_size(&mut self) -> BL_SIZE_W<'_>[src]

Bit 15 - Block size

impl W<u16, Reg<u16, _COUNT5_RX>>[src]

pub fn num_block(&mut self) -> NUM_BLOCK_W<'_>[src]

Bits 10:14 - Number of blocks

pub fn bl_size(&mut self) -> BL_SIZE_W<'_>[src]

Bit 15 - Block size

impl W<u16, Reg<u16, _COUNT6_RX>>[src]

pub fn num_block(&mut self) -> NUM_BLOCK_W<'_>[src]

Bits 10:14 - Number of blocks

pub fn bl_size(&mut self) -> BL_SIZE_W<'_>[src]

Bit 15 - Block size

impl W<u16, Reg<u16, _COUNT7_RX>>[src]

pub fn num_block(&mut self) -> NUM_BLOCK_W<'_>[src]

Bits 10:14 - Number of blocks

pub fn bl_size(&mut self) -> BL_SIZE_W<'_>[src]

Bit 15 - Block size

impl W<u32, Reg<u32, _CR>>[src]

pub fn fmode(&mut self) -> FMODE_W<'_>[src]

Bits 28:29 - Functional mode

pub fn pmm(&mut self) -> PMM_W<'_>[src]

Bit 23 - Polling match mode

pub fn apms(&mut self) -> APMS_W<'_>[src]

Bit 22 - Automatic poll mode stop

pub fn toie(&mut self) -> TOIE_W<'_>[src]

Bit 20 - TimeOut interrupt enable

pub fn smie(&mut self) -> SMIE_W<'_>[src]

Bit 19 - Status match interrupt enable

pub fn ftie(&mut self) -> FTIE_W<'_>[src]

Bit 18 - FIFO threshold interrupt enable

pub fn tcie(&mut self) -> TCIE_W<'_>[src]

Bit 17 - Transfer complete interrupt enable

pub fn teie(&mut self) -> TEIE_W<'_>[src]

Bit 16 - Transfer error interrupt enable

pub fn fthres(&mut self) -> FTHRES_W<'_>[src]

Bits 8:12 - IFO threshold level

pub fn fsel(&mut self) -> FSEL_W<'_>[src]

Bit 7 - FLASH memory selection

pub fn dqm(&mut self) -> DQM_W<'_>[src]

Bit 6 - Dual-quad mode

pub fn tcen(&mut self) -> TCEN_W<'_>[src]

Bit 3 - Timeout counter enable

pub fn dmaen(&mut self) -> DMAEN_W<'_>[src]

Bit 2 - DMA enable

pub fn abort(&mut self) -> ABORT_W<'_>[src]

Bit 1 - Abort request

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - Enable

impl W<u32, Reg<u32, _DCR1>>[src]

pub fn ckmode(&mut self) -> CKMODE_W<'_>[src]

Bit 0 - Mode 0 / mode 3

pub fn frck(&mut self) -> FRCK_W<'_>[src]

Bit 1 - Free running clock

pub fn csht(&mut self) -> CSHT_W<'_>[src]

Bits 8:10 - Chip-select high time

pub fn devsize(&mut self) -> DEVSIZE_W<'_>[src]

Bits 16:20 - Device size

pub fn mtyp(&mut self) -> MTYP_W<'_>[src]

Bits 24:25 - Memory type

impl W<u32, Reg<u32, _DCR2>>[src]

pub fn prescaler(&mut self) -> PRESCALER_W<'_>[src]

Bits 0:7 - Clock prescaler

pub fn wrapsize(&mut self) -> WRAPSIZE_W<'_>[src]

Bits 16:18 - Wrap size

impl W<u32, Reg<u32, _DCR3>>[src]

pub fn csbound(&mut self) -> CSBOUND_W<'_>[src]

Bits 16:20 - CS boundary

impl W<u32, Reg<u32, _DCR4>>[src]

pub fn tef(&mut self) -> TEF_W<'_>[src]

Bit 0 - Transfer error flag

pub fn tcf(&mut self) -> TCF_W<'_>[src]

Bit 1 - Transfer complete flag

pub fn ftf(&mut self) -> FTF_W<'_>[src]

Bit 2 - FIFO threshold flag

pub fn smf(&mut self) -> SMF_W<'_>[src]

Bit 3 - Status match flag

pub fn tof(&mut self) -> TOF_W<'_>[src]

Bit 4 - Timeout flag

pub fn busy(&mut self) -> BUSY_W<'_>[src]

Bit 5 - BUSY

pub fn flevel(&mut self) -> FLEVEL_W<'_>[src]

Bits 8:13 - FIFO level

impl W<u32, Reg<u32, _SR>>[src]

pub fn ctef(&mut self) -> CTEF_W<'_>[src]

Bit 0 - Clear transfer error flag

pub fn ctcf(&mut self) -> CTCF_W<'_>[src]

Bit 1 - Clear transfer complete flag

pub fn csmf(&mut self) -> CSMF_W<'_>[src]

Bit 3 - Clear status match flag

pub fn ctof(&mut self) -> CTOF_W<'_>[src]

Bit 4 - Clear timeout flag

impl W<u32, Reg<u32, _FCR>>[src]

pub fn dl(&mut self) -> DL_W<'_>[src]

Bits 0:31 - Data length

impl W<u32, Reg<u32, _DLR>>[src]

pub fn address(&mut self) -> ADDRESS_W<'_>[src]

Bits 0:31 - ADDRESS

impl W<u32, Reg<u32, _AR>>[src]

pub fn data(&mut self) -> DATA_W<'_>[src]

Bits 0:31 - Data

impl W<u32, Reg<u32, _DR>>[src]

pub fn mask(&mut self) -> MASK_W<'_>[src]

Bits 0:31 - Status mask

impl W<u32, Reg<u32, _PSMKR>>[src]

pub fn match_(&mut self) -> MATCH_W<'_>[src]

Bits 0:31 - Status match

impl W<u32, Reg<u32, _PSMAR>>[src]

pub fn interval(&mut self) -> INTERVAL_W<'_>[src]

Bits 0:15 - Polling interval

impl W<u32, Reg<u32, _PIR>>[src]

pub fn imode(&mut self) -> IMODE_W<'_>[src]

Bits 0:2 - Instruction mode

pub fn idtr(&mut self) -> IDTR_W<'_>[src]

Bit 3 - Instruction double transfer rate

pub fn isize(&mut self) -> ISIZE_W<'_>[src]

Bits 4:5 - Instruction size

pub fn admode(&mut self) -> ADMODE_W<'_>[src]

Bits 8:10 - Address mode

pub fn addtr(&mut self) -> ADDTR_W<'_>[src]

Bit 11 - Address double transfer rate

pub fn adsize(&mut self) -> ADSIZE_W<'_>[src]

Bits 12:13 - Address size

pub fn abmode(&mut self) -> ABMODE_W<'_>[src]

Bits 16:18 - Alternate byte mode

pub fn abdtr(&mut self) -> ABDTR_W<'_>[src]

Bit 19 - Alternate bytes double transfer rate

pub fn absize(&mut self) -> ABSIZE_W<'_>[src]

Bits 20:21 - Alternate bytes size

pub fn dmode(&mut self) -> DMODE_W<'_>[src]

Bits 24:26 - Data mode

pub fn ddtr(&mut self) -> DDTR_W<'_>[src]

Bit 27 - Alternate bytes double transfer rate

pub fn dqse(&mut self) -> DQSE_W<'_>[src]

Bit 29 - DQS enable

pub fn sioo(&mut self) -> SIOO_W<'_>[src]

Bit 31 - Send instruction only once mode

impl W<u32, Reg<u32, _CCR>>[src]

pub fn dcyc(&mut self) -> DCYC_W<'_>[src]

Bits 0:4 - Number of dummy cycles

pub fn dhqc(&mut self) -> DHQC_W<'_>[src]

Bit 28 - Delay hold quarter cycle

pub fn sshift(&mut self) -> SSHIFT_W<'_>[src]

Bit 30 - Sample shift

impl W<u32, Reg<u32, _TCR>>[src]

pub fn instruction(&mut self) -> INSTRUCTION_W<'_>[src]

Bits 0:31 - INSTRUCTION

impl W<u32, Reg<u32, _IR>>[src]

pub fn alternate(&mut self) -> ALTERNATE_W<'_>[src]

Bits 0:31 - Alternate bytes

impl W<u32, Reg<u32, _ABR>>[src]

pub fn timeout(&mut self) -> TIMEOUT_W<'_>[src]

Bits 0:15 - Timeout period

impl W<u32, Reg<u32, _LPTR>>[src]

pub fn imode(&mut self) -> IMODE_W<'_>[src]

Bits 0:2 - Instruction mode

pub fn idtr(&mut self) -> IDTR_W<'_>[src]

Bit 3 - Instruction double transfer rate

pub fn isize(&mut self) -> ISIZE_W<'_>[src]

Bits 4:5 - Instruction size

pub fn admode(&mut self) -> ADMODE_W<'_>[src]

Bits 8:10 - Address mode

pub fn addtr(&mut self) -> ADDTR_W<'_>[src]

Bit 11 - Address double transfer rate

pub fn adsize(&mut self) -> ADSIZE_W<'_>[src]

Bits 12:13 - Address size

pub fn abmode(&mut self) -> ABMODE_W<'_>[src]

Bits 16:18 - Alternate byte mode

pub fn abdtr(&mut self) -> ABDTR_W<'_>[src]

Bit 19 - Alternate bytes double transfer rate

pub fn absize(&mut self) -> ABSIZE_W<'_>[src]

Bits 20:21 - Alternate bytes size

pub fn dmode(&mut self) -> DMODE_W<'_>[src]

Bits 24:26 - Data mode

pub fn ddtr(&mut self) -> DDTR_W<'_>[src]

Bit 27 - alternate bytes double transfer rate

pub fn dqse(&mut self) -> DQSE_W<'_>[src]

Bit 29 - DQS enable

impl W<u32, Reg<u32, _WPCCR>>[src]

pub fn dcyc(&mut self) -> DCYC_W<'_>[src]

Bits 0:4 - Number of dummy cycles

pub fn dhqc(&mut self) -> DHQC_W<'_>[src]

Bit 28 - Delay hold quarter cycle

pub fn sshift(&mut self) -> SSHIFT_W<'_>[src]

Bit 30 - Sample shift

impl W<u32, Reg<u32, _WPTCR>>[src]

pub fn instruction(&mut self) -> INSTRUCTION_W<'_>[src]

Bits 0:31 - INSTRUCTION

impl W<u32, Reg<u32, _WPIR>>[src]

pub fn alternate(&mut self) -> ALTERNATE_W<'_>[src]

Bits 0:31 - Alternate bytes

impl W<u32, Reg<u32, _WPABR>>[src]

pub fn lm(&mut self) -> LM_W<'_>[src]

Bit 0 - Latency mode

pub fn wzl(&mut self) -> WZL_W<'_>[src]

Bit 1 - Write zero latency

pub fn tacc(&mut self) -> TACC_W<'_>[src]

Bits 8:15 - Access time

pub fn trwr(&mut self) -> TRWR_W<'_>[src]

Bits 16:23 - Read write recovery time

impl W<u32, Reg<u32, _WCCR>>[src]

pub fn refresh(&mut self) -> REFRESH_W<'_>[src]

Bits 0:15 - REFRESH

impl W<u32, Reg<u32, _WTCR>>[src]

pub fn imode(&mut self) -> IMODE_W<'_>[src]

Bits 0:2 - IMODE

pub fn idtr(&mut self) -> IDTR_W<'_>[src]

Bit 3 - IDTR

pub fn isize(&mut self) -> ISIZE_W<'_>[src]

Bits 4:5 - ISIZE

pub fn admode(&mut self) -> ADMODE_W<'_>[src]

Bits 8:10 - ADMODE

pub fn addtr(&mut self) -> ADDTR_W<'_>[src]

Bit 11 - ADDTR

pub fn adsize(&mut self) -> ADSIZE_W<'_>[src]

Bits 12:13 - ADSIZE

pub fn abmode(&mut self) -> ABMODE_W<'_>[src]

Bits 16:18 - ABMODE

pub fn abdtr(&mut self) -> ABDTR_W<'_>[src]

Bit 19 - ABDTR

pub fn absize(&mut self) -> ABSIZE_W<'_>[src]

Bits 20:21 - ABSIZE

pub fn dmode(&mut self) -> DMODE_W<'_>[src]

Bits 24:26 - DMODE

pub fn ddtr(&mut self) -> DDTR_W<'_>[src]

Bit 27 - DDTR

pub fn dqse(&mut self) -> DQSE_W<'_>[src]

Bit 29 - DQSE

impl W<u32, Reg<u32, _WIR>>[src]

pub fn dcyc(&mut self) -> DCYC_W<'_>[src]

Bits 0:4 - DCYC

impl W<u32, Reg<u32, _WABR>>[src]

pub fn instruction(&mut self) -> INSTRUCTION_W<'_>[src]

Bits 0:31 - INSTRUCTION

impl W<u32, Reg<u32, _HLCR>>[src]

pub fn alternate(&mut self) -> ALTERNATE_W<'_>[src]

Bits 0:31 - Alternate bytes

impl W<u32, Reg<u32, _CR1>>[src]

pub fn m1(&mut self) -> M1_W<'_>[src]

Bit 28 - Word length

pub fn deat(&mut self) -> DEAT_W<'_>[src]

Bits 21:25 - DEAT

pub fn dedt(&mut self) -> DEDT_W<'_>[src]

Bits 16:20 - DEDT

pub fn cmie(&mut self) -> CMIE_W<'_>[src]

Bit 14 - Character match interrupt enable

pub fn mme(&mut self) -> MME_W<'_>[src]

Bit 13 - Mute mode enable

pub fn m0(&mut self) -> M0_W<'_>[src]

Bit 12 - Word length

pub fn wake(&mut self) -> WAKE_W<'_>[src]

Bit 11 - Receiver wakeup method

pub fn pce(&mut self) -> PCE_W<'_>[src]

Bit 10 - Parity control enable

pub fn ps(&mut self) -> PS_W<'_>[src]

Bit 9 - Parity selection

pub fn peie(&mut self) -> PEIE_W<'_>[src]

Bit 8 - PE interrupt enable

pub fn txeie(&mut self) -> TXEIE_W<'_>[src]

Bit 7 - interrupt enable

pub fn tcie(&mut self) -> TCIE_W<'_>[src]

Bit 6 - Transmission complete interrupt enable

pub fn rxneie(&mut self) -> RXNEIE_W<'_>[src]

Bit 5 - RXNE interrupt enable

pub fn idleie(&mut self) -> IDLEIE_W<'_>[src]

Bit 4 - IDLE interrupt enable

pub fn te(&mut self) -> TE_W<'_>[src]

Bit 3 - Transmitter enable

pub fn re(&mut self) -> RE_W<'_>[src]

Bit 2 - Receiver enable

pub fn uesm(&mut self) -> UESM_W<'_>[src]

Bit 1 - USART enable in Stop mode

pub fn ue(&mut self) -> UE_W<'_>[src]

Bit 0 - USART enable

pub fn fifoen(&mut self) -> FIFOEN_W<'_>[src]

Bit 29 - FIFOEN

pub fn txfeie(&mut self) -> TXFEIE_W<'_>[src]

Bit 30 - TXFEIE

pub fn rxffie(&mut self) -> RXFFIE_W<'_>[src]

Bit 31 - RXFFIE

impl W<u32, Reg<u32, _CR2>>[src]

pub fn add4_7(&mut self) -> ADD4_7_W<'_>[src]

Bits 28:31 - Address of the USART node

pub fn add0_3(&mut self) -> ADD0_3_W<'_>[src]

Bits 24:27 - Address of the USART node

pub fn msbfirst(&mut self) -> MSBFIRST_W<'_>[src]

Bit 19 - Most significant bit first

pub fn tainv(&mut self) -> TAINV_W<'_>[src]

Bit 18 - Binary data inversion

pub fn txinv(&mut self) -> TXINV_W<'_>[src]

Bit 17 - TX pin active level inversion

pub fn rxinv(&mut self) -> RXINV_W<'_>[src]

Bit 16 - RX pin active level inversion

pub fn swap(&mut self) -> SWAP_W<'_>[src]

Bit 15 - Swap TX/RX pins

pub fn stop(&mut self) -> STOP_W<'_>[src]

Bits 12:13 - STOP bits

pub fn addm7(&mut self) -> ADDM7_W<'_>[src]

Bit 4 - 7-bit Address Detection/4-bit Address Detection

impl W<u32, Reg<u32, _CR3>>[src]

pub fn wufie(&mut self) -> WUFIE_W<'_>[src]

Bit 22 - Wakeup from Stop mode interrupt enable

pub fn wus(&mut self) -> WUS_W<'_>[src]

Bits 20:21 - Wakeup from Stop mode interrupt flag selection

pub fn dep(&mut self) -> DEP_W<'_>[src]

Bit 15 - Driver enable polarity selection

pub fn dem(&mut self) -> DEM_W<'_>[src]

Bit 14 - Driver enable mode

pub fn ddre(&mut self) -> DDRE_W<'_>[src]

Bit 13 - DMA Disable on Reception Error

pub fn ovrdis(&mut self) -> OVRDIS_W<'_>[src]

Bit 12 - Overrun Disable

pub fn ctsie(&mut self) -> CTSIE_W<'_>[src]

Bit 10 - CTS interrupt enable

pub fn ctse(&mut self) -> CTSE_W<'_>[src]

Bit 9 - CTS enable

pub fn rtse(&mut self) -> RTSE_W<'_>[src]

Bit 8 - RTS enable

pub fn dmat(&mut self) -> DMAT_W<'_>[src]

Bit 7 - DMA enable transmitter

pub fn dmar(&mut self) -> DMAR_W<'_>[src]

Bit 6 - DMA enable receiver

pub fn hdsel(&mut self) -> HDSEL_W<'_>[src]

Bit 3 - Half-duplex selection

pub fn eie(&mut self) -> EIE_W<'_>[src]

Bit 0 - Error interrupt enable

pub fn txftie(&mut self) -> TXFTIE_W<'_>[src]

Bit 23 - TXFTIE

pub fn rxftcfg(&mut self) -> RXFTCFG_W<'_>[src]

Bits 25:27 - RXFTCFG

pub fn rxftie(&mut self) -> RXFTIE_W<'_>[src]

Bit 28 - RXFTIE

pub fn txftcfg(&mut self) -> TXFTCFG_W<'_>[src]

Bits 29:31 - TXFTCFG

impl W<u32, Reg<u32, _BRR>>[src]

pub fn brr(&mut self) -> BRR_W<'_>[src]

Bits 0:19 - BRR

impl W<u32, Reg<u32, _RQR>>[src]

pub fn rxfrq(&mut self) -> RXFRQ_W<'_>[src]

Bit 3 - Receive data flush request

pub fn mmrq(&mut self) -> MMRQ_W<'_>[src]

Bit 2 - Mute mode request

pub fn sbkrq(&mut self) -> SBKRQ_W<'_>[src]

Bit 1 - Send break request

pub fn txfrq(&mut self) -> TXFRQ_W<'_>[src]

Bit 4 - TXFRQ

impl W<u32, Reg<u32, _ICR>>[src]

pub fn wucf(&mut self) -> WUCF_W<'_>[src]

Bit 20 - Wakeup from Stop mode clear flag

pub fn cmcf(&mut self) -> CMCF_W<'_>[src]

Bit 17 - Character match clear flag

pub fn ctscf(&mut self) -> CTSCF_W<'_>[src]

Bit 9 - CTS clear flag

pub fn tccf(&mut self) -> TCCF_W<'_>[src]

Bit 6 - Transmission complete clear flag

pub fn idlecf(&mut self) -> IDLECF_W<'_>[src]

Bit 4 - Idle line detected clear flag

pub fn orecf(&mut self) -> ORECF_W<'_>[src]

Bit 3 - Overrun error clear flag

pub fn ncf(&mut self) -> NCF_W<'_>[src]

Bit 2 - Noise detected clear flag

pub fn fecf(&mut self) -> FECF_W<'_>[src]

Bit 1 - Framing error clear flag

pub fn pecf(&mut self) -> PECF_W<'_>[src]

Bit 0 - Parity error clear flag

impl W<u32, Reg<u32, _TDR>>[src]

pub fn tdr(&mut self) -> TDR_W<'_>[src]

Bits 0:8 - Transmit data value

impl W<u32, Reg<u32, _PRESC>>[src]

pub fn prescaler(&mut self) -> PRESCALER_W<'_>[src]

Bits 0:3 - PRESCALER

impl W<u32, Reg<u32, _COMP1_CSR>>[src]

pub fn comp1_en(&mut self) -> COMP1_EN_W<'_>[src]

Bit 0 - Comparator 1 enable bit

pub fn comp1_pwrmode(&mut self) -> COMP1_PWRMODE_W<'_>[src]

Bits 2:3 - Power Mode of the comparator 1

pub fn comp1_inmsel(&mut self) -> COMP1_INMSEL_W<'_>[src]

Bits 4:6 - Comparator 1 Input Minus connection configuration bit

pub fn comp1_inpsel(&mut self) -> COMP1_INPSEL_W<'_>[src]

Bit 7 - Comparator1 input plus selection bit

pub fn comp1_polarity(&mut self) -> COMP1_POLARITY_W<'_>[src]

Bit 15 - Comparator 1 polarity selection bit

pub fn comp1_hyst(&mut self) -> COMP1_HYST_W<'_>[src]

Bits 16:17 - Comparator 1 hysteresis selection bits

pub fn comp1_blanking(&mut self) -> COMP1_BLANKING_W<'_>[src]

Bits 18:20 - Comparator 1 blanking source selection bits

pub fn comp1_brgen(&mut self) -> COMP1_BRGEN_W<'_>[src]

Bit 22 - Scaler bridge enable

pub fn comp1_scalen(&mut self) -> COMP1_SCALEN_W<'_>[src]

Bit 23 - Voltage scaler enable bit

pub fn comp1_lock(&mut self) -> COMP1_LOCK_W<'_>[src]

Bit 31 - COMP1_CSR register lock bit

impl W<u32, Reg<u32, _COMP2_CSR>>[src]

pub fn comp2_en(&mut self) -> COMP2_EN_W<'_>[src]

Bit 0 - Comparator 2 enable bit

pub fn comp2_pwrmode(&mut self) -> COMP2_PWRMODE_W<'_>[src]

Bits 2:3 - Power Mode of the comparator 2

pub fn comp2_inmsel(&mut self) -> COMP2_INMSEL_W<'_>[src]

Bits 4:6 - Comparator 2 Input Minus connection configuration bit

pub fn comp2_inpsel(&mut self) -> COMP2_INPSEL_W<'_>[src]

Bit 7 - Comparator 2 Input Plus connection configuration bit

pub fn comp2_winmode(&mut self) -> COMP2_WINMODE_W<'_>[src]

Bit 9 - Windows mode selection bit

pub fn comp2_polarity(&mut self) -> COMP2_POLARITY_W<'_>[src]

Bit 15 - Comparator 2 polarity selection bit

pub fn comp2_hyst(&mut self) -> COMP2_HYST_W<'_>[src]

Bits 16:17 - Comparator 2 hysteresis selection bits

pub fn comp2_blanking(&mut self) -> COMP2_BLANKING_W<'_>[src]

Bits 18:20 - Comparator 2 blanking source selection bits

pub fn comp2_brgen(&mut self) -> COMP2_BRGEN_W<'_>[src]

Bit 22 - Scaler bridge enable

pub fn comp2_scalen(&mut self) -> COMP2_SCALEN_W<'_>[src]

Bit 23 - Voltage scaler enable bit

pub fn comp2_lock(&mut self) -> COMP2_LOCK_W<'_>[src]

Bit 31 - COMP2_CSR register lock bit

impl W<u32, Reg<u32, _CSR>>[src]

pub fn envr(&mut self) -> ENVR_W<'_>[src]

Bit 0 - Voltage reference buffer enable

pub fn hiz(&mut self) -> HIZ_W<'_>[src]

Bit 1 - High impedance mode

pub fn vrs(&mut self) -> VRS_W<'_>[src]

Bit 2 - Voltage reference scale

impl W<u32, Reg<u32, _CCR>>[src]

pub fn trim(&mut self) -> TRIM_W<'_>[src]

Bits 0:5 - Trimming code

impl W<u32, Reg<u32, _CR>>[src]

pub fn ctph(&mut self) -> CTPH_W<'_>[src]

Bits 28:31 - Charge transfer pulse high

pub fn ctpl(&mut self) -> CTPL_W<'_>[src]

Bits 24:27 - Charge transfer pulse low

pub fn ssd(&mut self) -> SSD_W<'_>[src]

Bits 17:23 - Spread spectrum deviation

pub fn sse(&mut self) -> SSE_W<'_>[src]

Bit 16 - Spread spectrum enable

pub fn sspsc(&mut self) -> SSPSC_W<'_>[src]

Bit 15 - Spread spectrum prescaler

pub fn pgpsc(&mut self) -> PGPSC_W<'_>[src]

Bits 12:14 - pulse generator prescaler

pub fn mcv(&mut self) -> MCV_W<'_>[src]

Bits 5:7 - Max count value

pub fn iodef(&mut self) -> IODEF_W<'_>[src]

Bit 4 - I/O Default mode

pub fn syncpol(&mut self) -> SYNCPOL_W<'_>[src]

Bit 3 - Synchronization pin polarity

pub fn am(&mut self) -> AM_W<'_>[src]

Bit 2 - Acquisition mode

pub fn start(&mut self) -> START_W<'_>[src]

Bit 1 - Start a new acquisition

pub fn tsce(&mut self) -> TSCE_W<'_>[src]

Bit 0 - Touch sensing controller enable

impl W<u32, Reg<u32, _IER>>[src]

pub fn mceie(&mut self) -> MCEIE_W<'_>[src]

Bit 1 - Max count error interrupt enable

pub fn eoaie(&mut self) -> EOAIE_W<'_>[src]

Bit 0 - End of acquisition interrupt enable

impl W<u32, Reg<u32, _ICR>>[src]

pub fn mceic(&mut self) -> MCEIC_W<'_>[src]

Bit 1 - Max count error interrupt clear

pub fn eoaic(&mut self) -> EOAIC_W<'_>[src]

Bit 0 - End of acquisition interrupt clear

impl W<u32, Reg<u32, _ISR>>[src]

pub fn mcef(&mut self) -> MCEF_W<'_>[src]

Bit 1 - Max count error flag

pub fn eoaf(&mut self) -> EOAF_W<'_>[src]

Bit 0 - End of acquisition flag

impl W<u32, Reg<u32, _IOHCR>>[src]

pub fn g8_io4(&mut self) -> G8_IO4_W<'_>[src]

Bit 31 - G8_IO4

pub fn g8_io3(&mut self) -> G8_IO3_W<'_>[src]

Bit 30 - G8_IO3

pub fn g8_io2(&mut self) -> G8_IO2_W<'_>[src]

Bit 29 - G8_IO2

pub fn g8_io1(&mut self) -> G8_IO1_W<'_>[src]

Bit 28 - G8_IO1

pub fn g7_io4(&mut self) -> G7_IO4_W<'_>[src]

Bit 27 - G7_IO4

pub fn g7_io3(&mut self) -> G7_IO3_W<'_>[src]

Bit 26 - G7_IO3

pub fn g7_io2(&mut self) -> G7_IO2_W<'_>[src]

Bit 25 - G7_IO2

pub fn g7_io1(&mut self) -> G7_IO1_W<'_>[src]

Bit 24 - G7_IO1

pub fn g6_io4(&mut self) -> G6_IO4_W<'_>[src]

Bit 23 - G6_IO4

pub fn g6_io3(&mut self) -> G6_IO3_W<'_>[src]

Bit 22 - G6_IO3

pub fn g6_io2(&mut self) -> G6_IO2_W<'_>[src]

Bit 21 - G6_IO2

pub fn g6_io1(&mut self) -> G6_IO1_W<'_>[src]

Bit 20 - G6_IO1

pub fn g5_io4(&mut self) -> G5_IO4_W<'_>[src]

Bit 19 - G5_IO4

pub fn g5_io3(&mut self) -> G5_IO3_W<'_>[src]

Bit 18 - G5_IO3

pub fn g5_io2(&mut self) -> G5_IO2_W<'_>[src]

Bit 17 - G5_IO2

pub fn g5_io1(&mut self) -> G5_IO1_W<'_>[src]

Bit 16 - G5_IO1

pub fn g4_io4(&mut self) -> G4_IO4_W<'_>[src]

Bit 15 - G4_IO4

pub fn g4_io3(&mut self) -> G4_IO3_W<'_>[src]

Bit 14 - G4_IO3

pub fn g4_io2(&mut self) -> G4_IO2_W<'_>[src]

Bit 13 - G4_IO2

pub fn g4_io1(&mut self) -> G4_IO1_W<'_>[src]

Bit 12 - G4_IO1

pub fn g3_io4(&mut self) -> G3_IO4_W<'_>[src]

Bit 11 - G3_IO4

pub fn g3_io3(&mut self) -> G3_IO3_W<'_>[src]

Bit 10 - G3_IO3

pub fn g3_io2(&mut self) -> G3_IO2_W<'_>[src]

Bit 9 - G3_IO2

pub fn g3_io1(&mut self) -> G3_IO1_W<'_>[src]

Bit 8 - G3_IO1

pub fn g2_io4(&mut self) -> G2_IO4_W<'_>[src]

Bit 7 - G2_IO4

pub fn g2_io3(&mut self) -> G2_IO3_W<'_>[src]

Bit 6 - G2_IO3

pub fn g2_io2(&mut self) -> G2_IO2_W<'_>[src]

Bit 5 - G2_IO2

pub fn g2_io1(&mut self) -> G2_IO1_W<'_>[src]

Bit 4 - G2_IO1

pub fn g1_io4(&mut self) -> G1_IO4_W<'_>[src]

Bit 3 - G1_IO4

pub fn g1_io3(&mut self) -> G1_IO3_W<'_>[src]

Bit 2 - G1_IO3

pub fn g1_io2(&mut self) -> G1_IO2_W<'_>[src]

Bit 1 - G1_IO2

pub fn g1_io1(&mut self) -> G1_IO1_W<'_>[src]

Bit 0 - G1_IO1

impl W<u32, Reg<u32, _IOASCR>>[src]

pub fn g8_io4(&mut self) -> G8_IO4_W<'_>[src]

Bit 31 - G8_IO4

pub fn g8_io3(&mut self) -> G8_IO3_W<'_>[src]

Bit 30 - G8_IO3

pub fn g8_io2(&mut self) -> G8_IO2_W<'_>[src]

Bit 29 - G8_IO2

pub fn g8_io1(&mut self) -> G8_IO1_W<'_>[src]

Bit 28 - G8_IO1

pub fn g7_io4(&mut self) -> G7_IO4_W<'_>[src]

Bit 27 - G7_IO4

pub fn g7_io3(&mut self) -> G7_IO3_W<'_>[src]

Bit 26 - G7_IO3

pub fn g7_io2(&mut self) -> G7_IO2_W<'_>[src]

Bit 25 - G7_IO2

pub fn g7_io1(&mut self) -> G7_IO1_W<'_>[src]

Bit 24 - G7_IO1

pub fn g6_io4(&mut self) -> G6_IO4_W<'_>[src]

Bit 23 - G6_IO4

pub fn g6_io3(&mut self) -> G6_IO3_W<'_>[src]

Bit 22 - G6_IO3

pub fn g6_io2(&mut self) -> G6_IO2_W<'_>[src]

Bit 21 - G6_IO2

pub fn g6_io1(&mut self) -> G6_IO1_W<'_>[src]

Bit 20 - G6_IO1

pub fn g5_io4(&mut self) -> G5_IO4_W<'_>[src]

Bit 19 - G5_IO4

pub fn g5_io3(&mut self) -> G5_IO3_W<'_>[src]

Bit 18 - G5_IO3

pub fn g5_io2(&mut self) -> G5_IO2_W<'_>[src]

Bit 17 - G5_IO2

pub fn g5_io1(&mut self) -> G5_IO1_W<'_>[src]

Bit 16 - G5_IO1

pub fn g4_io4(&mut self) -> G4_IO4_W<'_>[src]

Bit 15 - G4_IO4

pub fn g4_io3(&mut self) -> G4_IO3_W<'_>[src]

Bit 14 - G4_IO3

pub fn g4_io2(&mut self) -> G4_IO2_W<'_>[src]

Bit 13 - G4_IO2

pub fn g4_io1(&mut self) -> G4_IO1_W<'_>[src]

Bit 12 - G4_IO1

pub fn g3_io4(&mut self) -> G3_IO4_W<'_>[src]

Bit 11 - G3_IO4

pub fn g3_io3(&mut self) -> G3_IO3_W<'_>[src]

Bit 10 - G3_IO3

pub fn g3_io2(&mut self) -> G3_IO2_W<'_>[src]

Bit 9 - G3_IO2

pub fn g3_io1(&mut self) -> G3_IO1_W<'_>[src]

Bit 8 - G3_IO1

pub fn g2_io4(&mut self) -> G2_IO4_W<'_>[src]

Bit 7 - G2_IO4

pub fn g2_io3(&mut self) -> G2_IO3_W<'_>[src]

Bit 6 - G2_IO3

pub fn g2_io2(&mut self) -> G2_IO2_W<'_>[src]

Bit 5 - G2_IO2

pub fn g2_io1(&mut self) -> G2_IO1_W<'_>[src]

Bit 4 - G2_IO1

pub fn g1_io4(&mut self) -> G1_IO4_W<'_>[src]

Bit 3 - G1_IO4

pub fn g1_io3(&mut self) -> G1_IO3_W<'_>[src]

Bit 2 - G1_IO3

pub fn g1_io2(&mut self) -> G1_IO2_W<'_>[src]

Bit 1 - G1_IO2

pub fn g1_io1(&mut self) -> G1_IO1_W<'_>[src]

Bit 0 - G1_IO1

impl W<u32, Reg<u32, _IOSCR>>[src]

pub fn g8_io4(&mut self) -> G8_IO4_W<'_>[src]

Bit 31 - G8_IO4

pub fn g8_io3(&mut self) -> G8_IO3_W<'_>[src]

Bit 30 - G8_IO3

pub fn g8_io2(&mut self) -> G8_IO2_W<'_>[src]

Bit 29 - G8_IO2

pub fn g8_io1(&mut self) -> G8_IO1_W<'_>[src]

Bit 28 - G8_IO1

pub fn g7_io4(&mut self) -> G7_IO4_W<'_>[src]

Bit 27 - G7_IO4

pub fn g7_io3(&mut self) -> G7_IO3_W<'_>[src]

Bit 26 - G7_IO3

pub fn g7_io2(&mut self) -> G7_IO2_W<'_>[src]

Bit 25 - G7_IO2

pub fn g7_io1(&mut self) -> G7_IO1_W<'_>[src]

Bit 24 - G7_IO1

pub fn g6_io4(&mut self) -> G6_IO4_W<'_>[src]

Bit 23 - G6_IO4

pub fn g6_io3(&mut self) -> G6_IO3_W<'_>[src]

Bit 22 - G6_IO3

pub fn g6_io2(&mut self) -> G6_IO2_W<'_>[src]

Bit 21 - G6_IO2

pub fn g6_io1(&mut self) -> G6_IO1_W<'_>[src]

Bit 20 - G6_IO1

pub fn g5_io4(&mut self) -> G5_IO4_W<'_>[src]

Bit 19 - G5_IO4

pub fn g5_io3(&mut self) -> G5_IO3_W<'_>[src]

Bit 18 - G5_IO3

pub fn g5_io2(&mut self) -> G5_IO2_W<'_>[src]

Bit 17 - G5_IO2

pub fn g5_io1(&mut self) -> G5_IO1_W<'_>[src]

Bit 16 - G5_IO1

pub fn g4_io4(&mut self) -> G4_IO4_W<'_>[src]

Bit 15 - G4_IO4

pub fn g4_io3(&mut self) -> G4_IO3_W<'_>[src]

Bit 14 - G4_IO3

pub fn g4_io2(&mut self) -> G4_IO2_W<'_>[src]

Bit 13 - G4_IO2

pub fn g4_io1(&mut self) -> G4_IO1_W<'_>[src]

Bit 12 - G4_IO1

pub fn g3_io4(&mut self) -> G3_IO4_W<'_>[src]

Bit 11 - G3_IO4

pub fn g3_io3(&mut self) -> G3_IO3_W<'_>[src]

Bit 10 - G3_IO3

pub fn g3_io2(&mut self) -> G3_IO2_W<'_>[src]

Bit 9 - G3_IO2

pub fn g3_io1(&mut self) -> G3_IO1_W<'_>[src]

Bit 8 - G3_IO1

pub fn g2_io4(&mut self) -> G2_IO4_W<'_>[src]

Bit 7 - G2_IO4

pub fn g2_io3(&mut self) -> G2_IO3_W<'_>[src]

Bit 6 - G2_IO3

pub fn g2_io2(&mut self) -> G2_IO2_W<'_>[src]

Bit 5 - G2_IO2

pub fn g2_io1(&mut self) -> G2_IO1_W<'_>[src]

Bit 4 - G2_IO1

pub fn g1_io4(&mut self) -> G1_IO4_W<'_>[src]

Bit 3 - G1_IO4

pub fn g1_io3(&mut self) -> G1_IO3_W<'_>[src]

Bit 2 - G1_IO3

pub fn g1_io2(&mut self) -> G1_IO2_W<'_>[src]

Bit 1 - G1_IO2

pub fn g1_io1(&mut self) -> G1_IO1_W<'_>[src]

Bit 0 - G1_IO1

impl W<u32, Reg<u32, _IOCCR>>[src]

pub fn g8_io4(&mut self) -> G8_IO4_W<'_>[src]

Bit 31 - G8_IO4

pub fn g8_io3(&mut self) -> G8_IO3_W<'_>[src]

Bit 30 - G8_IO3

pub fn g8_io2(&mut self) -> G8_IO2_W<'_>[src]

Bit 29 - G8_IO2

pub fn g8_io1(&mut self) -> G8_IO1_W<'_>[src]

Bit 28 - G8_IO1

pub fn g7_io4(&mut self) -> G7_IO4_W<'_>[src]

Bit 27 - G7_IO4

pub fn g7_io3(&mut self) -> G7_IO3_W<'_>[src]

Bit 26 - G7_IO3

pub fn g7_io2(&mut self) -> G7_IO2_W<'_>[src]

Bit 25 - G7_IO2

pub fn g7_io1(&mut self) -> G7_IO1_W<'_>[src]

Bit 24 - G7_IO1

pub fn g6_io4(&mut self) -> G6_IO4_W<'_>[src]

Bit 23 - G6_IO4

pub fn g6_io3(&mut self) -> G6_IO3_W<'_>[src]

Bit 22 - G6_IO3

pub fn g6_io2(&mut self) -> G6_IO2_W<'_>[src]

Bit 21 - G6_IO2

pub fn g6_io1(&mut self) -> G6_IO1_W<'_>[src]

Bit 20 - G6_IO1

pub fn g5_io4(&mut self) -> G5_IO4_W<'_>[src]

Bit 19 - G5_IO4

pub fn g5_io3(&mut self) -> G5_IO3_W<'_>[src]

Bit 18 - G5_IO3

pub fn g5_io2(&mut self) -> G5_IO2_W<'_>[src]

Bit 17 - G5_IO2

pub fn g5_io1(&mut self) -> G5_IO1_W<'_>[src]

Bit 16 - G5_IO1

pub fn g4_io4(&mut self) -> G4_IO4_W<'_>[src]

Bit 15 - G4_IO4

pub fn g4_io3(&mut self) -> G4_IO3_W<'_>[src]

Bit 14 - G4_IO3

pub fn g4_io2(&mut self) -> G4_IO2_W<'_>[src]

Bit 13 - G4_IO2

pub fn g4_io1(&mut self) -> G4_IO1_W<'_>[src]

Bit 12 - G4_IO1

pub fn g3_io4(&mut self) -> G3_IO4_W<'_>[src]

Bit 11 - G3_IO4

pub fn g3_io3(&mut self) -> G3_IO3_W<'_>[src]

Bit 10 - G3_IO3

pub fn g3_io2(&mut self) -> G3_IO2_W<'_>[src]

Bit 9 - G3_IO2

pub fn g3_io1(&mut self) -> G3_IO1_W<'_>[src]

Bit 8 - G3_IO1

pub fn g2_io4(&mut self) -> G2_IO4_W<'_>[src]

Bit 7 - G2_IO4

pub fn g2_io3(&mut self) -> G2_IO3_W<'_>[src]

Bit 6 - G2_IO3

pub fn g2_io2(&mut self) -> G2_IO2_W<'_>[src]

Bit 5 - G2_IO2

pub fn g2_io1(&mut self) -> G2_IO1_W<'_>[src]

Bit 4 - G2_IO1

pub fn g1_io4(&mut self) -> G1_IO4_W<'_>[src]

Bit 3 - G1_IO4

pub fn g1_io3(&mut self) -> G1_IO3_W<'_>[src]

Bit 2 - G1_IO3

pub fn g1_io2(&mut self) -> G1_IO2_W<'_>[src]

Bit 1 - G1_IO2

pub fn g1_io1(&mut self) -> G1_IO1_W<'_>[src]

Bit 0 - G1_IO1

impl W<u32, Reg<u32, _IOGCSR>>[src]

pub fn g8e(&mut self) -> G8E_W<'_>[src]

Bit 7 - Analog I/O group x enable

pub fn g7e(&mut self) -> G7E_W<'_>[src]

Bit 6 - Analog I/O group x enable

pub fn g6e(&mut self) -> G6E_W<'_>[src]

Bit 5 - Analog I/O group x enable

pub fn g5e(&mut self) -> G5E_W<'_>[src]

Bit 4 - Analog I/O group x enable

pub fn g4e(&mut self) -> G4E_W<'_>[src]

Bit 3 - Analog I/O group x enable

pub fn g3e(&mut self) -> G3E_W<'_>[src]

Bit 2 - Analog I/O group x enable

pub fn g2e(&mut self) -> G2E_W<'_>[src]

Bit 1 - Analog I/O group x enable

pub fn g1e(&mut self) -> G1E_W<'_>[src]

Bit 0 - Analog I/O group x enable

impl W<u32, Reg<u32, _CFG1>>[src]

pub fn hbitclkdiv(&mut self) -> HBITCLKDIV_W<'_>[src]

Bits 0:5 - HBITCLKDIV

pub fn ifrgap(&mut self) -> IFRGAP_W<'_>[src]

Bits 6:10 - IFRGAP

pub fn transwin(&mut self) -> TRANSWIN_W<'_>[src]

Bits 11:15 - TRANSWIN

pub fn psc_usbpdclk(&mut self) -> PSC_USBPDCLK_W<'_>[src]

Bits 17:19 - PSC_USBPDCLK

pub fn rxordseten(&mut self) -> RXORDSETEN_W<'_>[src]

Bits 20:28 - RXORDSETEN

pub fn txdmaen(&mut self) -> TXDMAEN_W<'_>[src]

Bit 29 - TXDMAEN

pub fn rxdmaen(&mut self) -> RXDMAEN_W<'_>[src]

Bit 30 - RXDMAEN:

pub fn ucpden(&mut self) -> UCPDEN_W<'_>[src]

Bit 31 - UCPDEN

impl W<u32, Reg<u32, _CFG2>>[src]

pub fn rxfiltdis(&mut self) -> RXFILTDIS_W<'_>[src]

Bit 0 - RXFILTDIS

pub fn rxfilt2n3(&mut self) -> RXFILT2N3_W<'_>[src]

Bit 1 - RXFILT2N3

pub fn forceclk(&mut self) -> FORCECLK_W<'_>[src]

Bit 2 - FORCECLK

pub fn wupen(&mut self) -> WUPEN_W<'_>[src]

Bit 3 - WUPEN

impl W<u32, Reg<u32, _CFG3>>[src]

pub fn trim1_ng_ccrpd(&mut self) -> TRIM1_NG_CCRPD_W<'_>[src]

Bits 0:3 - TRIM1_NG_CCRPD

pub fn trim1_ng_cc1a5(&mut self) -> TRIM1_NG_CC1A5_W<'_>[src]

Bits 4:8 - TRIM1_NG_CC1A5

pub fn trim1_ng_cc3a0(&mut self) -> TRIM1_NG_CC3A0_W<'_>[src]

Bits 9:12 - TRIM1_NG_CC3A0

pub fn trim2_ng_ccrpd(&mut self) -> TRIM2_NG_CCRPD_W<'_>[src]

Bits 16:19 - TRIM2_NG_CCRPD

pub fn trim2_ng_cc1a5(&mut self) -> TRIM2_NG_CC1A5_W<'_>[src]

Bits 20:24 - TRIM2_NG_CC1A5

pub fn trim2_ng_cc3a0(&mut self) -> TRIM2_NG_CC3A0_W<'_>[src]

Bits 25:28 - TRIM2_NG_CC3A0

impl W<u32, Reg<u32, _CR>>[src]

pub fn txmode(&mut self) -> TXMODE_W<'_>[src]

Bits 0:1 - TXMODE

pub fn txsend(&mut self) -> TXSEND_W<'_>[src]

Bit 2 - TXSEND

pub fn txhrst(&mut self) -> TXHRST_W<'_>[src]

Bit 3 - TXHRST

pub fn rxmode(&mut self) -> RXMODE_W<'_>[src]

Bit 4 - RXMODE

pub fn phyrxen(&mut self) -> PHYRXEN_W<'_>[src]

Bit 5 - PHYRXEN

pub fn phyccsel(&mut self) -> PHYCCSEL_W<'_>[src]

Bit 6 - PHYCCSEL

pub fn anasubmode(&mut self) -> ANASUBMODE_W<'_>[src]

Bits 7:8 - ANASUBMODE

pub fn anamode(&mut self) -> ANAMODE_W<'_>[src]

Bit 9 - ANAMODE

pub fn ccenable(&mut self) -> CCENABLE_W<'_>[src]

Bits 10:11 - CCENABLE

pub fn frsrxen(&mut self) -> FRSRXEN_W<'_>[src]

Bit 16 - FRSRXEN

pub fn frstx(&mut self) -> FRSTX_W<'_>[src]

Bit 17 - FRSTX

pub fn rdch(&mut self) -> RDCH_W<'_>[src]

Bit 18 - RDCH

pub fn cc1tcdis(&mut self) -> CC1TCDIS_W<'_>[src]

Bit 20 - CC1TCDIS

pub fn cc2tcdis(&mut self) -> CC2TCDIS_W<'_>[src]

Bit 21 - CC2TCDIS

impl W<u32, Reg<u32, _IMR>>[src]

pub fn txisie(&mut self) -> TXISIE_W<'_>[src]

Bit 0 - TXISIE

pub fn txmsgdiscie(&mut self) -> TXMSGDISCIE_W<'_>[src]

Bit 1 - TXMSGDISCIE

pub fn txmsgsentie(&mut self) -> TXMSGSENTIE_W<'_>[src]

Bit 2 - TXMSGSENTIE

pub fn txmsgabtie(&mut self) -> TXMSGABTIE_W<'_>[src]

Bit 3 - TXMSGABTIE

pub fn hrstdiscie(&mut self) -> HRSTDISCIE_W<'_>[src]

Bit 4 - HRSTDISCIE

pub fn hrstsentie(&mut self) -> HRSTSENTIE_W<'_>[src]

Bit 5 - HRSTSENTIE

pub fn txundie(&mut self) -> TXUNDIE_W<'_>[src]

Bit 6 - TXUNDIE

pub fn rxneie(&mut self) -> RXNEIE_W<'_>[src]

Bit 8 - RXNEIE

pub fn rxorddetie(&mut self) -> RXORDDETIE_W<'_>[src]

Bit 9 - RXORDDETIE

pub fn rxhrstdetie(&mut self) -> RXHRSTDETIE_W<'_>[src]

Bit 10 - RXHRSTDETIE

pub fn rxovrie(&mut self) -> RXOVRIE_W<'_>[src]

Bit 11 - RXOVRIE

pub fn rxmsgendie(&mut self) -> RXMSGENDIE_W<'_>[src]

Bit 12 - RXMSGENDIE

pub fn typecevt1ie(&mut self) -> TYPECEVT1IE_W<'_>[src]

Bit 14 - TYPECEVT1IE

pub fn typecevt2ie(&mut self) -> TYPECEVT2IE_W<'_>[src]

Bit 15 - TYPECEVT2IE

pub fn frsevtie(&mut self) -> FRSEVTIE_W<'_>[src]

Bit 20 - FRSEVTIE

impl W<u32, Reg<u32, _ICR>>[src]

pub fn txmsgdisccf(&mut self) -> TXMSGDISCCF_W<'_>[src]

Bit 1 - TXMSGDISCCF

pub fn txmsgsentcf(&mut self) -> TXMSGSENTCF_W<'_>[src]

Bit 2 - TXMSGSENTCF

pub fn txmsgabtcf(&mut self) -> TXMSGABTCF_W<'_>[src]

Bit 3 - TXMSGABTCF

pub fn hrstdisccf(&mut self) -> HRSTDISCCF_W<'_>[src]

Bit 4 - HRSTDISCCF

pub fn hrstsentcf(&mut self) -> HRSTSENTCF_W<'_>[src]

Bit 5 - HRSTSENTCF

pub fn txundcf(&mut self) -> TXUNDCF_W<'_>[src]

Bit 6 - TXUNDCF

pub fn rxorddetcf(&mut self) -> RXORDDETCF_W<'_>[src]

Bit 9 - RXORDDETCF

pub fn rxhrstdetcf(&mut self) -> RXHRSTDETCF_W<'_>[src]

Bit 10 - RXHRSTDETCF

pub fn rxovrcf(&mut self) -> RXOVRCF_W<'_>[src]

Bit 11 - RXOVRCF

pub fn rxmsgendcf(&mut self) -> RXMSGENDCF_W<'_>[src]

Bit 12 - RXMSGENDCF

pub fn typecevt1cf(&mut self) -> TYPECEVT1CF_W<'_>[src]

Bit 14 - TYPECEVT1CF

pub fn typecevt2cf(&mut self) -> TYPECEVT2CF_W<'_>[src]

Bit 15 - TYPECEVT2CF

pub fn frsevtcf(&mut self) -> FRSEVTCF_W<'_>[src]

Bit 20 - FRSEVTCF

impl W<u32, Reg<u32, _TX_ORDSET>>[src]

pub fn txordset(&mut self) -> TXORDSET_W<'_>[src]

Bits 0:19 - TXORDSET

impl W<u32, Reg<u32, _TX_PAYSZ>>[src]

pub fn txpaysz(&mut self) -> TXPAYSZ_W<'_>[src]

Bits 0:9 - TXPAYSZ

impl W<u32, Reg<u32, _TXDR>>[src]

pub fn txdata(&mut self) -> TXDATA_W<'_>[src]

Bits 0:7 - TXDATA

impl W<u32, Reg<u32, _RX_ORDEXT1>>[src]

pub fn rxsopx1(&mut self) -> RXSOPX1_W<'_>[src]

Bits 0:19 - RXSOPX1

impl W<u32, Reg<u32, _RX_ORDEXT2>>[src]

pub fn rxsopx2(&mut self) -> RXSOPX2_W<'_>[src]

Bits 0:19 - RXSOPX2

impl W<u32, Reg<u32, _FDCAN_DBTP>>[src]

pub fn dsjw(&mut self) -> DSJW_W<'_>[src]

Bits 0:3 - Synchronization Jump Width

pub fn dtseg2(&mut self) -> DTSEG2_W<'_>[src]

Bits 4:7 - Data time segment after sample point

pub fn dtseg1(&mut self) -> DTSEG1_W<'_>[src]

Bits 8:12 - Data time segment after sample point

pub fn dbrp(&mut self) -> DBRP_W<'_>[src]

Bits 16:20 - Data BIt Rate Prescaler

pub fn tdc(&mut self) -> TDC_W<'_>[src]

Bit 23 - Transceiver Delay Compensation

impl W<u32, Reg<u32, _FDCAN_TEST>>[src]

pub fn lbck(&mut self) -> LBCK_W<'_>[src]

Bit 4 - Loop Back mode

pub fn tx(&mut self) -> TX_W<'_>[src]

Bits 5:6 - Loop Back mode

impl W<u32, Reg<u32, _FDCAN_RWD>>[src]

pub fn wdc(&mut self) -> WDC_W<'_>[src]

Bits 0:7 - Watchdog configuration

impl W<u32, Reg<u32, _FDCAN_CCCR>>[src]

pub fn init(&mut self) -> INIT_W<'_>[src]

Bit 0 - Initialization

pub fn cce(&mut self) -> CCE_W<'_>[src]

Bit 1 - Configuration Change Enable

pub fn asm(&mut self) -> ASM_W<'_>[src]

Bit 2 - ASM Restricted Operation Mode

pub fn csa(&mut self) -> CSA_W<'_>[src]

Bit 3 - Clock Stop Acknowledge

pub fn csr(&mut self) -> CSR_W<'_>[src]

Bit 4 - Clock Stop Request

pub fn mon(&mut self) -> MON_W<'_>[src]

Bit 5 - Bus Monitoring Mode

pub fn dar(&mut self) -> DAR_W<'_>[src]

Bit 6 - Disable Automatic Retransmission

pub fn test(&mut self) -> TEST_W<'_>[src]

Bit 7 - Test Mode Enable

pub fn fdoe(&mut self) -> FDOE_W<'_>[src]

Bit 8 - FD Operation Enable

pub fn bse(&mut self) -> BSE_W<'_>[src]

Bit 9 - FDCAN Bit Rate Switching

pub fn pxhd(&mut self) -> PXHD_W<'_>[src]

Bit 12 - Protocol Exception Handling Disable

pub fn efbi(&mut self) -> EFBI_W<'_>[src]

Bit 13 - Edge Filtering during Bus Integration

pub fn txp(&mut self) -> TXP_W<'_>[src]

Bit 14 - TXP

pub fn niso(&mut self) -> NISO_W<'_>[src]

Bit 15 - Non ISO Operation

impl W<u32, Reg<u32, _FDCAN_NBTP>>[src]

pub fn nsjw(&mut self) -> NSJW_W<'_>[src]

Bits 25:31 - NSJW: Nominal (Re)Synchronization Jump Width

pub fn nbrp(&mut self) -> NBRP_W<'_>[src]

Bits 16:24 - Bit Rate Prescaler

pub fn ntseg1(&mut self) -> NTSEG1_W<'_>[src]

Bits 8:15 - Nominal Time segment before sample point

pub fn tseg2(&mut self) -> TSEG2_W<'_>[src]

Bits 0:6 - Nominal Time segment after sample point

impl W<u32, Reg<u32, _FDCAN_TSCC>>[src]

pub fn tcp(&mut self) -> TCP_W<'_>[src]

Bits 16:19 - Timestamp Counter Prescaler

pub fn tss(&mut self) -> TSS_W<'_>[src]

Bits 0:1 - Timestamp Select

impl W<u32, Reg<u32, _FDCAN_TSCV>>[src]

pub fn tsc(&mut self) -> TSC_W<'_>[src]

Bits 0:15 - Timestamp Counter

impl W<u32, Reg<u32, _FDCAN_TOCC>>[src]

pub fn etoc(&mut self) -> ETOC_W<'_>[src]

Bit 0 - Enable Timeout Counter

pub fn tos(&mut self) -> TOS_W<'_>[src]

Bits 1:2 - Timeout Select

pub fn top(&mut self) -> TOP_W<'_>[src]

Bits 16:31 - Timeout Period

impl W<u32, Reg<u32, _FDCAN_TOCV>>[src]

pub fn toc(&mut self) -> TOC_W<'_>[src]

Bits 0:15 - Timeout Counter

impl W<u32, Reg<u32, _FDCAN_ECR>>[src]

pub fn cel(&mut self) -> CEL_W<'_>[src]

Bits 16:23 - AN Error Logging

pub fn rp(&mut self) -> RP_W<'_>[src]

Bit 15 - Receive Error Passive

impl W<u32, Reg<u32, _FDCAN_PSR>>[src]

pub fn lec(&mut self) -> LEC_W<'_>[src]

Bits 0:2 - Last Error Code

pub fn dlec(&mut self) -> DLEC_W<'_>[src]

Bits 8:10 - Data Last Error Code

pub fn resi(&mut self) -> RESI_W<'_>[src]

Bit 11 - ESI flag of last received FDCAN Message

pub fn rbrs(&mut self) -> RBRS_W<'_>[src]

Bit 12 - BRS flag of last received FDCAN Message

pub fn redl(&mut self) -> REDL_W<'_>[src]

Bit 13 - Received FDCAN Message

pub fn pxe(&mut self) -> PXE_W<'_>[src]

Bit 14 - Protocol Exception Event

impl W<u32, Reg<u32, _FDCAN_TDCR>>[src]

pub fn tdcf(&mut self) -> TDCF_W<'_>[src]

Bits 0:6 - Transmitter Delay Compensation Filter Window Length

pub fn tdco(&mut self) -> TDCO_W<'_>[src]

Bits 8:14 - Transmitter Delay Compensation Offset

impl W<u32, Reg<u32, _FDCAN_IR>>[src]

pub fn rf0n(&mut self) -> RF0N_W<'_>[src]

Bit 0 - RF0N

pub fn rf0f(&mut self) -> RF0F_W<'_>[src]

Bit 1 - RF0F

pub fn rf0l(&mut self) -> RF0L_W<'_>[src]

Bit 2 - RF0L

pub fn rf1n(&mut self) -> RF1N_W<'_>[src]

Bit 3 - RF1N

pub fn rf1f(&mut self) -> RF1F_W<'_>[src]

Bit 4 - RF1F

pub fn rf1l(&mut self) -> RF1L_W<'_>[src]

Bit 5 - RF1L

pub fn hpm(&mut self) -> HPM_W<'_>[src]

Bit 6 - HPM

pub fn tc(&mut self) -> TC_W<'_>[src]

Bit 7 - TC

pub fn tcf(&mut self) -> TCF_W<'_>[src]

Bit 8 - TCF

pub fn tfe(&mut self) -> TFE_W<'_>[src]

Bit 9 - TFE

pub fn tefn(&mut self) -> TEFN_W<'_>[src]

Bit 10 - TEFN

pub fn teff(&mut self) -> TEFF_W<'_>[src]

Bit 11 - TEFF

pub fn tefl(&mut self) -> TEFL_W<'_>[src]

Bit 12 - TEFL

pub fn tsw(&mut self) -> TSW_W<'_>[src]

Bit 13 - TSW

pub fn mraf(&mut self) -> MRAF_W<'_>[src]

Bit 14 - MRAF

pub fn too(&mut self) -> TOO_W<'_>[src]

Bit 15 - TOO

pub fn elo(&mut self) -> ELO_W<'_>[src]

Bit 16 - ELO

pub fn ep(&mut self) -> EP_W<'_>[src]

Bit 17 - EP

pub fn ew(&mut self) -> EW_W<'_>[src]

Bit 18 - EW

pub fn bo(&mut self) -> BO_W<'_>[src]

Bit 19 - BO

pub fn wdi(&mut self) -> WDI_W<'_>[src]

Bit 20 - WDI

pub fn pea(&mut self) -> PEA_W<'_>[src]

Bit 21 - PEA

pub fn ped(&mut self) -> PED_W<'_>[src]

Bit 22 - PED

pub fn ara(&mut self) -> ARA_W<'_>[src]

Bit 23 - ARA

impl W<u32, Reg<u32, _FDCAN_IE>>[src]

pub fn rf0ne(&mut self) -> RF0NE_W<'_>[src]

Bit 0 - Rx FIFO 0 New Message Enable

pub fn rf0fe(&mut self) -> RF0FE_W<'_>[src]

Bit 1 - Rx FIFO 0 Full Enable

pub fn rf0le(&mut self) -> RF0LE_W<'_>[src]

Bit 2 - Rx FIFO 0 Message Lost Enable

pub fn rf1ne(&mut self) -> RF1NE_W<'_>[src]

Bit 3 - Rx FIFO 1 New Message Enable

pub fn rf1fe(&mut self) -> RF1FE_W<'_>[src]

Bit 4 - Rx FIFO 1 Watermark Reached Enable

pub fn rf1le(&mut self) -> RF1LE_W<'_>[src]

Bit 5 - Rx FIFO 1 Message Lost Enable

pub fn hpme(&mut self) -> HPME_W<'_>[src]

Bit 6 - High Priority Message Enable

pub fn tce(&mut self) -> TCE_W<'_>[src]

Bit 7 - Transmission Completed Enable

pub fn tcfe(&mut self) -> TCFE_W<'_>[src]

Bit 8 - Transmission Cancellation Finished Enable

pub fn tefe(&mut self) -> TEFE_W<'_>[src]

Bit 9 - Tx FIFO Empty Enable

pub fn tefne(&mut self) -> TEFNE_W<'_>[src]

Bit 10 - Tx Event FIFO New Entry Enable

pub fn teffe(&mut self) -> TEFFE_W<'_>[src]

Bit 11 - Tx Event FIFO Full Enable

pub fn tefle(&mut self) -> TEFLE_W<'_>[src]

Bit 12 - Tx Event FIFO Element Lost Enable

pub fn mrafe(&mut self) -> MRAFE_W<'_>[src]

Bit 13 - Message RAM Access Failure Enable

pub fn tooe(&mut self) -> TOOE_W<'_>[src]

Bit 14 - Timeout Occurred Enable

pub fn eloe(&mut self) -> ELOE_W<'_>[src]

Bit 15 - Error Logging Overflow Enable

pub fn epe(&mut self) -> EPE_W<'_>[src]

Bit 16 - Error Passive Enable

pub fn ewe(&mut self) -> EWE_W<'_>[src]

Bit 17 - Warning Status Enable

pub fn boe(&mut self) -> BOE_W<'_>[src]

Bit 18 - Bus_Off Status Enable

pub fn wdie(&mut self) -> WDIE_W<'_>[src]

Bit 19 - Watchdog Interrupt Enable

pub fn peae(&mut self) -> PEAE_W<'_>[src]

Bit 20 - Protocol Error in Arbitration Phase Enable

pub fn pede(&mut self) -> PEDE_W<'_>[src]

Bit 21 - Protocol Error in Data Phase Enable

pub fn arae(&mut self) -> ARAE_W<'_>[src]

Bit 22 - Access to Reserved Address Enable

impl W<u32, Reg<u32, _FDCAN_ILS>>[src]

pub fn rx_fifo0(&mut self) -> RXFIFO0_W<'_>[src]

Bit 0 - RxFIFO0

pub fn rx_fifo1(&mut self) -> RXFIFO1_W<'_>[src]

Bit 1 - RxFIFO1

pub fn smsg(&mut self) -> SMSG_W<'_>[src]

Bit 2 - SMSG

pub fn tferr(&mut self) -> TFERR_W<'_>[src]

Bit 3 - TFERR

pub fn misc(&mut self) -> MISC_W<'_>[src]

Bit 4 - MISC

pub fn berr(&mut self) -> BERR_W<'_>[src]

Bit 5 - BERR

pub fn perr(&mut self) -> PERR_W<'_>[src]

Bit 6 - PERR

impl W<u32, Reg<u32, _FDCAN_ILE>>[src]

pub fn eint0(&mut self) -> EINT0_W<'_>[src]

Bit 0 - Enable Interrupt Line 0

pub fn eint1(&mut self) -> EINT1_W<'_>[src]

Bit 1 - Enable Interrupt Line 1

impl W<u32, Reg<u32, _FDCAN_RXGFC>>[src]

pub fn rrfe(&mut self) -> RRFE_W<'_>[src]

Bit 0 - Reject Remote Frames Extended

pub fn rrfs(&mut self) -> RRFS_W<'_>[src]

Bit 1 - Reject Remote Frames Standard

pub fn anfe(&mut self) -> ANFE_W<'_>[src]

Bits 2:3 - Accept Non-matching Frames Extended

pub fn anfs(&mut self) -> ANFS_W<'_>[src]

Bits 4:5 - Accept Non-matching Frames Standard

pub fn f1om(&mut self) -> F1OM_W<'_>[src]

Bit 8 - F1OM

pub fn f0om(&mut self) -> F0OM_W<'_>[src]

Bit 9 - F0OM

pub fn lss(&mut self) -> LSS_W<'_>[src]

Bits 16:20 - LSS

pub fn lse(&mut self) -> LSE_W<'_>[src]

Bits 24:27 - LSE

impl W<u32, Reg<u32, _FDCAN_XIDAM>>[src]

pub fn eidm(&mut self) -> EIDM_W<'_>[src]

Bits 0:28 - Extended ID Mask

impl W<u32, Reg<u32, _FDCAN_RXF0S>>[src]

pub fn f0fl(&mut self) -> F0FL_W<'_>[src]

Bits 0:3 - Rx FIFO 0 Fill Level

pub fn f0gi(&mut self) -> F0GI_W<'_>[src]

Bits 8:9 - Rx FIFO 0 Get Index

pub fn f0pi(&mut self) -> F0PI_W<'_>[src]

Bits 16:17 - Rx FIFO 0 Put Index

pub fn f0f(&mut self) -> F0F_W<'_>[src]

Bit 24 - Rx FIFO 0 Full

pub fn rf0l(&mut self) -> RF0L_W<'_>[src]

Bit 25 - Rx FIFO 0 Message Lost

impl W<u32, Reg<u32, _FDCAN_RXF0A>>[src]

pub fn f0ai(&mut self) -> F0AI_W<'_>[src]

Bits 0:2 - Rx FIFO 0 Acknowledge Index

impl W<u32, Reg<u32, _FDCAN_RXF1S>>[src]

pub fn f1fl(&mut self) -> F1FL_W<'_>[src]

Bits 0:3 - Rx FIFO 1 Fill Level

impl W<u32, Reg<u32, _FDCAN_RXF1A>>[src]

pub fn f1ai(&mut self) -> F1AI_W<'_>[src]

Bits 0:2 - Rx FIFO 1 Acknowledge Index

impl W<u32, Reg<u32, _FDCAN_TXBAR>>[src]

pub fn ar(&mut self) -> AR_W<'_>[src]

Bits 0:2 - Add Request

impl W<u32, Reg<u32, _FDCAN_TXBCR>>[src]

pub fn cr(&mut self) -> CR_W<'_>[src]

Bits 0:2 - Cancellation Request

impl W<u32, Reg<u32, _FDCAN_TXBTIE>>[src]

pub fn tie(&mut self) -> TIE_W<'_>[src]

Bits 0:2 - Transmission Interrupt Enable

impl W<u32, Reg<u32, _FDCAN_TXBCIE>>[src]

pub fn cf(&mut self) -> CF_W<'_>[src]

Bits 0:2 - Cancellation Finished Interrupt Enable

impl W<u32, Reg<u32, _FDCAN_TXEFA>>[src]

pub fn efai(&mut self) -> EFAI_W<'_>[src]

Bits 0:1 - Event FIFO Acknowledge Index

impl W<u32, Reg<u32, _FDCAN_CKDIV>>[src]

pub fn pdiv(&mut self) -> PDIV_W<'_>[src]

Bits 0:3 - PDIV

impl W<u32, Reg<u32, _FDCAN_TXBC>>[src]

pub fn tfqm(&mut self) -> TFQM_W<'_>[src]

Bit 24 - Tx FIFO/Queue Mode

impl W<u32, Reg<u32, _DR>>[src]

pub fn dr(&mut self) -> DR_W<'_>[src]

Bits 0:31 - Data register bits

impl W<u32, Reg<u32, _IDR>>[src]

pub fn idr(&mut self) -> IDR_W<'_>[src]

Bits 0:7 - General-purpose 8-bit data register bits

impl W<u32, Reg<u32, _CR>>[src]

pub fn rev_out(&mut self) -> REV_OUT_W<'_>[src]

Bit 7 - Reverse output data

pub fn rev_in(&mut self) -> REV_IN_W<'_>[src]

Bits 5:6 - Reverse input data

pub fn polysize(&mut self) -> POLYSIZE_W<'_>[src]

Bits 3:4 - Polynomial size

pub fn reset(&mut self) -> RESET_W<'_>[src]

Bit 0 - RESET bit

impl W<u32, Reg<u32, _INIT>>[src]

pub fn crc_init(&mut self) -> CRC_INIT_W<'_>[src]

Bits 0:31 - Programmable initial CRC value

impl W<u32, Reg<u32, _POL>>[src]

pub fn polynomialcoefficients(&mut self) -> POLYNOMIALCOEFFICIENTS_W<'_>[src]

Bits 0:31 - Programmable polynomial

impl W<u32, Reg<u32, _CR>>[src]

pub fn trim(&mut self) -> TRIM_W<'_>[src]

Bits 8:14 - HSI48 oscillator smooth trimming

pub fn swsync(&mut self) -> SWSYNC_W<'_>[src]

Bit 7 - Generate software SYNC event

pub fn autotrimen(&mut self) -> AUTOTRIMEN_W<'_>[src]

Bit 6 - Automatic trimming enable

pub fn cen(&mut self) -> CEN_W<'_>[src]

Bit 5 - Frequency error counter enable

pub fn esyncie(&mut self) -> ESYNCIE_W<'_>[src]

Bit 3 - Expected SYNC interrupt enable

pub fn errie(&mut self) -> ERRIE_W<'_>[src]

Bit 2 - Synchronization or trimming error interrupt enable

pub fn syncwarnie(&mut self) -> SYNCWARNIE_W<'_>[src]

Bit 1 - SYNC warning interrupt enable

pub fn syncokie(&mut self) -> SYNCOKIE_W<'_>[src]

Bit 0 - SYNC event OK interrupt enable

impl W<u32, Reg<u32, _CFGR>>[src]

pub fn syncpol(&mut self) -> SYNCPOL_W<'_>[src]

Bit 31 - SYNC polarity selection

pub fn syncsrc(&mut self) -> SYNCSRC_W<'_>[src]

Bits 28:29 - SYNC signal source selection

pub fn syncdiv(&mut self) -> SYNCDIV_W<'_>[src]

Bits 24:26 - SYNC divider

pub fn felim(&mut self) -> FELIM_W<'_>[src]

Bits 16:23 - Frequency error limit

pub fn reload(&mut self) -> RELOAD_W<'_>[src]

Bits 0:15 - Counter reload value

impl W<u32, Reg<u32, _ICR>>[src]

pub fn esyncc(&mut self) -> ESYNCC_W<'_>[src]

Bit 3 - Expected SYNC clear flag

pub fn errc(&mut self) -> ERRC_W<'_>[src]

Bit 2 - Error clear flag

pub fn syncwarnc(&mut self) -> SYNCWARNC_W<'_>[src]

Bit 1 - SYNC warning clear flag

pub fn syncokc(&mut self) -> SYNCOKC_W<'_>[src]

Bit 0 - SYNC event OK clear flag

impl W<u32, Reg<u32, _CR1>>[src]

pub fn m1(&mut self) -> M1_W<'_>[src]

Bit 28 - Word length

pub fn eobie(&mut self) -> EOBIE_W<'_>[src]

Bit 27 - End of Block interrupt enable

pub fn rtoie(&mut self) -> RTOIE_W<'_>[src]

Bit 26 - Receiver timeout interrupt enable

pub fn deat4(&mut self) -> DEAT4_W<'_>[src]

Bit 25 - Driver Enable assertion time

pub fn deat3(&mut self) -> DEAT3_W<'_>[src]

Bit 24 - DEAT3

pub fn deat2(&mut self) -> DEAT2_W<'_>[src]

Bit 23 - DEAT2

pub fn deat1(&mut self) -> DEAT1_W<'_>[src]

Bit 22 - DEAT1

pub fn deat0(&mut self) -> DEAT0_W<'_>[src]

Bit 21 - DEAT0

pub fn dedt4(&mut self) -> DEDT4_W<'_>[src]

Bit 20 - Driver Enable de-assertion time

pub fn dedt3(&mut self) -> DEDT3_W<'_>[src]

Bit 19 - DEDT3

pub fn dedt2(&mut self) -> DEDT2_W<'_>[src]

Bit 18 - DEDT2

pub fn dedt1(&mut self) -> DEDT1_W<'_>[src]

Bit 17 - DEDT1

pub fn dedt0(&mut self) -> DEDT0_W<'_>[src]

Bit 16 - DEDT0

pub fn over8(&mut self) -> OVER8_W<'_>[src]

Bit 15 - Oversampling mode

pub fn cmie(&mut self) -> CMIE_W<'_>[src]

Bit 14 - Character match interrupt enable

pub fn mme(&mut self) -> MME_W<'_>[src]

Bit 13 - Mute mode enable

pub fn m0(&mut self) -> M0_W<'_>[src]

Bit 12 - Word length

pub fn wake(&mut self) -> WAKE_W<'_>[src]

Bit 11 - Receiver wakeup method

pub fn pce(&mut self) -> PCE_W<'_>[src]

Bit 10 - Parity control enable

pub fn ps(&mut self) -> PS_W<'_>[src]

Bit 9 - Parity selection

pub fn peie(&mut self) -> PEIE_W<'_>[src]

Bit 8 - PE interrupt enable

pub fn txeie(&mut self) -> TXEIE_W<'_>[src]

Bit 7 - interrupt enable

pub fn tcie(&mut self) -> TCIE_W<'_>[src]

Bit 6 - Transmission complete interrupt enable

pub fn rxneie(&mut self) -> RXNEIE_W<'_>[src]

Bit 5 - RXNE interrupt enable

pub fn idleie(&mut self) -> IDLEIE_W<'_>[src]

Bit 4 - IDLE interrupt enable

pub fn te(&mut self) -> TE_W<'_>[src]

Bit 3 - Transmitter enable

pub fn re(&mut self) -> RE_W<'_>[src]

Bit 2 - Receiver enable

pub fn uesm(&mut self) -> UESM_W<'_>[src]

Bit 1 - USART enable in Stop mode

pub fn ue(&mut self) -> UE_W<'_>[src]

Bit 0 - USART enable

pub fn fifoen(&mut self) -> FIFOEN_W<'_>[src]

Bit 29 - FIFOEN

pub fn txfeie(&mut self) -> TXFEIE_W<'_>[src]

Bit 30 - TXFEIE

pub fn rxffie(&mut self) -> RXFFIE_W<'_>[src]

Bit 31 - RXFFIE

impl W<u32, Reg<u32, _CR2>>[src]

pub fn add4_7(&mut self) -> ADD4_7_W<'_>[src]

Bits 28:31 - Address of the USART node

pub fn add0_3(&mut self) -> ADD0_3_W<'_>[src]

Bits 24:27 - Address of the USART node

pub fn rtoen(&mut self) -> RTOEN_W<'_>[src]

Bit 23 - Receiver timeout enable

pub fn abrmod1(&mut self) -> ABRMOD1_W<'_>[src]

Bit 22 - Auto baud rate mode

pub fn abrmod0(&mut self) -> ABRMOD0_W<'_>[src]

Bit 21 - ABRMOD0

pub fn abren(&mut self) -> ABREN_W<'_>[src]

Bit 20 - Auto baud rate enable

pub fn msbfirst(&mut self) -> MSBFIRST_W<'_>[src]

Bit 19 - Most significant bit first

pub fn datainv(&mut self) -> DATAINV_W<'_>[src]

Bit 18 - Binary data inversion

pub fn txinv(&mut self) -> TXINV_W<'_>[src]

Bit 17 - TX pin active level inversion

pub fn rxinv(&mut self) -> RXINV_W<'_>[src]

Bit 16 - RX pin active level inversion

pub fn swap(&mut self) -> SWAP_W<'_>[src]

Bit 15 - Swap TX/RX pins

pub fn linen(&mut self) -> LINEN_W<'_>[src]

Bit 14 - LIN mode enable

pub fn stop(&mut self) -> STOP_W<'_>[src]

Bits 12:13 - STOP bits

pub fn clken(&mut self) -> CLKEN_W<'_>[src]

Bit 11 - Clock enable

pub fn cpol(&mut self) -> CPOL_W<'_>[src]

Bit 10 - Clock polarity

pub fn cpha(&mut self) -> CPHA_W<'_>[src]

Bit 9 - Clock phase

pub fn lbcl(&mut self) -> LBCL_W<'_>[src]

Bit 8 - Last bit clock pulse

pub fn lbdie(&mut self) -> LBDIE_W<'_>[src]

Bit 6 - LIN break detection interrupt enable

pub fn lbdl(&mut self) -> LBDL_W<'_>[src]

Bit 5 - LIN break detection length

pub fn addm7(&mut self) -> ADDM7_W<'_>[src]

Bit 4 - 7-bit Address Detection/4-bit Address Detection

pub fn slven(&mut self) -> SLVEN_W<'_>[src]

Bit 0 - SLVEN

pub fn dis_nss(&mut self) -> DIS_NSS_W<'_>[src]

Bit 3 - DIS_NSS

impl W<u32, Reg<u32, _CR3>>[src]

pub fn wufie(&mut self) -> WUFIE_W<'_>[src]

Bit 22 - Wakeup from Stop mode interrupt enable

pub fn wus(&mut self) -> WUS_W<'_>[src]

Bits 20:21 - Wakeup from Stop mode interrupt flag selection

pub fn scarcnt(&mut self) -> SCARCNT_W<'_>[src]

Bits 17:19 - Smartcard auto-retry count

pub fn dep(&mut self) -> DEP_W<'_>[src]

Bit 15 - Driver enable polarity selection

pub fn dem(&mut self) -> DEM_W<'_>[src]

Bit 14 - Driver enable mode

pub fn ddre(&mut self) -> DDRE_W<'_>[src]

Bit 13 - DMA Disable on Reception Error

pub fn ovrdis(&mut self) -> OVRDIS_W<'_>[src]

Bit 12 - Overrun Disable

pub fn onebit(&mut self) -> ONEBIT_W<'_>[src]

Bit 11 - One sample bit method enable

pub fn ctsie(&mut self) -> CTSIE_W<'_>[src]

Bit 10 - CTS interrupt enable

pub fn ctse(&mut self) -> CTSE_W<'_>[src]

Bit 9 - CTS enable

pub fn rtse(&mut self) -> RTSE_W<'_>[src]

Bit 8 - RTS enable

pub fn dmat(&mut self) -> DMAT_W<'_>[src]

Bit 7 - DMA enable transmitter

pub fn dmar(&mut self) -> DMAR_W<'_>[src]

Bit 6 - DMA enable receiver

pub fn scen(&mut self) -> SCEN_W<'_>[src]

Bit 5 - Smartcard mode enable

pub fn nack(&mut self) -> NACK_W<'_>[src]

Bit 4 - Smartcard NACK enable

pub fn hdsel(&mut self) -> HDSEL_W<'_>[src]

Bit 3 - Half-duplex selection

pub fn irlp(&mut self) -> IRLP_W<'_>[src]

Bit 2 - Ir low-power

pub fn iren(&mut self) -> IREN_W<'_>[src]

Bit 1 - Ir mode enable

pub fn eie(&mut self) -> EIE_W<'_>[src]

Bit 0 - Error interrupt enable

pub fn txftie(&mut self) -> TXFTIE_W<'_>[src]

Bit 23 - TXFTIE

pub fn tcbgtie(&mut self) -> TCBGTIE_W<'_>[src]

Bit 24 - TCBGTIE

pub fn rxftcfg(&mut self) -> RXFTCFG_W<'_>[src]

Bits 25:27 - RXFTCFG

pub fn rxftie(&mut self) -> RXFTIE_W<'_>[src]

Bit 28 - RXFTIE

pub fn txftcfg(&mut self) -> TXFTCFG_W<'_>[src]

Bits 29:31 - TXFTCFG

impl W<u32, Reg<u32, _BRR>>[src]

pub fn brr(&mut self) -> BRR_W<'_>[src]

Bits 0:15 - BRR

impl W<u32, Reg<u32, _GTPR>>[src]

pub fn gt(&mut self) -> GT_W<'_>[src]

Bits 8:15 - Guard time value

pub fn psc(&mut self) -> PSC_W<'_>[src]

Bits 0:7 - Prescaler value

impl W<u32, Reg<u32, _RTOR>>[src]

pub fn blen(&mut self) -> BLEN_W<'_>[src]

Bits 24:31 - Block Length

pub fn rto(&mut self) -> RTO_W<'_>[src]

Bits 0:23 - Receiver timeout value

impl W<u32, Reg<u32, _RQR>>[src]

pub fn txfrq(&mut self) -> TXFRQ_W<'_>[src]

Bit 4 - Transmit data flush request

pub fn rxfrq(&mut self) -> RXFRQ_W<'_>[src]

Bit 3 - Receive data flush request

pub fn mmrq(&mut self) -> MMRQ_W<'_>[src]

Bit 2 - Mute mode request

pub fn sbkrq(&mut self) -> SBKRQ_W<'_>[src]

Bit 1 - Send break request

pub fn abrrq(&mut self) -> ABRRQ_W<'_>[src]

Bit 0 - Auto baud rate request

impl W<u32, Reg<u32, _ICR>>[src]

pub fn wucf(&mut self) -> WUCF_W<'_>[src]

Bit 20 - Wakeup from Stop mode clear flag

pub fn cmcf(&mut self) -> CMCF_W<'_>[src]

Bit 17 - Character match clear flag

pub fn eobcf(&mut self) -> EOBCF_W<'_>[src]

Bit 12 - End of block clear flag

pub fn rtocf(&mut self) -> RTOCF_W<'_>[src]

Bit 11 - Receiver timeout clear flag

pub fn ctscf(&mut self) -> CTSCF_W<'_>[src]

Bit 9 - CTS clear flag

pub fn lbdcf(&mut self) -> LBDCF_W<'_>[src]

Bit 8 - LIN break detection clear flag

pub fn tccf(&mut self) -> TCCF_W<'_>[src]

Bit 6 - Transmission complete clear flag

pub fn idlecf(&mut self) -> IDLECF_W<'_>[src]

Bit 4 - Idle line detected clear flag

pub fn orecf(&mut self) -> ORECF_W<'_>[src]

Bit 3 - Overrun error clear flag

pub fn ncf(&mut self) -> NCF_W<'_>[src]

Bit 2 - Noise detected clear flag

pub fn fecf(&mut self) -> FECF_W<'_>[src]

Bit 1 - Framing error clear flag

pub fn pecf(&mut self) -> PECF_W<'_>[src]

Bit 0 - Parity error clear flag

pub fn txfecf(&mut self) -> TXFECF_W<'_>[src]

Bit 5 - TXFECF

pub fn tcbgtcf(&mut self) -> TCBGTCF_W<'_>[src]

Bit 7 - TCBGTCF

pub fn udrcf(&mut self) -> UDRCF_W<'_>[src]

Bit 13 - UDRCF

impl W<u32, Reg<u32, _TDR>>[src]

pub fn tdr(&mut self) -> TDR_W<'_>[src]

Bits 0:8 - Transmit data value

impl W<u32, Reg<u32, _PRESC>>[src]

pub fn prescaler(&mut self) -> PRESCALER_W<'_>[src]

Bits 0:3 - PRESCALER

impl W<u32, Reg<u32, _CCR>>[src]

pub fn ckmode(&mut self) -> CKMODE_W<'_>[src]

Bits 16:17 - ADC clock mode

pub fn presc(&mut self) -> PRESC_W<'_>[src]

Bits 18:21 - ADC prescaler

pub fn vrefen(&mut self) -> VREFEN_W<'_>[src]

Bit 22 - VREFINT enable

pub fn ch17sel(&mut self) -> CH17SEL_W<'_>[src]

Bit 23 - CH17SEL

pub fn ch18sel(&mut self) -> CH18SEL_W<'_>[src]

Bit 24 - CH18SEL

pub fn mdma(&mut self) -> MDMA_W<'_>[src]

Bits 14:15 - MDMA

pub fn dmacfg(&mut self) -> DMACFG_W<'_>[src]

Bit 13 - DMACFG

pub fn delay(&mut self) -> DELAY_W<'_>[src]

Bits 8:10 - DELAY

pub fn dual(&mut self) -> DUAL_W<'_>[src]

Bits 0:4 - DUAL

impl W<u32, Reg<u32, _ISR>>[src]

pub fn jqovf(&mut self) -> JQOVF_W<'_>[src]

Bit 10 - JQOVF

pub fn awd3(&mut self) -> AWD3_W<'_>[src]

Bit 9 - AWD3

pub fn awd2(&mut self) -> AWD2_W<'_>[src]

Bit 8 - AWD2

pub fn awd1(&mut self) -> AWD1_W<'_>[src]

Bit 7 - AWD1

pub fn jeos(&mut self) -> JEOS_W<'_>[src]

Bit 6 - JEOS

pub fn jeoc(&mut self) -> JEOC_W<'_>[src]

Bit 5 - JEOC

pub fn ovr(&mut self) -> OVR_W<'_>[src]

Bit 4 - OVR

pub fn eos(&mut self) -> EOS_W<'_>[src]

Bit 3 - EOS

pub fn eoc(&mut self) -> EOC_W<'_>[src]

Bit 2 - EOC

pub fn eosmp(&mut self) -> EOSMP_W<'_>[src]

Bit 1 - EOSMP

pub fn adrdy(&mut self) -> ADRDY_W<'_>[src]

Bit 0 - ADRDY

impl W<u32, Reg<u32, _IER>>[src]

pub fn jqovfie(&mut self) -> JQOVFIE_W<'_>[src]

Bit 10 - JQOVFIE

pub fn awd3ie(&mut self) -> AWD3IE_W<'_>[src]

Bit 9 - AWD3IE

pub fn awd2ie(&mut self) -> AWD2IE_W<'_>[src]

Bit 8 - AWD2IE

pub fn awd1ie(&mut self) -> AWD1IE_W<'_>[src]

Bit 7 - AWD1IE

pub fn jeosie(&mut self) -> JEOSIE_W<'_>[src]

Bit 6 - JEOSIE

pub fn jeocie(&mut self) -> JEOCIE_W<'_>[src]

Bit 5 - JEOCIE

pub fn ovrie(&mut self) -> OVRIE_W<'_>[src]

Bit 4 - OVRIE

pub fn eosie(&mut self) -> EOSIE_W<'_>[src]

Bit 3 - EOSIE

pub fn eocie(&mut self) -> EOCIE_W<'_>[src]

Bit 2 - EOCIE

pub fn eosmpie(&mut self) -> EOSMPIE_W<'_>[src]

Bit 1 - EOSMPIE

pub fn adrdyie(&mut self) -> ADRDYIE_W<'_>[src]

Bit 0 - ADRDYIE

impl W<u32, Reg<u32, _CR>>[src]

pub fn adcal(&mut self) -> ADCAL_W<'_>[src]

Bit 31 - ADCAL

pub fn adcaldif(&mut self) -> ADCALDIF_W<'_>[src]

Bit 30 - ADCALDIF

pub fn deeppwd(&mut self) -> DEEPPWD_W<'_>[src]

Bit 29 - DEEPPWD

pub fn advregen(&mut self) -> ADVREGEN_W<'_>[src]

Bit 28 - ADVREGEN

pub fn jadstp(&mut self) -> JADSTP_W<'_>[src]

Bit 5 - JADSTP

pub fn adstp(&mut self) -> ADSTP_W<'_>[src]

Bit 4 - ADSTP

pub fn jadstart(&mut self) -> JADSTART_W<'_>[src]

Bit 3 - JADSTART

pub fn adstart(&mut self) -> ADSTART_W<'_>[src]

Bit 2 - ADSTART

pub fn addis(&mut self) -> ADDIS_W<'_>[src]

Bit 1 - ADDIS

pub fn aden(&mut self) -> ADEN_W<'_>[src]

Bit 0 - ADEN

impl W<u32, Reg<u32, _CFGR>>[src]

pub fn jqdis(&mut self) -> JQDIS_W<'_>[src]

Bit 31 - JQDIS

pub fn awdch1ch(&mut self) -> AWDCH1CH_W<'_>[src]

Bits 26:30 - AWDCH1CH

pub fn jauto(&mut self) -> JAUTO_W<'_>[src]

Bit 25 - JAUTO

pub fn jawd1en(&mut self) -> JAWD1EN_W<'_>[src]

Bit 24 - JAWD1EN

pub fn awd1en(&mut self) -> AWD1EN_W<'_>[src]

Bit 23 - AWD1EN

pub fn awd1sgl(&mut self) -> AWD1SGL_W<'_>[src]

Bit 22 - AWD1SGL

pub fn jqm(&mut self) -> JQM_W<'_>[src]

Bit 21 - JQM

pub fn jdiscen(&mut self) -> JDISCEN_W<'_>[src]

Bit 20 - JDISCEN

pub fn discnum(&mut self) -> DISCNUM_W<'_>[src]

Bits 17:19 - DISCNUM

pub fn discen(&mut self) -> DISCEN_W<'_>[src]

Bit 16 - DISCEN

pub fn autdly(&mut self) -> AUTDLY_W<'_>[src]

Bit 14 - AUTDLY

pub fn cont(&mut self) -> CONT_W<'_>[src]

Bit 13 - CONT

pub fn ovrmod(&mut self) -> OVRMOD_W<'_>[src]

Bit 12 - OVRMOD

pub fn exten(&mut self) -> EXTEN_W<'_>[src]

Bits 10:11 - EXTEN

pub fn extsel(&mut self) -> EXTSEL_W<'_>[src]

Bits 6:9 - EXTSEL

pub fn align(&mut self) -> ALIGN_W<'_>[src]

Bit 5 - ALIGN

pub fn res(&mut self) -> RES_W<'_>[src]

Bits 3:4 - RES

pub fn dmacfg(&mut self) -> DMACFG_W<'_>[src]

Bit 1 - DMACFG

pub fn dmaen(&mut self) -> DMAEN_W<'_>[src]

Bit 0 - DMAEN

impl W<u32, Reg<u32, _CFGR2>>[src]

pub fn rovsm(&mut self) -> ROVSM_W<'_>[src]

Bit 10 - EXTEN

pub fn tovs(&mut self) -> TOVS_W<'_>[src]

Bit 9 - EXTSEL

pub fn ovss(&mut self) -> OVSS_W<'_>[src]

Bits 5:8 - ALIGN

pub fn ovsr(&mut self) -> OVSR_W<'_>[src]

Bits 2:4 - RES

pub fn jovse(&mut self) -> JOVSE_W<'_>[src]

Bit 1 - DMACFG

pub fn rovse(&mut self) -> ROVSE_W<'_>[src]

Bit 0 - DMAEN

impl W<u32, Reg<u32, _SMPR1>>[src]

pub fn smp9(&mut self) -> SMP9_W<'_>[src]

Bits 27:29 - SMP9

pub fn smp8(&mut self) -> SMP8_W<'_>[src]

Bits 24:26 - SMP8

pub fn smp7(&mut self) -> SMP7_W<'_>[src]

Bits 21:23 - SMP7

pub fn smp6(&mut self) -> SMP6_W<'_>[src]

Bits 18:20 - SMP6

pub fn smp5(&mut self) -> SMP5_W<'_>[src]

Bits 15:17 - SMP5

pub fn smp4(&mut self) -> SMP4_W<'_>[src]

Bits 12:14 - SMP4

pub fn smp3(&mut self) -> SMP3_W<'_>[src]

Bits 9:11 - SMP3

pub fn smp2(&mut self) -> SMP2_W<'_>[src]

Bits 6:8 - SMP2

pub fn smp1(&mut self) -> SMP1_W<'_>[src]

Bits 3:5 - SMP1

pub fn smp0(&mut self) -> SMP0_W<'_>[src]

Bits 0:2 - SMP0

impl W<u32, Reg<u32, _SMPR2>>[src]

pub fn smp18(&mut self) -> SMP18_W<'_>[src]

Bits 24:26 - SMP18

pub fn smp17(&mut self) -> SMP17_W<'_>[src]

Bits 21:23 - SMP17

pub fn smp16(&mut self) -> SMP16_W<'_>[src]

Bits 18:20 - SMP16

pub fn smp15(&mut self) -> SMP15_W<'_>[src]

Bits 15:17 - SMP15

pub fn smp14(&mut self) -> SMP14_W<'_>[src]

Bits 12:14 - SMP14

pub fn smp13(&mut self) -> SMP13_W<'_>[src]

Bits 9:11 - SMP13

pub fn smp12(&mut self) -> SMP12_W<'_>[src]

Bits 6:8 - SMP12

pub fn smp11(&mut self) -> SMP11_W<'_>[src]

Bits 3:5 - SMP11

pub fn smp10(&mut self) -> SMP10_W<'_>[src]

Bits 0:2 - SMP10

impl W<u32, Reg<u32, _TR1>>[src]

pub fn ht1(&mut self) -> HT1_W<'_>[src]

Bits 16:27 - HT1

pub fn lt1(&mut self) -> LT1_W<'_>[src]

Bits 0:11 - LT1

impl W<u32, Reg<u32, _TR2>>[src]

pub fn ht2(&mut self) -> HT2_W<'_>[src]

Bits 16:23 - HT2

pub fn lt2(&mut self) -> LT2_W<'_>[src]

Bits 0:7 - LT2

impl W<u32, Reg<u32, _TR3>>[src]

pub fn ht3(&mut self) -> HT3_W<'_>[src]

Bits 16:23 - HT3

pub fn lt3(&mut self) -> LT3_W<'_>[src]

Bits 0:7 - LT3

impl W<u32, Reg<u32, _SQR1>>[src]

pub fn sq4(&mut self) -> SQ4_W<'_>[src]

Bits 24:28 - SQ4

pub fn sq3(&mut self) -> SQ3_W<'_>[src]

Bits 18:22 - SQ3

pub fn sq2(&mut self) -> SQ2_W<'_>[src]

Bits 12:16 - SQ2

pub fn sq1(&mut self) -> SQ1_W<'_>[src]

Bits 6:10 - SQ1

pub fn l(&mut self) -> L_W<'_>[src]

Bits 0:3 - L

impl W<u32, Reg<u32, _SQR2>>[src]

pub fn sq9(&mut self) -> SQ9_W<'_>[src]

Bits 24:28 - SQ9

pub fn sq8(&mut self) -> SQ8_W<'_>[src]

Bits 18:22 - SQ8

pub fn sq7(&mut self) -> SQ7_W<'_>[src]

Bits 12:16 - SQ7

pub fn sq6(&mut self) -> SQ6_W<'_>[src]

Bits 6:10 - SQ6

pub fn sq5(&mut self) -> SQ5_W<'_>[src]

Bits 0:4 - SQ5

impl W<u32, Reg<u32, _SQR3>>[src]

pub fn sq14(&mut self) -> SQ14_W<'_>[src]

Bits 24:28 - SQ14

pub fn sq13(&mut self) -> SQ13_W<'_>[src]

Bits 18:22 - SQ13

pub fn sq12(&mut self) -> SQ12_W<'_>[src]

Bits 12:16 - SQ12

pub fn sq11(&mut self) -> SQ11_W<'_>[src]

Bits 6:10 - SQ11

pub fn sq10(&mut self) -> SQ10_W<'_>[src]

Bits 0:4 - SQ10

impl W<u32, Reg<u32, _SQR4>>[src]

pub fn sq16(&mut self) -> SQ16_W<'_>[src]

Bits 6:10 - SQ16

pub fn sq15(&mut self) -> SQ15_W<'_>[src]

Bits 0:4 - SQ15

impl W<u32, Reg<u32, _JSQR>>[src]

pub fn jsq4(&mut self) -> JSQ4_W<'_>[src]

Bits 26:30 - JSQ4

pub fn jsq3(&mut self) -> JSQ3_W<'_>[src]

Bits 20:24 - JSQ3

pub fn jsq2(&mut self) -> JSQ2_W<'_>[src]

Bits 14:18 - JSQ2

pub fn jsq1(&mut self) -> JSQ1_W<'_>[src]

Bits 8:12 - JSQ1

pub fn jexten(&mut self) -> JEXTEN_W<'_>[src]

Bits 6:7 - JEXTEN

pub fn jextsel(&mut self) -> JEXTSEL_W<'_>[src]

Bits 2:5 - JEXTSEL

pub fn jl(&mut self) -> JL_W<'_>[src]

Bits 0:1 - JL

impl W<u32, Reg<u32, _OFR1>>[src]

pub fn offset1_en(&mut self) -> OFFSET1_EN_W<'_>[src]

Bit 31 - OFFSET1_EN

pub fn offset1_ch(&mut self) -> OFFSET1_CH_W<'_>[src]

Bits 26:30 - OFFSET1_CH

pub fn offset1(&mut self) -> OFFSET1_W<'_>[src]

Bits 0:11 - OFFSET1

impl W<u32, Reg<u32, _OFR2>>[src]

pub fn offset2_en(&mut self) -> OFFSET2_EN_W<'_>[src]

Bit 31 - OFFSET2_EN

pub fn offset2_ch(&mut self) -> OFFSET2_CH_W<'_>[src]

Bits 26:30 - OFFSET2_CH

pub fn offset2(&mut self) -> OFFSET2_W<'_>[src]

Bits 0:11 - OFFSET2

impl W<u32, Reg<u32, _OFR3>>[src]

pub fn offset3_en(&mut self) -> OFFSET3_EN_W<'_>[src]

Bit 31 - OFFSET3_EN

pub fn offset3_ch(&mut self) -> OFFSET3_CH_W<'_>[src]

Bits 26:30 - OFFSET3_CH

pub fn offset3(&mut self) -> OFFSET3_W<'_>[src]

Bits 0:11 - OFFSET3

impl W<u32, Reg<u32, _OFR4>>[src]

pub fn offset4_en(&mut self) -> OFFSET4_EN_W<'_>[src]

Bit 31 - OFFSET4_EN

pub fn offset4_ch(&mut self) -> OFFSET4_CH_W<'_>[src]

Bits 26:30 - OFFSET4_CH

pub fn offset4(&mut self) -> OFFSET4_W<'_>[src]

Bits 0:11 - OFFSET4

impl W<u32, Reg<u32, _AWD2CR>>[src]

pub fn awd2ch(&mut self) -> AWD2CH_W<'_>[src]

Bits 0:18 - AWD2CH

impl W<u32, Reg<u32, _AWD3CR>>[src]

pub fn awd3ch(&mut self) -> AWD3CH_W<'_>[src]

Bits 0:18 - AWD3CH

impl W<u32, Reg<u32, _DIFSEL>>[src]

pub fn difsel_1_15(&mut self) -> DIFSEL_1_15_W<'_>[src]

Bits 1:15 - Differential mode for channels 15 to 1

impl W<u32, Reg<u32, _CALFACT>>[src]

pub fn calfact_d(&mut self) -> CALFACT_D_W<'_>[src]

Bits 16:22 - CALFACT_D

pub fn calfact_s(&mut self) -> CALFACT_S_W<'_>[src]

Bits 0:6 - CALFACT_S

impl W<u32, Reg<u32, _STIR>>[src]

pub fn intid(&mut self) -> INTID_W<'_>[src]

Bits 0:8 - Software generated interrupt ID

impl W<u32, Reg<u32, _FMC_BCR1>>[src]

pub fn mbken(&mut self) -> MBKEN_W<'_>[src]

Bit 0 - Memory bank enable bit This bit enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a disabled bank causes an ERROR on AXI bus.

pub fn muxen(&mut self) -> MUXEN_W<'_>[src]

Bit 1 - Address/data multiplexing enable bit When this bit is set, the address and data values are multiplexed on the data bus, valid only with NOR and PSRAM memories:

pub fn mtyp(&mut self) -> MTYP_W<'_>[src]

Bits 2:3 - Memory type These bits define the type of external memory attached to the corresponding memory bank:

pub fn mwid(&mut self) -> MWID_W<'_>[src]

Bits 4:5 - Memory data bus width Defines the external memory device width, valid for all type of memories.

pub fn faccen(&mut self) -> FACCEN_W<'_>[src]

Bit 6 - Flash access enable This bit enables NOR Flash memory access operations.

pub fn bursten(&mut self) -> BURSTEN_W<'_>[src]

Bit 8 - Burst enable bit This bit enables/disables synchronous accesses during read operations. It is valid only for synchronous memories operating in Burst mode:

pub fn waitpol(&mut self) -> WAITPOL_W<'_>[src]

Bit 9 - Wait signal polarity bit This bit defines the polarity of the wait signal from memory used for either in synchronous or asynchronous mode:

pub fn waitcfg(&mut self) -> WAITCFG_W<'_>[src]

Bit 11 - Wait timing configuration The NWAIT signal indicates whether the data from the memory are valid or if a wait state must be inserted when accessing the memory in synchronous mode. This configuration bit determines if NWAIT is asserted by the memory one clock cycle before the wait state or during the wait state:

pub fn wren(&mut self) -> WREN_W<'_>[src]

Bit 12 - Write enable bit This bit indicates whether write operations are enabled/disabled in the bank by the FMC:

pub fn waiten(&mut self) -> WAITEN_W<'_>[src]

Bit 13 - Wait enable bit This bit enables/disables wait-state insertion via the NWAIT signal when accessing the memory in synchronous mode.

pub fn extmod(&mut self) -> EXTMOD_W<'_>[src]

Bit 14 - Extended mode enable. This bit enables the FMC to program the write timings for asynchronous accesses inside the FMC_BWTR register, thus resulting in different timings for read and write operations. Note: When the extended mode is disabled, the FMC can operate in Mode1 or Mode2 as follows: ** Mode 1 is the default mode when the SRAM/PSRAM memory type is selected (MTYP =0x0 or 0x01) ** Mode 2 is the default mode when the NOR memory type is selected (MTYP = 0x10).

pub fn asyncwait(&mut self) -> ASYNCWAIT_W<'_>[src]

Bit 15 - Wait signal during asynchronous transfers This bit enables/disables the FMC to use the wait signal even during an asynchronous protocol.

pub fn cpsize(&mut self) -> CPSIZE_W<'_>[src]

Bits 16:18 - CRAM Page Size These are used for Cellular RAM 1.5 which does not allow burst access to cross the address boundaries between pages. When these bits are configured, the FMC controller splits automatically the burst access when the memory page size is reached (refer to memory datasheet for page size). Other configuration: reserved.

pub fn cburstrw(&mut self) -> CBURSTRW_W<'_>[src]

Bit 19 - Write burst enable For PSRAM (CRAM) operating in Burst mode, the bit enables synchronous accesses during write operations. The enable bit for synchronous read accesses is the BURSTEN bit in the FMC_BCRx register.

pub fn cclken(&mut self) -> CCLKEN_W<'_>[src]

Bit 20 - Continuous Clock Enable This bit enables the FMC_CLK clock output to external memory devices. Note: The CCLKEN bit of the FMC_BCR2..4 registers is dont care. It is only enabled through the FMC_BCR1 register. Bank 1 must be configured in synchronous mode to generate the FMC_CLK continuous clock. If CCLKEN bit is set, the FMC_CLK clock ratio is specified by CLKDIV value in the FMC_BTR1 register. CLKDIV in FMC_BWTR1 is dont care. If the synchronous mode is used and CCLKEN bit is set, the synchronous memories connected to other banks than Bank 1 are clocked by the same clock (the CLKDIV value in the FMC_BTR2..4 and FMC_BWTR2..4 registers for other banks has no effect.)

pub fn wfdis(&mut self) -> WFDIS_W<'_>[src]

Bit 21 - Write FIFO Disable This bit disables the Write FIFO used by the FMC controller. Note: The WFDIS bit of the FMC_BCR2..4 registers is dont care. It is only enabled through the FMC_BCR1 register.

pub fn nblset(&mut self) -> NBLSET_W<'_>[src]

Bits 22:23 - NBLSET

impl W<u32, Reg<u32, _FMC_BCR2>>[src]

pub fn mbken(&mut self) -> MBKEN_W<'_>[src]

Bit 0 - Memory bank enable bit This bit enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a disabled bank causes an ERROR on AXI bus.

pub fn muxen(&mut self) -> MUXEN_W<'_>[src]

Bit 1 - Address/data multiplexing enable bit When this bit is set, the address and data values are multiplexed on the data bus, valid only with NOR and PSRAM memories:

pub fn mtyp(&mut self) -> MTYP_W<'_>[src]

Bits 2:3 - Memory type These bits define the type of external memory attached to the corresponding memory bank:

pub fn mwid(&mut self) -> MWID_W<'_>[src]

Bits 4:5 - Memory data bus width Defines the external memory device width, valid for all type of memories.

pub fn faccen(&mut self) -> FACCEN_W<'_>[src]

Bit 6 - Flash access enable This bit enables NOR Flash memory access operations.

pub fn bursten(&mut self) -> BURSTEN_W<'_>[src]

Bit 8 - Burst enable bit This bit enables/disables synchronous accesses during read operations. It is valid only for synchronous memories operating in Burst mode:

pub fn waitpol(&mut self) -> WAITPOL_W<'_>[src]

Bit 9 - Wait signal polarity bit This bit defines the polarity of the wait signal from memory used for either in synchronous or asynchronous mode:

pub fn waitcfg(&mut self) -> WAITCFG_W<'_>[src]

Bit 11 - Wait timing configuration The NWAIT signal indicates whether the data from the memory are valid or if a wait state must be inserted when accessing the memory in synchronous mode. This configuration bit determines if NWAIT is asserted by the memory one clock cycle before the wait state or during the wait state:

pub fn wren(&mut self) -> WREN_W<'_>[src]

Bit 12 - Write enable bit This bit indicates whether write operations are enabled/disabled in the bank by the FMC:

pub fn waiten(&mut self) -> WAITEN_W<'_>[src]

Bit 13 - Wait enable bit This bit enables/disables wait-state insertion via the NWAIT signal when accessing the memory in synchronous mode.

pub fn extmod(&mut self) -> EXTMOD_W<'_>[src]

Bit 14 - Extended mode enable. This bit enables the FMC to program the write timings for asynchronous accesses inside the FMC_BWTR register, thus resulting in different timings for read and write operations. Note: When the extended mode is disabled, the FMC can operate in Mode1 or Mode2 as follows: ** Mode 1 is the default mode when the SRAM/PSRAM memory type is selected (MTYP =0x0 or 0x01) ** Mode 2 is the default mode when the NOR memory type is selected (MTYP = 0x10).

pub fn asyncwait(&mut self) -> ASYNCWAIT_W<'_>[src]

Bit 15 - Wait signal during asynchronous transfers This bit enables/disables the FMC to use the wait signal even during an asynchronous protocol.

pub fn cpsize(&mut self) -> CPSIZE_W<'_>[src]

Bits 16:18 - CRAM Page Size These are used for Cellular RAM 1.5 which does not allow burst access to cross the address boundaries between pages. When these bits are configured, the FMC controller splits automatically the burst access when the memory page size is reached (refer to memory datasheet for page size). Other configuration: reserved.

pub fn cburstrw(&mut self) -> CBURSTRW_W<'_>[src]

Bit 19 - Write burst enable For PSRAM (CRAM) operating in Burst mode, the bit enables synchronous accesses during write operations. The enable bit for synchronous read accesses is the BURSTEN bit in the FMC_BCRx register.

pub fn cclken(&mut self) -> CCLKEN_W<'_>[src]

Bit 20 - Continuous Clock Enable This bit enables the FMC_CLK clock output to external memory devices. Note: The CCLKEN bit of the FMC_BCR2..4 registers is dont care. It is only enabled through the FMC_BCR1 register. Bank 1 must be configured in synchronous mode to generate the FMC_CLK continuous clock. If CCLKEN bit is set, the FMC_CLK clock ratio is specified by CLKDIV value in the FMC_BTR1 register. CLKDIV in FMC_BWTR1 is dont care. If the synchronous mode is used and CCLKEN bit is set, the synchronous memories connected to other banks than Bank 1 are clocked by the same clock (the CLKDIV value in the FMC_BTR2..4 and FMC_BWTR2..4 registers for other banks has no effect.)

pub fn wfdis(&mut self) -> WFDIS_W<'_>[src]

Bit 21 - Write FIFO Disable This bit disables the Write FIFO used by the FMC controller. Note: The WFDIS bit of the FMC_BCR2..4 registers is dont care. It is only enabled through the FMC_BCR1 register.

pub fn nblset(&mut self) -> NBLSET_W<'_>[src]

Bits 22:23 - NBLSET

impl W<u32, Reg<u32, _FMC_BCR3>>[src]

pub fn mbken(&mut self) -> MBKEN_W<'_>[src]

Bit 0 - Memory bank enable bit This bit enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a disabled bank causes an ERROR on AXI bus.

pub fn muxen(&mut self) -> MUXEN_W<'_>[src]

Bit 1 - Address/data multiplexing enable bit When this bit is set, the address and data values are multiplexed on the data bus, valid only with NOR and PSRAM memories:

pub fn mtyp(&mut self) -> MTYP_W<'_>[src]

Bits 2:3 - Memory type These bits define the type of external memory attached to the corresponding memory bank:

pub fn mwid(&mut self) -> MWID_W<'_>[src]

Bits 4:5 - Memory data bus width Defines the external memory device width, valid for all type of memories.

pub fn faccen(&mut self) -> FACCEN_W<'_>[src]

Bit 6 - Flash access enable This bit enables NOR Flash memory access operations.

pub fn bursten(&mut self) -> BURSTEN_W<'_>[src]

Bit 8 - Burst enable bit This bit enables/disables synchronous accesses during read operations. It is valid only for synchronous memories operating in Burst mode:

pub fn waitpol(&mut self) -> WAITPOL_W<'_>[src]

Bit 9 - Wait signal polarity bit This bit defines the polarity of the wait signal from memory used for either in synchronous or asynchronous mode:

pub fn waitcfg(&mut self) -> WAITCFG_W<'_>[src]

Bit 11 - Wait timing configuration The NWAIT signal indicates whether the data from the memory are valid or if a wait state must be inserted when accessing the memory in synchronous mode. This configuration bit determines if NWAIT is asserted by the memory one clock cycle before the wait state or during the wait state:

pub fn wren(&mut self) -> WREN_W<'_>[src]

Bit 12 - Write enable bit This bit indicates whether write operations are enabled/disabled in the bank by the FMC:

pub fn waiten(&mut self) -> WAITEN_W<'_>[src]

Bit 13 - Wait enable bit This bit enables/disables wait-state insertion via the NWAIT signal when accessing the memory in synchronous mode.

pub fn extmod(&mut self) -> EXTMOD_W<'_>[src]

Bit 14 - Extended mode enable. This bit enables the FMC to program the write timings for asynchronous accesses inside the FMC_BWTR register, thus resulting in different timings for read and write operations. Note: When the extended mode is disabled, the FMC can operate in Mode1 or Mode2 as follows: ** Mode 1 is the default mode when the SRAM/PSRAM memory type is selected (MTYP =0x0 or 0x01) ** Mode 2 is the default mode when the NOR memory type is selected (MTYP = 0x10).

pub fn asyncwait(&mut self) -> ASYNCWAIT_W<'_>[src]

Bit 15 - Wait signal during asynchronous transfers This bit enables/disables the FMC to use the wait signal even during an asynchronous protocol.

pub fn cpsize(&mut self) -> CPSIZE_W<'_>[src]

Bits 16:18 - CRAM Page Size These are used for Cellular RAM 1.5 which does not allow burst access to cross the address boundaries between pages. When these bits are configured, the FMC controller splits automatically the burst access when the memory page size is reached (refer to memory datasheet for page size). Other configuration: reserved.

pub fn cburstrw(&mut self) -> CBURSTRW_W<'_>[src]

Bit 19 - Write burst enable For PSRAM (CRAM) operating in Burst mode, the bit enables synchronous accesses during write operations. The enable bit for synchronous read accesses is the BURSTEN bit in the FMC_BCRx register.

pub fn cclken(&mut self) -> CCLKEN_W<'_>[src]

Bit 20 - Continuous Clock Enable This bit enables the FMC_CLK clock output to external memory devices. Note: The CCLKEN bit of the FMC_BCR2..4 registers is dont care. It is only enabled through the FMC_BCR1 register. Bank 1 must be configured in synchronous mode to generate the FMC_CLK continuous clock. If CCLKEN bit is set, the FMC_CLK clock ratio is specified by CLKDIV value in the FMC_BTR1 register. CLKDIV in FMC_BWTR1 is dont care. If the synchronous mode is used and CCLKEN bit is set, the synchronous memories connected to other banks than Bank 1 are clocked by the same clock (the CLKDIV value in the FMC_BTR2..4 and FMC_BWTR2..4 registers for other banks has no effect.)

pub fn wfdis(&mut self) -> WFDIS_W<'_>[src]

Bit 21 - Write FIFO Disable This bit disables the Write FIFO used by the FMC controller. Note: The WFDIS bit of the FMC_BCR2..4 registers is dont care. It is only enabled through the FMC_BCR1 register.

pub fn nblset(&mut self) -> NBLSET_W<'_>[src]

Bits 22:23 - NBLSET

impl W<u32, Reg<u32, _FMC_BCR4>>[src]

pub fn mbken(&mut self) -> MBKEN_W<'_>[src]

Bit 0 - Memory bank enable bit This bit enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a disabled bank causes an ERROR on AXI bus.

pub fn muxen(&mut self) -> MUXEN_W<'_>[src]

Bit 1 - Address/data multiplexing enable bit When this bit is set, the address and data values are multiplexed on the data bus, valid only with NOR and PSRAM memories:

pub fn mtyp(&mut self) -> MTYP_W<'_>[src]

Bits 2:3 - Memory type These bits define the type of external memory attached to the corresponding memory bank:

pub fn mwid(&mut self) -> MWID_W<'_>[src]

Bits 4:5 - Memory data bus width Defines the external memory device width, valid for all type of memories.

pub fn faccen(&mut self) -> FACCEN_W<'_>[src]

Bit 6 - Flash access enable This bit enables NOR Flash memory access operations.

pub fn bursten(&mut self) -> BURSTEN_W<'_>[src]

Bit 8 - Burst enable bit This bit enables/disables synchronous accesses during read operations. It is valid only for synchronous memories operating in Burst mode:

pub fn waitpol(&mut self) -> WAITPOL_W<'_>[src]

Bit 9 - Wait signal polarity bit This bit defines the polarity of the wait signal from memory used for either in synchronous or asynchronous mode:

pub fn waitcfg(&mut self) -> WAITCFG_W<'_>[src]

Bit 11 - Wait timing configuration The NWAIT signal indicates whether the data from the memory are valid or if a wait state must be inserted when accessing the memory in synchronous mode. This configuration bit determines if NWAIT is asserted by the memory one clock cycle before the wait state or during the wait state:

pub fn wren(&mut self) -> WREN_W<'_>[src]

Bit 12 - Write enable bit This bit indicates whether write operations are enabled/disabled in the bank by the FMC:

pub fn waiten(&mut self) -> WAITEN_W<'_>[src]

Bit 13 - Wait enable bit This bit enables/disables wait-state insertion via the NWAIT signal when accessing the memory in synchronous mode.

pub fn extmod(&mut self) -> EXTMOD_W<'_>[src]

Bit 14 - Extended mode enable. This bit enables the FMC to program the write timings for asynchronous accesses inside the FMC_BWTR register, thus resulting in different timings for read and write operations. Note: When the extended mode is disabled, the FMC can operate in Mode1 or Mode2 as follows: ** Mode 1 is the default mode when the SRAM/PSRAM memory type is selected (MTYP =0x0 or 0x01) ** Mode 2 is the default mode when the NOR memory type is selected (MTYP = 0x10).

pub fn asyncwait(&mut self) -> ASYNCWAIT_W<'_>[src]

Bit 15 - Wait signal during asynchronous transfers This bit enables/disables the FMC to use the wait signal even during an asynchronous protocol.

pub fn cpsize(&mut self) -> CPSIZE_W<'_>[src]

Bits 16:18 - CRAM Page Size These are used for Cellular RAM 1.5 which does not allow burst access to cross the address boundaries between pages. When these bits are configured, the FMC controller splits automatically the burst access when the memory page size is reached (refer to memory datasheet for page size). Other configuration: reserved.

pub fn cburstrw(&mut self) -> CBURSTRW_W<'_>[src]

Bit 19 - Write burst enable For PSRAM (CRAM) operating in Burst mode, the bit enables synchronous accesses during write operations. The enable bit for synchronous read accesses is the BURSTEN bit in the FMC_BCRx register.

pub fn cclken(&mut self) -> CCLKEN_W<'_>[src]

Bit 20 - Continuous Clock Enable This bit enables the FMC_CLK clock output to external memory devices. Note: The CCLKEN bit of the FMC_BCR2..4 registers is dont care. It is only enabled through the FMC_BCR1 register. Bank 1 must be configured in synchronous mode to generate the FMC_CLK continuous clock. If CCLKEN bit is set, the FMC_CLK clock ratio is specified by CLKDIV value in the FMC_BTR1 register. CLKDIV in FMC_BWTR1 is dont care. If the synchronous mode is used and CCLKEN bit is set, the synchronous memories connected to other banks than Bank 1 are clocked by the same clock (the CLKDIV value in the FMC_BTR2..4 and FMC_BWTR2..4 registers for other banks has no effect.)

pub fn wfdis(&mut self) -> WFDIS_W<'_>[src]

Bit 21 - Write FIFO Disable This bit disables the Write FIFO used by the FMC controller. Note: The WFDIS bit of the FMC_BCR2..4 registers is dont care. It is only enabled through the FMC_BCR1 register.

pub fn nblset(&mut self) -> NBLSET_W<'_>[src]

Bits 22:23 - NBLSET

impl W<u32, Reg<u32, _FMC_BTR1>>[src]

pub fn addset(&mut self) -> ADDSET_W<'_>[src]

Bits 0:3 - Address setup phase duration These bits are written by software to define the duration of the address setup phase (refer to Figure81 to Figure93), used in SRAMs, ROMs and asynchronous NOR Flash: For each access mode address setup phase duration, please refer to the respective figure (refer to Figure81 to Figure93). Note: In synchronous accesses, this value is dont care. In Muxed mode or Mode D, the minimum value for ADDSET is 1.

pub fn addhld(&mut self) -> ADDHLD_W<'_>[src]

Bits 4:7 - Address-hold phase duration These bits are written by software to define the duration of the address hold phase (refer to Figure81 to Figure93), used in mode D or multiplexed accesses: For each access mode address-hold phase duration, please refer to the respective figure (Figure81 to Figure93). Note: In synchronous accesses, this value is not used, the address hold phase is always 1 memory clock period duration.

pub fn datast(&mut self) -> DATAST_W<'_>[src]

Bits 8:15 - Data-phase duration These bits are written by software to define the duration of the data phase (refer to Figure81 to Figure93), used in asynchronous accesses: For each memory type and access mode data-phase duration, please refer to the respective figure (Figure81 to Figure93). Example: Mode1, write access, DATAST=1: Data-phase duration= DATAST+1 = 2 KCK_FMC clock cycles. Note: In synchronous accesses, this value is dont care.

pub fn busturn(&mut self) -> BUSTURN_W<'_>[src]

Bits 16:19 - Bus turnaround phase duration These bits are written by software to add a delay at the end of a write-to-read or read-to write transaction. The programmed bus turnaround delay is inserted between an asynchronous read (in muxed or mode D) or write transaction and any other asynchronous /synchronous read/write from/to a static bank. If a read operation is performed, the bank can be the same or a different one, whereas it must be different in case of write operation to the bank, except in muxed mode or mode D. In some cases, whatever the programmed BUSTRUN values, the bus turnaround delay is fixed as follows: The bus turnaround delay is not inserted between two consecutive asynchronous write transfers to the same static memory bank except in muxed mode and mode D. There is a bus turnaround delay of 1 FMC clock cycle between: Two consecutive asynchronous read transfers to the same static memory bank except for modes muxed and D. An asynchronous read to an asynchronous or synchronous write to any static bank or dynamic bank except in modes muxed and D mode. There is a bus turnaround delay of 2 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to the same bank. A synchronous write (burst or single) access and an asynchronous write or read transfer to or from static memory bank (the bank can be the same or a different one in case of a read operation. Two consecutive synchronous read operations (in Burst or Single mode) followed by any synchronous/asynchronous read or write from/to another static memory bank. There is a bus turnaround delay of 3 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to different static banks. A synchronous write access (in Burst or Single mode) and a synchronous read from the same or a different bank. The bus turnaround delay allows to match the minimum time between consecutive transactions (tEHEL from NEx high to NEx low) and the maximum time required by the memory to free the data bus after a read access (tEHQZ): (BUSTRUN + 1) KCK_FMC period ≥ tEHELmin and (BUSTRUN + 2)KCK_FMC period ≥ tEHQZmax if EXTMOD = 0 (BUSTRUN + 2)KCK_FMC period ≥ max (tEHELmin, tEHQZmax) if EXTMOD = 126. ...

pub fn clkdiv(&mut self) -> CLKDIV_W<'_>[src]

Bits 20:23 - Clock divide ratio (for FMC_CLK signal) These bits define the period of FMC_CLK clock output signal, expressed in number of KCK_FMC cycles: In asynchronous NOR Flash, SRAM or PSRAM accesses, this value is dont care. Note: Refer to Section20.6.5: Synchronous transactions for FMC_CLK divider ratio formula)

pub fn datlat(&mut self) -> DATLAT_W<'_>[src]

Bits 24:27 - Data latency for synchronous memory For synchronous access with read write burst mode enabled these bits define the number of memory clock cycles

pub fn accmod(&mut self) -> ACCMOD_W<'_>[src]

Bits 28:29 - Access mode These bits specify the asynchronous access modes as shown in the timing diagrams. They are taken into account only when the EXTMOD bit in the FMC_BCRx register is 1.

pub fn datahld(&mut self) -> DATAHLD_W<'_>[src]

Bits 30:31 - DATAHLD

impl W<u32, Reg<u32, _FMC_BTR2>>[src]

pub fn addset(&mut self) -> ADDSET_W<'_>[src]

Bits 0:3 - Address setup phase duration These bits are written by software to define the duration of the address setup phase (refer to Figure81 to Figure93), used in SRAMs, ROMs and asynchronous NOR Flash: For each access mode address setup phase duration, please refer to the respective figure (refer to Figure81 to Figure93). Note: In synchronous accesses, this value is dont care. In Muxed mode or Mode D, the minimum value for ADDSET is 1.

pub fn addhld(&mut self) -> ADDHLD_W<'_>[src]

Bits 4:7 - Address-hold phase duration These bits are written by software to define the duration of the address hold phase (refer to Figure81 to Figure93), used in mode D or multiplexed accesses: For each access mode address-hold phase duration, please refer to the respective figure (Figure81 to Figure93). Note: In synchronous accesses, this value is not used, the address hold phase is always 1 memory clock period duration.

pub fn datast(&mut self) -> DATAST_W<'_>[src]

Bits 8:15 - Data-phase duration These bits are written by software to define the duration of the data phase (refer to Figure81 to Figure93), used in asynchronous accesses: For each memory type and access mode data-phase duration, please refer to the respective figure (Figure81 to Figure93). Example: Mode1, write access, DATAST=1: Data-phase duration= DATAST+1 = 2 KCK_FMC clock cycles. Note: In synchronous accesses, this value is dont care.

pub fn busturn(&mut self) -> BUSTURN_W<'_>[src]

Bits 16:19 - Bus turnaround phase duration These bits are written by software to add a delay at the end of a write-to-read or read-to write transaction. The programmed bus turnaround delay is inserted between an asynchronous read (in muxed or mode D) or write transaction and any other asynchronous /synchronous read/write from/to a static bank. If a read operation is performed, the bank can be the same or a different one, whereas it must be different in case of write operation to the bank, except in muxed mode or mode D. In some cases, whatever the programmed BUSTRUN values, the bus turnaround delay is fixed as follows: The bus turnaround delay is not inserted between two consecutive asynchronous write transfers to the same static memory bank except in muxed mode and mode D. There is a bus turnaround delay of 1 FMC clock cycle between: Two consecutive asynchronous read transfers to the same static memory bank except for modes muxed and D. An asynchronous read to an asynchronous or synchronous write to any static bank or dynamic bank except in modes muxed and D mode. There is a bus turnaround delay of 2 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to the same bank. A synchronous write (burst or single) access and an asynchronous write or read transfer to or from static memory bank (the bank can be the same or a different one in case of a read operation. Two consecutive synchronous read operations (in Burst or Single mode) followed by any synchronous/asynchronous read or write from/to another static memory bank. There is a bus turnaround delay of 3 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to different static banks. A synchronous write access (in Burst or Single mode) and a synchronous read from the same or a different bank. The bus turnaround delay allows to match the minimum time between consecutive transactions (tEHEL from NEx high to NEx low) and the maximum time required by the memory to free the data bus after a read access (tEHQZ): (BUSTRUN + 1) KCK_FMC period ≥ tEHELmin and (BUSTRUN + 2)KCK_FMC period ≥ tEHQZmax if EXTMOD = 0 (BUSTRUN + 2)KCK_FMC period ≥ max (tEHELmin, tEHQZmax) if EXTMOD = 126. ...

pub fn clkdiv(&mut self) -> CLKDIV_W<'_>[src]

Bits 20:23 - Clock divide ratio (for FMC_CLK signal) These bits define the period of FMC_CLK clock output signal, expressed in number of KCK_FMC cycles: In asynchronous NOR Flash, SRAM or PSRAM accesses, this value is dont care. Note: Refer to Section20.6.5: Synchronous transactions for FMC_CLK divider ratio formula)

pub fn datlat(&mut self) -> DATLAT_W<'_>[src]

Bits 24:27 - Data latency for synchronous memory For synchronous access with read write burst mode enabled these bits define the number of memory clock cycles

pub fn accmod(&mut self) -> ACCMOD_W<'_>[src]

Bits 28:29 - Access mode These bits specify the asynchronous access modes as shown in the timing diagrams. They are taken into account only when the EXTMOD bit in the FMC_BCRx register is 1.

pub fn datahld(&mut self) -> DATAHLD_W<'_>[src]

Bits 30:31 - DATAHLD

impl W<u32, Reg<u32, _FMC_BTR3>>[src]

pub fn addset(&mut self) -> ADDSET_W<'_>[src]

Bits 0:3 - Address setup phase duration These bits are written by software to define the duration of the address setup phase (refer to Figure81 to Figure93), used in SRAMs, ROMs and asynchronous NOR Flash: For each access mode address setup phase duration, please refer to the respective figure (refer to Figure81 to Figure93). Note: In synchronous accesses, this value is dont care. In Muxed mode or Mode D, the minimum value for ADDSET is 1.

pub fn addhld(&mut self) -> ADDHLD_W<'_>[src]

Bits 4:7 - Address-hold phase duration These bits are written by software to define the duration of the address hold phase (refer to Figure81 to Figure93), used in mode D or multiplexed accesses: For each access mode address-hold phase duration, please refer to the respective figure (Figure81 to Figure93). Note: In synchronous accesses, this value is not used, the address hold phase is always 1 memory clock period duration.

pub fn datast(&mut self) -> DATAST_W<'_>[src]

Bits 8:15 - Data-phase duration These bits are written by software to define the duration of the data phase (refer to Figure81 to Figure93), used in asynchronous accesses: For each memory type and access mode data-phase duration, please refer to the respective figure (Figure81 to Figure93). Example: Mode1, write access, DATAST=1: Data-phase duration= DATAST+1 = 2 KCK_FMC clock cycles. Note: In synchronous accesses, this value is dont care.

pub fn busturn(&mut self) -> BUSTURN_W<'_>[src]

Bits 16:19 - Bus turnaround phase duration These bits are written by software to add a delay at the end of a write-to-read or read-to write transaction. The programmed bus turnaround delay is inserted between an asynchronous read (in muxed or mode D) or write transaction and any other asynchronous /synchronous read/write from/to a static bank. If a read operation is performed, the bank can be the same or a different one, whereas it must be different in case of write operation to the bank, except in muxed mode or mode D. In some cases, whatever the programmed BUSTRUN values, the bus turnaround delay is fixed as follows: The bus turnaround delay is not inserted between two consecutive asynchronous write transfers to the same static memory bank except in muxed mode and mode D. There is a bus turnaround delay of 1 FMC clock cycle between: Two consecutive asynchronous read transfers to the same static memory bank except for modes muxed and D. An asynchronous read to an asynchronous or synchronous write to any static bank or dynamic bank except in modes muxed and D mode. There is a bus turnaround delay of 2 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to the same bank. A synchronous write (burst or single) access and an asynchronous write or read transfer to or from static memory bank (the bank can be the same or a different one in case of a read operation. Two consecutive synchronous read operations (in Burst or Single mode) followed by any synchronous/asynchronous read or write from/to another static memory bank. There is a bus turnaround delay of 3 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to different static banks. A synchronous write access (in Burst or Single mode) and a synchronous read from the same or a different bank. The bus turnaround delay allows to match the minimum time between consecutive transactions (tEHEL from NEx high to NEx low) and the maximum time required by the memory to free the data bus after a read access (tEHQZ): (BUSTRUN + 1) KCK_FMC period ≥ tEHELmin and (BUSTRUN + 2)KCK_FMC period ≥ tEHQZmax if EXTMOD = 0 (BUSTRUN + 2)KCK_FMC period ≥ max (tEHELmin, tEHQZmax) if EXTMOD = 126. ...

pub fn clkdiv(&mut self) -> CLKDIV_W<'_>[src]

Bits 20:23 - Clock divide ratio (for FMC_CLK signal) These bits define the period of FMC_CLK clock output signal, expressed in number of KCK_FMC cycles: In asynchronous NOR Flash, SRAM or PSRAM accesses, this value is dont care. Note: Refer to Section20.6.5: Synchronous transactions for FMC_CLK divider ratio formula)

pub fn datlat(&mut self) -> DATLAT_W<'_>[src]

Bits 24:27 - Data latency for synchronous memory For synchronous access with read write burst mode enabled these bits define the number of memory clock cycles

pub fn accmod(&mut self) -> ACCMOD_W<'_>[src]

Bits 28:29 - Access mode These bits specify the asynchronous access modes as shown in the timing diagrams. They are taken into account only when the EXTMOD bit in the FMC_BCRx register is 1.

pub fn datahld(&mut self) -> DATAHLD_W<'_>[src]

Bits 30:31 - DATAHLD

impl W<u32, Reg<u32, _FMC_BTR4>>[src]

pub fn addset(&mut self) -> ADDSET_W<'_>[src]

Bits 0:3 - Address setup phase duration These bits are written by software to define the duration of the address setup phase (refer to Figure81 to Figure93), used in SRAMs, ROMs and asynchronous NOR Flash: For each access mode address setup phase duration, please refer to the respective figure (refer to Figure81 to Figure93). Note: In synchronous accesses, this value is dont care. In Muxed mode or Mode D, the minimum value for ADDSET is 1.

pub fn addhld(&mut self) -> ADDHLD_W<'_>[src]

Bits 4:7 - Address-hold phase duration These bits are written by software to define the duration of the address hold phase (refer to Figure81 to Figure93), used in mode D or multiplexed accesses: For each access mode address-hold phase duration, please refer to the respective figure (Figure81 to Figure93). Note: In synchronous accesses, this value is not used, the address hold phase is always 1 memory clock period duration.

pub fn datast(&mut self) -> DATAST_W<'_>[src]

Bits 8:15 - Data-phase duration These bits are written by software to define the duration of the data phase (refer to Figure81 to Figure93), used in asynchronous accesses: For each memory type and access mode data-phase duration, please refer to the respective figure (Figure81 to Figure93). Example: Mode1, write access, DATAST=1: Data-phase duration= DATAST+1 = 2 KCK_FMC clock cycles. Note: In synchronous accesses, this value is dont care.

pub fn busturn(&mut self) -> BUSTURN_W<'_>[src]

Bits 16:19 - Bus turnaround phase duration These bits are written by software to add a delay at the end of a write-to-read or read-to write transaction. The programmed bus turnaround delay is inserted between an asynchronous read (in muxed or mode D) or write transaction and any other asynchronous /synchronous read/write from/to a static bank. If a read operation is performed, the bank can be the same or a different one, whereas it must be different in case of write operation to the bank, except in muxed mode or mode D. In some cases, whatever the programmed BUSTRUN values, the bus turnaround delay is fixed as follows: The bus turnaround delay is not inserted between two consecutive asynchronous write transfers to the same static memory bank except in muxed mode and mode D. There is a bus turnaround delay of 1 FMC clock cycle between: Two consecutive asynchronous read transfers to the same static memory bank except for modes muxed and D. An asynchronous read to an asynchronous or synchronous write to any static bank or dynamic bank except in modes muxed and D mode. There is a bus turnaround delay of 2 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to the same bank. A synchronous write (burst or single) access and an asynchronous write or read transfer to or from static memory bank (the bank can be the same or a different one in case of a read operation. Two consecutive synchronous read operations (in Burst or Single mode) followed by any synchronous/asynchronous read or write from/to another static memory bank. There is a bus turnaround delay of 3 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to different static banks. A synchronous write access (in Burst or Single mode) and a synchronous read from the same or a different bank. The bus turnaround delay allows to match the minimum time between consecutive transactions (tEHEL from NEx high to NEx low) and the maximum time required by the memory to free the data bus after a read access (tEHQZ): (BUSTRUN + 1) KCK_FMC period ≥ tEHELmin and (BUSTRUN + 2)KCK_FMC period ≥ tEHQZmax if EXTMOD = 0 (BUSTRUN + 2)KCK_FMC period ≥ max (tEHELmin, tEHQZmax) if EXTMOD = 126. ...

pub fn clkdiv(&mut self) -> CLKDIV_W<'_>[src]

Bits 20:23 - Clock divide ratio (for FMC_CLK signal) These bits define the period of FMC_CLK clock output signal, expressed in number of KCK_FMC cycles: In asynchronous NOR Flash, SRAM or PSRAM accesses, this value is dont care. Note: Refer to Section20.6.5: Synchronous transactions for FMC_CLK divider ratio formula)

pub fn datlat(&mut self) -> DATLAT_W<'_>[src]

Bits 24:27 - Data latency for synchronous memory For synchronous access with read write burst mode enabled these bits define the number of memory clock cycles

pub fn accmod(&mut self) -> ACCMOD_W<'_>[src]

Bits 28:29 - Access mode These bits specify the asynchronous access modes as shown in the timing diagrams. They are taken into account only when the EXTMOD bit in the FMC_BCRx register is 1.

pub fn datahld(&mut self) -> DATAHLD_W<'_>[src]

Bits 30:31 - DATAHLD

impl W<u32, Reg<u32, _FMC_PCR>>[src]

pub fn pwaiten(&mut self) -> PWAITEN_W<'_>[src]

Bit 1 - Wait feature enable bit. This bit enables the Wait feature for the NAND Flash memory bank:

pub fn pbken(&mut self) -> PBKEN_W<'_>[src]

Bit 2 - NAND Flash memory bank enable bit. This bit enables the memory bank. Accessing a disabled memory bank causes an ERROR on AXI bus

pub fn ptyp(&mut self) -> PTYP_W<'_>[src]

Bit 3 - Memory type

pub fn pwid(&mut self) -> PWID_W<'_>[src]

Bits 4:5 - Data bus width. These bits define the external memory device width.

pub fn eccen(&mut self) -> ECCEN_W<'_>[src]

Bit 6 - ECC computation logic enable bit

pub fn tclr(&mut self) -> TCLR_W<'_>[src]

Bits 9:12 - CLE to RE delay. These bits set time from CLE low to RE low in number of KCK_FMC clock cycles. The time is give by the following formula: t_clr = (TCLR + SET + 2) TKCK_FMC where TKCK_FMC is the KCK_FMC clock period Note: Set is MEMSET or ATTSET according to the addressed space.

pub fn tar(&mut self) -> TAR_W<'_>[src]

Bits 13:16 - ALE to RE delay. These bits set time from ALE low to RE low in number of KCK_FMC clock cycles. Time is: t_ar = (TAR + SET + 2) TKCK_FMC where TKCK_FMC is the FMC clock period Note: Set is MEMSET or ATTSET according to the addressed space.

pub fn eccps(&mut self) -> ECCPS_W<'_>[src]

Bits 17:19 - ECC page size. These bits define the page size for the extended ECC:

impl W<u32, Reg<u32, _FMC_SR>>[src]

pub fn irs(&mut self) -> IRS_W<'_>[src]

Bit 0 - Interrupt rising edge status The flag is set by hardware and reset by software. Note: If this bit is written by software to 1 it will be set.

pub fn ils(&mut self) -> ILS_W<'_>[src]

Bit 1 - Interrupt high-level status The flag is set by hardware and reset by software.

pub fn ifs(&mut self) -> IFS_W<'_>[src]

Bit 2 - Interrupt falling edge status The flag is set by hardware and reset by software. Note: If this bit is written by software to 1 it will be set.

pub fn iren(&mut self) -> IREN_W<'_>[src]

Bit 3 - Interrupt rising edge detection enable bit

pub fn ilen(&mut self) -> ILEN_W<'_>[src]

Bit 4 - Interrupt high-level detection enable bit

pub fn ifen(&mut self) -> IFEN_W<'_>[src]

Bit 5 - Interrupt falling edge detection enable bit

impl W<u32, Reg<u32, _FMC_PMEM>>[src]

pub fn memset(&mut self) -> MEMSET_W<'_>[src]

Bits 0:7 - Common memory x setup time These bits define the number of KCK_FMC (+1) clock cycles to set up the address before the command assertion (NWE, NOE), for NAND Flash read or write access to common memory space:

pub fn memwait(&mut self) -> MEMWAIT_W<'_>[src]

Bits 8:15 - Common memory wait time These bits define the minimum number of KCK_FMC (+1) clock cycles to assert the command (NWE, NOE), for NAND Flash read or write access to common memory space. The duration of command assertion is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value of KCK_FMC:

pub fn memhold(&mut self) -> MEMHOLD_W<'_>[src]

Bits 16:23 - Common memory hold time These bits define the number of KCK_FMC clock cycles for write accesses and KCK_FMC+1 clock cycles for read accesses during which the address is held (and data for write accesses) after the command is de-asserted (NWE, NOE), for NAND Flash read or write access to common memory space:

pub fn memhiz(&mut self) -> MEMHIZ_W<'_>[src]

Bits 24:31 - Common memory x data bus Hi-Z time These bits define the number of KCK_FMC clock cycles during which the data bus is kept Hi-Z after the start of a NAND Flash write access to common memory space. This is only valid for write transactions:

impl W<u32, Reg<u32, _FMC_PATT>>[src]

pub fn attset(&mut self) -> ATTSET_W<'_>[src]

Bits 0:7 - Attribute memory setup time These bits define the number of KCK_FMC (+1) clock cycles to set up address before the command assertion (NWE, NOE), for NAND Flash read or write access to attribute memory space:

pub fn attwait(&mut self) -> ATTWAIT_W<'_>[src]

Bits 8:15 - Attribute memory wait time These bits define the minimum number of x KCK_FMC (+1) clock cycles to assert the command (NWE, NOE), for NAND Flash read or write access to attribute memory space. The duration for command assertion is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value of KCK_FMC:

pub fn atthold(&mut self) -> ATTHOLD_W<'_>[src]

Bits 16:23 - Attribute memory hold time These bits define the number of KCK_FMC clock cycles during which the address is held (and data for write access) after the command de-assertion (NWE, NOE), for NAND Flash read or write access to attribute memory space:

pub fn atthiz(&mut self) -> ATTHIZ_W<'_>[src]

Bits 24:31 - Attribute memory data bus Hi-Z time These bits define the number of KCK_FMC clock cycles during which the data bus is kept in Hi-Z after the start of a NAND Flash write access to attribute memory space on socket. Only valid for writ transaction:

impl W<u32, Reg<u32, _FMC_BWTR1>>[src]

pub fn addset(&mut self) -> ADDSET_W<'_>[src]

Bits 0:3 - Address setup phase duration. These bits are written by software to define the duration of the address setup phase in KCK_FMC cycles (refer to Figure81 to Figure93), used in asynchronous accesses: ... Note: In synchronous accesses, this value is not used, the address setup phase is always 1 Flash clock period duration. In muxed mode, the minimum ADDSET value is 1.

pub fn addhld(&mut self) -> ADDHLD_W<'_>[src]

Bits 4:7 - Address-hold phase duration. These bits are written by software to define the duration of the address hold phase (refer to Figure81 to Figure93), used in asynchronous multiplexed accesses: ... Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration.

pub fn datast(&mut self) -> DATAST_W<'_>[src]

Bits 8:15 - Data-phase duration. These bits are written by software to define the duration of the data phase (refer to Figure81 to Figure93), used in asynchronous SRAM, PSRAM and NOR Flash memory accesses:

pub fn busturn(&mut self) -> BUSTURN_W<'_>[src]

Bits 16:19 - Bus turnaround phase duration These bits are written by software to add a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low): (BUSTRUN + 1) KCK_FMC period ≥ tEHELmin. The programmed bus turnaround delay is inserted between a an asynchronous write transfer and any other asynchronous /synchronous read or write transfer to or from a static bank. If a read operation is performed, the bank can be the same or a different one, whereas it must be different in case of write operation to the bank, except in muxed mode or mode D. In some cases, whatever the programmed BUSTRUN values, the bus turnaround delay is fixed as follows: The bus turnaround delay is not inserted between two consecutive asynchronous write transfers to the same static memory bank except for muxed mode and mode D. There is a bus turnaround delay of 2 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to the same bank A synchronous write transfer ((in Burst or Single mode) and an asynchronous write or read transfer to or from static memory bank. There is a bus turnaround delay of 3 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to different static banks. A synchronous write transfer (in Burst or Single mode) and a synchronous read from the same or a different bank. ...

pub fn accmod(&mut self) -> ACCMOD_W<'_>[src]

Bits 28:29 - Access mode. These bits specify the asynchronous access modes as shown in the next timing diagrams.These bits are taken into account only when the EXTMOD bit in the FMC_BCRx register is 1.

impl W<u32, Reg<u32, _FMC_BWTR2>>[src]

pub fn addset(&mut self) -> ADDSET_W<'_>[src]

Bits 0:3 - Address setup phase duration. These bits are written by software to define the duration of the address setup phase in KCK_FMC cycles (refer to Figure81 to Figure93), used in asynchronous accesses: ... Note: In synchronous accesses, this value is not used, the address setup phase is always 1 Flash clock period duration. In muxed mode, the minimum ADDSET value is 1.

pub fn addhld(&mut self) -> ADDHLD_W<'_>[src]

Bits 4:7 - Address-hold phase duration. These bits are written by software to define the duration of the address hold phase (refer to Figure81 to Figure93), used in asynchronous multiplexed accesses: ... Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration.

pub fn datast(&mut self) -> DATAST_W<'_>[src]

Bits 8:15 - Data-phase duration. These bits are written by software to define the duration of the data phase (refer to Figure81 to Figure93), used in asynchronous SRAM, PSRAM and NOR Flash memory accesses:

pub fn busturn(&mut self) -> BUSTURN_W<'_>[src]

Bits 16:19 - Bus turnaround phase duration These bits are written by software to add a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low): (BUSTRUN + 1) KCK_FMC period ≥ tEHELmin. The programmed bus turnaround delay is inserted between a an asynchronous write transfer and any other asynchronous /synchronous read or write transfer to or from a static bank. If a read operation is performed, the bank can be the same or a different one, whereas it must be different in case of write operation to the bank, except in muxed mode or mode D. In some cases, whatever the programmed BUSTRUN values, the bus turnaround delay is fixed as follows: The bus turnaround delay is not inserted between two consecutive asynchronous write transfers to the same static memory bank except for muxed mode and mode D. There is a bus turnaround delay of 2 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to the same bank A synchronous write transfer ((in Burst or Single mode) and an asynchronous write or read transfer to or from static memory bank. There is a bus turnaround delay of 3 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to different static banks. A synchronous write transfer (in Burst or Single mode) and a synchronous read from the same or a different bank. ...

pub fn accmod(&mut self) -> ACCMOD_W<'_>[src]

Bits 28:29 - Access mode. These bits specify the asynchronous access modes as shown in the next timing diagrams.These bits are taken into account only when the EXTMOD bit in the FMC_BCRx register is 1.

impl W<u32, Reg<u32, _FMC_BWTR3>>[src]

pub fn addset(&mut self) -> ADDSET_W<'_>[src]

Bits 0:3 - Address setup phase duration. These bits are written by software to define the duration of the address setup phase in KCK_FMC cycles (refer to Figure81 to Figure93), used in asynchronous accesses: ... Note: In synchronous accesses, this value is not used, the address setup phase is always 1 Flash clock period duration. In muxed mode, the minimum ADDSET value is 1.

pub fn addhld(&mut self) -> ADDHLD_W<'_>[src]

Bits 4:7 - Address-hold phase duration. These bits are written by software to define the duration of the address hold phase (refer to Figure81 to Figure93), used in asynchronous multiplexed accesses: ... Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration.

pub fn datast(&mut self) -> DATAST_W<'_>[src]

Bits 8:15 - Data-phase duration. These bits are written by software to define the duration of the data phase (refer to Figure81 to Figure93), used in asynchronous SRAM, PSRAM and NOR Flash memory accesses:

pub fn busturn(&mut self) -> BUSTURN_W<'_>[src]

Bits 16:19 - Bus turnaround phase duration These bits are written by software to add a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low): (BUSTRUN + 1) KCK_FMC period ≥ tEHELmin. The programmed bus turnaround delay is inserted between a an asynchronous write transfer and any other asynchronous /synchronous read or write transfer to or from a static bank. If a read operation is performed, the bank can be the same or a different one, whereas it must be different in case of write operation to the bank, except in muxed mode or mode D. In some cases, whatever the programmed BUSTRUN values, the bus turnaround delay is fixed as follows: The bus turnaround delay is not inserted between two consecutive asynchronous write transfers to the same static memory bank except for muxed mode and mode D. There is a bus turnaround delay of 2 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to the same bank A synchronous write transfer ((in Burst or Single mode) and an asynchronous write or read transfer to or from static memory bank. There is a bus turnaround delay of 3 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to different static banks. A synchronous write transfer (in Burst or Single mode) and a synchronous read from the same or a different bank. ...

pub fn accmod(&mut self) -> ACCMOD_W<'_>[src]

Bits 28:29 - Access mode. These bits specify the asynchronous access modes as shown in the next timing diagrams.These bits are taken into account only when the EXTMOD bit in the FMC_BCRx register is 1.

impl W<u32, Reg<u32, _FMC_BWTR4>>[src]

pub fn addset(&mut self) -> ADDSET_W<'_>[src]

Bits 0:3 - Address setup phase duration. These bits are written by software to define the duration of the address setup phase in KCK_FMC cycles (refer to Figure81 to Figure93), used in asynchronous accesses: ... Note: In synchronous accesses, this value is not used, the address setup phase is always 1 Flash clock period duration. In muxed mode, the minimum ADDSET value is 1.

pub fn addhld(&mut self) -> ADDHLD_W<'_>[src]

Bits 4:7 - Address-hold phase duration. These bits are written by software to define the duration of the address hold phase (refer to Figure81 to Figure93), used in asynchronous multiplexed accesses: ... Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration.

pub fn datast(&mut self) -> DATAST_W<'_>[src]

Bits 8:15 - Data-phase duration. These bits are written by software to define the duration of the data phase (refer to Figure81 to Figure93), used in asynchronous SRAM, PSRAM and NOR Flash memory accesses:

pub fn busturn(&mut self) -> BUSTURN_W<'_>[src]

Bits 16:19 - Bus turnaround phase duration These bits are written by software to add a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low): (BUSTRUN + 1) KCK_FMC period ≥ tEHELmin. The programmed bus turnaround delay is inserted between a an asynchronous write transfer and any other asynchronous /synchronous read or write transfer to or from a static bank. If a read operation is performed, the bank can be the same or a different one, whereas it must be different in case of write operation to the bank, except in muxed mode or mode D. In some cases, whatever the programmed BUSTRUN values, the bus turnaround delay is fixed as follows: The bus turnaround delay is not inserted between two consecutive asynchronous write transfers to the same static memory bank except for muxed mode and mode D. There is a bus turnaround delay of 2 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to the same bank A synchronous write transfer ((in Burst or Single mode) and an asynchronous write or read transfer to or from static memory bank. There is a bus turnaround delay of 3 FMC clock cycle between: Two consecutive synchronous write operations (in Burst or Single mode) to different static banks. A synchronous write transfer (in Burst or Single mode) and a synchronous read from the same or a different bank. ...

pub fn accmod(&mut self) -> ACCMOD_W<'_>[src]

Bits 28:29 - Access mode. These bits specify the asynchronous access modes as shown in the next timing diagrams.These bits are taken into account only when the EXTMOD bit in the FMC_BCRx register is 1.

impl W<u32, Reg<u32, _PCSCNTR>>[src]

pub fn cscount(&mut self) -> CSCOUNT_W<'_>[src]

Bits 0:15 - Chip select counter

pub fn cntb1en(&mut self) -> CNTB1EN_W<'_>[src]

Bit 16 - Counter Bank 1 enable

pub fn cntb2en(&mut self) -> CNTB2EN_W<'_>[src]

Bit 17 - Counter Bank 2 enable

pub fn cntb3en(&mut self) -> CNTB3EN_W<'_>[src]

Bit 18 - Counter Bank 3 enable

pub fn cntb4en(&mut self) -> CNTB4EN_W<'_>[src]

Bit 19 - Counter Bank 4 enable

impl W<u32, Reg<u32, _RNG_CR>>[src]

pub fn rngen(&mut self) -> RNGEN_W<'_>[src]

Bit 2 - Random number generator enable

pub fn ie(&mut self) -> IE_W<'_>[src]

Bit 3 - Interrupt enable

pub fn ced(&mut self) -> CED_W<'_>[src]

Bit 5 - Clock error detection Note: The clock error detection can be used only when ck_rc48 or ck_pll1_q (ck_pll1_q = 48MHz) source is selected otherwise, CED bit must be equal to 1. The clock error detection cannot be enabled nor disabled on the fly when RNG peripheral is enabled, to enable or disable CED the RNG must be disabled.

pub fn rng_config3(&mut self) -> RNG_CONFIG3_W<'_>[src]

Bits 8:11 - RNG configuration 3

pub fn nistc(&mut self) -> NISTC_W<'_>[src]

Bit 12 - Non NIST compliant

pub fn rng_config2(&mut self) -> RNG_CONFIG2_W<'_>[src]

Bits 13:15 - RNG configuration 2

pub fn clkdiv(&mut self) -> CLKDIV_W<'_>[src]

Bits 16:19 - Clock divider factor

pub fn rng_config1(&mut self) -> RNG_CONFIG1_W<'_>[src]

Bits 20:25 - RNG configuration 1

pub fn condrst(&mut self) -> CONDRST_W<'_>[src]

Bit 30 - Conditioning soft reset

pub fn configlock(&mut self) -> CONFIGLOCK_W<'_>[src]

Bit 31 - RNG Config Lock

impl W<u32, Reg<u32, _RNG_SR>>[src]

pub fn ceis(&mut self) -> CEIS_W<'_>[src]

Bit 5 - Clock error interrupt status This bit is set at the same time as CECS. It is cleared by writing it to 0. An interrupt is pending if IE = 1 in the RNG_CR register. Note: This bit is meaningless if CED (Clock error detection) bit in RNG_CR is equal to 1.

pub fn seis(&mut self) -> SEIS_W<'_>[src]

Bit 6 - Seed error interrupt status This bit is set at the same time as SECS. It is cleared by writing it to 0. ** More than 64 consecutive bits at the same value (0 or 1) ** More than 32 consecutive alternances of 0 and 1 (0101010101...01) An interrupt is pending if IE = 1 in the RNG_CR register.

impl W<u32, Reg<u32, _RNG_HTCR>>[src]

pub fn htcfg(&mut self) -> HTCFG_W<'_>[src]

Bits 0:31 - health test configuration

impl W<u32, Reg<u32, _SDMMC_POWER>>[src]

pub fn pwrctrl(&mut self) -> PWRCTRL_W<'_>[src]

Bits 0:1 - SDMMC state control bits. These bits can only be written when the SDMMC is not in the power-on state (PWRCTRL?11). These bits are used to define the functional state of the SDMMC signals: Any further write will be ignored, PWRCTRL value will keep 11.

pub fn vswitch(&mut self) -> VSWITCH_W<'_>[src]

Bit 2 - Voltage switch sequence start. This bit is used to start the timing critical section of the voltage switch sequence:

pub fn vswitchen(&mut self) -> VSWITCHEN_W<'_>[src]

Bit 3 - Voltage switch procedure enable. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). This bit is used to stop the SDMMC_CK after the voltage switch command response:

pub fn dirpol(&mut self) -> DIRPOL_W<'_>[src]

Bit 4 - Data and command direction signals polarity selection. This bit can only be written when the SDMMC is in the power-off state (PWRCTRL = 00).

impl W<u32, Reg<u32, _SDMMC_CLKCR>>[src]

pub fn clkdiv(&mut self) -> CLKDIV_W<'_>[src]

Bits 0:9 - Clock divide factor This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). This field defines the divide factor between the input clock (SDMMCCLK) and the output clock (SDMMC_CK): SDMMC_CK frequency = SDMMCCLK / [2 * CLKDIV]. 0xx: etc.. xxx: etc..

pub fn pwrsav(&mut self) -> PWRSAV_W<'_>[src]

Bit 12 - Power saving configuration bit This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0) For power saving, the SDMMC_CK clock output can be disabled when the bus is idle by setting PWRSAV:

pub fn widbus(&mut self) -> WIDBUS_W<'_>[src]

Bits 14:15 - Wide bus mode enable bit This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0)

pub fn negedge(&mut self) -> NEGEDGE_W<'_>[src]

Bit 16 - SDMMC_CK dephasing selection bit for data and Command. This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). When clock division = 1 (CLKDIV = 0), this bit has no effect. Data and Command change on SDMMC_CK falling edge. When clock division >1 (CLKDIV > 0) & DDR = 0: - SDMMC_CK edge occurs on SDMMCCLK rising edge. When clock division >1 (CLKDIV > 0) & DDR = 1: - Data changed on the SDMMCCLK falling edge succeeding a SDMMC_CK edge. - SDMMC_CK edge occurs on SDMMCCLK rising edge. - Data changed on the SDMMC_CK falling edge succeeding a SDMMC_CK edge. - SDMMC_CK edge occurs on SDMMCCLK rising edge.

pub fn hwfc_en(&mut self) -> HWFC_EN_W<'_>[src]

Bit 17 - Hardware flow control enable This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0) When Hardware flow control is enabled, the meaning of the TXFIFOE and RXFIFOF flags change, please see SDMMC status register definition in Section56.8.11.

pub fn ddr(&mut self) -> DDR_W<'_>[src]

Bit 18 - Data rate signaling selection This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0) DDR rate shall only be selected with 4-bit or 8-bit wide bus mode. (WIDBUS > 00). DDR = 1 has no effect when WIDBUS = 00 (1-bit wide bus). DDR rate shall only be selected with clock division >1. (CLKDIV > 0)

pub fn busspeed(&mut self) -> BUSSPEED_W<'_>[src]

Bit 19 - Bus speed mode selection between DS, HS, SDR12, SDR25 and SDR50, DDR50, SDR104. This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0)

pub fn selclkrx(&mut self) -> SELCLKRX_W<'_>[src]

Bits 20:21 - Receive clock selection. These bits can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0)

impl W<u32, Reg<u32, _SDMMC_ARGR>>[src]

pub fn cmdarg(&mut self) -> CMDARG_W<'_>[src]

Bits 0:31 - Command argument. These bits can only be written by firmware when CPSM is disabled (CPSMEN = 0). Command argument sent to a card as part of a command message. If a command contains an argument, it must be loaded into this register before writing a command to the command register.

impl W<u32, Reg<u32, _SDMMC_CMDR>>[src]

pub fn cmdindex(&mut self) -> CMDINDEX_W<'_>[src]

Bits 0:5 - Command index. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). The command index is sent to the card as part of a command message.

pub fn cmdtrans(&mut self) -> CMDTRANS_W<'_>[src]

Bit 6 - The CPSM treats the command as a data transfer command, stops the interrupt period, and signals DataEnable to the DPSM This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). If this bit is set, the CPSM issues an end of interrupt period and issues DataEnable signal to the DPSM when the command is sent.

pub fn cmdstop(&mut self) -> CMDSTOP_W<'_>[src]

Bit 7 - The CPSM treats the command as a Stop Transmission command and signals Abort to the DPSM. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). If this bit is set, the CPSM issues the Abort signal to the DPSM when the command is sent.

pub fn waitresp(&mut self) -> WAITRESP_W<'_>[src]

Bits 8:9 - Wait for response bits. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). They are used to configure whether the CPSM is to wait for a response, and if yes, which kind of response.

pub fn waitint(&mut self) -> WAITINT_W<'_>[src]

Bit 10 - CPSM waits for interrupt request. If this bit is set, the CPSM disables command timeout and waits for an card interrupt request (Response). If this bit is cleared in the CPSM Wait state, will cause the abort of the interrupt mode.

pub fn waitpend(&mut self) -> WAITPEND_W<'_>[src]

Bit 11 - CPSM Waits for end of data transfer (CmdPend internal signal) from DPSM. This bit when set, the CPSM waits for the end of data transfer trigger before it starts sending a command. WAITPEND is only taken into account when DTMODE = MMC stream data transfer, WIDBUS = 1-bit wide bus mode, DPSMACT = 1 and DTDIR = from host to card.

pub fn cpsmen(&mut self) -> CPSMEN_W<'_>[src]

Bit 12 - Command path state machine (CPSM) Enable bit This bit is written 1 by firmware, and cleared by hardware when the CPSM enters the Idle state. If this bit is set, the CPSM is enabled. When DTEN = 1, no command will be transfered nor boot procedure will be started. CPSMEN is cleared to 0.

pub fn dthold(&mut self) -> DTHOLD_W<'_>[src]

Bit 13 - Hold new data block transmission and reception in the DPSM. If this bit is set, the DPSM will not move from the Wait_S state to the Send state or from the Wait_R state to the Receive state.

pub fn bootmode(&mut self) -> BOOTMODE_W<'_>[src]

Bit 14 - Select the boot mode procedure to be used. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0)

pub fn booten(&mut self) -> BOOTEN_W<'_>[src]

Bit 15 - Enable boot mode procedure.

pub fn cmdsuspend(&mut self) -> CMDSUSPEND_W<'_>[src]

Bit 16 - The CPSM treats the command as a Suspend or Resume command and signals interrupt period start/end. This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). CMDSUSPEND = 1 and CMDTRANS = 0 Suspend command, start interrupt period when response bit BS=0. CMDSUSPEND = 1 and CMDTRANS = 1 Resume command with data, end interrupt period when response bit DF=1.

impl W<u32, Reg<u32, _SDMMC_DTIMER>>[src]

pub fn datatime(&mut self) -> DATATIME_W<'_>[src]

Bits 0:31 - Data and R1b busy timeout period This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). Data and R1b busy timeout period expressed in card bus clock periods.

impl W<u32, Reg<u32, _SDMMC_DLENR>>[src]

pub fn datalength(&mut self) -> DATALENGTH_W<'_>[src]

Bits 0:24 - Data length value This register can only be written by firmware when DPSM is inactive (DPSMACT = 0). Number of data bytes to be transferred. When DDR = 1 DATALENGTH is truncated to a multiple of 2. (The last odd byte is not transfered) When DATALENGTH = 0 no data will be transfered, when requested by a CPSMEN and CMDTRANS = 1 also no command will be transfered. DTEN and CPSMEN are cleared to 0.

impl W<u32, Reg<u32, _SDMMC_DCTRL>>[src]

pub fn dten(&mut self) -> DTEN_W<'_>[src]

Bit 0 - Data transfer enable bit This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). This bit is cleared by Hardware when data transfer completes. This bit shall only be used to transfer data when no associated data transfer command is used, i.e. shall not be used with SD or eMMC cards.

pub fn dtdir(&mut self) -> DTDIR_W<'_>[src]

Bit 1 - Data transfer direction selection This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).

pub fn dtmode(&mut self) -> DTMODE_W<'_>[src]

Bits 2:3 - Data transfer mode selection. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).

pub fn dblocksize(&mut self) -> DBLOCKSIZE_W<'_>[src]

Bits 4:7 - Data block size This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). Define the data block length when the block data transfer mode is selected: When DATALENGTH is not a multiple of DBLOCKSIZE, the transfered data is truncated at a multiple of DBLOCKSIZE. (Any remain data will not be transfered.) When DDR = 1, DBLOCKSIZE = 0000 shall not be used. (No data will be transfered)

pub fn rwstart(&mut self) -> RWSTART_W<'_>[src]

Bit 8 - Read wait start. If this bit is set, read wait operation starts.

pub fn rwstop(&mut self) -> RWSTOP_W<'_>[src]

Bit 9 - Read wait stop This bit is written by firmware and auto cleared by hardware when the DPSM moves from the READ_WAIT state to the WAIT_R or IDLE state.

pub fn rwmod(&mut self) -> RWMOD_W<'_>[src]

Bit 10 - Read wait mode. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).

pub fn sdioen(&mut self) -> SDIOEN_W<'_>[src]

Bit 11 - SD I/O interrupt enable functions This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). If this bit is set, the DPSM enables the SD I/O card specific interrupt operation.

pub fn bootacken(&mut self) -> BOOTACKEN_W<'_>[src]

Bit 12 - Enable the reception of the boot acknowledgment. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).

pub fn fiforst(&mut self) -> FIFORST_W<'_>[src]

Bit 13 - FIFO reset, will flush any remaining data. This bit can only be written by firmware when IDMAEN= 0 and DPSM is active (DPSMACT = 1). This bit will only take effect when a transfer error or transfer hold occurs.

impl W<u32, Reg<u32, _SDMMC_ICR>>[src]

pub fn ccrcfailc(&mut self) -> CCRCFAILC_W<'_>[src]

Bit 0 - CCRCFAIL flag clear bit Set by software to clear the CCRCFAIL flag.

pub fn dcrcfailc(&mut self) -> DCRCFAILC_W<'_>[src]

Bit 1 - DCRCFAIL flag clear bit Set by software to clear the DCRCFAIL flag.

pub fn ctimeoutc(&mut self) -> CTIMEOUTC_W<'_>[src]

Bit 2 - CTIMEOUT flag clear bit Set by software to clear the CTIMEOUT flag.

pub fn dtimeoutc(&mut self) -> DTIMEOUTC_W<'_>[src]

Bit 3 - DTIMEOUT flag clear bit Set by software to clear the DTIMEOUT flag.

pub fn txunderrc(&mut self) -> TXUNDERRC_W<'_>[src]

Bit 4 - TXUNDERR flag clear bit Set by software to clear TXUNDERR flag.

pub fn rxoverrc(&mut self) -> RXOVERRC_W<'_>[src]

Bit 5 - RXOVERR flag clear bit Set by software to clear the RXOVERR flag.

pub fn cmdrendc(&mut self) -> CMDRENDC_W<'_>[src]

Bit 6 - CMDREND flag clear bit Set by software to clear the CMDREND flag.

pub fn cmdsentc(&mut self) -> CMDSENTC_W<'_>[src]

Bit 7 - CMDSENT flag clear bit Set by software to clear the CMDSENT flag.

pub fn dataendc(&mut self) -> DATAENDC_W<'_>[src]

Bit 8 - DATAEND flag clear bit Set by software to clear the DATAEND flag.

pub fn dholdc(&mut self) -> DHOLDC_W<'_>[src]

Bit 9 - DHOLD flag clear bit Set by software to clear the DHOLD flag.

pub fn dbckendc(&mut self) -> DBCKENDC_W<'_>[src]

Bit 10 - DBCKEND flag clear bit Set by software to clear the DBCKEND flag.

pub fn dabortc(&mut self) -> DABORTC_W<'_>[src]

Bit 11 - DABORT flag clear bit Set by software to clear the DABORT flag.

pub fn busyd0endc(&mut self) -> BUSYD0ENDC_W<'_>[src]

Bit 21 - BUSYD0END flag clear bit Set by software to clear the BUSYD0END flag.

pub fn sdioitc(&mut self) -> SDIOITC_W<'_>[src]

Bit 22 - SDIOIT flag clear bit Set by software to clear the SDIOIT flag.

pub fn ackfailc(&mut self) -> ACKFAILC_W<'_>[src]

Bit 23 - ACKFAIL flag clear bit Set by software to clear the ACKFAIL flag.

pub fn acktimeoutc(&mut self) -> ACKTIMEOUTC_W<'_>[src]

Bit 24 - ACKTIMEOUT flag clear bit Set by software to clear the ACKTIMEOUT flag.

pub fn vswendc(&mut self) -> VSWENDC_W<'_>[src]

Bit 25 - VSWEND flag clear bit Set by software to clear the VSWEND flag.

pub fn ckstopc(&mut self) -> CKSTOPC_W<'_>[src]

Bit 26 - CKSTOP flag clear bit Set by software to clear the CKSTOP flag.

pub fn idmatec(&mut self) -> IDMATEC_W<'_>[src]

Bit 27 - IDMA transfer error clear bit Set by software to clear the IDMATE flag.

pub fn idmabtcc(&mut self) -> IDMABTCC_W<'_>[src]

Bit 28 - IDMA buffer transfer complete clear bit Set by software to clear the IDMABTC flag.

impl W<u32, Reg<u32, _SDMMC_MASKR>>[src]

pub fn ccrcfailie(&mut self) -> CCRCFAILIE_W<'_>[src]

Bit 0 - Command CRC fail interrupt enable Set and cleared by software to enable/disable interrupt caused by command CRC failure.

pub fn dcrcfailie(&mut self) -> DCRCFAILIE_W<'_>[src]

Bit 1 - Data CRC fail interrupt enable Set and cleared by software to enable/disable interrupt caused by data CRC failure.

pub fn ctimeoutie(&mut self) -> CTIMEOUTIE_W<'_>[src]

Bit 2 - Command timeout interrupt enable Set and cleared by software to enable/disable interrupt caused by command timeout.

pub fn dtimeoutie(&mut self) -> DTIMEOUTIE_W<'_>[src]

Bit 3 - Data timeout interrupt enable Set and cleared by software to enable/disable interrupt caused by data timeout.

pub fn txunderrie(&mut self) -> TXUNDERRIE_W<'_>[src]

Bit 4 - Tx FIFO underrun error interrupt enable Set and cleared by software to enable/disable interrupt caused by Tx FIFO underrun error.

pub fn rxoverrie(&mut self) -> RXOVERRIE_W<'_>[src]

Bit 5 - Rx FIFO overrun error interrupt enable Set and cleared by software to enable/disable interrupt caused by Rx FIFO overrun error.

pub fn cmdrendie(&mut self) -> CMDRENDIE_W<'_>[src]

Bit 6 - Command response received interrupt enable Set and cleared by software to enable/disable interrupt caused by receiving command response.

pub fn cmdsentie(&mut self) -> CMDSENTIE_W<'_>[src]

Bit 7 - Command sent interrupt enable Set and cleared by software to enable/disable interrupt caused by sending command.

pub fn dataendie(&mut self) -> DATAENDIE_W<'_>[src]

Bit 8 - Data end interrupt enable Set and cleared by software to enable/disable interrupt caused by data end.

pub fn dholdie(&mut self) -> DHOLDIE_W<'_>[src]

Bit 9 - Data hold interrupt enable Set and cleared by software to enable/disable the interrupt generated when sending new data is hold in the DPSM Wait_S state.

pub fn dbckendie(&mut self) -> DBCKENDIE_W<'_>[src]

Bit 10 - Data block end interrupt enable Set and cleared by software to enable/disable interrupt caused by data block end.

pub fn dabortie(&mut self) -> DABORTIE_W<'_>[src]

Bit 11 - Data transfer aborted interrupt enable Set and cleared by software to enable/disable interrupt caused by a data transfer being aborted.

pub fn txfifoheie(&mut self) -> TXFIFOHEIE_W<'_>[src]

Bit 14 - Tx FIFO half empty interrupt enable Set and cleared by software to enable/disable interrupt caused by Tx FIFO half empty.

pub fn rxfifohfie(&mut self) -> RXFIFOHFIE_W<'_>[src]

Bit 15 - Rx FIFO half full interrupt enable Set and cleared by software to enable/disable interrupt caused by Rx FIFO half full.

pub fn rxfifofie(&mut self) -> RXFIFOFIE_W<'_>[src]

Bit 17 - Rx FIFO full interrupt enable Set and cleared by software to enable/disable interrupt caused by Rx FIFO full.

pub fn txfifoeie(&mut self) -> TXFIFOEIE_W<'_>[src]

Bit 18 - Tx FIFO empty interrupt enable Set and cleared by software to enable/disable interrupt caused by Tx FIFO empty.

pub fn busyd0endie(&mut self) -> BUSYD0ENDIE_W<'_>[src]

Bit 21 - BUSYD0END interrupt enable Set and cleared by software to enable/disable the interrupt generated when SDMMC_D0 signal changes from busy to NOT busy following a CMD response.

pub fn sdioitie(&mut self) -> SDIOITIE_W<'_>[src]

Bit 22 - SDIO mode interrupt received interrupt enable Set and cleared by software to enable/disable the interrupt generated when receiving the SDIO mode interrupt.

pub fn ackfailie(&mut self) -> ACKFAILIE_W<'_>[src]

Bit 23 - Acknowledgment Fail interrupt enable Set and cleared by software to enable/disable interrupt caused by acknowledgment Fail.

pub fn acktimeoutie(&mut self) -> ACKTIMEOUTIE_W<'_>[src]

Bit 24 - Acknowledgment timeout interrupt enable Set and cleared by software to enable/disable interrupt caused by acknowledgment timeout.

pub fn vswendie(&mut self) -> VSWENDIE_W<'_>[src]

Bit 25 - Voltage switch critical timing section completion interrupt enable Set and cleared by software to enable/disable the interrupt generated when voltage switch critical timing section completion.

pub fn ckstopie(&mut self) -> CKSTOPIE_W<'_>[src]

Bit 26 - Voltage Switch clock stopped interrupt enable Set and cleared by software to enable/disable interrupt caused by Voltage Switch clock stopped.

pub fn idmabtcie(&mut self) -> IDMABTCIE_W<'_>[src]

Bit 28 - IDMA buffer transfer complete interrupt enable Set and cleared by software to enable/disable the interrupt generated when the IDMA has transferred all data belonging to a memory buffer.

impl W<u32, Reg<u32, _SDMMC_ACKTIMER>>[src]

pub fn acktime(&mut self) -> ACKTIME_W<'_>[src]

Bits 0:24 - Boot acknowledgment timeout period This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). Boot acknowledgment timeout period expressed in card bus clock periods.

impl W<u32, Reg<u32, _SDMMC_IDMACTRLR>>[src]

pub fn idmaen(&mut self) -> IDMAEN_W<'_>[src]

Bit 0 - IDMA enable This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).

pub fn idmabmode(&mut self) -> IDMABMODE_W<'_>[src]

Bit 1 - Buffer mode selection. This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).

pub fn idmabact(&mut self) -> IDMABACT_W<'_>[src]

Bit 2 - Double buffer mode active buffer indication This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0). When IDMA is enabled this bit is toggled by hardware.

impl W<u32, Reg<u32, _SDMMC_IDMABSIZER>>[src]

pub fn idmabndt(&mut self) -> IDMABNDT_W<'_>[src]

Bits 5:12 - Number of transfers per buffer. This 8-bit value shall be multiplied by 8 to get the size of the buffer in 32-bit words and by 32 to get the size of the buffer in bytes. Example: IDMABNDT = 0x01: buffer size = 8 words = 32 bytes. These bits can only be written by firmware when DPSM is inactive (DPSMACT = 0).

impl W<u32, Reg<u32, _SDMMC_IDMABASE0R>>[src]

pub fn idmabase0(&mut self) -> IDMABASE0_W<'_>[src]

Bits 0:31 - Buffer 0 memory base address bits [31:2], shall be word aligned (bit [1:0] are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 0 is inactive (IDMABACT = 1).

impl W<u32, Reg<u32, _SDMMC_IDMABASE1R>>[src]

pub fn idmabase1(&mut self) -> IDMABASE1_W<'_>[src]

Bits 0:31 - Buffer 1 memory base address, shall be word aligned (bit [1:0] are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 1 is inactive (IDMABACT = 0).

impl W<u32, Reg<u32, _SDMMC_FIFOR>>[src]

pub fn fifodata(&mut self) -> FIFODATA_W<'_>[src]

Bits 0:31 - Receive and transmit FIFO data This register can only be read or written by firmware when the DPSM is active (DPSMACT=1). The FIFO data occupies 16 entries of 32-bit words.

Auto Trait Implementations

impl<U, REG> Send for W<U, REG> where
    REG: Send,
    U: Send

impl<U, REG> Sync for W<U, REG> where
    REG: Sync,
    U: Sync

impl<U, REG> Unpin for W<U, REG> where
    REG: Unpin,
    U: Unpin

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T> Same<T> for T

type Output = T

Should always be Self

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
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type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.