Struct stm32l4x6::tim15::RegisterBlock
[−]
[src]
#[repr(C)]pub struct RegisterBlock { pub cr1: Cr1, pub cr2: Cr2, pub dier: Dier, pub sr: Sr, pub egr: Egr, pub ccmr1_output: Ccmr1Output, pub ccer: Ccer, pub cnt: Cnt, pub psc: Psc, pub arr: Arr, pub rcr: Rcr, pub ccr1: Ccr1, pub bdtr: Bdtr, pub dcr: Dcr, pub dmar: Dmar, // some fields omitted }
Register block
Fields
cr1: Cr1
0x00 - control register 1
cr2: Cr2
0x04 - control register 2
dier: Dier
0x0c - DMA/Interrupt enable register
sr: Sr
0x10 - status register
egr: Egr
0x14 - event generation register
ccmr1_output: Ccmr1Output
0x18 - capture/compare mode register (output mode)
ccer: Ccer
0x20 - capture/compare enable register
cnt: Cnt
0x24 - counter
psc: Psc
0x28 - prescaler
arr: Arr
0x2c - auto-reload register
rcr: Rcr
0x30 - repetition counter register
ccr1: Ccr1
0x34 - capture/compare register 1
bdtr: Bdtr
0x44 - break and dead-time register
dcr: Dcr
0x48 - DMA control register
dmar: Dmar
0x4c - DMA address for full transfer