Struct stm32l4x6::rcc::RegisterBlock [−] [src]

#[repr(C)]

pub struct RegisterBlock {
    pub cr: Cr,
    pub icscr: Icscr,
    pub cfgr: Cfgr,
    pub pllcfgr: Pllcfgr,
    pub pllsai1cfgr: Pllsai1cfgr,
    pub pllsai2cfgr: Pllsai2cfgr,
    pub cier: Cier,
    pub cifr: Cifr,
    pub cicr: Cicr,
    pub ahb1rstr: Ahb1rstr,
    pub ahb2rstr: Ahb2rstr,
    pub ahb3rstr: Ahb3rstr,
    pub apb1rstr1: Apb1rstr1,
    pub apb1rstr2: Apb1rstr2,
    pub apb2rstr: Apb2rstr,
    pub ahb1enr: Ahb1enr,
    pub ahb2enr: Ahb2enr,
    pub ahb3enr: Ahb3enr,
    pub apb1enr1: Apb1enr1,
    pub apb1enr2: Apb1enr2,
    pub apb2enr: Apb2enr,
    pub ahb1smenr: Ahb1smenr,
    pub ahb2smenr: Ahb2smenr,
    pub ahb3smenr: Ahb3smenr,
    pub apb1smenr1: Apb1smenr1,
    pub apb1smenr2: Apb1smenr2,
    pub apb2smenr: Apb2smenr,
    pub ccipr: Ccipr,
    pub bdcr: Bdcr,
    pub csr: Csr,
    // some fields omitted
}

Register block

Fields

0x00 - Clock control register

0x04 - Internal clock sources calibration register

0x08 - Clock configuration register

0x0c - PLL configuration register

0x10 - PLLSAI1 configuration register

0x14 - PLLSAI2 configuration register

0x18 - Clock interrupt enable register

0x1c - Clock interrupt flag register

0x20 - Clock interrupt clear register

0x28 - AHB1 peripheral reset register

0x2c - AHB2 peripheral reset register

0x30 - AHB3 peripheral reset register

0x38 - APB1 peripheral reset register 1

0x3c - APB1 peripheral reset register 2

0x40 - APB2 peripheral reset register

0x48 - AHB1 peripheral clock enable register

0x4c - AHB2 peripheral clock enable register

0x50 - AHB3 peripheral clock enable register

0x58 - APB1ENR1

0x5c - APB1 peripheral clock enable register 2

0x60 - APB2ENR

0x68 - AHB1 peripheral clocks enable in Sleep and Stop modes register

0x6c - AHB2 peripheral clocks enable in Sleep and Stop modes register

0x70 - AHB3 peripheral clocks enable in Sleep and Stop modes register

0x78 - APB1SMENR1

0x7c - APB1 peripheral clocks enable in Sleep and Stop modes register 2

0x80 - APB2SMENR

0x88 - CCIPR

0x90 - BDCR

0x94 - CSR