<device xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" schemaVersion="1.1" xsi:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd">
<name>STM32L4x2</name>
<version>1.6</version>
<description>STM32L4x2</description>
<cpu>
<name>CM4</name>
<revision>r1p0</revision>
<endian>little</endian>
<mpuPresent>false</mpuPresent>
<fpuPresent>false</fpuPresent>
<nvicPrioBits>4</nvicPrioBits>
<vendorSystickConfig>false</vendorSystickConfig>
</cpu>
<addressUnitBits>8</addressUnitBits>
<width>32</width>
<size>0x20</size>
<resetValue>0x0</resetValue>
<resetMask>0xFFFFFFFF</resetMask>
<peripherals>
<peripheral>
<name>DAC1</name>
<description>Digital-to-analog converter</description>
<groupName>DAC</groupName>
<baseAddress>0x40007400</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>CR</name>
<displayName>CR</displayName>
<description>control register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EN1</name>
<description>DAC channel1 enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TEN1</name>
<description>DAC channel1 trigger
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TSEL1</name>
<description>DAC channel1 trigger
selection</description>
<bitOffset>3</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>WAVE1</name>
<description>DAC channel1 noise/triangle wave
generation enable</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>MAMP1</name>
<description>DAC channel1 mask/amplitude
selector</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>DMAEN1</name>
<description>DAC channel1 DMA enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DMAUDRIE1</name>
<description>DAC channel1 DMA Underrun Interrupt
enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CEN1</name>
<description>DAC Channel 1 calibration
enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EN2</name>
<description>DAC channel2 enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TEN2</name>
<description>DAC channel2 trigger
enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TSEL2</name>
<description>DAC channel2 trigger
selection</description>
<bitOffset>19</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>WAVE2</name>
<description>DAC channel2 noise/triangle wave
generation enable</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>MAMP2</name>
<description>DAC channel2 mask/amplitude
selector</description>
<bitOffset>24</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>DMAEN2</name>
<description>DAC channel2 DMA enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DMAUDRIE2</name>
<description>DAC channel2 DMA underrun interrupt
enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CEN2</name>
<description>DAC Channel 2 calibration
enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>SWTRIGR</name>
<displayName>SWTRIGR</displayName>
<description>software trigger register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SWTRIG1</name>
<description>DAC channel1 software
trigger</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWTRIG2</name>
<description>DAC channel2 software
trigger</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>DHR12R1</name>
<displayName>DHR12R1</displayName>
<description>channel1 12-bit right-aligned data holding
register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DACC1DHR</name>
<description>DAC channel1 12-bit right-aligned
data</description>
<bitOffset>0</bitOffset>
<bitWidth>12</bitWidth>
</field>
</fields>
</register>
<register>
<name>DHR12L1</name>
<displayName>DHR12L1</displayName>
<description>channel1 12-bit left-aligned data holding
register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DACC1DHR</name>
<description>DAC channel1 12-bit left-aligned
data</description>
<bitOffset>4</bitOffset>
<bitWidth>12</bitWidth>
</field>
</fields>
</register>
<register>
<name>DHR8R1</name>
<displayName>DHR8R1</displayName>
<description>channel1 8-bit right-aligned data holding
register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DACC1DHR</name>
<description>DAC channel1 8-bit right-aligned
data</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>DHR12R2</name>
<displayName>DHR12R2</displayName>
<description>channel2 12-bit right aligned data holding
register</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DACC2DHR</name>
<description>DAC channel2 12-bit right-aligned
data</description>
<bitOffset>0</bitOffset>
<bitWidth>12</bitWidth>
</field>
</fields>
</register>
<register>
<name>DHR12L2</name>
<displayName>DHR12L2</displayName>
<description>channel2 12-bit left aligned data holding
register</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DACC2DHR</name>
<description>DAC channel2 12-bit left-aligned
data</description>
<bitOffset>4</bitOffset>
<bitWidth>12</bitWidth>
</field>
</fields>
</register>
<register>
<name>DHR8R2</name>
<displayName>DHR8R2</displayName>
<description>channel2 8-bit right-aligned data holding
register</description>
<addressOffset>0x1C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DACC2DHR</name>
<description>DAC channel2 8-bit right-aligned
data</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>DHR12RD</name>
<displayName>DHR12RD</displayName>
<description>Dual DAC 12-bit right-aligned data holding
register</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DACC1DHR</name>
<description>DAC channel1 12-bit right-aligned
data</description>
<bitOffset>0</bitOffset>
<bitWidth>12</bitWidth>
</field>
<field>
<name>DACC2DHR</name>
<description>DAC channel2 12-bit right-aligned
data</description>
<bitOffset>16</bitOffset>
<bitWidth>12</bitWidth>
</field>
</fields>
</register>
<register>
<name>DHR12LD</name>
<displayName>DHR12LD</displayName>
<description>DUAL DAC 12-bit left aligned data holding
register</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DACC1DHR</name>
<description>DAC channel1 12-bit left-aligned
data</description>
<bitOffset>4</bitOffset>
<bitWidth>12</bitWidth>
</field>
<field>
<name>DACC2DHR</name>
<description>DAC channel2 12-bit left-aligned
data</description>
<bitOffset>20</bitOffset>
<bitWidth>12</bitWidth>
</field>
</fields>
</register>
<register>
<name>DHR8RD</name>
<displayName>DHR8RD</displayName>
<description>DUAL DAC 8-bit right aligned data holding
register</description>
<addressOffset>0x28</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DACC1DHR</name>
<description>DAC channel1 8-bit right-aligned
data</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>DACC2DHR</name>
<description>DAC channel2 8-bit right-aligned
data</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>DOR1</name>
<displayName>DOR1</displayName>
<description>channel1 data output register</description>
<addressOffset>0x2C</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DACC1DOR</name>
<description>DAC channel1 data output</description>
<bitOffset>0</bitOffset>
<bitWidth>12</bitWidth>
</field>
</fields>
</register>
<register>
<name>DOR2</name>
<displayName>DOR2</displayName>
<description>channel2 data output register</description>
<addressOffset>0x30</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DACC2DOR</name>
<description>DAC channel2 data output</description>
<bitOffset>0</bitOffset>
<bitWidth>12</bitWidth>
</field>
</fields>
</register>
<register>
<name>SR</name>
<displayName>SR</displayName>
<description>status register</description>
<addressOffset>0x34</addressOffset>
<size>0x20</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMAUDR1</name>
<description>DAC channel1 DMA underrun
flag</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CAL_FLAG1</name>
<description>DAC Channel 1 calibration offset
status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BWST1</name>
<description>DAC Channel 1 busy writing sample time
flag</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DMAUDR2</name>
<description>DAC channel2 DMA underrun
flag</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CAL_FLAG2</name>
<description>DAC Channel 2 calibration offset
status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BWST2</name>
<description>DAC Channel 2 busy writing sample time
flag</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CCR</name>
<displayName>CCR</displayName>
<description>calibration control register</description>
<addressOffset>0x38</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OTRIM1</name>
<description>DAC Channel 1 offset trimming
value</description>
<bitOffset>0</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>OTRIM2</name>
<description>DAC Channel 2 offset trimming
value</description>
<bitOffset>16</bitOffset>
<bitWidth>5</bitWidth>
</field>
</fields>
</register>
<register>
<name>MCR</name>
<displayName>MCR</displayName>
<description>mode control register</description>
<addressOffset>0x3C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MODE1</name>
<description>DAC Channel 1 mode</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>MODE2</name>
<description>DAC Channel 2 mode</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
</field>
</fields>
</register>
<register>
<name>SHSR1</name>
<displayName>SHSR1</displayName>
<description>Sample and Hold sample time register
1</description>
<addressOffset>0x40</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TSAMPLE1</name>
<description>DAC Channel 1 sample Time</description>
<bitOffset>0</bitOffset>
<bitWidth>10</bitWidth>
</field>
</fields>
</register>
<register>
<name>SHSR2</name>
<displayName>SHSR2</displayName>
<description>Sample and Hold sample time register
2</description>
<addressOffset>0x44</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TSAMPLE2</name>
<description>DAC Channel 2 sample Time</description>
<bitOffset>0</bitOffset>
<bitWidth>10</bitWidth>
</field>
</fields>
</register>
<register>
<name>SHHR</name>
<displayName>SHHR</displayName>
<description>Sample and Hold hold time
register</description>
<addressOffset>0x48</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00010001</resetValue>
<fields>
<field>
<name>THOLD1</name>
<description>DAC Channel 1 hold Time</description>
<bitOffset>0</bitOffset>
<bitWidth>10</bitWidth>
</field>
<field>
<name>THOLD2</name>
<description>DAC Channel 2 hold time</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
</field>
</fields>
</register>
<register>
<name>SHRR</name>
<displayName>SHRR</displayName>
<description>Sample and Hold refresh time
register</description>
<addressOffset>0x4C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000001</resetValue>
<fields>
<field>
<name>TREFRESH1</name>
<description>DAC Channel 1 refresh Time</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>TREFRESH2</name>
<description>DAC Channel 2 refresh Time</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>DMA1</name>
<description>Direct memory access controller</description>
<groupName>DMA</groupName>
<baseAddress>0x40020000</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>DMA1_CH1</name>
<description>DMA1 Channel1 global interrupt</description>
<value>11</value>
</interrupt>
<interrupt>
<name>DMA1_CH2</name>
<description>DMA1 Channel2 global interrupt</description>
<value>12</value>
</interrupt>
<interrupt>
<name>DMA1_CH3</name>
<description>DMA1 Channel3 interrupt</description>
<value>13</value>
</interrupt>
<interrupt>
<name>DMA1_CH4</name>
<description>DMA1 Channel4 interrupt</description>
<value>14</value>
</interrupt>
<interrupt>
<name>DMA1_CH5</name>
<description>DMA1 Channel5 interrupt</description>
<value>15</value>
</interrupt>
<interrupt>
<name>DMA1_CH6</name>
<description>DMA1 Channel6 interrupt</description>
<value>16</value>
</interrupt>
<interrupt>
<name>DMA1_CH7</name>
<description>DMA1 Channel 7 interrupt</description>
<value>17</value>
</interrupt>
<registers>
<register>
<name>ISR</name>
<displayName>ISR</displayName>
<description>interrupt status register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TEIF7</name>
<description>Channel x transfer error flag (x = 1
..7)</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TEIF7</name><usage>read-write</usage><enumeratedValue><name>NoError</name><description>No transfer error</description><value>0</value></enumeratedValue><enumeratedValue><name>Error</name><description>A transfer error has occured</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>HTIF7</name>
<description>Channel x half transfer flag (x = 1
..7)</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>HTIF7</name><usage>read-write</usage><enumeratedValue><name>NotHalt</name><description>No half transfer event</description><value>0</value></enumeratedValue><enumeratedValue><name>Half</name><description>A half transfer event has occured</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TCIF7</name>
<description>Channel x transfer complete flag (x = 1
..7)</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TCIF7</name><usage>read-write</usage><enumeratedValue><name>NotComplete</name><description>No transfer complete event</description><value>0</value></enumeratedValue><enumeratedValue><name>Complete</name><description>A transfer complete event has occured</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>GIF7</name>
<description>Channel x global interrupt flag (x = 1
..7)</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>GIF7</name><usage>read-write</usage><enumeratedValue><name>NoEvent</name><description>No transfer error, half event, complete event</description><value>0</value></enumeratedValue><enumeratedValue><name>Event</name><description>A transfer error, half event or complete event has occured</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TEIF6</name>
<description>Channel x transfer error flag (x = 1
..7)</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="TEIF7" />
</field>
<field>
<name>HTIF6</name>
<description>Channel x half transfer flag (x = 1
..7)</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="HTIF7" />
</field>
<field>
<name>TCIF6</name>
<description>Channel x transfer complete flag (x = 1
..7)</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="TCIF7" />
</field>
<field>
<name>GIF6</name>
<description>Channel x global interrupt flag (x = 1
..7)</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="GIF7" />
</field>
<field>
<name>TEIF5</name>
<description>Channel x transfer error flag (x = 1
..7)</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="TEIF7" />
</field>
<field>
<name>HTIF5</name>
<description>Channel x half transfer flag (x = 1
..7)</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="HTIF7" />
</field>
<field>
<name>TCIF5</name>
<description>Channel x transfer complete flag (x = 1
..7)</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="TCIF7" />
</field>
<field>
<name>GIF5</name>
<description>Channel x global interrupt flag (x = 1
..7)</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="GIF7" />
</field>
<field>
<name>TEIF4</name>
<description>Channel x transfer error flag (x = 1
..7)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="TEIF7" />
</field>
<field>
<name>HTIF4</name>
<description>Channel x half transfer flag (x = 1
..7)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="HTIF7" />
</field>
<field>
<name>TCIF4</name>
<description>Channel x transfer complete flag (x = 1
..7)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="TCIF7" />
</field>
<field>
<name>GIF4</name>
<description>Channel x global interrupt flag (x = 1
..7)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="GIF7" />
</field>
<field>
<name>TEIF3</name>
<description>Channel x transfer error flag (x = 1
..7)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="TEIF7" />
</field>
<field>
<name>HTIF3</name>
<description>Channel x half transfer flag (x = 1
..7)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="HTIF7" />
</field>
<field>
<name>TCIF3</name>
<description>Channel x transfer complete flag (x = 1
..7)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="TCIF7" />
</field>
<field>
<name>GIF3</name>
<description>Channel x global interrupt flag (x = 1
..7)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="GIF7" />
</field>
<field>
<name>TEIF2</name>
<description>Channel x transfer error flag (x = 1
..7)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="TEIF7" />
</field>
<field>
<name>HTIF2</name>
<description>Channel x half transfer flag (x = 1
..7)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="HTIF7" />
</field>
<field>
<name>TCIF2</name>
<description>Channel x transfer complete flag (x = 1
..7)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="TCIF7" />
</field>
<field>
<name>GIF2</name>
<description>Channel x global interrupt flag (x = 1
..7)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="GIF7" />
</field>
<field>
<name>TEIF1</name>
<description>Channel x transfer error flag (x = 1
..7)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="TEIF7" />
</field>
<field>
<name>HTIF1</name>
<description>Channel x half transfer flag (x = 1
..7)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="HTIF7" />
</field>
<field>
<name>TCIF1</name>
<description>Channel x transfer complete flag (x = 1
..7)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="TCIF7" />
</field>
<field>
<name>GIF1</name>
<description>Channel x global interrupt flag (x = 1
..7)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="GIF7" />
</field>
</fields>
</register>
<register>
<name>IFCR</name>
<displayName>IFCR</displayName>
<description>interrupt flag clear register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CTEIF7</name>
<description>Channel x transfer error clear (x = 1
..7)</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CTEIF7</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the TEIF flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CHTIF7</name>
<description>Channel x half transfer clear (x = 1
..7)</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CHTIF7</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the HTIF flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CTCIF7</name>
<description>Channel x transfer complete clear (x = 1
..7)</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CTCIF7</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the TCIF flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CGIF7</name>
<description>Channel x global interrupt clear (x = 1
..7)</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CGIF7</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the GIF, TEIF, HTIF, TCIF flags in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CTEIF6</name>
<description>Channel x transfer error clear (x = 1
..7)</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CTEIF7" />
</field>
<field>
<name>CHTIF6</name>
<description>Channel x half transfer clear (x = 1
..7)</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CHTIF7" />
</field>
<field>
<name>CTCIF6</name>
<description>Channel x transfer complete clear (x = 1
..7)</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CTCIF7" />
</field>
<field>
<name>CGIF6</name>
<description>Channel x global interrupt clear (x = 1
..7)</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CGIF7" />
</field>
<field>
<name>CTEIF5</name>
<description>Channel x transfer error clear (x = 1
..7)</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CTEIF7" />
</field>
<field>
<name>CHTIF5</name>
<description>Channel x half transfer clear (x = 1
..7)</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CHTIF7" />
</field>
<field>
<name>CTCIF5</name>
<description>Channel x transfer complete clear (x = 1
..7)</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CTCIF7" />
</field>
<field>
<name>CGIF5</name>
<description>Channel x global interrupt clear (x = 1
..7)</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CGIF7" />
</field>
<field>
<name>CTEIF4</name>
<description>Channel x transfer error clear (x = 1
..7)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CTEIF7" />
</field>
<field>
<name>CHTIF4</name>
<description>Channel x half transfer clear (x = 1
..7)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CHTIF7" />
</field>
<field>
<name>CTCIF4</name>
<description>Channel x transfer complete clear (x = 1
..7)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CTCIF7" />
</field>
<field>
<name>CGIF4</name>
<description>Channel x global interrupt clear (x = 1
..7)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CGIF7" />
</field>
<field>
<name>CTEIF3</name>
<description>Channel x transfer error clear (x = 1
..7)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CTEIF7" />
</field>
<field>
<name>CHTIF3</name>
<description>Channel x half transfer clear (x = 1
..7)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CHTIF7" />
</field>
<field>
<name>CTCIF3</name>
<description>Channel x transfer complete clear (x = 1
..7)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CTCIF7" />
</field>
<field>
<name>CGIF3</name>
<description>Channel x global interrupt clear (x = 1
..7)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CGIF7" />
</field>
<field>
<name>CTEIF2</name>
<description>Channel x transfer error clear (x = 1
..7)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CTEIF7" />
</field>
<field>
<name>CHTIF2</name>
<description>Channel x half transfer clear (x = 1
..7)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CHTIF7" />
</field>
<field>
<name>CTCIF2</name>
<description>Channel x transfer complete clear (x = 1
..7)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CTCIF7" />
</field>
<field>
<name>CGIF2</name>
<description>Channel x global interrupt clear (x = 1
..7)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CGIF7" />
</field>
<field>
<name>CTEIF1</name>
<description>Channel x transfer error clear (x = 1
..7)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CTEIF7" />
</field>
<field>
<name>CHTIF1</name>
<description>Channel x half transfer clear (x = 1
..7)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CHTIF7" />
</field>
<field>
<name>CTCIF1</name>
<description>Channel x transfer complete clear (x = 1
..7)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CTCIF7" />
</field>
<field>
<name>CGIF1</name>
<description>Channel x global interrupt clear (x = 1
..7)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CGIF7" />
</field>
</fields>
</register>
<register>
<name>CCR1</name>
<displayName>CCR1</displayName>
<description>channel x configuration
register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MEM2MEM</name>
<description>Memory to memory mode</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>MEM2MEM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Memory to memory mode disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Memory to memory mode enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PL</name>
<description>Channel priority level</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>PL</name><usage>read-write</usage><enumeratedValue><name>Low</name><description>Low priority</description><value>0</value></enumeratedValue><enumeratedValue><name>Medium</name><description>Medium priority</description><value>1</value></enumeratedValue><enumeratedValue><name>High</name><description>High priority</description><value>2</value></enumeratedValue><enumeratedValue><name>VeryHigh</name><description>Very high priority</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>MSIZE</name>
<description>Memory size</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>MSIZE</name><usage>read-write</usage><enumeratedValue><name>Bit8</name><description>8-bit size</description><value>0</value></enumeratedValue><enumeratedValue><name>Bit16</name><description>16-bit size</description><value>1</value></enumeratedValue><enumeratedValue><name>Bit32</name><description>32-bit size</description><value>2</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PSIZE</name>
<description>Peripheral size</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MSIZE" />
</field>
<field>
<name>MINC</name>
<description>Memory increment mode</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>MINC</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Increment mode disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Increment mode enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PINC</name>
<description>Peripheral increment mode</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="MINC" />
</field>
<field>
<name>CIRC</name>
<description>Circular mode</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CIRC</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Circular buffer disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Circular buffer enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DIR</name>
<description>Data transfer direction</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>DIR</name><usage>read-write</usage><enumeratedValue><name>FromPeripheral</name><description>Read from peripheral</description><value>0</value></enumeratedValue><enumeratedValue><name>FromMemory</name><description>Read from memory</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TEIE</name>
<description>Transfer error interrupt
enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TEIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Transfer Error interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Transfer Error interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>HTIE</name>
<description>Half transfer interrupt
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>HTIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Half Transfer interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Half Transfer interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TCIE</name>
<description>Transfer complete interrupt
enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TCIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Transfer Complete interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Transfer Complete interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>EN</name>
<description>Channel enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>EN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Channel disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Channel enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CNDTR1</name>
<displayName>CNDTR1</displayName>
<description>channel x number of data
register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>NDT</name>
<description>Number of data to transfer</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>65535</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>CPAR1</name>
<displayName>CPAR1</displayName>
<description>channel x peripheral address
register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PA</name>
<description>Peripheral address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>4294967295</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>CMAR1</name>
<displayName>CMAR1</displayName>
<description>channel x memory address
register</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MA</name>
<description>Memory address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>4294967295</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>CCR2</name>
<displayName>CCR2</displayName>
<description>channel x configuration
register</description>
<addressOffset>0x1C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MEM2MEM</name>
<description>Memory to memory mode</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>MEM2MEM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Memory to memory mode disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Memory to memory mode enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PL</name>
<description>Channel priority level</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>PL</name><usage>read-write</usage><enumeratedValue><name>Low</name><description>Low priority</description><value>0</value></enumeratedValue><enumeratedValue><name>Medium</name><description>Medium priority</description><value>1</value></enumeratedValue><enumeratedValue><name>High</name><description>High priority</description><value>2</value></enumeratedValue><enumeratedValue><name>VeryHigh</name><description>Very high priority</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>MSIZE</name>
<description>Memory size</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>MSIZE</name><usage>read-write</usage><enumeratedValue><name>Bit8</name><description>8-bit size</description><value>0</value></enumeratedValue><enumeratedValue><name>Bit16</name><description>16-bit size</description><value>1</value></enumeratedValue><enumeratedValue><name>Bit32</name><description>32-bit size</description><value>2</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PSIZE</name>
<description>Peripheral size</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MSIZE" />
</field>
<field>
<name>MINC</name>
<description>Memory increment mode</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>MINC</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Increment mode disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Increment mode enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PINC</name>
<description>Peripheral increment mode</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="MINC" />
</field>
<field>
<name>CIRC</name>
<description>Circular mode</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CIRC</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Circular buffer disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Circular buffer enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DIR</name>
<description>Data transfer direction</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>DIR</name><usage>read-write</usage><enumeratedValue><name>FromPeripheral</name><description>Read from peripheral</description><value>0</value></enumeratedValue><enumeratedValue><name>FromMemory</name><description>Read from memory</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TEIE</name>
<description>Transfer error interrupt
enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TEIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Transfer Error interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Transfer Error interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>HTIE</name>
<description>Half transfer interrupt
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>HTIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Half Transfer interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Half Transfer interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TCIE</name>
<description>Transfer complete interrupt
enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TCIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Transfer Complete interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Transfer Complete interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>EN</name>
<description>Channel enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>EN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Channel disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Channel enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CNDTR2</name>
<displayName>CNDTR2</displayName>
<description>channel x number of data
register</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>NDT</name>
<description>Number of data to transfer</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>65535</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>CPAR2</name>
<displayName>CPAR2</displayName>
<description>channel x peripheral address
register</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PA</name>
<description>Peripheral address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>4294967295</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>CMAR2</name>
<displayName>CMAR2</displayName>
<description>channel x memory address
register</description>
<addressOffset>0x28</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MA</name>
<description>Memory address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>4294967295</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>CCR3</name>
<displayName>CCR3</displayName>
<description>channel x configuration
register</description>
<addressOffset>0x30</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MEM2MEM</name>
<description>Memory to memory mode</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>MEM2MEM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Memory to memory mode disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Memory to memory mode enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PL</name>
<description>Channel priority level</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>PL</name><usage>read-write</usage><enumeratedValue><name>Low</name><description>Low priority</description><value>0</value></enumeratedValue><enumeratedValue><name>Medium</name><description>Medium priority</description><value>1</value></enumeratedValue><enumeratedValue><name>High</name><description>High priority</description><value>2</value></enumeratedValue><enumeratedValue><name>VeryHigh</name><description>Very high priority</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>MSIZE</name>
<description>Memory size</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>MSIZE</name><usage>read-write</usage><enumeratedValue><name>Bit8</name><description>8-bit size</description><value>0</value></enumeratedValue><enumeratedValue><name>Bit16</name><description>16-bit size</description><value>1</value></enumeratedValue><enumeratedValue><name>Bit32</name><description>32-bit size</description><value>2</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PSIZE</name>
<description>Peripheral size</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MSIZE" />
</field>
<field>
<name>MINC</name>
<description>Memory increment mode</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>MINC</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Increment mode disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Increment mode enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PINC</name>
<description>Peripheral increment mode</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="MINC" />
</field>
<field>
<name>CIRC</name>
<description>Circular mode</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CIRC</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Circular buffer disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Circular buffer enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DIR</name>
<description>Data transfer direction</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>DIR</name><usage>read-write</usage><enumeratedValue><name>FromPeripheral</name><description>Read from peripheral</description><value>0</value></enumeratedValue><enumeratedValue><name>FromMemory</name><description>Read from memory</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TEIE</name>
<description>Transfer error interrupt
enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TEIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Transfer Error interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Transfer Error interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>HTIE</name>
<description>Half transfer interrupt
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>HTIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Half Transfer interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Half Transfer interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TCIE</name>
<description>Transfer complete interrupt
enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TCIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Transfer Complete interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Transfer Complete interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>EN</name>
<description>Channel enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>EN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Channel disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Channel enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CNDTR3</name>
<displayName>CNDTR3</displayName>
<description>channel x number of data
register</description>
<addressOffset>0x34</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>NDT</name>
<description>Number of data to transfer</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>65535</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>CPAR3</name>
<displayName>CPAR3</displayName>
<description>channel x peripheral address
register</description>
<addressOffset>0x38</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PA</name>
<description>Peripheral address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>4294967295</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>CMAR3</name>
<displayName>CMAR3</displayName>
<description>channel x memory address
register</description>
<addressOffset>0x3C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MA</name>
<description>Memory address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>4294967295</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>CCR4</name>
<displayName>CCR4</displayName>
<description>channel x configuration
register</description>
<addressOffset>0x44</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MEM2MEM</name>
<description>Memory to memory mode</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>MEM2MEM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Memory to memory mode disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Memory to memory mode enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PL</name>
<description>Channel priority level</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>PL</name><usage>read-write</usage><enumeratedValue><name>Low</name><description>Low priority</description><value>0</value></enumeratedValue><enumeratedValue><name>Medium</name><description>Medium priority</description><value>1</value></enumeratedValue><enumeratedValue><name>High</name><description>High priority</description><value>2</value></enumeratedValue><enumeratedValue><name>VeryHigh</name><description>Very high priority</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>MSIZE</name>
<description>Memory size</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>MSIZE</name><usage>read-write</usage><enumeratedValue><name>Bit8</name><description>8-bit size</description><value>0</value></enumeratedValue><enumeratedValue><name>Bit16</name><description>16-bit size</description><value>1</value></enumeratedValue><enumeratedValue><name>Bit32</name><description>32-bit size</description><value>2</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PSIZE</name>
<description>Peripheral size</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MSIZE" />
</field>
<field>
<name>MINC</name>
<description>Memory increment mode</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>MINC</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Increment mode disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Increment mode enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PINC</name>
<description>Peripheral increment mode</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="MINC" />
</field>
<field>
<name>CIRC</name>
<description>Circular mode</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CIRC</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Circular buffer disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Circular buffer enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DIR</name>
<description>Data transfer direction</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>DIR</name><usage>read-write</usage><enumeratedValue><name>FromPeripheral</name><description>Read from peripheral</description><value>0</value></enumeratedValue><enumeratedValue><name>FromMemory</name><description>Read from memory</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TEIE</name>
<description>Transfer error interrupt
enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TEIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Transfer Error interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Transfer Error interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>HTIE</name>
<description>Half transfer interrupt
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>HTIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Half Transfer interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Half Transfer interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TCIE</name>
<description>Transfer complete interrupt
enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TCIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Transfer Complete interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Transfer Complete interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>EN</name>
<description>Channel enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>EN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Channel disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Channel enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CNDTR4</name>
<displayName>CNDTR4</displayName>
<description>channel x number of data
register</description>
<addressOffset>0x48</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>NDT</name>
<description>Number of data to transfer</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>65535</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>CPAR4</name>
<displayName>CPAR4</displayName>
<description>channel x peripheral address
register</description>
<addressOffset>0x4C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PA</name>
<description>Peripheral address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>4294967295</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>CMAR4</name>
<displayName>CMAR4</displayName>
<description>channel x memory address
register</description>
<addressOffset>0x50</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MA</name>
<description>Memory address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>4294967295</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>CCR5</name>
<displayName>CCR5</displayName>
<description>channel x configuration
register</description>
<addressOffset>0x58</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MEM2MEM</name>
<description>Memory to memory mode</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>MEM2MEM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Memory to memory mode disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Memory to memory mode enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PL</name>
<description>Channel priority level</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>PL</name><usage>read-write</usage><enumeratedValue><name>Low</name><description>Low priority</description><value>0</value></enumeratedValue><enumeratedValue><name>Medium</name><description>Medium priority</description><value>1</value></enumeratedValue><enumeratedValue><name>High</name><description>High priority</description><value>2</value></enumeratedValue><enumeratedValue><name>VeryHigh</name><description>Very high priority</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>MSIZE</name>
<description>Memory size</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>MSIZE</name><usage>read-write</usage><enumeratedValue><name>Bit8</name><description>8-bit size</description><value>0</value></enumeratedValue><enumeratedValue><name>Bit16</name><description>16-bit size</description><value>1</value></enumeratedValue><enumeratedValue><name>Bit32</name><description>32-bit size</description><value>2</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PSIZE</name>
<description>Peripheral size</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MSIZE" />
</field>
<field>
<name>MINC</name>
<description>Memory increment mode</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>MINC</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Increment mode disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Increment mode enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PINC</name>
<description>Peripheral increment mode</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="MINC" />
</field>
<field>
<name>CIRC</name>
<description>Circular mode</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CIRC</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Circular buffer disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Circular buffer enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DIR</name>
<description>Data transfer direction</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>DIR</name><usage>read-write</usage><enumeratedValue><name>FromPeripheral</name><description>Read from peripheral</description><value>0</value></enumeratedValue><enumeratedValue><name>FromMemory</name><description>Read from memory</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TEIE</name>
<description>Transfer error interrupt
enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TEIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Transfer Error interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Transfer Error interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>HTIE</name>
<description>Half transfer interrupt
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>HTIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Half Transfer interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Half Transfer interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TCIE</name>
<description>Transfer complete interrupt
enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TCIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Transfer Complete interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Transfer Complete interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>EN</name>
<description>Channel enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>EN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Channel disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Channel enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CNDTR5</name>
<displayName>CNDTR5</displayName>
<description>channel x number of data
register</description>
<addressOffset>0x5C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>NDT</name>
<description>Number of data to transfer</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>65535</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>CPAR5</name>
<displayName>CPAR5</displayName>
<description>channel x peripheral address
register</description>
<addressOffset>0x60</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PA</name>
<description>Peripheral address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>4294967295</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>CMAR5</name>
<displayName>CMAR5</displayName>
<description>channel x memory address
register</description>
<addressOffset>0x64</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MA</name>
<description>Memory address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>4294967295</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>CCR6</name>
<displayName>CCR6</displayName>
<description>channel x configuration
register</description>
<addressOffset>0x6C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MEM2MEM</name>
<description>Memory to memory mode</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>MEM2MEM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Memory to memory mode disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Memory to memory mode enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PL</name>
<description>Channel priority level</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>PL</name><usage>read-write</usage><enumeratedValue><name>Low</name><description>Low priority</description><value>0</value></enumeratedValue><enumeratedValue><name>Medium</name><description>Medium priority</description><value>1</value></enumeratedValue><enumeratedValue><name>High</name><description>High priority</description><value>2</value></enumeratedValue><enumeratedValue><name>VeryHigh</name><description>Very high priority</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>MSIZE</name>
<description>Memory size</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>MSIZE</name><usage>read-write</usage><enumeratedValue><name>Bit8</name><description>8-bit size</description><value>0</value></enumeratedValue><enumeratedValue><name>Bit16</name><description>16-bit size</description><value>1</value></enumeratedValue><enumeratedValue><name>Bit32</name><description>32-bit size</description><value>2</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PSIZE</name>
<description>Peripheral size</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MSIZE" />
</field>
<field>
<name>MINC</name>
<description>Memory increment mode</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>MINC</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Increment mode disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Increment mode enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PINC</name>
<description>Peripheral increment mode</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="MINC" />
</field>
<field>
<name>CIRC</name>
<description>Circular mode</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CIRC</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Circular buffer disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Circular buffer enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DIR</name>
<description>Data transfer direction</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>DIR</name><usage>read-write</usage><enumeratedValue><name>FromPeripheral</name><description>Read from peripheral</description><value>0</value></enumeratedValue><enumeratedValue><name>FromMemory</name><description>Read from memory</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TEIE</name>
<description>Transfer error interrupt
enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TEIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Transfer Error interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Transfer Error interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>HTIE</name>
<description>Half transfer interrupt
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>HTIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Half Transfer interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Half Transfer interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TCIE</name>
<description>Transfer complete interrupt
enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TCIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Transfer Complete interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Transfer Complete interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>EN</name>
<description>Channel enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>EN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Channel disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Channel enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CNDTR6</name>
<displayName>CNDTR6</displayName>
<description>channel x number of data
register</description>
<addressOffset>0x70</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>NDT</name>
<description>Number of data to transfer</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>65535</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>CPAR6</name>
<displayName>CPAR6</displayName>
<description>channel x peripheral address
register</description>
<addressOffset>0x74</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PA</name>
<description>Peripheral address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>4294967295</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>CMAR6</name>
<displayName>CMAR6</displayName>
<description>channel x memory address
register</description>
<addressOffset>0x78</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MA</name>
<description>Memory address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>4294967295</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>CCR7</name>
<displayName>CCR7</displayName>
<description>channel x configuration
register</description>
<addressOffset>0x80</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MEM2MEM</name>
<description>Memory to memory mode</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>MEM2MEM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Memory to memory mode disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Memory to memory mode enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PL</name>
<description>Channel priority level</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>PL</name><usage>read-write</usage><enumeratedValue><name>Low</name><description>Low priority</description><value>0</value></enumeratedValue><enumeratedValue><name>Medium</name><description>Medium priority</description><value>1</value></enumeratedValue><enumeratedValue><name>High</name><description>High priority</description><value>2</value></enumeratedValue><enumeratedValue><name>VeryHigh</name><description>Very high priority</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>MSIZE</name>
<description>Memory size</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>MSIZE</name><usage>read-write</usage><enumeratedValue><name>Bit8</name><description>8-bit size</description><value>0</value></enumeratedValue><enumeratedValue><name>Bit16</name><description>16-bit size</description><value>1</value></enumeratedValue><enumeratedValue><name>Bit32</name><description>32-bit size</description><value>2</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PSIZE</name>
<description>Peripheral size</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MSIZE" />
</field>
<field>
<name>MINC</name>
<description>Memory increment mode</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>MINC</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Increment mode disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Increment mode enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PINC</name>
<description>Peripheral increment mode</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="MINC" />
</field>
<field>
<name>CIRC</name>
<description>Circular mode</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CIRC</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Circular buffer disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Circular buffer enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DIR</name>
<description>Data transfer direction</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>DIR</name><usage>read-write</usage><enumeratedValue><name>FromPeripheral</name><description>Read from peripheral</description><value>0</value></enumeratedValue><enumeratedValue><name>FromMemory</name><description>Read from memory</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TEIE</name>
<description>Transfer error interrupt
enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TEIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Transfer Error interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Transfer Error interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>HTIE</name>
<description>Half transfer interrupt
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>HTIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Half Transfer interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Half Transfer interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TCIE</name>
<description>Transfer complete interrupt
enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TCIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Transfer Complete interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Transfer Complete interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>EN</name>
<description>Channel enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>EN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Channel disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Channel enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CNDTR7</name>
<displayName>CNDTR7</displayName>
<description>channel x number of data
register</description>
<addressOffset>0x84</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>NDT</name>
<description>Number of data to transfer</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>65535</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>CPAR7</name>
<displayName>CPAR7</displayName>
<description>channel x peripheral address
register</description>
<addressOffset>0x88</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PA</name>
<description>Peripheral address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>4294967295</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>CMAR7</name>
<displayName>CMAR7</displayName>
<description>channel x memory address
register</description>
<addressOffset>0x8C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MA</name>
<description>Memory address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>4294967295</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>CSELR</name>
<displayName>CSELR</displayName>
<description>channel selection register</description>
<addressOffset>0xA8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>C7S</name>
<description>DMA channel 7 selection</description>
<bitOffset>24</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues><name>C7S</name><usage>read-write</usage><enumeratedValue><name>NoMapping</name><description>Default mapping</description><value>0</value></enumeratedValue><enumeratedValue><name>Map1</name><description>Mapping 1</description><value>1</value></enumeratedValue><enumeratedValue><name>Map2</name><description>Mapping 2</description><value>2</value></enumeratedValue><enumeratedValue><name>Map3</name><description>Mapping 3</description><value>3</value></enumeratedValue><enumeratedValue><name>Map4</name><description>Mapping 4</description><value>4</value></enumeratedValue><enumeratedValue><name>Map5</name><description>Mapping 5</description><value>5</value></enumeratedValue><enumeratedValue><name>Map6</name><description>Mapping 6</description><value>6</value></enumeratedValue><enumeratedValue><name>Map7</name><description>Mapping 7</description><value>7</value></enumeratedValue><enumeratedValue><name>Map8</name><description>Mapping 8</description><value>8</value></enumeratedValue><enumeratedValue><name>Map9</name><description>Mapping 9</description><value>9</value></enumeratedValue><enumeratedValue><name>Map10</name><description>Mapping 10</description><value>10</value></enumeratedValue><enumeratedValue><name>Map11</name><description>Mapping 11</description><value>11</value></enumeratedValue><enumeratedValue><name>Map12</name><description>Mapping 12</description><value>12</value></enumeratedValue><enumeratedValue><name>Map13</name><description>Mapping 13</description><value>13</value></enumeratedValue><enumeratedValue><name>Map14</name><description>Mapping 14</description><value>14</value></enumeratedValue><enumeratedValue><name>Map15</name><description>Mapping 15</description><value>15</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>C6S</name>
<description>DMA channel 6 selection</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="C7S" />
</field>
<field>
<name>C5S</name>
<description>DMA channel 5 selection</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="C7S" />
</field>
<field>
<name>C4S</name>
<description>DMA channel 4 selection</description>
<bitOffset>12</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="C7S" />
</field>
<field>
<name>C3S</name>
<description>DMA channel 3 selection</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="C7S" />
</field>
<field>
<name>C2S</name>
<description>DMA channel 2 selection</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="C7S" />
</field>
<field>
<name>C1S</name>
<description>DMA channel 1 selection</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="C7S" />
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral derivedFrom="DMA1">
<name>DMA2</name>
<baseAddress>0x40020400</baseAddress>
<interrupt>
<name>DMA2_CH1</name>
<description>DMA2 Channel 1 global Interrupt</description>
<value>56</value>
</interrupt>
<interrupt>
<name>DMA2_CH2</name>
<description>DMA2 Channel 2 global Interrupt</description>
<value>57</value>
</interrupt>
<interrupt>
<name>DMA2_CH3</name>
<description>DMA2 Channel 3 global Interrupt</description>
<value>58</value>
</interrupt>
<interrupt>
<name>DMA2_CH4</name>
<description>DMA2 Channel 4 global Interrupt</description>
<value>59</value>
</interrupt>
<interrupt>
<name>DMA2_CH5</name>
<description>DMA2 Channel 5 global Interrupt</description>
<value>60</value>
</interrupt>
<interrupt>
<name>DMA2_CH6</name>
<description>DMA2 Channel 6 global Interrupt</description>
<value>68</value>
</interrupt>
<interrupt>
<name>DMA2_CH7</name>
<description>DMA2 Channel 7 global Interrupt</description>
<value>69</value>
</interrupt>
</peripheral>
<peripheral>
<name>CRC</name>
<description>Cyclic redundancy check calculation
unit</description>
<groupName>CRC</groupName>
<baseAddress>0x40023000</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>DR</name>
<displayName>DR</displayName>
<description>Data register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0xFFFFFFFF</resetValue>
<fields>
<field>
<name>DR</name>
<description>Data register bits</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>4294967295</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<displayName>IDR</displayName>
<description>Independent data register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IDR</name>
<description>General-purpose 8-bit data register
bits</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>255</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>CR</name>
<displayName>CR</displayName>
<description>Control register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>REV_OUT</name>
<description>Reverse output data</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>REV_IN</name>
<description>Reverse input data</description>
<bitOffset>5</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>POLYSIZE</name>
<description>Polynomial size</description>
<bitOffset>3</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RESET</name>
<description>RESET bit</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
<enumeratedValues><name>RESETW</name><usage>write</usage><enumeratedValue><name>Reset</name><description>Resets the CRC calculation unit and sets the data register to 0xFFFF FFFF</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>INIT</name>
<displayName>INIT</displayName>
<description>Initial CRC value</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0xFFFFFFFF</resetValue>
<fields>
<field>
<name>CRC_INIT</name>
<description>Programmable initial CRC
value</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>POL</name>
<displayName>POL</displayName>
<description>polynomial</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x04C11DB7</resetValue>
<fields>
<field>
<name>Polynomialcoefficients</name>
<description>Programmable polynomial</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>LCD</name>
<description>Liquid crystal display controller</description>
<groupName>LCD</groupName>
<baseAddress>0x40002400</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>LCD</name>
<description>LCD global interrupt</description>
<value>78</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<displayName>CR</displayName>
<description>control register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BIAS</name>
<description>Bias selector</description>
<bitOffset>5</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>DUTY</name>
<description>Duty selection</description>
<bitOffset>2</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>VSEL</name>
<description>Voltage source selection</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LCDEN</name>
<description>LCD controller enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MUX_SEG</name>
<description>Mux segment enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BUFEN</name>
<description>Voltage output buffer
enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>FCR</name>
<displayName>FCR</displayName>
<description>frame control register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PS</name>
<description>PS 16-bit prescaler</description>
<bitOffset>22</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>DIV</name>
<description>DIV clock divider</description>
<bitOffset>18</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>BLINK</name>
<description>Blink mode selection</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>BLINKF</name>
<description>Blink frequency selection</description>
<bitOffset>13</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>CC</name>
<description>Contrast control</description>
<bitOffset>10</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>DEAD</name>
<description>Dead time duration</description>
<bitOffset>7</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>PON</name>
<description>Pulse ON duration</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>UDDIE</name>
<description>Update display done interrupt
enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SOFIE</name>
<description>Start of frame interrupt
enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>HD</name>
<description>High drive enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>SR</name>
<displayName>SR</displayName>
<description>status register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<resetValue>0x00000020</resetValue>
<fields>
<field>
<name>FCRSF</name>
<description>LCD Frame Control Register
Synchronization flag</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RDY</name>
<description>Ready flag</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UDD</name>
<description>Update Display Done</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UDR</name>
<description>Update display request</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SOF</name>
<description>Start of frame flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ENS</name>
<description>ENS</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CLR</name>
<displayName>CLR</displayName>
<description>clear register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>UDDC</name>
<description>Update display done clear</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SOFC</name>
<description>Start of frame flag clear</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>RAM_COM0</name>
<displayName>RAM_COM0</displayName>
<description>display memory</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>S30</name>
<description>S30</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S29</name>
<description>S29</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S28</name>
<description>S28</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S27</name>
<description>S27</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S26</name>
<description>S26</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S25</name>
<description>S25</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S24</name>
<description>S24</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S23</name>
<description>S23</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S22</name>
<description>S22</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S21</name>
<description>S21</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S20</name>
<description>S20</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S19</name>
<description>S19</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S18</name>
<description>S18</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S17</name>
<description>S17</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S16</name>
<description>S16</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S15</name>
<description>S15</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S14</name>
<description>S14</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S13</name>
<description>S13</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S12</name>
<description>S12</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S11</name>
<description>S11</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S10</name>
<description>S10</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S09</name>
<description>S09</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S08</name>
<description>S08</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S07</name>
<description>S07</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S06</name>
<description>S06</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S05</name>
<description>S05</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S04</name>
<description>S04</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S03</name>
<description>S03</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S02</name>
<description>S02</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S01</name>
<description>S01</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S00</name>
<description>S00</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>RAM_COM1</name>
<displayName>RAM_COM1</displayName>
<description>display memory</description>
<addressOffset>0x1C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>S31</name>
<description>S31</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S30</name>
<description>S30</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S29</name>
<description>S29</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S28</name>
<description>S28</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S27</name>
<description>S27</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S26</name>
<description>S26</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S25</name>
<description>S25</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S24</name>
<description>S24</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S23</name>
<description>S23</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S22</name>
<description>S22</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S21</name>
<description>S21</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S20</name>
<description>S20</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S19</name>
<description>S19</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S18</name>
<description>S18</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S17</name>
<description>S17</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S16</name>
<description>S16</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S15</name>
<description>S15</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S14</name>
<description>S14</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S13</name>
<description>S13</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S12</name>
<description>S12</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S11</name>
<description>S11</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S10</name>
<description>S10</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S09</name>
<description>S09</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S08</name>
<description>S08</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S07</name>
<description>S07</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S06</name>
<description>S06</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S05</name>
<description>S05</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S04</name>
<description>S04</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S03</name>
<description>S03</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S02</name>
<description>S02</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S01</name>
<description>S01</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S00</name>
<description>S00</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>RAM_COM2</name>
<displayName>RAM_COM2</displayName>
<description>display memory</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>S31</name>
<description>S31</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S30</name>
<description>S30</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S29</name>
<description>S29</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S28</name>
<description>S28</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S27</name>
<description>S27</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S26</name>
<description>S26</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S25</name>
<description>S25</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S24</name>
<description>S24</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S23</name>
<description>S23</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S22</name>
<description>S22</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S21</name>
<description>S21</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S20</name>
<description>S20</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S19</name>
<description>S19</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S18</name>
<description>S18</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S17</name>
<description>S17</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S16</name>
<description>S16</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S15</name>
<description>S15</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S14</name>
<description>S14</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S13</name>
<description>S13</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S12</name>
<description>S12</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S11</name>
<description>S11</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S10</name>
<description>S10</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S09</name>
<description>S09</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S08</name>
<description>S08</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S07</name>
<description>S07</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S06</name>
<description>S06</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S05</name>
<description>S05</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S04</name>
<description>S04</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S03</name>
<description>S03</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S02</name>
<description>S02</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S01</name>
<description>S01</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S00</name>
<description>S00</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>RAM_COM3</name>
<displayName>RAM_COM3</displayName>
<description>display memory</description>
<addressOffset>0x2C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>S31</name>
<description>S31</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S30</name>
<description>S30</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S29</name>
<description>S29</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S28</name>
<description>S28</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S27</name>
<description>S27</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S26</name>
<description>S26</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S25</name>
<description>S25</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S24</name>
<description>S24</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S23</name>
<description>S23</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S22</name>
<description>S22</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S21</name>
<description>S21</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S20</name>
<description>S20</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S19</name>
<description>S19</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S18</name>
<description>S18</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S17</name>
<description>S17</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S16</name>
<description>S16</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S15</name>
<description>S15</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S14</name>
<description>S14</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S13</name>
<description>S13</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S12</name>
<description>S12</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S11</name>
<description>S11</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S10</name>
<description>S10</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S09</name>
<description>S09</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S08</name>
<description>S08</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S07</name>
<description>S07</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S06</name>
<description>S06</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S05</name>
<description>S05</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S04</name>
<description>S04</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S03</name>
<description>S03</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S02</name>
<description>S02</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S01</name>
<description>S01</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S00</name>
<description>S00</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>RAM_COM4</name>
<displayName>RAM_COM4</displayName>
<description>display memory</description>
<addressOffset>0x34</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>S31</name>
<description>S31</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S30</name>
<description>S30</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S29</name>
<description>S29</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S28</name>
<description>S28</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S27</name>
<description>S27</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S26</name>
<description>S26</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S25</name>
<description>S25</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S24</name>
<description>S24</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S23</name>
<description>S23</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S22</name>
<description>S22</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S21</name>
<description>S21</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S20</name>
<description>S20</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S19</name>
<description>S19</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S18</name>
<description>S18</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S17</name>
<description>S17</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S16</name>
<description>S16</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S15</name>
<description>S15</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S14</name>
<description>S14</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S13</name>
<description>S13</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S12</name>
<description>S12</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S11</name>
<description>S11</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S10</name>
<description>S10</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S09</name>
<description>S09</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S08</name>
<description>S08</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S07</name>
<description>S07</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S06</name>
<description>S06</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S05</name>
<description>S05</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S04</name>
<description>S04</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S03</name>
<description>S03</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S02</name>
<description>S02</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S01</name>
<description>S01</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S00</name>
<description>S00</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>RAM_COM5</name>
<displayName>RAM_COM5</displayName>
<description>display memory</description>
<addressOffset>0x3C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>S31</name>
<description>S31</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S30</name>
<description>S30</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S29</name>
<description>S29</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S28</name>
<description>S28</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S27</name>
<description>S27</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S26</name>
<description>S26</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S25</name>
<description>S25</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S24</name>
<description>S24</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S23</name>
<description>S23</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S22</name>
<description>S22</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S21</name>
<description>S21</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S20</name>
<description>S20</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S19</name>
<description>S19</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S18</name>
<description>S18</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S17</name>
<description>S17</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S16</name>
<description>S16</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S15</name>
<description>S15</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S14</name>
<description>S14</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S13</name>
<description>S13</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S12</name>
<description>S12</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S11</name>
<description>S11</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S10</name>
<description>S10</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S09</name>
<description>S09</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S08</name>
<description>S08</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S07</name>
<description>S07</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S06</name>
<description>S06</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S05</name>
<description>S05</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S04</name>
<description>S04</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S03</name>
<description>S03</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S02</name>
<description>S02</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S01</name>
<description>S01</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S00</name>
<description>S00</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>RAM_COM6</name>
<displayName>RAM_COM6</displayName>
<description>display memory</description>
<addressOffset>0x44</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>S31</name>
<description>S31</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S30</name>
<description>S30</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S29</name>
<description>S29</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S28</name>
<description>S28</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S27</name>
<description>S27</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S26</name>
<description>S26</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S25</name>
<description>S25</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S24</name>
<description>S24</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S23</name>
<description>S23</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S22</name>
<description>S22</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S21</name>
<description>S21</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S20</name>
<description>S20</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S19</name>
<description>S19</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S18</name>
<description>S18</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S17</name>
<description>S17</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S16</name>
<description>S16</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S15</name>
<description>S15</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S14</name>
<description>S14</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S13</name>
<description>S13</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S12</name>
<description>S12</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S11</name>
<description>S11</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S10</name>
<description>S10</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S09</name>
<description>S09</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S08</name>
<description>S08</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S07</name>
<description>S07</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S06</name>
<description>S06</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S05</name>
<description>S05</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S04</name>
<description>S04</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S03</name>
<description>S03</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S02</name>
<description>S02</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S01</name>
<description>S01</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S00</name>
<description>S00</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>RAM_COM7</name>
<displayName>RAM_COM7</displayName>
<description>display memory</description>
<addressOffset>0x4C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>S31</name>
<description>S31</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S30</name>
<description>S30</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S29</name>
<description>S29</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S28</name>
<description>S28</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S27</name>
<description>S27</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S26</name>
<description>S26</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S25</name>
<description>S25</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S24</name>
<description>S24</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S23</name>
<description>S23</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S22</name>
<description>S22</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S21</name>
<description>S21</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S20</name>
<description>S20</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S19</name>
<description>S19</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S18</name>
<description>S18</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S17</name>
<description>S17</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S16</name>
<description>S16</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S15</name>
<description>S15</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S14</name>
<description>S14</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S13</name>
<description>S13</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S12</name>
<description>S12</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S11</name>
<description>S11</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S10</name>
<description>S10</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S09</name>
<description>S09</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S08</name>
<description>S08</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S07</name>
<description>S07</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S06</name>
<description>S06</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S05</name>
<description>S05</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S04</name>
<description>S04</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S03</name>
<description>S03</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S02</name>
<description>S02</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S01</name>
<description>S01</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S00</name>
<description>S00</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>TSC</name>
<description>Touch sensing controller</description>
<groupName>TSC</groupName>
<baseAddress>0x40024000</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>TSC</name>
<description>TSC global interrupt</description>
<value>77</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<displayName>CR</displayName>
<description>control register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CTPH</name>
<description>Charge transfer pulse high</description>
<bitOffset>28</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>CTPL</name>
<description>Charge transfer pulse low</description>
<bitOffset>24</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>SSD</name>
<description>Spread spectrum deviation</description>
<bitOffset>17</bitOffset>
<bitWidth>7</bitWidth>
</field>
<field>
<name>SSE</name>
<description>Spread spectrum enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SSPSC</name>
<description>Spread spectrum prescaler</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PGPSC</name>
<description>pulse generator prescaler</description>
<bitOffset>12</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>MCV</name>
<description>Max count value</description>
<bitOffset>5</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>IODEF</name>
<description>I/O Default mode</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SYNCPOL</name>
<description>Synchronization pin
polarity</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AM</name>
<description>Acquisition mode</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>START</name>
<description>Start a new acquisition</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TSCE</name>
<description>Touch sensing controller
enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>IER</name>
<displayName>IER</displayName>
<description>interrupt enable register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MCEIE</name>
<description>Max count error interrupt
enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EOAIE</name>
<description>End of acquisition interrupt
enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>ICR</name>
<displayName>ICR</displayName>
<description>interrupt clear register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MCEIC</name>
<description>Max count error interrupt
clear</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EOAIC</name>
<description>End of acquisition interrupt
clear</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>ISR</name>
<displayName>ISR</displayName>
<description>interrupt status register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MCEF</name>
<description>Max count error flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EOAF</name>
<description>End of acquisition flag</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>IOHCR</name>
<displayName>IOHCR</displayName>
<description>I/O hysteresis control
register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0xFFFFFFFF</resetValue>
<fields>
<field>
<name>G8_IO4</name>
<description>G8_IO4</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G8_IO3</name>
<description>G8_IO3</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G8_IO2</name>
<description>G8_IO2</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G8_IO1</name>
<description>G8_IO1</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G7_IO4</name>
<description>G7_IO4</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G7_IO3</name>
<description>G7_IO3</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G7_IO2</name>
<description>G7_IO2</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G7_IO1</name>
<description>G7_IO1</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G6_IO4</name>
<description>G6_IO4</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G6_IO3</name>
<description>G6_IO3</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G6_IO2</name>
<description>G6_IO2</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G6_IO1</name>
<description>G6_IO1</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G5_IO4</name>
<description>G5_IO4</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G5_IO3</name>
<description>G5_IO3</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G5_IO2</name>
<description>G5_IO2</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G5_IO1</name>
<description>G5_IO1</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G4_IO4</name>
<description>G4_IO4</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G4_IO3</name>
<description>G4_IO3</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G4_IO2</name>
<description>G4_IO2</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G4_IO1</name>
<description>G4_IO1</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G3_IO4</name>
<description>G3_IO4</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G3_IO3</name>
<description>G3_IO3</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G3_IO2</name>
<description>G3_IO2</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G3_IO1</name>
<description>G3_IO1</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G2_IO4</name>
<description>G2_IO4</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G2_IO3</name>
<description>G2_IO3</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G2_IO2</name>
<description>G2_IO2</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G2_IO1</name>
<description>G2_IO1</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G1_IO4</name>
<description>G1_IO4</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G1_IO3</name>
<description>G1_IO3</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G1_IO2</name>
<description>G1_IO2</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G1_IO1</name>
<description>G1_IO1</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>IOASCR</name>
<displayName>IOASCR</displayName>
<description>I/O analog switch control
register</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>G8_IO4</name>
<description>G8_IO4</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G8_IO3</name>
<description>G8_IO3</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G8_IO2</name>
<description>G8_IO2</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G8_IO1</name>
<description>G8_IO1</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G7_IO4</name>
<description>G7_IO4</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G7_IO3</name>
<description>G7_IO3</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G7_IO2</name>
<description>G7_IO2</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G7_IO1</name>
<description>G7_IO1</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G6_IO4</name>
<description>G6_IO4</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G6_IO3</name>
<description>G6_IO3</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G6_IO2</name>
<description>G6_IO2</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G6_IO1</name>
<description>G6_IO1</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G5_IO4</name>
<description>G5_IO4</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G5_IO3</name>
<description>G5_IO3</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G5_IO2</name>
<description>G5_IO2</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G5_IO1</name>
<description>G5_IO1</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G4_IO4</name>
<description>G4_IO4</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G4_IO3</name>
<description>G4_IO3</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G4_IO2</name>
<description>G4_IO2</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G4_IO1</name>
<description>G4_IO1</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G3_IO4</name>
<description>G3_IO4</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G3_IO3</name>
<description>G3_IO3</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G3_IO2</name>
<description>G3_IO2</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G3_IO1</name>
<description>G3_IO1</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G2_IO4</name>
<description>G2_IO4</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G2_IO3</name>
<description>G2_IO3</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G2_IO2</name>
<description>G2_IO2</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G2_IO1</name>
<description>G2_IO1</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G1_IO4</name>
<description>G1_IO4</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G1_IO3</name>
<description>G1_IO3</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G1_IO2</name>
<description>G1_IO2</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G1_IO1</name>
<description>G1_IO1</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>IOSCR</name>
<displayName>IOSCR</displayName>
<description>I/O sampling control register</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>G8_IO4</name>
<description>G8_IO4</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G8_IO3</name>
<description>G8_IO3</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G8_IO2</name>
<description>G8_IO2</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G8_IO1</name>
<description>G8_IO1</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G7_IO4</name>
<description>G7_IO4</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G7_IO3</name>
<description>G7_IO3</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G7_IO2</name>
<description>G7_IO2</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G7_IO1</name>
<description>G7_IO1</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G6_IO4</name>
<description>G6_IO4</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G6_IO3</name>
<description>G6_IO3</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G6_IO2</name>
<description>G6_IO2</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G6_IO1</name>
<description>G6_IO1</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G5_IO4</name>
<description>G5_IO4</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G5_IO3</name>
<description>G5_IO3</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G5_IO2</name>
<description>G5_IO2</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G5_IO1</name>
<description>G5_IO1</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G4_IO4</name>
<description>G4_IO4</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G4_IO3</name>
<description>G4_IO3</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G4_IO2</name>
<description>G4_IO2</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G4_IO1</name>
<description>G4_IO1</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G3_IO4</name>
<description>G3_IO4</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G3_IO3</name>
<description>G3_IO3</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G3_IO2</name>
<description>G3_IO2</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G3_IO1</name>
<description>G3_IO1</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G2_IO4</name>
<description>G2_IO4</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G2_IO3</name>
<description>G2_IO3</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G2_IO2</name>
<description>G2_IO2</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G2_IO1</name>
<description>G2_IO1</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G1_IO4</name>
<description>G1_IO4</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G1_IO3</name>
<description>G1_IO3</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G1_IO2</name>
<description>G1_IO2</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G1_IO1</name>
<description>G1_IO1</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>IOCCR</name>
<displayName>IOCCR</displayName>
<description>I/O channel control register</description>
<addressOffset>0x28</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>G8_IO4</name>
<description>G8_IO4</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G8_IO3</name>
<description>G8_IO3</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G8_IO2</name>
<description>G8_IO2</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G8_IO1</name>
<description>G8_IO1</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G7_IO4</name>
<description>G7_IO4</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G7_IO3</name>
<description>G7_IO3</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G7_IO2</name>
<description>G7_IO2</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G7_IO1</name>
<description>G7_IO1</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G6_IO4</name>
<description>G6_IO4</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G6_IO3</name>
<description>G6_IO3</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G6_IO2</name>
<description>G6_IO2</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G6_IO1</name>
<description>G6_IO1</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G5_IO4</name>
<description>G5_IO4</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G5_IO3</name>
<description>G5_IO3</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G5_IO2</name>
<description>G5_IO2</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G5_IO1</name>
<description>G5_IO1</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G4_IO4</name>
<description>G4_IO4</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G4_IO3</name>
<description>G4_IO3</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G4_IO2</name>
<description>G4_IO2</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G4_IO1</name>
<description>G4_IO1</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G3_IO4</name>
<description>G3_IO4</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G3_IO3</name>
<description>G3_IO3</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G3_IO2</name>
<description>G3_IO2</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G3_IO1</name>
<description>G3_IO1</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G2_IO4</name>
<description>G2_IO4</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G2_IO3</name>
<description>G2_IO3</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G2_IO2</name>
<description>G2_IO2</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G2_IO1</name>
<description>G2_IO1</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G1_IO4</name>
<description>G1_IO4</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G1_IO3</name>
<description>G1_IO3</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G1_IO2</name>
<description>G1_IO2</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>G1_IO1</name>
<description>G1_IO1</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>IOGCSR</name>
<displayName>IOGCSR</displayName>
<description>I/O group control status
register</description>
<addressOffset>0x30</addressOffset>
<size>0x20</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>G8S</name>
<description>Analog I/O group x status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>G7S</name>
<description>Analog I/O group x status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>G6S</name>
<description>Analog I/O group x status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>G5S</name>
<description>Analog I/O group x status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>G4S</name>
<description>Analog I/O group x status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>G3S</name>
<description>Analog I/O group x status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>G2S</name>
<description>Analog I/O group x status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>G1S</name>
<description>Analog I/O group x status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>G8E</name>
<description>Analog I/O group x enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>G7E</name>
<description>Analog I/O group x enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>G6E</name>
<description>Analog I/O group x enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>G5E</name>
<description>Analog I/O group x enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>G4E</name>
<description>Analog I/O group x enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>G3E</name>
<description>Analog I/O group x enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>G2E</name>
<description>Analog I/O group x enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>G1E</name>
<description>Analog I/O group x enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>IOG%sCR</name>
<displayName>IOG1CR</displayName>
<description>I/O group x counter register</description>
<addressOffset>0x34</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CNT</name>
<description>Counter value</description>
<bitOffset>0</bitOffset>
<bitWidth>14</bitWidth>
</field>
</fields>
<dim>8</dim><dimIndex>1,2,3,4,5,6,7,8</dimIndex><dimIncrement>0x4</dimIncrement></register>
</registers>
</peripheral>
<peripheral>
<name>IWDG</name>
<description>Independent watchdog</description>
<groupName>IWDG</groupName>
<baseAddress>0x40003000</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>KR</name>
<displayName>KR</displayName>
<description>Key register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>KEY</name>
<description>Key value (write only, read
0x0000)</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<enumeratedValues><name>KEY</name><usage>read-write</usage><enumeratedValue><name>Enable</name><description>Enable access to PR, RLR and WINR registers (0x5555)</description><value>21845</value></enumeratedValue><enumeratedValue><name>Reset</name><description>Reset the watchdog value (0xAAAA)</description><value>43690</value></enumeratedValue><enumeratedValue><name>Start</name><description>Start the watchdog (0xCCCC)</description><value>52428</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>PR</name>
<displayName>PR</displayName>
<description>Prescaler register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PR</name>
<description>Prescaler divider</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<enumeratedValues><name>PR</name><usage>read-write</usage><enumeratedValue><name>DivideBy4</name><description>Divider /4</description><value>0</value></enumeratedValue><enumeratedValue><name>DivideBy8</name><description>Divider /8</description><value>1</value></enumeratedValue><enumeratedValue><name>DivideBy16</name><description>Divider /16</description><value>2</value></enumeratedValue><enumeratedValue><name>DivideBy32</name><description>Divider /32</description><value>3</value></enumeratedValue><enumeratedValue><name>DivideBy64</name><description>Divider /64</description><value>4</value></enumeratedValue><enumeratedValue><name>DivideBy128</name><description>Divider /128</description><value>5</value></enumeratedValue><enumeratedValue><name>DivideBy256</name><description>Divider /256</description><value>6</value></enumeratedValue><enumeratedValue><name>DivideBy256bis</name><description>Divider /256</description><value>7</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>RLR</name>
<displayName>RLR</displayName>
<description>Reload register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000FFF</resetValue>
<fields>
<field>
<name>RL</name>
<description>Watchdog counter reload
value</description>
<bitOffset>0</bitOffset>
<bitWidth>12</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>4095</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>SR</name>
<displayName>SR</displayName>
<description>Status register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WVU</name>
<description>Watchdog counter window value
update</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RVU</name>
<description>Watchdog counter reload value
update</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PVU</name>
<description>Watchdog prescaler value
update</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>WINR</name>
<displayName>WINR</displayName>
<description>Window register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000FFF</resetValue>
<fields>
<field>
<name>WIN</name>
<description>Watchdog counter window
value</description>
<bitOffset>0</bitOffset>
<bitWidth>12</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>4095</maximum></range></writeConstraint>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>WWDG</name>
<description>System window watchdog</description>
<groupName>WWDG</groupName>
<baseAddress>0x40002C00</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>WWDG</name>
<description>Window Watchdog interrupt</description>
<value>0</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<displayName>CR</displayName>
<description>Control register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000007F</resetValue>
<fields>
<field>
<name>WDGA</name>
<description>Activation bit</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>WDGA</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Watchdog disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Watchdog enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>T</name>
<description>7-bit counter (MSB to LSB)</description>
<bitOffset>0</bitOffset>
<bitWidth>7</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>127</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>CFR</name>
<displayName>CFR</displayName>
<description>Configuration register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000007F</resetValue>
<fields>
<field>
<name>EWI</name>
<description>Early wakeup interrupt</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>EWIW</name><usage>write</usage><enumeratedValue><name>Enable</name><description>interrupt occurs whenever the counter reaches the value 0x40</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>W</name>
<description>7-bit window value</description>
<bitOffset>0</bitOffset>
<bitWidth>7</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>127</maximum></range></writeConstraint>
</field>
<field><name>WDGTB</name><description>Timer base</description><bitOffset>7</bitOffset><bitWidth>2</bitWidth><enumeratedValues><name>WDGTB</name><usage>read-write</usage><enumeratedValue><name>Div1</name><description>Counter clock (PCLK1 div 4096) div 1</description><value>0</value></enumeratedValue><enumeratedValue><name>Div2</name><description>Counter clock (PCLK1 div 4096) div 2</description><value>1</value></enumeratedValue><enumeratedValue><name>Div4</name><description>Counter clock (PCLK1 div 4096) div 4</description><value>2</value></enumeratedValue><enumeratedValue><name>Div8</name><description>Counter clock (PCLK1 div 4096) div 8</description><value>3</value></enumeratedValue></enumeratedValues>
</field></fields>
</register>
<register>
<name>SR</name>
<displayName>SR</displayName>
<description>Status register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EWIF</name>
<description>Early wakeup interrupt
flag</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>EWIFR</name><usage>read</usage><enumeratedValue><name>Pending</name><description>The EWI Interrupt Service Routine has been triggered</description><value>1</value></enumeratedValue><enumeratedValue><name>Finished</name><description>The EWI Interrupt Service Routine has been serviced</description><value>0</value></enumeratedValue></enumeratedValues>
<enumeratedValues><name>EWIFW</name><usage>write</usage><enumeratedValue><name>Finished</name><description>The EWI Interrupt Service Routine has been serviced</description><value>0</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>COMP</name>
<description>Comparator</description>
<groupName>COMP</groupName>
<baseAddress>0x40010200</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x200</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>COMP</name>
<description>COMP1 and COMP2 interrupts</description>
<value>64</value>
</interrupt>
<registers>
<register>
<name>COMP1_CSR</name>
<displayName>COMP1_CSR</displayName>
<description>Comparator 1 control and status
register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<resetValue>0x0</resetValue>
<fields>
<field>
<name>COMP1_EN</name>
<description>Comparator 1 enable bit</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>COMP1_PWRMODE</name>
<description>Power Mode of the comparator
1</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>COMP1_INMSEL</name>
<description>Comparator 1 Input Minus connection
configuration bit</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>COMP1_INPSEL</name>
<description>Comparator1 input plus selection
bit</description>
<bitOffset>7</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>COMP1_POLARITY</name>
<description>Comparator 1 polarity selection
bit</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>COMP1_HYST</name>
<description>Comparator 1 hysteresis selection
bits</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>COMP1_BLANKING</name>
<description>Comparator 1 blanking source selection
bits</description>
<bitOffset>18</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>COMP1_BRGEN</name>
<description>Scaler bridge enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>COMP1_SCALEN</name>
<description>Voltage scaler enable bit</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>COMP1_INMESEL</name>
<description>comparator 1 input minus extended
selection bits</description>
<bitOffset>25</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>COMP1_VALUE</name>
<description>Comparator 1 output status
bit</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>COMP1_LOCK</name>
<description>COMP1_CSR register lock
bit</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>COMP2_CSR</name>
<displayName>COMP2_CSR</displayName>
<description>Comparator 2 control and status
register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<resetValue>0x0</resetValue>
<fields>
<field>
<name>COMP2_EN</name>
<description>Comparator 2 enable bit</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>COMP2_PWRMODE</name>
<description>Power Mode of the comparator
2</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>COMP2_INMSEL</name>
<description>Comparator 2 Input Minus connection
configuration bit</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>COMP2_INPSEL</name>
<description>Comparator 2 Input Plus connection
configuration bit</description>
<bitOffset>7</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>COMP2_WINMODE</name>
<description>Windows mode selection bit</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>COMP2_POLARITY</name>
<description>Comparator 2 polarity selection
bit</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>COMP2_HYST</name>
<description>Comparator 2 hysteresis selection
bits</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>COMP2_BLANKING</name>
<description>Comparator 2 blanking source selection
bits</description>
<bitOffset>18</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>COMP2_BRGEN</name>
<description>Scaler bridge enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>COMP2_SCALEN</name>
<description>Voltage scaler enable bit</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>COMP2_INMESEL</name>
<description>comparator 2 input minus extended
selection bits</description>
<bitOffset>25</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>COMP2_VALUE</name>
<description>Comparator 2 output status
bit</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>COMP2_LOCK</name>
<description>COMP2_CSR register lock
bit</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>FIREWALL</name>
<description>Firewall</description>
<groupName>Firewall</groupName>
<baseAddress>0x40011C00</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>CSSA</name>
<displayName>CSSA</displayName>
<description>Code segment start address</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADD</name>
<description>code segment start address</description>
<bitOffset>8</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>CSL</name>
<displayName>CSL</displayName>
<description>Code segment length</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LENG</name>
<description>code segment length</description>
<bitOffset>8</bitOffset>
<bitWidth>14</bitWidth>
</field>
</fields>
</register>
<register>
<name>NVDSSA</name>
<displayName>NVDSSA</displayName>
<description>Non-volatile data segment start
address</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADD</name>
<description>Non-volatile data segment start
address</description>
<bitOffset>8</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>NVDSL</name>
<displayName>NVDSL</displayName>
<description>Non-volatile data segment
length</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LENG</name>
<description>Non-volatile data segment
length</description>
<bitOffset>8</bitOffset>
<bitWidth>14</bitWidth>
</field>
</fields>
</register>
<register>
<name>VDSSA</name>
<displayName>VDSSA</displayName>
<description>Volatile data segment start
address</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADD</name>
<description>Volatile data segment start
address</description>
<bitOffset>6</bitOffset>
<bitWidth>10</bitWidth>
</field>
</fields>
</register>
<register>
<name>VDSL</name>
<displayName>VDSL</displayName>
<description>Volatile data segment length</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LENG</name>
<description>Non-volatile data segment
length</description>
<bitOffset>6</bitOffset>
<bitWidth>10</bitWidth>
</field>
</fields>
</register>
<register>
<name>CR</name>
<displayName>CR</displayName>
<description>Configuration register</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>VDE</name>
<description>Volatile data execution</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>VDS</name>
<description>Volatile data shared</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FPA</name>
<description>Firewall pre alarm</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>I2C1</name>
<description>Inter-integrated circuit</description>
<groupName>I2C</groupName>
<baseAddress>0x40005400</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>I2C1_EV</name>
<description>I2C1 event interrupt</description>
<value>31</value>
</interrupt>
<interrupt>
<name>I2C1_ER</name>
<description>I2C1 error interrupt</description>
<value>32</value>
</interrupt>
<registers>
<register>
<name>CR1</name>
<displayName>CR1</displayName>
<description>Control register 1</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PE</name>
<description>Peripheral enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>PE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Peripheral disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Peripheral enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TXIE</name>
<description>TX Interrupt enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TXIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Transmit (TXIS) interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Transmit (TXIS) interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RXIE</name>
<description>RX Interrupt enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RXIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Receive (RXNE) interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Receive (RXNE) interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ADDRIE</name>
<description>Address match interrupt enable (slave
only)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ADDRIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Address match (ADDR) interrupts disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Address match (ADDR) interrupts enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>NACKIE</name>
<description>Not acknowledge received interrupt
enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>NACKIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Not acknowledge (NACKF) received interrupts disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Not acknowledge (NACKF) received interrupts enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>STOPIE</name>
<description>STOP detection Interrupt
enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>STOPIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Stop detection (STOPF) interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Stop detection (STOPF) interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TCIE</name>
<description>Transfer Complete interrupt
enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TCIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Transfer Complete interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Transfer Complete interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ERRIE</name>
<description>Error interrupts enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ERRIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Error detection interrupts disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Error detection interrupts enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DNF</name>
<description>Digital noise filter</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues><name>DNF</name><usage>read-write</usage><enumeratedValue><name>NoFilter</name><description>Digital filter disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Filter1</name><description>Digital filter enabled and filtering capability up to 1 tI2CCLK</description><value>1</value></enumeratedValue><enumeratedValue><name>Filter2</name><description>Digital filter enabled and filtering capability up to 2 tI2CCLK</description><value>2</value></enumeratedValue><enumeratedValue><name>Filter3</name><description>Digital filter enabled and filtering capability up to 3 tI2CCLK</description><value>3</value></enumeratedValue><enumeratedValue><name>Filter4</name><description>Digital filter enabled and filtering capability up to 4 tI2CCLK</description><value>4</value></enumeratedValue><enumeratedValue><name>Filter5</name><description>Digital filter enabled and filtering capability up to 5 tI2CCLK</description><value>5</value></enumeratedValue><enumeratedValue><name>Filter6</name><description>Digital filter enabled and filtering capability up to 6 tI2CCLK</description><value>6</value></enumeratedValue><enumeratedValue><name>Filter7</name><description>Digital filter enabled and filtering capability up to 7 tI2CCLK</description><value>7</value></enumeratedValue><enumeratedValue><name>Filter8</name><description>Digital filter enabled and filtering capability up to 8 tI2CCLK</description><value>8</value></enumeratedValue><enumeratedValue><name>Filter9</name><description>Digital filter enabled and filtering capability up to 9 tI2CCLK</description><value>9</value></enumeratedValue><enumeratedValue><name>Filter10</name><description>Digital filter enabled and filtering capability up to 10 tI2CCLK</description><value>10</value></enumeratedValue><enumeratedValue><name>Filter11</name><description>Digital filter enabled and filtering capability up to 11 tI2CCLK</description><value>11</value></enumeratedValue><enumeratedValue><name>Filter12</name><description>Digital filter enabled and filtering capability up to 12 tI2CCLK</description><value>12</value></enumeratedValue><enumeratedValue><name>Filter13</name><description>Digital filter enabled and filtering capability up to 13 tI2CCLK</description><value>13</value></enumeratedValue><enumeratedValue><name>Filter14</name><description>Digital filter enabled and filtering capability up to 14 tI2CCLK</description><value>14</value></enumeratedValue><enumeratedValue><name>Filter15</name><description>Digital filter enabled and filtering capability up to 15 tI2CCLK</description><value>15</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ANFOFF</name>
<description>Analog noise filter OFF</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ANFOFF</name><usage>read-write</usage><enumeratedValue><name>Enabled</name><description>Analog noise filter enabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Disabled</name><description>Analog noise filter disabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TXDMAEN</name>
<description>DMA transmission requests
enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TXDMAEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>DMA mode disabled for transmission</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>DMA mode enabled for transmission</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RXDMAEN</name>
<description>DMA reception requests
enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RXDMAEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>DMA mode disabled for reception</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>DMA mode enabled for reception</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>SBC</name>
<description>Slave byte control</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>SBC</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Slave byte control disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Slave byte control enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>NOSTRETCH</name>
<description>Clock stretching disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>NOSTRETCH</name><usage>read-write</usage><enumeratedValue><name>Enabled</name><description>Clock stretching enabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Disabled</name><description>Clock stretching disabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>WUPEN</name>
<description>Wakeup from STOP enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>WUPEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Wakeup from Stop mode disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Wakeup from Stop mode enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>GCEN</name>
<description>General call enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>GCEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>General call disabled. Address 0b00000000 is NACKed</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>General call enabled. Address 0b00000000 is ACKed</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>SMBHEN</name>
<description>SMBus Host address enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>SMBHEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Host address disabled. Address 0b0001000x is NACKed</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Host address enabled. Address 0b0001000x is ACKed</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>SMBDEN</name>
<description>SMBus Device Default address
enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>SMBDEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Device default address disabled. Address 0b1100001x is NACKed</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Device default address enabled. Address 0b1100001x is ACKed</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ALERTEN</name>
<description>SMBUS alert enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ALERTEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>In device mode (SMBHEN=Disabled) Releases SMBA pin high and Alert Response Address Header disabled (0001100x) followed by NACK. In host mode (SMBHEN=Enabled) SMBus Alert pin (SMBA) not supported</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>In device mode (SMBHEN=Disabled) Drives SMBA pin low and Alert Response Address Header enabled (0001100x) followed by ACK.In host mode (SMBHEN=Enabled) SMBus Alert pin (SMBA) supported</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PECEN</name>
<description>PEC enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>PECEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>PEC calculation disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>PEC calculation enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CR2</name>
<displayName>CR2</displayName>
<description>Control register 2</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PECBYTE</name>
<description>Packet error checking byte</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>PECBYTE</name><usage>read-write</usage><enumeratedValue><name>NoPec</name><description>No PEC transfer</description><value>0</value></enumeratedValue><enumeratedValue><name>Pec</name><description>PEC transmission/reception is requested</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>AUTOEND</name>
<description>Automatic end mode (master
mode)</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>AUTOEND</name><usage>read-write</usage><enumeratedValue><name>Software</name><description>Software end mode: TC flag is set when NBYTES data are transferred, stretching SCL low</description><value>0</value></enumeratedValue><enumeratedValue><name>Automatic</name><description>Automatic end mode: a STOP condition is automatically sent when NBYTES data are transferred</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RELOAD</name>
<description>NBYTES reload mode</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RELOAD</name><usage>read-write</usage><enumeratedValue><name>Completed</name><description>The transfer is completed after the NBYTES data transfer (STOP or RESTART will follow)</description><value>0</value></enumeratedValue><enumeratedValue><name>NotCompeted</name><description>The transfer is not completed after the NBYTES data transfer (NBYTES will be reloaded)</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>NBYTES</name>
<description>Number of bytes</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>255</maximum></range></writeConstraint>
</field>
<field>
<name>NACK</name>
<description>NACK generation (slave
mode)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>NACK</name><usage>read-write</usage><enumeratedValue><name>Ack</name><description>an ACK is sent after current received byte</description><value>0</value></enumeratedValue><enumeratedValue><name>Nack</name><description>a NACK is sent after current received byte</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>STOP</name>
<description>Stop generation (master
mode)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>STOP</name><usage>read-write</usage><enumeratedValue><name>NoStop</name><description>No Stop generation</description><value>0</value></enumeratedValue><enumeratedValue><name>Stop</name><description>Stop generation after current byte transfer</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>START</name>
<description>Start generation</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>START</name><usage>read-write</usage><enumeratedValue><name>NoStart</name><description>No Start generation</description><value>0</value></enumeratedValue><enumeratedValue><name>Start</name><description>Restart/Start generation</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>HEAD10R</name>
<description>10-bit address header only read
direction (master receiver mode)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>HEAD10R</name><usage>read-write</usage><enumeratedValue><name>Complete</name><description>The master sends the complete 10 bit slave address read sequence</description><value>0</value></enumeratedValue><enumeratedValue><name>Partial</name><description>The master only sends the 1st 7 bits of the 10 bit address, followed by Read direction</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ADD10</name>
<description>10-bit addressing mode (master
mode)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ADD10</name><usage>read-write</usage><enumeratedValue><name>Bit7</name><description>The master operates in 7-bit addressing mode</description><value>0</value></enumeratedValue><enumeratedValue><name>Bit10</name><description>The master operates in 10-bit addressing mode</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RD_WRN</name>
<description>Transfer direction (master
mode)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RD_WRN</name><usage>read-write</usage><enumeratedValue><name>Write</name><description>Master requests a write transfer</description><value>0</value></enumeratedValue><enumeratedValue><name>Read</name><description>Master requests a read transfer</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>SADD</name>
<description>Slave address bit (master
mode)</description>
<bitOffset>0</bitOffset>
<bitWidth>10</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>1023</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>OAR1</name>
<displayName>OAR1</displayName>
<description>Own address register 1</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OA1</name>
<description>Interface address</description>
<bitOffset>0</bitOffset>
<bitWidth>10</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>1023</maximum></range></writeConstraint>
</field>
<field>
<name>OA1MODE</name>
<description>Own Address 1 10-bit mode</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>OA1MODE</name><usage>read-write</usage><enumeratedValue><name>Bit7</name><description>Own address 1 is a 7-bit address</description><value>0</value></enumeratedValue><enumeratedValue><name>Bit10</name><description>Own address 1 is a 10-bit address</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>OA1EN</name>
<description>Own Address 1 enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>OA1EN</name><usage>read-write</usage><enumeratedValue><name>Diasbled</name><description>Own address 1 disabled. The received slave address OA1 is NACKed</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Own address 1 enabled. The received slave address OA1 is ACKed</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>OAR2</name>
<displayName>OAR2</displayName>
<description>Own address register 2</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OA2</name>
<description>Interface address</description>
<bitOffset>1</bitOffset>
<bitWidth>7</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>127</maximum></range></writeConstraint>
</field>
<field>
<name>OA2MSK</name>
<description>Own Address 2 masks</description>
<bitOffset>8</bitOffset>
<bitWidth>3</bitWidth>
<enumeratedValues><name>OA2MSK</name><usage>read-write</usage><enumeratedValue><name>NoMask</name><description>No mask</description><value>0</value></enumeratedValue><enumeratedValue><name>Mask1</name><description>OA2[1] is masked and don’t care. Only OA2[7:2] are compared</description><value>1</value></enumeratedValue><enumeratedValue><name>Mask2</name><description>OA2[2:1] are masked and don’t care. Only OA2[7:3] are compared</description><value>2</value></enumeratedValue><enumeratedValue><name>Mask3</name><description>OA2[3:1] are masked and don’t care. Only OA2[7:4] are compared</description><value>3</value></enumeratedValue><enumeratedValue><name>Mask4</name><description>OA2[4:1] are masked and don’t care. Only OA2[7:5] are compared</description><value>4</value></enumeratedValue><enumeratedValue><name>Mask5</name><description>OA2[5:1] are masked and don’t care. Only OA2[7:6] are compared</description><value>5</value></enumeratedValue><enumeratedValue><name>Mask6</name><description>OA2[6:1] are masked and don’t care. Only OA2[7] is compared.</description><value>6</value></enumeratedValue><enumeratedValue><name>Mask7</name><description>OA2[7:1] are masked and don’t care. No comparison is done, and all (except reserved) 7-bit received addresses are acknowledged</description><value>7</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>OA2EN</name>
<description>Own Address 2 enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>OA2EN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Own address 2 disabled. The received slave address OA2 is NACKed</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Own address 2 enabled. The received slave address OA2 is ACKed</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>TIMINGR</name>
<displayName>TIMINGR</displayName>
<description>Timing register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SCLL</name>
<description>SCL low period (master
mode)</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>255</maximum></range></writeConstraint>
</field>
<field>
<name>SCLH</name>
<description>SCL high period (master
mode)</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>255</maximum></range></writeConstraint>
</field>
<field>
<name>SDADEL</name>
<description>Data hold time</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>15</maximum></range></writeConstraint>
</field>
<field>
<name>SCLDEL</name>
<description>Data setup time</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>15</maximum></range></writeConstraint>
</field>
<field>
<name>PRESC</name>
<description>Timing prescaler</description>
<bitOffset>28</bitOffset>
<bitWidth>4</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>15</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>TIMEOUTR</name>
<displayName>TIMEOUTR</displayName>
<description>Status register 1</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TIMEOUTA</name>
<description>Bus timeout A</description>
<bitOffset>0</bitOffset>
<bitWidth>12</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>4095</maximum></range></writeConstraint>
</field>
<field>
<name>TIDLE</name>
<description>Idle clock timeout
detection</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TIDLE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>TIMEOUTA is used to detect SCL low timeout</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>TIMEOUTA is used to detect both SCL and SDA high timeout (bus idle condition)</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TIMOUTEN</name>
<description>Clock timeout enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TIMOUTEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>SCL timeout detection is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>SCL timeout detection is enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TIMEOUTB</name>
<description>Bus timeout B</description>
<bitOffset>16</bitOffset>
<bitWidth>12</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>4095</maximum></range></writeConstraint>
</field>
<field>
<name>TEXTEN</name>
<description>Extended clock timeout
enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TEXTEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Extended clock timeout detection is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Extended clock timeout detection is enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>ISR</name>
<displayName>ISR</displayName>
<description>Interrupt and Status register</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<resetValue>0x00000001</resetValue>
<fields>
<field>
<name>ADDCODE</name>
<description>Address match code (Slave
mode)</description>
<bitOffset>17</bitOffset>
<bitWidth>7</bitWidth>
<access>read-only</access>
<writeConstraint><range><minimum>0</minimum><maximum>127</maximum></range></writeConstraint>
</field>
<field>
<name>DIR</name>
<description>Transfer direction (Slave
mode)</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
<enumeratedValues><name>DIR</name><usage>read-write</usage><enumeratedValue><name>Write</name><description>Write transfer, slave enters receiver mode</description><value>0</value></enumeratedValue><enumeratedValue><name>Read</name><description>Read transfer, slave enters transmitter mode</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>BUSY</name>
<description>Bus busy</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
<enumeratedValues><name>BUSY</name><usage>read-write</usage><enumeratedValue><name>NotBusy</name><description>No communication is in progress on the bus</description><value>0</value></enumeratedValue><enumeratedValue><name>Busy</name><description>A communication is in progress on the bus</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ALERT</name>
<description>SMBus alert</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
<enumeratedValues><name>ALERT</name><usage>read-write</usage><enumeratedValue><name>NoAlert</name><description>SMBA alert is not detected</description><value>0</value></enumeratedValue><enumeratedValue><name>Alert</name><description>SMBA alert event is detected on SMBA pin</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TIMEOUT</name>
<description>Timeout or t_low detection
flag</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
<enumeratedValues><name>TIMEOUT</name><usage>read-write</usage><enumeratedValue><name>NoTimeout</name><description>No timeout occured</description><value>0</value></enumeratedValue><enumeratedValue><name>Timeout</name><description>Timeout occured</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PECERR</name>
<description>PEC Error in reception</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
<enumeratedValues><name>PECERR</name><usage>read-write</usage><enumeratedValue><name>Match</name><description>Received PEC does match with PEC register</description><value>0</value></enumeratedValue><enumeratedValue><name>NoMatch</name><description>Received PEC does not match with PEC register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>OVR</name>
<description>Overrun/Underrun (slave
mode)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
<enumeratedValues><name>OVR</name><usage>read-write</usage><enumeratedValue><name>NoOverrun</name><description>No overrun/underrun error occurs</description><value>0</value></enumeratedValue><enumeratedValue><name>Overrun</name><description>slave mode with NOSTRETCH=1, when an overrun/underrun error occurs</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ARLO</name>
<description>Arbitration lost</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
<enumeratedValues><name>ARLO</name><usage>read-write</usage><enumeratedValue><name>NotLost</name><description>No arbitration lost</description><value>0</value></enumeratedValue><enumeratedValue><name>Lost</name><description>Arbitration lost</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>BERR</name>
<description>Bus error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
<enumeratedValues><name>BERR</name><usage>read-write</usage><enumeratedValue><name>NoError</name><description>No bus error</description><value>0</value></enumeratedValue><enumeratedValue><name>Error</name><description>Misplaced Start and Stop condition is detected</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TCR</name>
<description>Transfer Complete Reload</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
<enumeratedValues><name>TCR</name><usage>read-write</usage><enumeratedValue><name>NotComplete</name><description>Transfer is not complete</description><value>0</value></enumeratedValue><enumeratedValue><name>Complete</name><description>NBYTES has been transfered</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TC</name>
<description>Transfer Complete (master
mode)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
<enumeratedValues><name>TC</name><usage>read-write</usage><enumeratedValue><name>NotComplete</name><description>Transfer is not complete</description><value>0</value></enumeratedValue><enumeratedValue><name>Complete</name><description>NBYTES has been transfered</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>STOPF</name>
<description>Stop detection flag</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
<enumeratedValues><name>STOPF</name><usage>read-write</usage><enumeratedValue><name>NoStop</name><description>No Stop condition detected</description><value>0</value></enumeratedValue><enumeratedValue><name>Stop</name><description>Stop condition detected</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>NACKF</name>
<description>Not acknowledge received
flag</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
<enumeratedValues><name>NACKF</name><usage>read-write</usage><enumeratedValue><name>NoNack</name><description>No NACK has been received</description><value>0</value></enumeratedValue><enumeratedValue><name>Nack</name><description>NACK has been received</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ADDR</name>
<description>Address matched (slave
mode)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
<enumeratedValues><name>ADDR</name><usage>read-write</usage><enumeratedValue><name>NotMatch</name><description>Adress mismatched or not received</description><value>0</value></enumeratedValue><enumeratedValue><name>Match</name><description>Received slave address matched with one of the enabled slave addresses</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RXNE</name>
<description>Receive data register not empty
(receivers)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
<enumeratedValues><name>RXNE</name><usage>read-write</usage><enumeratedValue><name>Empty</name><description>The RXDR register is empty</description><value>0</value></enumeratedValue><enumeratedValue><name>NotEmpty</name><description>Received data is copied into the RXDR register, and is ready to be read</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TXIS</name>
<description>Transmit interrupt status
(transmitters)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues><name>TXIS</name><usage>read-write</usage><enumeratedValue><name>NotEmpty</name><description>The TXDR register is not empty</description><value>0</value></enumeratedValue><enumeratedValue><name>Empty</name><description>The TXDR register is empty and the data to be transmitted must be written in the TXDR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TXE</name>
<description>Transmit data register empty
(transmitters)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues><name>TXE</name><usage>read-write</usage><enumeratedValue><name>NotEmpty</name><description>TXDR register not empty</description><value>0</value></enumeratedValue><enumeratedValue><name>Empty</name><description>TXDR register empty</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>ICR</name>
<displayName>ICR</displayName>
<description>Interrupt clear register</description>
<addressOffset>0x1C</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ALERTCF</name>
<description>Alert flag clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ALERTCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the ALERT flag in ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TIMOUTCF</name>
<description>Timeout detection flag
clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TIMOUTCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the TIMOUT flag in ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PECCF</name>
<description>PEC Error flag clear</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>PECCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the PEC flag in ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>OVRCF</name>
<description>Overrun/Underrun flag
clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>OVRCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the OVR flag in ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ARLOCF</name>
<description>Arbitration lost flag
clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ARLOCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the ARLO flag in ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>BERRCF</name>
<description>Bus error flag clear</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>BERRCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the BERR flag in ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>STOPCF</name>
<description>Stop detection flag clear</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>STOPCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the STOP flag in ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>NACKCF</name>
<description>Not Acknowledge flag clear</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>NACKCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the NACK flag in ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ADDRCF</name>
<description>Address Matched flag clear</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ADDRCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the ADDR flag in ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>PECR</name>
<displayName>PECR</displayName>
<description>PEC register</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PEC</name>
<description>Packet error checking
register</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>255</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>RXDR</name>
<displayName>RXDR</displayName>
<description>Receive data register</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RXDATA</name>
<description>8-bit receive data</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>255</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>TXDR</name>
<displayName>TXDR</displayName>
<description>Transmit data register</description>
<addressOffset>0x28</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TXDATA</name>
<description>8-bit transmit data</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>255</maximum></range></writeConstraint>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral derivedFrom="I2C1">
<name>I2C3</name>
<baseAddress>0x40005C00</baseAddress>
<interrupt>
<name>I2C3_EV</name>
<description>I2C3 event interrupt</description>
<value>72</value>
</interrupt>
<interrupt>
<name>I2C3_ER</name>
<description>I2C3 error interrupt</description>
<value>73</value>
</interrupt>
</peripheral>
<peripheral derivedFrom="I2C1">
<name>I2C2</name>
<baseAddress>0x40005800</baseAddress>
<interrupt>
<name>I2C2_EV</name>
<description>I2C2 event interrupt</description>
<value>33</value>
</interrupt>
<interrupt>
<name>I2C2_ER</name>
<description>I2C2 error interrupt</description>
<value>34</value>
</interrupt>
</peripheral>
<peripheral derivedFrom="I2C1">
<name>I2C4</name>
<baseAddress>0x40008400</baseAddress>
<interrupt>
<name>I2C4_EV</name>
<description>I2C4 event interrupt, wakeup through
EXTI</description>
<value>83</value>
</interrupt>
</peripheral>
<peripheral>
<name>FLASH</name>
<description>Flash</description>
<groupName>Flash</groupName>
<baseAddress>0x40022000</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>FLASH</name>
<description>Flash global interrupt</description>
<value>4</value>
</interrupt>
<registers>
<register>
<name>ACR</name>
<displayName>ACR</displayName>
<description>Access control register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000600</resetValue>
<fields>
<field>
<name>LATENCY</name>
<description>Latency</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>PRFTEN</name>
<description>Prefetch enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ICEN</name>
<description>Instruction cache enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DCEN</name>
<description>Data cache enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ICRST</name>
<description>Instruction cache reset</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DCRST</name>
<description>Data cache reset</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RUN_PD</name>
<description>Flash Power-down mode during Low-power
run mode</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SLEEP_PD</name>
<description>Flash Power-down mode during Low-power
sleep mode</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>PDKEYR</name>
<displayName>PDKEYR</displayName>
<description>Power down key register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PDKEYR</name>
<description>RUN_PD in FLASH_ACR key</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>KEYR</name>
<displayName>KEYR</displayName>
<description>Flash key register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>KEYR</name>
<description>KEYR</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>OPTKEYR</name>
<displayName>OPTKEYR</displayName>
<description>Option byte key register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OPTKEYR</name>
<description>Option byte key</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>SR</name>
<displayName>SR</displayName>
<description>Status register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EOP</name>
<description>End of operation</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OPERR</name>
<description>Operation error</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PROGERR</name>
<description>Programming error</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WRPERR</name>
<description>Write protected error</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PGAERR</name>
<description>Programming alignment
error</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SIZERR</name>
<description>Size error</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PGSERR</name>
<description>Programming sequence error</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MISERR</name>
<description>Fast programming data miss
error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FASTERR</name>
<description>Fast programming error</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RDERR</name>
<description>PCROP read error</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OPTVERR</name>
<description>Option validity error</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BSY</name>
<description>Busy</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CR</name>
<displayName>CR</displayName>
<description>Flash control register</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0xC0000000</resetValue>
<fields>
<field>
<name>PG</name>
<description>Programming</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PER</name>
<description>Page erase</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MER1</name>
<description>Bank 1 Mass erase</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PNB</name>
<description>Page number</description>
<bitOffset>3</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>BKER</name>
<description>Bank erase</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MER2</name>
<description>Bank 2 Mass erase</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>START</name>
<description>Start</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OPTSTRT</name>
<description>Options modification start</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FSTPG</name>
<description>Fast programming</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EOPIE</name>
<description>End of operation interrupt
enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ERRIE</name>
<description>Error interrupt enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RDERRIE</name>
<description>PCROP read error interrupt
enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OBL_LAUNCH</name>
<description>Force the option byte
loading</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OPTLOCK</name>
<description>Options Lock</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LOCK</name>
<description>FLASH_CR Lock</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>ECCR</name>
<displayName>ECCR</displayName>
<description>Flash ECC register</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADDR_ECC</name>
<description>ECC fail address</description>
<bitOffset>0</bitOffset>
<bitWidth>19</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BK_ECC</name>
<description>ECC fail bank</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SYSF_ECC</name>
<description>System Flash ECC fail</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ECCIE</name>
<description>ECC correction interrupt
enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ECCC</name>
<description>ECC correction</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ECCD</name>
<description>ECC detection</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OPTR</name>
<displayName>OPTR</displayName>
<description>Flash option register</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0xF0000000</resetValue>
<fields>
<field>
<name>RDP</name>
<description>Read protection level</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>BOR_LEV</name>
<description>BOR reset Level</description>
<bitOffset>8</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>nRST_STOP</name>
<description>nRST_STOP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>nRST_STDBY</name>
<description>nRST_STDBY</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>IDWG_SW</name>
<description>Independent watchdog
selection</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>IWDG_STOP</name>
<description>Independent watchdog counter freeze in
Stop mode</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>IWDG_STDBY</name>
<description>Independent watchdog counter freeze in
Standby mode</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WWDG_SW</name>
<description>Window watchdog selection</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BFB2</name>
<description>Dual-bank boot</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DUALBANK</name>
<description>Dual-Bank on 512 KB or 256 KB Flash
memory devices</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>nBOOT1</name>
<description>Boot configuration</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SRAM2_PE</name>
<description>SRAM2 parity check enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SRAM2_RST</name>
<description>SRAM2 Erase when system
reset</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>PCROP1SR</name>
<displayName>PCROP1SR</displayName>
<description>Flash Bank 1 PCROP Start address
register</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0xFFFF0000</resetValue>
<fields>
<field>
<name>PCROP1_STRT</name>
<description>Bank 1 PCROP area start
offset</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>PCROP1ER</name>
<displayName>PCROP1ER</displayName>
<description>Flash Bank 1 PCROP End address
register</description>
<addressOffset>0x28</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0FFF0000</resetValue>
<fields>
<field>
<name>PCROP1_END</name>
<description>Bank 1 PCROP area end
offset</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
<field>
<name>PCROP_RDP</name>
<description>PCROP area preserved when RDP level
decreased</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>WRP1AR</name>
<displayName>WRP1AR</displayName>
<description>Flash Bank 1 WRP area A address
register</description>
<addressOffset>0x2C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0xFF00FF00</resetValue>
<fields>
<field>
<name>WRP1A_STRT</name>
<description>Bank 1 WRP first area tart
offset</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>WRP1A_END</name>
<description>Bank 1 WRP first area A end
offset</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>WRP1BR</name>
<displayName>WRP1BR</displayName>
<description>Flash Bank 1 WRP area B address
register</description>
<addressOffset>0x30</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0xFF00FF00</resetValue>
<fields>
<field>
<name>WRP1B_STRT</name>
<description>Bank 1 WRP second area B end
offset</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>WRP1B_END</name>
<description>Bank 1 WRP second area B start
offset</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>PCROP2SR</name>
<displayName>PCROP2SR</displayName>
<description>Flash Bank 2 PCROP Start address
register</description>
<addressOffset>0x44</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0xFFFF0000</resetValue>
<fields>
<field>
<name>PCROP2_STRT</name>
<description>Bank 2 PCROP area start
offset</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>PCROP2ER</name>
<displayName>PCROP2ER</displayName>
<description>Flash Bank 2 PCROP End address
register</description>
<addressOffset>0x48</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0xFFFF0000</resetValue>
<fields>
<field>
<name>PCROP2_END</name>
<description>Bank 2 PCROP area end
offset</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>WRP2AR</name>
<displayName>WRP2AR</displayName>
<description>Flash Bank 2 WRP area A address
register</description>
<addressOffset>0x4C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0xFF00FF00</resetValue>
<fields>
<field>
<name>WRP2A_STRT</name>
<description>Bank 2 WRP first area A start
offset</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>WRP2A_END</name>
<description>Bank 2 WRP first area A end
offset</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>WRP2BR</name>
<displayName>WRP2BR</displayName>
<description>Flash Bank 2 WRP area B address
register</description>
<addressOffset>0x50</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0xFF00FF00</resetValue>
<fields>
<field>
<name>WRP2B_STRT</name>
<description>Bank 2 WRP second area B start
offset</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>WRP2B_END</name>
<description>Bank 2 WRP second area B end
offset</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>RCC</name>
<description>Reset and clock control</description>
<groupName>RCC</groupName>
<baseAddress>0x40021000</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>RCC</name>
<description>RCC global interrupt</description>
<value>5</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<displayName>CR</displayName>
<description>Clock control register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<resetValue>0x00000063</resetValue>
<fields>
<field>
<name>PLLSAI1RDY</name>
<description>SAI1 PLL clock ready flag</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PLLSAI1ON</name>
<description>SAI1 PLL enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PLLRDY</name>
<description>Main PLL clock ready flag</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PLLON</name>
<description>Main PLL enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSSON</name>
<description>Clock security system
enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>HSEBYP</name>
<description>HSE crystal oscillator
bypass</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>HSERDY</name>
<description>HSE clock ready flag</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>HSEON</name>
<description>HSE clock enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>HSIASFS</name>
<description>HSI automatic start from
Stop</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>HSIRDY</name>
<description>HSI clock ready flag</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>HSIKERON</name>
<description>HSI always enable for peripheral
kernels</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>HSION</name>
<description>HSI clock enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MSIRANGE</name>
<description>MSI clock ranges</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues><name>MSIRANGE</name><usage>read-write</usage><enumeratedValue><name>Range100K</name><description>range 0 around 100 kHz</description><value>0</value></enumeratedValue><enumeratedValue><name>Range200K</name><description>range 1 around 200 kHz</description><value>1</value></enumeratedValue><enumeratedValue><name>Range400K</name><description>range 2 around 400 kHz</description><value>2</value></enumeratedValue><enumeratedValue><name>Range800K</name><description>range 3 around 800 kHz</description><value>3</value></enumeratedValue><enumeratedValue><name>Range1M</name><description>range 4 around 1 MHz</description><value>4</value></enumeratedValue><enumeratedValue><name>Range2M</name><description>range 5 around 2 MHz</description><value>5</value></enumeratedValue><enumeratedValue><name>Range4M</name><description>range 6 around 4 MHz</description><value>6</value></enumeratedValue><enumeratedValue><name>Range8M</name><description>range 7 around 8 MHz</description><value>7</value></enumeratedValue><enumeratedValue><name>Range16M</name><description>range 8 around 16 MHz</description><value>8</value></enumeratedValue><enumeratedValue><name>Range24M</name><description>range 9 around 24 MHz</description><value>9</value></enumeratedValue><enumeratedValue><name>Range32M</name><description>range 10 around 32 MHz</description><value>10</value></enumeratedValue><enumeratedValue><name>Range48M</name><description>range 11 around 48 MHz</description><value>11</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>MSIRGSEL</name>
<description>MSI clock range selection</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MSIPLLEN</name>
<description>MSI clock PLL enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MSIRDY</name>
<description>MSI clock ready flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MSION</name>
<description>MSI clock enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>ICSCR</name>
<displayName>ICSCR</displayName>
<description>Internal clock sources calibration
register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<resetValue>0x10000000</resetValue>
<fields>
<field>
<name>HSITRIM</name>
<description>HSI clock trimming</description>
<bitOffset>24</bitOffset>
<bitWidth>5</bitWidth>
<access>read-write</access>
</field>
<field>
<name>HSICAL</name>
<description>HSI clock calibration</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MSITRIM</name>
<description>MSI clock trimming</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MSICAL</name>
<description>MSI clock calibration</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CFGR</name>
<displayName>CFGR</displayName>
<description>Clock configuration register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MCOPRE</name>
<description>Microcontroller clock output
prescaler</description>
<bitOffset>28</bitOffset>
<bitWidth>3</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MCOSEL</name>
<description>Microcontroller clock
output</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>STOPWUCK</name>
<description>Wakeup from Stop and CSS backup clock
selection</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PPRE2</name>
<description>APB high-speed prescaler
(APB2)</description>
<bitOffset>11</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PPRE1</name>
<description>PB low-speed prescaler
(APB1)</description>
<bitOffset>8</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>HPRE</name>
<description>AHB prescaler</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SWS</name>
<description>System clock switch status</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SW</name>
<description>System clock switch</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PLLCFGR</name>
<displayName>PLLCFGR</displayName>
<description>PLL configuration register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00001000</resetValue>
<fields>
<field>
<name>PLLR</name>
<description>Main PLL division factor for PLLCLK
(system clock)</description>
<bitOffset>25</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>PLLREN</name>
<description>Main PLL PLLCLK output
enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PLLQ</name>
<description>Main PLL division factor for
PLLUSB1CLK(48 MHz clock)</description>
<bitOffset>21</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>PLLQEN</name>
<description>Main PLL PLLUSB1CLK output
enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PLLP</name>
<description>Main PLL division factor for PLLSAI3CLK
(SAI1 and SAI2 clock)</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PLLPEN</name>
<description>Main PLL PLLSAI3CLK output
enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PLLN</name>
<description>Main PLL multiplication factor for
VCO</description>
<bitOffset>8</bitOffset>
<bitWidth>7</bitWidth>
</field>
<field>
<name>PLLM</name>
<description>Division factor for the main PLL and
audio PLL (PLLSAI1 and PLLSAI2) input
clock</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>PLLSRC</name>
<description>Main PLL, PLLSAI1 and PLLSAI2 entry
clock source</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>PLLPDIV</name>
<description>Main PLL division factor for
PLLSAI2CLK</description>
<bitOffset>27</bitOffset>
<bitWidth>5</bitWidth>
</field>
</fields>
</register>
<register>
<name>PLLSAI1CFGR</name>
<displayName>PLLSAI1CFGR</displayName>
<description>PLLSAI1 configuration register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00001000</resetValue>
<fields>
<field>
<name>PLLSAI1R</name>
<description>PLLSAI1 division factor for PLLADC1CLK
(ADC clock)</description>
<bitOffset>25</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>PLLSAI1REN</name>
<description>PLLSAI1 PLLADC1CLK output
enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PLLSAI1Q</name>
<description>SAI1PLL division factor for PLLUSB2CLK
(48 MHz clock)</description>
<bitOffset>21</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>PLLSAI1QEN</name>
<description>SAI1PLL PLLUSB2CLK output
enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PLLSAI1P</name>
<description>SAI1PLL division factor for PLLSAI1CLK
(SAI1 or SAI2 clock)</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PLLSAI1PEN</name>
<description>SAI1PLL PLLSAI1CLK output
enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PLLSAI1N</name>
<description>SAI1PLL multiplication factor for
VCO</description>
<bitOffset>8</bitOffset>
<bitWidth>7</bitWidth>
</field>
<field>
<name>PLLSAI1PDIV</name>
<description>PLLSAI1 division factor for
PLLSAI1CLK</description>
<bitOffset>27</bitOffset>
<bitWidth>5</bitWidth>
</field>
</fields>
</register>
<register>
<name>CIER</name>
<displayName>CIER</displayName>
<description>Clock interrupt enable
register</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LSECSSIE</name>
<description>LSE clock security system interrupt
enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PLLSAI1RDYIE</name>
<description>PLLSAI1 ready interrupt
enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PLLRDYIE</name>
<description>PLL ready interrupt enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>HSERDYIE</name>
<description>HSE ready interrupt enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>HSIRDYIE</name>
<description>HSI ready interrupt enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MSIRDYIE</name>
<description>MSI ready interrupt enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LSERDYIE</name>
<description>LSE ready interrupt enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LSIRDYIE</name>
<description>LSI ready interrupt enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>HSI48RDYIE</name>
<description>HSI48 ready interrupt
enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>CIFR</name>
<displayName>CIFR</displayName>
<description>Clock interrupt flag register</description>
<addressOffset>0x1C</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LSECSSF</name>
<description>LSE Clock security system interrupt
flag</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CSSF</name>
<description>Clock security system interrupt
flag</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PLLSAI1RDYF</name>
<description>PLLSAI1 ready interrupt
flag</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PLLRDYF</name>
<description>PLL ready interrupt flag</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>HSERDYF</name>
<description>HSE ready interrupt flag</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>HSIRDYF</name>
<description>HSI ready interrupt flag</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MSIRDYF</name>
<description>MSI ready interrupt flag</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LSERDYF</name>
<description>LSE ready interrupt flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LSIRDYF</name>
<description>LSI ready interrupt flag</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>HSI48RDYF</name>
<description>HSI48 ready interrupt flag</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>CICR</name>
<displayName>CICR</displayName>
<description>Clock interrupt clear register</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LSECSSC</name>
<description>LSE Clock security system interrupt
clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CSSC</name>
<description>Clock security system interrupt
clear</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PLLSAI1RDYC</name>
<description>PLLSAI1 ready interrupt
clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PLLRDYC</name>
<description>PLL ready interrupt clear</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>HSERDYC</name>
<description>HSE ready interrupt clear</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>HSIRDYC</name>
<description>HSI ready interrupt clear</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MSIRDYC</name>
<description>MSI ready interrupt clear</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LSERDYC</name>
<description>LSE ready interrupt clear</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LSIRDYC</name>
<description>LSI ready interrupt clear</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>HSI48RDYC</name>
<description>HSI48 oscillator ready interrupt
clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>AHB1RSTR</name>
<displayName>AHB1RSTR</displayName>
<description>AHB1 peripheral reset register</description>
<addressOffset>0x28</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TSCRST</name>
<description>Touch Sensing Controller
reset</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CRCRST</name>
<description>CRC reset</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FLASHRST</name>
<description>Flash memory interface
reset</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DMA2RST</name>
<description>DMA2 reset</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DMA1RST</name>
<description>DMA1 reset</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>AHB2RSTR</name>
<displayName>AHB2RSTR</displayName>
<description>AHB2 peripheral reset register</description>
<addressOffset>0x2C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RNGRST</name>
<description>Random number generator
reset</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AESRST</name>
<description>AES hardware accelerator
reset</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ADCRST</name>
<description>ADC reset</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>GPIOHRST</name>
<description>IO port H reset</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>GPIOERST</name>
<description>IO port E reset</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>GPIODRST</name>
<description>IO port D reset</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>GPIOCRST</name>
<description>IO port C reset</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>GPIOBRST</name>
<description>IO port B reset</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>GPIOARST</name>
<description>IO port A reset</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>AHB3RSTR</name>
<displayName>AHB3RSTR</displayName>
<description>AHB3 peripheral reset register</description>
<addressOffset>0x30</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>QSPIRST</name>
<description>Quad SPI memory interface
reset</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>APB1RSTR1</name>
<displayName>APB1RSTR1</displayName>
<description>APB1 peripheral reset register
1</description>
<addressOffset>0x38</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LPTIM1RST</name>
<description>Low Power Timer 1 reset</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OPAMPRST</name>
<description>OPAMP interface reset</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DAC1RST</name>
<description>DAC1 interface reset</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PWRRST</name>
<description>Power interface reset</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CAN1RST</name>
<description>CAN1 reset</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>I2C3RST</name>
<description>I2C3 reset</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>I2C1RST</name>
<description>I2C1 reset</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>USART1RST</name>
<description>USART1 reset</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>USART2RST</name>
<description>USART2 reset</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SPI3RST</name>
<description>SPI3 reset</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SPI2RST</name>
<description>SPI2 reset</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LCDRST</name>
<description>LCD interface reset</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIM7RST</name>
<description>TIM7 timer reset</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIM6RST</name>
<description>TIM6 timer reset</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIM2RST</name>
<description>TIM2 timer reset</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>USART4RST</name>
<description>USART4 reset.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>I2C2RST</name>
<description>I2C2 reset</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CRSRST</name>
<description>CRS reset</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>USBFSRST</name>
<description>USB FS reset</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>APB1RSTR2</name>
<displayName>APB1RSTR2</displayName>
<description>APB1 peripheral reset register
2</description>
<addressOffset>0x3C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LPTIM2RST</name>
<description>Low-power timer 2 reset</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWPMI1RST</name>
<description>Single wire protocol reset</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LPUART1RST</name>
<description>Low-power UART 1 reset</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>I2C4RST</name>
<description>I2C4 reset</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>APB2RSTR</name>
<displayName>APB2RSTR</displayName>
<description>APB2 peripheral reset register</description>
<addressOffset>0x40</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SAI1RST</name>
<description>Serial audio interface 1 (SAI1)
reset</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIM16RST</name>
<description>TIM16 timer reset</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIM15RST</name>
<description>TIM15 timer reset</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>USART1RST</name>
<description>USART1 reset</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SPI1RST</name>
<description>SPI1 reset</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIM1RST</name>
<description>TIM1 timer reset</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SDMMCRST</name>
<description>SDMMC reset</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SYSCFGRST</name>
<description>System configuration (SYSCFG)
reset</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DFSDMRST</name>
<description>DFSDM filter reset</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>AHB1ENR</name>
<displayName>AHB1ENR</displayName>
<description>AHB1 peripheral clock enable
register</description>
<addressOffset>0x48</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000100</resetValue>
<fields>
<field>
<name>TSCEN</name>
<description>Touch Sensing Controller clock
enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CRCEN</name>
<description>CRC clock enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FLASHEN</name>
<description>Flash memory interface clock
enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DMA2EN</name>
<description>DMA2 clock enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DMA1EN</name>
<description>DMA1 clock enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>AHB2ENR</name>
<displayName>AHB2ENR</displayName>
<description>AHB2 peripheral clock enable
register</description>
<addressOffset>0x4C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RNGEN</name>
<description>Random Number Generator clock
enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AESEN</name>
<description>AES accelerator clock
enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ADCEN</name>
<description>ADC clock enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>GPIOHEN</name>
<description>IO port H clock enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>GPIOEEN</name>
<description>IO port E clock enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>GPIODEN</name>
<description>IO port D clock enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>GPIOCEN</name>
<description>IO port C clock enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>GPIOBEN</name>
<description>IO port B clock enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>GPIOAEN</name>
<description>IO port A clock enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>AHB3ENR</name>
<displayName>AHB3ENR</displayName>
<description>AHB3 peripheral clock enable
register</description>
<addressOffset>0x50</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>QSPIEN</name>
<description>QSPIEN</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>APB1ENR1</name>
<displayName>APB1ENR1</displayName>
<description>APB1ENR1</description>
<addressOffset>0x58</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LPTIM1EN</name>
<description>Low power timer 1 clock
enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OPAMPEN</name>
<description>OPAMP interface clock
enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DAC1EN</name>
<description>DAC1 interface clock
enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PWREN</name>
<description>Power interface clock
enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CAN1EN</name>
<description>CAN1 clock enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>I2C3EN</name>
<description>I2C3 clock enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>I2C1EN</name>
<description>I2C1 clock enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>USART3EN</name>
<description>USART3 clock enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>USART2EN</name>
<description>USART2 clock enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SPI3EN</name>
<description>SPI3 clock enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SPI1EN</name>
<description>SPI1 clock enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WWDGEN</name>
<description>Window watchdog clock
enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LCDEN</name>
<description>LCD clock enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIM7EN</name>
<description>TIM7 timer clock enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIM6EN</name>
<description>TIM6 timer clock enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIM2EN</name>
<description>TIM2 timer clock enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RTCAPBEN</name>
<description>RTC APB clock enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CRSEN</name>
<description>CRS clock enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>USBFSEN</name>
<description>USB FS clock enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIM3EN</name>
<description>TIM3 timer clock enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>UART4EN</name>
<description>UART4 clock enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>I2C2EN</name>
<description>I2C2 clock enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>APB1ENR2</name>
<displayName>APB1ENR2</displayName>
<description>APB1 peripheral clock enable register
2</description>
<addressOffset>0x5C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LPTIM2EN</name>
<description>LPTIM2EN</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWPMI1EN</name>
<description>Single wire protocol clock
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LPUART1EN</name>
<description>Low power UART 1 clock
enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DFSDMEN</name>
<description>DFSDMEN enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>I2C4EN</name>
<description>I2C4 clock enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>APB2ENR</name>
<displayName>APB2ENR</displayName>
<description>APB2ENR</description>
<addressOffset>0x60</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SAI1EN</name>
<description>SAI1 clock enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIM16EN</name>
<description>TIM16 timer clock enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIM15EN</name>
<description>TIM15 timer clock enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>USART1EN</name>
<description>USART1clock enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SPI1EN</name>
<description>SPI1 clock enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIM1EN</name>
<description>TIM1 timer clock enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SDMMCEN</name>
<description>SDMMC clock enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FIREWALLEN</name>
<description>Firewall clock enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SYSCFGEN</name>
<description>SYSCFG clock enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>AHB1SMENR</name>
<displayName>AHB1SMENR</displayName>
<description>AHB1 peripheral clocks enable in Sleep and
Stop modes register</description>
<addressOffset>0x68</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00011303</resetValue>
<fields>
<field>
<name>TSCSMEN</name>
<description>Touch Sensing Controller clocks enable
during Sleep and Stop modes</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CRCSMEN</name>
<description>CRCSMEN</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SRAM1SMEN</name>
<description>SRAM1 interface clocks enable during
Sleep and Stop modes</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FLASHSMEN</name>
<description>Flash memory interface clocks enable
during Sleep and Stop modes</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DMA2SMEN</name>
<description>DMA2 clocks enable during Sleep and Stop
modes</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DMA1SMEN</name>
<description>DMA1 clocks enable during Sleep and Stop
modes</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>AHB2SMENR</name>
<displayName>AHB2SMENR</displayName>
<description>AHB2 peripheral clocks enable in Sleep and
Stop modes register</description>
<addressOffset>0x6C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x000532FF</resetValue>
<fields>
<field>
<name>RNGSMEN</name>
<description>Random Number Generator clocks enable
during Sleep and Stop modes</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AESSMEN</name>
<description>AES accelerator clocks enable during
Sleep and Stop modes</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ADCFSSMEN</name>
<description>ADC clocks enable during Sleep and Stop
modes</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SRAM2SMEN</name>
<description>SRAM2 interface clocks enable during
Sleep and Stop modes</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>GPIOHSMEN</name>
<description>IO port H clocks enable during Sleep and
Stop modes</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>GPIOESMEN</name>
<description>IO port E clocks enable during Sleep and
Stop modes</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>GPIODSMEN</name>
<description>IO port D clocks enable during Sleep and
Stop modes</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>GPIOCSMEN</name>
<description>IO port C clocks enable during Sleep and
Stop modes</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>GPIOBSMEN</name>
<description>IO port B clocks enable during Sleep and
Stop modes</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>GPIOASMEN</name>
<description>IO port A clocks enable during Sleep and
Stop modes</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>AHB3SMENR</name>
<displayName>AHB3SMENR</displayName>
<description>AHB3 peripheral clocks enable in Sleep and
Stop modes register</description>
<addressOffset>0x70</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x000000101</resetValue>
<fields>
<field>
<name>QSPISMEN</name>
<description>QSPISMEN</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>APB1SMENR1</name>
<displayName>APB1SMENR1</displayName>
<description>APB1SMENR1</description>
<addressOffset>0x78</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0xF2FECA3F</resetValue>
<fields>
<field>
<name>LPTIM1SMEN</name>
<description>Low power timer 1 clocks enable during
Sleep and Stop modes</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OPAMPSMEN</name>
<description>OPAMP interface clocks enable during
Sleep and Stop modes</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DAC1SMEN</name>
<description>DAC1 interface clocks enable during
Sleep and Stop modes</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PWRSMEN</name>
<description>Power interface clocks enable during
Sleep and Stop modes</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CAN1SMEN</name>
<description>CAN1 clocks enable during Sleep and Stop
modes</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>I2C3SMEN</name>
<description>I2C3 clocks enable during Sleep and Stop
modes</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>I2C1SMEN</name>
<description>I2C1 clocks enable during Sleep and Stop
modes</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>USART2SMEN</name>
<description>USART2 clocks enable during Sleep and
Stop modes</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>USART1SMEN</name>
<description>USART1 clocks enable during Sleep and
Stop modes</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SP3SMEN</name>
<description>SPI3 clocks enable during Sleep and Stop
modes</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SPI2SMEN</name>
<description>SPI2 clocks enable during Sleep and Stop
modes</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WWDGSMEN</name>
<description>Window watchdog clocks enable during
Sleep and Stop modes</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LCDSMEN</name>
<description>LCD clocks enable during Sleep and Stop
modes</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIM7SMEN</name>
<description>TIM7 timer clocks enable during Sleep
and Stop modes</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIM6SMEN</name>
<description>TIM6 timer clocks enable during Sleep
and Stop modes</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIM2SMEN</name>
<description>TIM2 timer clocks enable during Sleep
and Stop modes</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RTCAPBSMEN</name>
<description>RTC APB clock enable during Sleep and
Stop modes</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>USBFSSMEN</name>
<description>USB FS clock enable during Sleep and
Stop modes</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>I2C2SMEN</name>
<description>I2C2 clocks enable during Sleep and Stop
modes</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CRSSMEN</name>
<description>CRS clock enable during Sleep and Stop
modes</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>APB1SMENR2</name>
<displayName>APB1SMENR2</displayName>
<description>APB1 peripheral clocks enable in Sleep and
Stop modes register 2</description>
<addressOffset>0x7C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x000000025</resetValue>
<fields>
<field>
<name>LPTIM2SMEN</name>
<description>LPTIM2SMEN</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWPMI1SMEN</name>
<description>Single wire protocol clocks enable
during Sleep and Stop modes</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LPUART1SMEN</name>
<description>Low power UART 1 clocks enable during
Sleep and Stop modes</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>APB2SMENR</name>
<displayName>APB2SMENR</displayName>
<description>APB2SMENR</description>
<addressOffset>0x80</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x01677C01</resetValue>
<fields>
<field>
<name>SAI1SMEN</name>
<description>SAI1 clocks enable during Sleep and Stop
modes</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIM16SMEN</name>
<description>TIM16 timer clocks enable during Sleep
and Stop modes</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIM15SMEN</name>
<description>TIM15 timer clocks enable during Sleep
and Stop modes</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>USART1SMEN</name>
<description>USART1clocks enable during Sleep and
Stop modes</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SPI1SMEN</name>
<description>SPI1 clocks enable during Sleep and Stop
modes</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIM1SMEN</name>
<description>TIM1 timer clocks enable during Sleep
and Stop modes</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SDMMCSMEN</name>
<description>SDMMC clocks enable during Sleep and
Stop modes</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SYSCFGSMEN</name>
<description>SYSCFG clocks enable during Sleep and
Stop modes</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>CCIPR</name>
<displayName>CCIPR</displayName>
<description>CCIPR</description>
<addressOffset>0x88</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SWPMI1SEL</name>
<description>SWPMI1 clock source
selection</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ADCSEL</name>
<description>ADCs clock source
selection</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>CLK48SEL</name>
<description>48 MHz clock source
selection</description>
<bitOffset>26</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>SAI1SEL</name>
<description>SAI1 clock source
selection</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>LPTIM2SEL</name>
<description>Low power timer 2 clock source
selection</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>LPTIM1SEL</name>
<description>Low power timer 1 clock source
selection</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>I2C3SEL</name>
<description>I2C3 clock source
selection</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>I2C1SEL</name>
<description>I2C1 clock source
selection</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>LPUART1SEL</name>
<description>LPUART1 clock source
selection</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>USART2SEL</name>
<description>USART2 clock source
selection</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>USART1SEL</name>
<description>USART1 clock source
selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>USART4SEL</name>
<description>USART4 clock source
selection</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>USART3SEL</name>
<description>USART3 clock source
selection</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>I2C2SEL</name>
<description>I2C2 clock source
selection</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
</field>
</fields>
</register>
<register>
<name>BDCR</name>
<displayName>BDCR</displayName>
<description>BDCR</description>
<addressOffset>0x90</addressOffset>
<size>0x20</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LSCOSEL</name>
<description>Low speed clock output
selection</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LSCOEN</name>
<description>Low speed clock output
enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BDRST</name>
<description>Backup domain software
reset</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RTCEN</name>
<description>RTC clock enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RTCSEL</name>
<description>RTC clock source selection</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LSECSSD</name>
<description>LSECSSD</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LSECSSON</name>
<description>LSECSSON</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LSEDRV</name>
<description>SE oscillator drive
capability</description>
<bitOffset>3</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LSEBYP</name>
<description>LSE oscillator bypass</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LSERDY</name>
<description>LSE oscillator ready</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LSEON</name>
<description>LSE oscillator enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CSR</name>
<displayName>CSR</displayName>
<description>CSR</description>
<addressOffset>0x94</addressOffset>
<size>0x20</size>
<resetValue>0x0C000600</resetValue>
<fields>
<field>
<name>LPWRSTF</name>
<description>Low-power reset flag</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WWDGRSTF</name>
<description>Window watchdog reset flag</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>IWDGRSTF</name>
<description>Independent window watchdog reset
flag</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SFTRSTF</name>
<description>Software reset flag</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BORRSTF</name>
<description>BOR flag</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PINRSTF</name>
<description>Pin reset flag</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OBLRSTF</name>
<description>Option byte loader reset
flag</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FIREWALLRSTF</name>
<description>Firewall reset flag</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RMVF</name>
<description>Remove reset flag</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MSISRANGE</name>
<description>SI range after Standby
mode</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LSIRDY</name>
<description>LSI oscillator ready</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LSION</name>
<description>LSI oscillator enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CRRCR</name>
<displayName>CRRCR</displayName>
<description>Clock recovery RC register</description>
<addressOffset>0x98</addressOffset>
<size>0x20</size>
<resetValue>0x0C000600</resetValue>
<fields>
<field>
<name>HSI48ON</name>
<description>HSI48 clock enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>HSI48RDY</name>
<description>HSI48 clock ready flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>HSI48CAL</name>
<description>HSI48 clock calibration</description>
<bitOffset>7</bitOffset>
<bitWidth>9</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>PWR</name>
<description>Power control</description>
<groupName>PWR</groupName>
<baseAddress>0x40007000</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>CR1</name>
<displayName>CR1</displayName>
<description>Power control register 1</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000200</resetValue>
<fields>
<field>
<name>LPR</name>
<description>Low-power run</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>VOS</name>
<description>Voltage scaling range
selection</description>
<bitOffset>9</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>DBP</name>
<description>Disable backup domain write
protection</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LPMS</name>
<description>Low-power mode selection</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
</field>
</fields>
</register>
<register>
<name>CR2</name>
<displayName>CR2</displayName>
<description>Power control register 2</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>USV</name>
<description>VDDUSB USB supply valid</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>IOSV</name>
<description>VDDIO2 Independent I/Os supply
valid</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PVME4</name>
<description>Peripheral voltage monitoring 4 enable:
VDDA vs. 2.2V</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PVME3</name>
<description>Peripheral voltage monitoring 3 enable:
VDDA vs. 1.62V</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PVME2</name>
<description>Peripheral voltage monitoring 2 enable:
VDDIO2 vs. 0.9V</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PVME1</name>
<description>Peripheral voltage monitoring 1 enable:
VDDUSB vs. 1.2V</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PLS</name>
<description>Power voltage detector level
selection</description>
<bitOffset>1</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>PVDE</name>
<description>Power voltage detector
enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>CR3</name>
<displayName>CR3</displayName>
<description>Power control register 3</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0X00008000</resetValue>
<fields>
<field>
<name>EWF</name>
<description>Enable internal wakeup
line</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>APC</name>
<description>Apply pull-up and pull-down
configuration</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RRS</name>
<description>SRAM2 retention in Standby
mode</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EWUP5</name>
<description>Enable Wakeup pin WKUP5</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EWUP4</name>
<description>Enable Wakeup pin WKUP4</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EWUP3</name>
<description>Enable Wakeup pin WKUP3</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EWUP2</name>
<description>Enable Wakeup pin WKUP2</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EWUP1</name>
<description>Enable Wakeup pin WKUP1</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>CR4</name>
<displayName>CR4</displayName>
<description>Power control register 4</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>VBRS</name>
<description>VBAT battery charging resistor
selection</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>VBE</name>
<description>VBAT battery charging
enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WP5</name>
<description>Wakeup pin WKUP5 polarity</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WP4</name>
<description>Wakeup pin WKUP4 polarity</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WP3</name>
<description>Wakeup pin WKUP3 polarity</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WP2</name>
<description>Wakeup pin WKUP2 polarity</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WP1</name>
<description>Wakeup pin WKUP1 polarity</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>SR1</name>
<displayName>SR1</displayName>
<description>Power status register 1</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WUFI</name>
<description>Wakeup flag internal</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CSBF</name>
<description>Standby flag</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CWUF5</name>
<description>Wakeup flag 5</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CWUF4</name>
<description>Wakeup flag 4</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CWUF3</name>
<description>Wakeup flag 3</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CWUF2</name>
<description>Wakeup flag 2</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CWUF1</name>
<description>Wakeup flag 1</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>SR2</name>
<displayName>SR2</displayName>
<description>Power status register 2</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PVMO4</name>
<description>Peripheral voltage monitoring output:
VDDA vs. 2.2 V</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PVMO3</name>
<description>Peripheral voltage monitoring output:
VDDA vs. 1.62 V</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PVMO2</name>
<description>Peripheral voltage monitoring output:
VDDIO2 vs. 0.9 V</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PVMO1</name>
<description>Peripheral voltage monitoring output:
VDDUSB vs. 1.2 V</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PVDO</name>
<description>Power voltage detector
output</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>VOSF</name>
<description>Voltage scaling flag</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>REGLPF</name>
<description>Low-power regulator flag</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>REGLPS</name>
<description>Low-power regulator
started</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>SCR</name>
<displayName>SCR</displayName>
<description>Power status clear register</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SBF</name>
<description>Clear standby flag</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WUF5</name>
<description>Clear wakeup flag 5</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WUF4</name>
<description>Clear wakeup flag 4</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WUF3</name>
<description>Clear wakeup flag 3</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WUF2</name>
<description>Clear wakeup flag 2</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WUF1</name>
<description>Clear wakeup flag 1</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>PUCRA</name>
<displayName>PUCRA</displayName>
<description>Power Port A pull-up control
register</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PU15</name>
<description>Port A pull-up bit y
(y=0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU14</name>
<description>Port A pull-up bit y
(y=0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU13</name>
<description>Port A pull-up bit y
(y=0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU12</name>
<description>Port A pull-up bit y
(y=0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU11</name>
<description>Port A pull-up bit y
(y=0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU10</name>
<description>Port A pull-up bit y
(y=0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU9</name>
<description>Port A pull-up bit y
(y=0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU8</name>
<description>Port A pull-up bit y
(y=0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU7</name>
<description>Port A pull-up bit y
(y=0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU6</name>
<description>Port A pull-up bit y
(y=0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU5</name>
<description>Port A pull-up bit y
(y=0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU4</name>
<description>Port A pull-up bit y
(y=0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU3</name>
<description>Port A pull-up bit y
(y=0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU2</name>
<description>Port A pull-up bit y
(y=0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU1</name>
<description>Port A pull-up bit y
(y=0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU0</name>
<description>Port A pull-up bit y
(y=0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>PDCRA</name>
<displayName>PDCRA</displayName>
<description>Power Port A pull-down control
register</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PD15</name>
<description>Port A pull-down bit y
(y=0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD14</name>
<description>Port A pull-down bit y
(y=0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD13</name>
<description>Port A pull-down bit y
(y=0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD12</name>
<description>Port A pull-down bit y
(y=0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD11</name>
<description>Port A pull-down bit y
(y=0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD10</name>
<description>Port A pull-down bit y
(y=0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD9</name>
<description>Port A pull-down bit y
(y=0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD8</name>
<description>Port A pull-down bit y
(y=0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD7</name>
<description>Port A pull-down bit y
(y=0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD6</name>
<description>Port A pull-down bit y
(y=0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD5</name>
<description>Port A pull-down bit y
(y=0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD4</name>
<description>Port A pull-down bit y
(y=0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD3</name>
<description>Port A pull-down bit y
(y=0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD2</name>
<description>Port A pull-down bit y
(y=0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD1</name>
<description>Port A pull-down bit y
(y=0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD0</name>
<description>Port A pull-down bit y
(y=0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>PUCRB</name>
<displayName>PUCRB</displayName>
<description>Power Port B pull-up control
register</description>
<addressOffset>0x28</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PU15</name>
<description>Port B pull-up bit y
(y=0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU14</name>
<description>Port B pull-up bit y
(y=0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU13</name>
<description>Port B pull-up bit y
(y=0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU12</name>
<description>Port B pull-up bit y
(y=0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU11</name>
<description>Port B pull-up bit y
(y=0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU10</name>
<description>Port B pull-up bit y
(y=0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU9</name>
<description>Port B pull-up bit y
(y=0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU8</name>
<description>Port B pull-up bit y
(y=0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU7</name>
<description>Port B pull-up bit y
(y=0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU6</name>
<description>Port B pull-up bit y
(y=0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU5</name>
<description>Port B pull-up bit y
(y=0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU4</name>
<description>Port B pull-up bit y
(y=0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU3</name>
<description>Port B pull-up bit y
(y=0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU2</name>
<description>Port B pull-up bit y
(y=0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU1</name>
<description>Port B pull-up bit y
(y=0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU0</name>
<description>Port B pull-up bit y
(y=0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>PDCRB</name>
<displayName>PDCRB</displayName>
<description>Power Port B pull-down control
register</description>
<addressOffset>0x2C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PD15</name>
<description>Port B pull-down bit y
(y=0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD14</name>
<description>Port B pull-down bit y
(y=0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD13</name>
<description>Port B pull-down bit y
(y=0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD12</name>
<description>Port B pull-down bit y
(y=0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD11</name>
<description>Port B pull-down bit y
(y=0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD10</name>
<description>Port B pull-down bit y
(y=0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD9</name>
<description>Port B pull-down bit y
(y=0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD8</name>
<description>Port B pull-down bit y
(y=0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD7</name>
<description>Port B pull-down bit y
(y=0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD6</name>
<description>Port B pull-down bit y
(y=0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD5</name>
<description>Port B pull-down bit y
(y=0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD4</name>
<description>Port B pull-down bit y
(y=0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD3</name>
<description>Port B pull-down bit y
(y=0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD2</name>
<description>Port B pull-down bit y
(y=0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD1</name>
<description>Port B pull-down bit y
(y=0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD0</name>
<description>Port B pull-down bit y
(y=0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>PUCRC</name>
<displayName>PUCRC</displayName>
<description>Power Port C pull-up control
register</description>
<addressOffset>0x30</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PU15</name>
<description>Port C pull-up bit y
(y=0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU14</name>
<description>Port C pull-up bit y
(y=0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU13</name>
<description>Port C pull-up bit y
(y=0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU12</name>
<description>Port C pull-up bit y
(y=0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU11</name>
<description>Port C pull-up bit y
(y=0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU10</name>
<description>Port C pull-up bit y
(y=0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU9</name>
<description>Port C pull-up bit y
(y=0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU8</name>
<description>Port C pull-up bit y
(y=0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU7</name>
<description>Port C pull-up bit y
(y=0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU6</name>
<description>Port C pull-up bit y
(y=0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU5</name>
<description>Port C pull-up bit y
(y=0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU4</name>
<description>Port C pull-up bit y
(y=0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU3</name>
<description>Port C pull-up bit y
(y=0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU2</name>
<description>Port C pull-up bit y
(y=0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU1</name>
<description>Port C pull-up bit y
(y=0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU0</name>
<description>Port C pull-up bit y
(y=0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>PDCRC</name>
<displayName>PDCRC</displayName>
<description>Power Port C pull-down control
register</description>
<addressOffset>0x34</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PD15</name>
<description>Port C pull-down bit y
(y=0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD14</name>
<description>Port C pull-down bit y
(y=0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD13</name>
<description>Port C pull-down bit y
(y=0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD12</name>
<description>Port C pull-down bit y
(y=0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD11</name>
<description>Port C pull-down bit y
(y=0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD10</name>
<description>Port C pull-down bit y
(y=0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD9</name>
<description>Port C pull-down bit y
(y=0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD8</name>
<description>Port C pull-down bit y
(y=0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD7</name>
<description>Port C pull-down bit y
(y=0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD6</name>
<description>Port C pull-down bit y
(y=0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD5</name>
<description>Port C pull-down bit y
(y=0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD4</name>
<description>Port C pull-down bit y
(y=0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD3</name>
<description>Port C pull-down bit y
(y=0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD2</name>
<description>Port C pull-down bit y
(y=0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD1</name>
<description>Port C pull-down bit y
(y=0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD0</name>
<description>Port C pull-down bit y
(y=0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>PUCRD</name>
<displayName>PUCRD</displayName>
<description>Power Port D pull-up control
register</description>
<addressOffset>0x38</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PU15</name>
<description>Port D pull-up bit y
(y=0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU14</name>
<description>Port D pull-up bit y
(y=0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU13</name>
<description>Port D pull-up bit y
(y=0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU12</name>
<description>Port D pull-up bit y
(y=0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU11</name>
<description>Port D pull-up bit y
(y=0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU10</name>
<description>Port D pull-up bit y
(y=0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU9</name>
<description>Port D pull-up bit y
(y=0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU8</name>
<description>Port D pull-up bit y
(y=0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU7</name>
<description>Port D pull-up bit y
(y=0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU6</name>
<description>Port D pull-up bit y
(y=0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU5</name>
<description>Port D pull-up bit y
(y=0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU4</name>
<description>Port D pull-up bit y
(y=0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU3</name>
<description>Port D pull-up bit y
(y=0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU2</name>
<description>Port D pull-up bit y
(y=0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU1</name>
<description>Port D pull-up bit y
(y=0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU0</name>
<description>Port D pull-up bit y
(y=0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>PDCRD</name>
<displayName>PDCRD</displayName>
<description>Power Port D pull-down control
register</description>
<addressOffset>0x3C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PD15</name>
<description>Port D pull-down bit y
(y=0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD14</name>
<description>Port D pull-down bit y
(y=0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD13</name>
<description>Port D pull-down bit y
(y=0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD12</name>
<description>Port D pull-down bit y
(y=0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD11</name>
<description>Port D pull-down bit y
(y=0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD10</name>
<description>Port D pull-down bit y
(y=0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD9</name>
<description>Port D pull-down bit y
(y=0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD8</name>
<description>Port D pull-down bit y
(y=0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD7</name>
<description>Port D pull-down bit y
(y=0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD6</name>
<description>Port D pull-down bit y
(y=0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD5</name>
<description>Port D pull-down bit y
(y=0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD4</name>
<description>Port D pull-down bit y
(y=0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD3</name>
<description>Port D pull-down bit y
(y=0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD2</name>
<description>Port D pull-down bit y
(y=0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD1</name>
<description>Port D pull-down bit y
(y=0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD0</name>
<description>Port D pull-down bit y
(y=0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>PUCRE</name>
<displayName>PUCRE</displayName>
<description>Power Port E pull-up control
register</description>
<addressOffset>0x40</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PU15</name>
<description>Port E pull-up bit y
(y=0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU14</name>
<description>Port E pull-up bit y
(y=0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU13</name>
<description>Port E pull-up bit y
(y=0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU12</name>
<description>Port E pull-up bit y
(y=0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU11</name>
<description>Port E pull-up bit y
(y=0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU10</name>
<description>Port E pull-up bit y
(y=0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU9</name>
<description>Port E pull-up bit y
(y=0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU8</name>
<description>Port E pull-up bit y
(y=0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU7</name>
<description>Port E pull-up bit y
(y=0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU6</name>
<description>Port E pull-up bit y
(y=0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU5</name>
<description>Port E pull-up bit y
(y=0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU4</name>
<description>Port E pull-up bit y
(y=0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU3</name>
<description>Port E pull-up bit y
(y=0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU2</name>
<description>Port E pull-up bit y
(y=0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU1</name>
<description>Port E pull-up bit y
(y=0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU0</name>
<description>Port E pull-up bit y
(y=0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>PDCRE</name>
<displayName>PDCRE</displayName>
<description>Power Port E pull-down control
register</description>
<addressOffset>0x44</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PD15</name>
<description>Port E pull-down bit y
(y=0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD14</name>
<description>Port E pull-down bit y
(y=0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD13</name>
<description>Port E pull-down bit y
(y=0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD12</name>
<description>Port E pull-down bit y
(y=0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD11</name>
<description>Port E pull-down bit y
(y=0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD10</name>
<description>Port E pull-down bit y
(y=0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD9</name>
<description>Port E pull-down bit y
(y=0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD8</name>
<description>Port E pull-down bit y
(y=0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD7</name>
<description>Port E pull-down bit y
(y=0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD6</name>
<description>Port E pull-down bit y
(y=0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD5</name>
<description>Port E pull-down bit y
(y=0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD4</name>
<description>Port E pull-down bit y
(y=0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD3</name>
<description>Port E pull-down bit y
(y=0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD2</name>
<description>Port E pull-down bit y
(y=0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD1</name>
<description>Port E pull-down bit y
(y=0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD0</name>
<description>Port E pull-down bit y
(y=0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>PUCRF</name>
<displayName>PUCRF</displayName>
<description>Power Port F pull-up control
register</description>
<addressOffset>0x48</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PU15</name>
<description>Port F pull-up bit y
(y=0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU14</name>
<description>Port F pull-up bit y
(y=0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU13</name>
<description>Port F pull-up bit y
(y=0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU12</name>
<description>Port F pull-up bit y
(y=0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU11</name>
<description>Port F pull-up bit y
(y=0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU10</name>
<description>Port F pull-up bit y
(y=0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU9</name>
<description>Port F pull-up bit y
(y=0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU8</name>
<description>Port F pull-up bit y
(y=0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU7</name>
<description>Port F pull-up bit y
(y=0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU6</name>
<description>Port F pull-up bit y
(y=0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU5</name>
<description>Port F pull-up bit y
(y=0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU4</name>
<description>Port F pull-up bit y
(y=0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU3</name>
<description>Port F pull-up bit y
(y=0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU2</name>
<description>Port F pull-up bit y
(y=0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU1</name>
<description>Port F pull-up bit y
(y=0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU0</name>
<description>Port F pull-up bit y
(y=0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>PDCRF</name>
<displayName>PDCRF</displayName>
<description>Power Port F pull-down control
register</description>
<addressOffset>0x4C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PD15</name>
<description>Port F pull-down bit y
(y=0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD14</name>
<description>Port F pull-down bit y
(y=0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD13</name>
<description>Port F pull-down bit y
(y=0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD12</name>
<description>Port F pull-down bit y
(y=0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD11</name>
<description>Port F pull-down bit y
(y=0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD10</name>
<description>Port F pull-down bit y
(y=0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD9</name>
<description>Port F pull-down bit y
(y=0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD8</name>
<description>Port F pull-down bit y
(y=0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD7</name>
<description>Port F pull-down bit y
(y=0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD6</name>
<description>Port F pull-down bit y
(y=0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD5</name>
<description>Port F pull-down bit y
(y=0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD4</name>
<description>Port F pull-down bit y
(y=0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD3</name>
<description>Port F pull-down bit y
(y=0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD2</name>
<description>Port F pull-down bit y
(y=0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD1</name>
<description>Port F pull-down bit y
(y=0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD0</name>
<description>Port F pull-down bit y
(y=0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>PUCRG</name>
<displayName>PUCRG</displayName>
<description>Power Port G pull-up control
register</description>
<addressOffset>0x50</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PU15</name>
<description>Port G pull-up bit y
(y=0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU14</name>
<description>Port G pull-up bit y
(y=0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU13</name>
<description>Port G pull-up bit y
(y=0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU12</name>
<description>Port G pull-up bit y
(y=0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU11</name>
<description>Port G pull-up bit y
(y=0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU10</name>
<description>Port G pull-up bit y
(y=0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU9</name>
<description>Port G pull-up bit y
(y=0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU8</name>
<description>Port G pull-up bit y
(y=0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU7</name>
<description>Port G pull-up bit y
(y=0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU6</name>
<description>Port G pull-up bit y
(y=0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU5</name>
<description>Port G pull-up bit y
(y=0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU4</name>
<description>Port G pull-up bit y
(y=0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU3</name>
<description>Port G pull-up bit y
(y=0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU2</name>
<description>Port G pull-up bit y
(y=0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU1</name>
<description>Port G pull-up bit y
(y=0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU0</name>
<description>Port G pull-up bit y
(y=0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>PDCRG</name>
<displayName>PDCRG</displayName>
<description>Power Port G pull-down control
register</description>
<addressOffset>0x54</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PD15</name>
<description>Port G pull-down bit y
(y=0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD14</name>
<description>Port G pull-down bit y
(y=0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD13</name>
<description>Port G pull-down bit y
(y=0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD12</name>
<description>Port G pull-down bit y
(y=0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD11</name>
<description>Port G pull-down bit y
(y=0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD10</name>
<description>Port G pull-down bit y
(y=0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD9</name>
<description>Port G pull-down bit y
(y=0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD8</name>
<description>Port G pull-down bit y
(y=0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD7</name>
<description>Port G pull-down bit y
(y=0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD6</name>
<description>Port G pull-down bit y
(y=0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD5</name>
<description>Port G pull-down bit y
(y=0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD4</name>
<description>Port G pull-down bit y
(y=0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD3</name>
<description>Port G pull-down bit y
(y=0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD2</name>
<description>Port G pull-down bit y
(y=0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD1</name>
<description>Port G pull-down bit y
(y=0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD0</name>
<description>Port G pull-down bit y
(y=0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>PUCRH</name>
<displayName>PUCRH</displayName>
<description>Power Port H pull-up control
register</description>
<addressOffset>0x58</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PU1</name>
<description>Port H pull-up bit y
(y=0..1)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PU0</name>
<description>Port H pull-up bit y
(y=0..1)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>PDCRH</name>
<displayName>PDCRH</displayName>
<description>Power Port H pull-down control
register</description>
<addressOffset>0x5C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PD1</name>
<description>Port H pull-down bit y
(y=0..1)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PD0</name>
<description>Port H pull-down bit y
(y=0..1)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>SYSCFG</name>
<description>System configuration controller</description>
<groupName>SYSCFG</groupName>
<baseAddress>0x40010000</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x30</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>MEMRMP</name>
<displayName>MEMRMP</displayName>
<description>memory remap register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FB_MODE</name>
<description>Flash Bank mode selection</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>QFS</name>
<description>QUADSPI memory mapping
swap</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MEM_MODE</name>
<description>Memory mapping selection</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
</field>
</fields>
</register>
<register>
<name>CFGR1</name>
<displayName>CFGR1</displayName>
<description>configuration register 1</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x7C000001</resetValue>
<fields>
<field>
<name>FPU_IE</name>
<description>Floating Point Unit interrupts enable
bits</description>
<bitOffset>26</bitOffset>
<bitWidth>6</bitWidth>
</field>
<field>
<name>I2C3_FMP</name>
<description>I2C3 Fast-mode Plus driving capability
activation</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>I2C2_FMP</name>
<description>I2C2 Fast-mode Plus driving capability
activation</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>I2C1_FMP</name>
<description>I2C1 Fast-mode Plus driving capability
activation</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>I2C_PB9_FMP</name>
<description>Fast-mode Plus (Fm+) driving capability
activation on PB9</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>I2C_PB8_FMP</name>
<description>Fast-mode Plus (Fm+) driving capability
activation on PB8</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>I2C_PB7_FMP</name>
<description>Fast-mode Plus (Fm+) driving capability
activation on PB7</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>I2C_PB6_FMP</name>
<description>Fast-mode Plus (Fm+) driving capability
activation on PB6</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BOOSTEN</name>
<description>I/O analog switch voltage booster
enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FWDIS</name>
<description>Firewall disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>EXTICR1</name>
<displayName>EXTICR1</displayName>
<description>external interrupt configuration register
1</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EXTI3</name>
<description>EXTI 3 configuration bits</description>
<bitOffset>12</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>EXTI2</name>
<description>EXTI 2 configuration bits</description>
<bitOffset>8</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>EXTI1</name>
<description>EXTI 1 configuration bits</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>EXTI0</name>
<description>EXTI 0 configuration bits</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
</field>
</fields>
</register>
<register>
<name>EXTICR2</name>
<displayName>EXTICR2</displayName>
<description>external interrupt configuration register
2</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EXTI7</name>
<description>EXTI 7 configuration bits</description>
<bitOffset>12</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>EXTI6</name>
<description>EXTI 6 configuration bits</description>
<bitOffset>8</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>EXTI5</name>
<description>EXTI 5 configuration bits</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>EXTI4</name>
<description>EXTI 4 configuration bits</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
</field>
</fields>
</register>
<register>
<name>EXTICR3</name>
<displayName>EXTICR3</displayName>
<description>external interrupt configuration register
3</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EXTI11</name>
<description>EXTI 11 configuration bits</description>
<bitOffset>12</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>EXTI10</name>
<description>EXTI 10 configuration bits</description>
<bitOffset>8</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>EXTI9</name>
<description>EXTI 9 configuration bits</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>EXTI8</name>
<description>EXTI 8 configuration bits</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
</field>
</fields>
</register>
<register>
<name>EXTICR4</name>
<displayName>EXTICR4</displayName>
<description>external interrupt configuration register
4</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EXTI15</name>
<description>EXTI15 configuration bits</description>
<bitOffset>12</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>EXTI14</name>
<description>EXTI14 configuration bits</description>
<bitOffset>8</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>EXTI13</name>
<description>EXTI13 configuration bits</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>EXTI12</name>
<description>EXTI12 configuration bits</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
</field>
</fields>
</register>
<register>
<name>SCSR</name>
<displayName>SCSR</displayName>
<description>SCSR</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SRAM2BSY</name>
<description>SRAM2 busy by erase
operation</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SRAM2ER</name>
<description>SRAM2 Erase</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CFGR2</name>
<displayName>CFGR2</displayName>
<description>CFGR2</description>
<addressOffset>0x1C</addressOffset>
<size>0x20</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SPF</name>
<description>SRAM2 parity error flag</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ECCL</name>
<description>ECC Lock</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PVDL</name>
<description>PVD lock enable bit</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SPL</name>
<description>SRAM2 parity lock bit</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CLL</name>
<description>OCKUP (Hardfault) output enable
bit</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>SWPR</name>
<displayName>SWPR</displayName>
<description>SWPR</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P31WP</name>
<description>SRAM2 page 31 write
protection</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P30WP</name>
<description>P30WP</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P29WP</name>
<description>P29WP</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P28WP</name>
<description>P28WP</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P27WP</name>
<description>P27WP</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P26WP</name>
<description>P26WP</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P25WP</name>
<description>P25WP</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P24WP</name>
<description>P24WP</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P23WP</name>
<description>P23WP</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P22WP</name>
<description>P22WP</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P21WP</name>
<description>P21WP</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P20WP</name>
<description>P20WP</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P19WP</name>
<description>P19WP</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P18WP</name>
<description>P18WP</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P17WP</name>
<description>P17WP</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P16WP</name>
<description>P16WP</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P15WP</name>
<description>P15WP</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P14WP</name>
<description>P14WP</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P13WP</name>
<description>P13WP</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P12WP</name>
<description>P12WP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P11WP</name>
<description>P11WP</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P10WP</name>
<description>P10WP</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P9WP</name>
<description>P9WP</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P8WP</name>
<description>P8WP</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P7WP</name>
<description>P7WP</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P6WP</name>
<description>P6WP</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P5WP</name>
<description>P5WP</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P4WP</name>
<description>P4WP</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P3WP</name>
<description>P3WP</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P2WP</name>
<description>P2WP</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P1WP</name>
<description>P1WP</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>P0WP</name>
<description>P0WP</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>SKR</name>
<displayName>SKR</displayName>
<description>SKR</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>KEY</name>
<description>SRAM2 write protection key for software
erase</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>RNG</name>
<description>Random number generator</description>
<groupName>RNG</groupName>
<baseAddress>0x50060800</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>RNG</name>
<description>RNG global interrupt</description>
<value>80</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<displayName>CR</displayName>
<description>control register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IE</name>
<description>Interrupt enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RNGEN</name>
<description>Random number generator
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>SR</name>
<displayName>SR</displayName>
<description>status register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SEIS</name>
<description>Seed error interrupt
status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CEIS</name>
<description>Clock error interrupt
status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SECS</name>
<description>Seed error current status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CECS</name>
<description>Clock error current status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DRDY</name>
<description>Data ready</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>DR</name>
<displayName>DR</displayName>
<description>data register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RNDATA</name>
<description>Random data</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>AES</name>
<description>Advanced encryption standard hardware
accelerator</description>
<groupName>AES</groupName>
<baseAddress>0x50060000</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>AES</name>
<description>AES global interrupt</description>
<value>79</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<displayName>CR</displayName>
<description>control register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMAOUTEN</name>
<description>Enable DMA management of data output
phase</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DMAINEN</name>
<description>Enable DMA management of data input
phase</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ERRIE</name>
<description>Error interrupt enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CCFIE</name>
<description>CCF flag interrupt enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ERRC</name>
<description>Error clear</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CCFC</name>
<description>Computation Complete Flag
Clear</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CHMOD</name>
<description>AES chaining mode</description>
<bitOffset>5</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>MODE</name>
<description>AES operating mode</description>
<bitOffset>3</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>DATATYPE</name>
<description>Data type selection (for data in and
data out to/from the cryptographic
block)</description>
<bitOffset>1</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>EN</name>
<description>AES enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>SR</name>
<displayName>SR</displayName>
<description>status register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WRERR</name>
<description>Write error flag</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RDERR</name>
<description>Read error flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CCF</name>
<description>Computation complete flag</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>DINR</name>
<displayName>DINR</displayName>
<description>data input register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AES_DINR</name>
<description>Data Input Register</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>DOUTR</name>
<displayName>DOUTR</displayName>
<description>data output register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AES_DOUTR</name>
<description>Data output register</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>KEYR0</name>
<displayName>KEYR0</displayName>
<description>key register 0</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AES_KEYR0</name>
<description>Data Output Register (LSB key
[31:0])</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>KEYR1</name>
<displayName>KEYR1</displayName>
<description>key register 1</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AES_KEYR1</name>
<description>AES key register (key
[63:32])</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>KEYR2</name>
<displayName>KEYR2</displayName>
<description>key register 2</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AES_KEYR2</name>
<description>AES key register (key
[95:64])</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>KEYR3</name>
<displayName>KEYR3</displayName>
<description>key register 3</description>
<addressOffset>0x1C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AES_KEYR3</name>
<description>AES key register (MSB key
[127:96])</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>IVR0</name>
<displayName>IVR0</displayName>
<description>initialization vector register
0</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AES_IVR0</name>
<description>initialization vector register (LSB IVR
[31:0])</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>IVR1</name>
<displayName>IVR1</displayName>
<description>initialization vector register
1</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AES_IVR1</name>
<description>Initialization Vector Register (IVR
[63:32])</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>IVR2</name>
<displayName>IVR2</displayName>
<description>initialization vector register
2</description>
<addressOffset>0x28</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AES_IVR2</name>
<description>Initialization Vector Register (IVR
[95:64])</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>IVR3</name>
<displayName>IVR3</displayName>
<description>initialization vector register
3</description>
<addressOffset>0x2C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AES_IVR3</name>
<description>Initialization Vector Register (MSB IVR
[127:96])</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>ADC</name>
<description>Analog-to-Digital Converter</description>
<groupName>ADC</groupName>
<baseAddress>0x50040000</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0xB9</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>ADC1</name>
<description>ADC1 and ADC2 global interrupt</description>
<value>18</value>
</interrupt>
<registers>
<register>
<name>ISR</name>
<displayName>ISR</displayName>
<description>interrupt and status register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>JQOVF</name>
<description>JQOVF</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AWD3</name>
<description>AWD3</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AWD2</name>
<description>AWD2</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AWD1</name>
<description>AWD1</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>JEOS</name>
<description>JEOS</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>JEOC</name>
<description>JEOC</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OVR</name>
<description>OVR</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EOS</name>
<description>EOS</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EOC</name>
<description>EOC</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EOSMP</name>
<description>EOSMP</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ADRDY</name>
<description>ADRDY</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>IER</name>
<displayName>IER</displayName>
<description>interrupt enable register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>JQOVFIE</name>
<description>JQOVFIE</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AWD3IE</name>
<description>AWD3IE</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AWD2IE</name>
<description>AWD2IE</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AWD1IE</name>
<description>AWD1IE</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>JEOSIE</name>
<description>JEOSIE</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>JEOCIE</name>
<description>JEOCIE</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OVRIE</name>
<description>OVRIE</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EOSIE</name>
<description>EOSIE</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EOCIE</name>
<description>EOCIE</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EOSMPIE</name>
<description>EOSMPIE</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ADRDYIE</name>
<description>ADRDYIE</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>CR</name>
<displayName>CR</displayName>
<description>control register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADCAL</name>
<description>ADCAL</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ADCALDIF</name>
<description>ADCALDIF</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DEEPPWD</name>
<description>DEEPPWD</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ADVREGEN</name>
<description>ADVREGEN</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>JADSTP</name>
<description>JADSTP</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ADSTP</name>
<description>ADSTP</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>JADSTART</name>
<description>JADSTART</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ADSTART</name>
<description>ADSTART</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ADDIS</name>
<description>ADDIS</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ADEN</name>
<description>ADEN</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>CFGR</name>
<displayName>CFGR</displayName>
<description>configuration register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AWDCH1CH</name>
<description>AWDCH1CH</description>
<bitOffset>26</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>JAUTO</name>
<description>JAUTO</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>JAWD1EN</name>
<description>JAWD1EN</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AWD1EN</name>
<description>AWD1EN</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AWD1SGL</name>
<description>AWD1SGL</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>JQM</name>
<description>JQM</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>JDISCEN</name>
<description>JDISCEN</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DISCNUM</name>
<description>DISCNUM</description>
<bitOffset>17</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>DISCEN</name>
<description>DISCEN</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AUTOFF</name>
<description>AUTOFF</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AUTDLY</name>
<description>AUTDLY</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CONT</name>
<description>CONT</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OVRMOD</name>
<description>OVRMOD</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EXTEN</name>
<description>EXTEN</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>EXTSEL</name>
<description>EXTSEL</description>
<bitOffset>6</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>ALIGN</name>
<description>ALIGN</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RES</name>
<description>RES</description>
<bitOffset>3</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>DMACFG</name>
<description>DMACFG</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DMAEN</name>
<description>DMAEN</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>CFGR2</name>
<displayName>CFGR2</displayName>
<description>configuration register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ROVSM</name>
<description>EXTEN</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TOVS</name>
<description>EXTSEL</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OVSS</name>
<description>ALIGN</description>
<bitOffset>5</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>OVSR</name>
<description>RES</description>
<bitOffset>2</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>JOVSE</name>
<description>DMACFG</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ROVSE</name>
<description>DMAEN</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>SMPR1</name>
<displayName>SMPR1</displayName>
<description>sample time register 1</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SMP9</name>
<description>SMP9</description>
<bitOffset>27</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>SMP8</name>
<description>SMP8</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>SMP7</name>
<description>SMP7</description>
<bitOffset>21</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>SMP6</name>
<description>SMP6</description>
<bitOffset>18</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>SMP5</name>
<description>SMP5</description>
<bitOffset>15</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>SMP4</name>
<description>SMP4</description>
<bitOffset>12</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>SMP3</name>
<description>SMP3</description>
<bitOffset>9</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>SMP2</name>
<description>SMP2</description>
<bitOffset>6</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>SMP1</name>
<description>SMP1</description>
<bitOffset>3</bitOffset>
<bitWidth>3</bitWidth>
</field>
</fields>
</register>
<register>
<name>SMPR2</name>
<displayName>SMPR2</displayName>
<description>sample time register 2</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SMP18</name>
<description>SMP18</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>SMP17</name>
<description>SMP17</description>
<bitOffset>21</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>SMP16</name>
<description>SMP16</description>
<bitOffset>18</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>SMP15</name>
<description>SMP15</description>
<bitOffset>15</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>SMP14</name>
<description>SMP14</description>
<bitOffset>12</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>SMP13</name>
<description>SMP13</description>
<bitOffset>9</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>SMP12</name>
<description>SMP12</description>
<bitOffset>6</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>SMP11</name>
<description>SMP11</description>
<bitOffset>3</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>SMP10</name>
<description>SMP10</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
</field>
</fields>
</register>
<register>
<name>TR1</name>
<displayName>TR1</displayName>
<description>watchdog threshold register 1</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0FFF0000</resetValue>
<fields>
<field>
<name>HT1</name>
<description>HT1</description>
<bitOffset>16</bitOffset>
<bitWidth>12</bitWidth>
</field>
<field>
<name>LT1</name>
<description>LT1</description>
<bitOffset>0</bitOffset>
<bitWidth>12</bitWidth>
</field>
</fields>
</register>
<register>
<name>TR2</name>
<displayName>TR2</displayName>
<description>watchdog threshold register</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0FFF0000</resetValue>
<fields>
<field>
<name>HT2</name>
<description>HT2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>LT2</name>
<description>LT2</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>TR3</name>
<displayName>TR3</displayName>
<description>watchdog threshold register 3</description>
<addressOffset>0x28</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0FFF0000</resetValue>
<fields>
<field>
<name>HT3</name>
<description>HT3</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>LT3</name>
<description>LT3</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>SQR1</name>
<displayName>SQR1</displayName>
<description>regular sequence register 1</description>
<addressOffset>0x30</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SQ4</name>
<description>SQ4</description>
<bitOffset>24</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>SQ3</name>
<description>SQ3</description>
<bitOffset>18</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>SQ2</name>
<description>SQ2</description>
<bitOffset>12</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>SQ1</name>
<description>SQ1</description>
<bitOffset>6</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>L3</name>
<description>L3</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
</field>
</fields>
</register>
<register>
<name>SQR2</name>
<displayName>SQR2</displayName>
<description>regular sequence register 2</description>
<addressOffset>0x34</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SQ9</name>
<description>SQ9</description>
<bitOffset>24</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>SQ8</name>
<description>SQ8</description>
<bitOffset>18</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>SQ7</name>
<description>SQ7</description>
<bitOffset>12</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>SQ6</name>
<description>SQ6</description>
<bitOffset>6</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>SQ5</name>
<description>SQ5</description>
<bitOffset>0</bitOffset>
<bitWidth>5</bitWidth>
</field>
</fields>
</register>
<register>
<name>SQR3</name>
<displayName>SQR3</displayName>
<description>regular sequence register 3</description>
<addressOffset>0x38</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SQ14</name>
<description>SQ14</description>
<bitOffset>24</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>SQ13</name>
<description>SQ13</description>
<bitOffset>18</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>SQ12</name>
<description>SQ12</description>
<bitOffset>12</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>SQ11</name>
<description>SQ11</description>
<bitOffset>6</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>SQ10</name>
<description>SQ10</description>
<bitOffset>0</bitOffset>
<bitWidth>5</bitWidth>
</field>
</fields>
</register>
<register>
<name>SQR4</name>
<displayName>SQR4</displayName>
<description>regular sequence register 4</description>
<addressOffset>0x3C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SQ16</name>
<description>SQ16</description>
<bitOffset>6</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>SQ15</name>
<description>SQ15</description>
<bitOffset>0</bitOffset>
<bitWidth>5</bitWidth>
</field>
</fields>
</register>
<register>
<name>DR</name>
<displayName>DR</displayName>
<description>regular Data Register</description>
<addressOffset>0x40</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>regularDATA</name>
<description>regularDATA</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>JSQR</name>
<displayName>JSQR</displayName>
<description>injected sequence register</description>
<addressOffset>0x4C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>JSQ4</name>
<description>JSQ4</description>
<bitOffset>26</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>JSQ3</name>
<description>JSQ3</description>
<bitOffset>20</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>JSQ2</name>
<description>JSQ2</description>
<bitOffset>14</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>JSQ1</name>
<description>JSQ1</description>
<bitOffset>8</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>JEXTEN</name>
<description>JEXTEN</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>JEXTSEL</name>
<description>JEXTSEL</description>
<bitOffset>2</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>JL</name>
<description>JL</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
</field>
</fields>
</register>
<register>
<name>OFR1</name>
<displayName>OFR1</displayName>
<description>offset register 1</description>
<addressOffset>0x60</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OFFSET1_EN</name>
<description>OFFSET1_EN</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OFFSET1_CH</name>
<description>OFFSET1_CH</description>
<bitOffset>26</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>OFFSET1</name>
<description>OFFSET1</description>
<bitOffset>0</bitOffset>
<bitWidth>12</bitWidth>
</field>
</fields>
</register>
<register>
<name>OFR2</name>
<displayName>OFR2</displayName>
<description>offset register 2</description>
<addressOffset>0x64</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OFFSET2_EN</name>
<description>OFFSET2_EN</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OFFSET2_CH</name>
<description>OFFSET2_CH</description>
<bitOffset>26</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>OFFSET2</name>
<description>OFFSET2</description>
<bitOffset>0</bitOffset>
<bitWidth>12</bitWidth>
</field>
</fields>
</register>
<register>
<name>OFR3</name>
<displayName>OFR3</displayName>
<description>offset register 3</description>
<addressOffset>0x68</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OFFSET3_EN</name>
<description>OFFSET3_EN</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OFFSET3_CH</name>
<description>OFFSET3_CH</description>
<bitOffset>26</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>OFFSET3</name>
<description>OFFSET3</description>
<bitOffset>0</bitOffset>
<bitWidth>12</bitWidth>
</field>
</fields>
</register>
<register>
<name>OFR4</name>
<displayName>OFR4</displayName>
<description>offset register 4</description>
<addressOffset>0x6C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OFFSET4_EN</name>
<description>OFFSET4_EN</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OFFSET4_CH</name>
<description>OFFSET4_CH</description>
<bitOffset>26</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>OFFSET4</name>
<description>OFFSET4</description>
<bitOffset>0</bitOffset>
<bitWidth>12</bitWidth>
</field>
</fields>
</register>
<register>
<name>JDR1</name>
<displayName>JDR1</displayName>
<description>injected data register 1</description>
<addressOffset>0x80</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>JDATA1</name>
<description>JDATA1</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>JDR2</name>
<displayName>JDR2</displayName>
<description>injected data register 2</description>
<addressOffset>0x84</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>JDATA2</name>
<description>JDATA2</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>JDR3</name>
<displayName>JDR3</displayName>
<description>injected data register 3</description>
<addressOffset>0x88</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>JDATA3</name>
<description>JDATA3</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>JDR4</name>
<displayName>JDR4</displayName>
<description>injected data register 4</description>
<addressOffset>0x8C</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>JDATA4</name>
<description>JDATA4</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>AWD2CR</name>
<displayName>AWD2CR</displayName>
<description>Analog Watchdog 2 Configuration
Register</description>
<addressOffset>0xA0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AWD2CH</name>
<description>AWD2CH</description>
<bitOffset>1</bitOffset>
<bitWidth>18</bitWidth>
</field>
</fields>
</register>
<register>
<name>AWD3CR</name>
<displayName>AWD3CR</displayName>
<description>Analog Watchdog 3 Configuration
Register</description>
<addressOffset>0xA4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AWD3CH</name>
<description>AWD3CH</description>
<bitOffset>1</bitOffset>
<bitWidth>18</bitWidth>
</field>
</fields>
</register>
<register>
<name>DIFSEL</name>
<displayName>DIFSEL</displayName>
<description>Differential Mode Selection Register
2</description>
<addressOffset>0xB0</addressOffset>
<size>0x20</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DIFSEL_1_15</name>
<description>Differential mode for channels 15 to
1</description>
<bitOffset>1</bitOffset>
<bitWidth>15</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DIFSEL_16_18</name>
<description>Differential mode for channels 18 to
16</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CALFACT</name>
<displayName>CALFACT</displayName>
<description>Calibration Factors</description>
<addressOffset>0xB4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CALFACT_D</name>
<description>CALFACT_D</description>
<bitOffset>16</bitOffset>
<bitWidth>7</bitWidth>
</field>
<field>
<name>CALFACT_S</name>
<description>CALFACT_S</description>
<bitOffset>0</bitOffset>
<bitWidth>7</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>GPIOA</name>
<description>General-purpose I/Os</description>
<groupName>GPIO</groupName>
<baseAddress>0x48000000</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>MODER</name>
<displayName>MODER</displayName>
<description>GPIO port mode register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0xA8000000</resetValue>
<fields>
<field>
<name>MODER15</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>30</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>MODER15</name><usage>read-write</usage><enumeratedValue><name>Input</name><description>Input mode (reset state)</description><value>0</value></enumeratedValue><enumeratedValue><name>Output</name><description>General purpose output mode</description><value>1</value></enumeratedValue><enumeratedValue><name>Alternate</name><description>Alternate function mode</description><value>2</value></enumeratedValue><enumeratedValue><name>Analog</name><description>Analog mode</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>MODER14</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER13</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>26</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER12</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER11</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER10</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER9</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER8</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER7</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER6</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER5</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER4</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER3</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER2</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER1</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER0</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
</fields>
</register>
<register>
<name>OTYPER</name>
<displayName>OTYPER</displayName>
<description>GPIO port output type register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OT15</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>OT15</name><usage>read-write</usage><enumeratedValue><name>PushPull</name><description>Output push-pull (reset state)</description><value>0</value></enumeratedValue><enumeratedValue><name>OpenDrain</name><description>Output open-drain</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>OT14</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT13</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT12</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT11</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT10</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT9</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT8</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT7</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT6</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT5</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT4</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT3</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT2</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT1</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT0</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
</fields>
</register>
<register>
<name>OSPEEDR</name>
<displayName>OSPEEDR</displayName>
<description>GPIO port output speed
register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OSPEEDR15</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>30</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>OSPEEDR15</name><usage>read-write</usage><enumeratedValue><name>LowSpeed</name><description>Low speed</description><value>0</value></enumeratedValue><enumeratedValue><name>MediumSpeed</name><description>Medium speed</description><value>1</value></enumeratedValue><enumeratedValue><name>HighSpeed</name><description>High speed</description><value>2</value></enumeratedValue><enumeratedValue><name>VeryHighSpeed</name><description>Very high speed</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>OSPEEDR14</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR13</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>26</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR12</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR11</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR10</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR9</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR8</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR7</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR6</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR5</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR4</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR3</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR2</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR1</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR0</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
</fields>
</register>
<register>
<name>PUPDR</name>
<displayName>PUPDR</displayName>
<description>GPIO port pull-up/pull-down
register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x64000000</resetValue>
<fields>
<field>
<name>PUPDR15</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>30</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>PUPDR15</name><usage>read-write</usage><enumeratedValue><name>Floating</name><description>No pull-up, pull-down</description><value>0</value></enumeratedValue><enumeratedValue><name>PullUp</name><description>Pull-up</description><value>1</value></enumeratedValue><enumeratedValue><name>PullDown</name><description>Pull-down</description><value>2</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PUPDR14</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR13</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>26</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR12</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR11</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR10</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR9</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR8</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR7</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR6</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR5</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR4</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR3</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR2</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR1</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR0</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
</fields>
</register>
<register>
<name>IDR</name>
<displayName>IDR</displayName>
<description>GPIO port input data register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IDR15</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>IDR15</name><usage>read-write</usage><enumeratedValue><name>High</name><description>Input is logic high</description><value>1</value></enumeratedValue><enumeratedValue><name>Low</name><description>Input is logic low</description><value>0</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>IDR14</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR13</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR12</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR11</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR10</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR9</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR8</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR7</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR6</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR5</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR4</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR3</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR2</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR1</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR0</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
</fields>
</register>
<register>
<name>ODR</name>
<displayName>ODR</displayName>
<description>GPIO port output data register</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ODR15</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ODR15</name><usage>read-write</usage><enumeratedValue><name>High</name><description>Set output to logic high</description><value>1</value></enumeratedValue><enumeratedValue><name>Low</name><description>Set output to logic low</description><value>0</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ODR14</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR13</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR12</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR11</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR10</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR9</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR8</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR7</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR6</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR5</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR4</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR3</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR2</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR1</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR0</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
</fields>
</register>
<register>
<name>BSRR</name>
<displayName>BSRR</displayName>
<description>GPIO port bit set/reset
register</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BR15</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>BR15W</name><usage>write</usage><enumeratedValue><name>Reset</name><description>Resets the corresponding ODRx bit</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>BR14</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR13</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR12</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR11</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR10</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR9</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR8</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR7</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR6</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR5</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR4</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR3</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR2</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR1</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR0</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BS15</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>BS15W</name><usage>write</usage><enumeratedValue><name>Set</name><description>Sets the corresponding ODRx bit</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>BS14</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS13</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS12</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS11</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS10</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS9</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS8</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS7</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS6</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS5</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS4</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS3</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS2</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS1</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS0</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
</fields>
</register>
<register>
<name>LCKR</name>
<displayName>LCKR</displayName>
<description>GPIO port configuration lock
register</description>
<addressOffset>0x1C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LCKK</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>LCKK</name><usage>read-write</usage><enumeratedValue><name>NotActive</name><description>Port configuration lock key not active</description><value>0</value></enumeratedValue><enumeratedValue><name>Active</name><description>Port configuration lock key active</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>LCK15</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>LCK15</name><usage>read-write</usage><enumeratedValue><name>Unlocked</name><description>Port configuration not locked</description><value>0</value></enumeratedValue><enumeratedValue><name>Locked</name><description>Port configuration locked</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>LCK14</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK15" />
</field>
<field>
<name>LCK13</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK15" />
</field>
<field>
<name>LCK12</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK15" />
</field>
<field>
<name>LCK11</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK15" />
</field>
<field>
<name>LCK10</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK15" />
</field>
<field>
<name>LCK9</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>LCK9</name><usage>read-write</usage><enumeratedValue><name>Unlocked</name><description>Port configuration not locked</description><value>0</value></enumeratedValue><enumeratedValue><name>Locked</name><description>Port configuration locked</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>LCK8</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
<field>
<name>LCK7</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
<field>
<name>LCK6</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
<field>
<name>LCK5</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
<field>
<name>LCK4</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
<field>
<name>LCK3</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
<field>
<name>LCK2</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
<field>
<name>LCK1</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
<field>
<name>LCK0</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
</fields>
</register>
<register>
<name>AFRL</name>
<displayName>AFRL</displayName>
<description>GPIO alternate function low
register</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AFRL7</name>
<description>Alternate function selection for port x
bit y (y = 0..7)</description>
<bitOffset>28</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues><name>AFRL7</name><usage>read-write</usage><enumeratedValue><name>AF0</name><description>AF0</description><value>0</value></enumeratedValue><enumeratedValue><name>AF1</name><description>AF1</description><value>1</value></enumeratedValue><enumeratedValue><name>AF2</name><description>AF2</description><value>2</value></enumeratedValue><enumeratedValue><name>AF3</name><description>AF3</description><value>3</value></enumeratedValue><enumeratedValue><name>AF4</name><description>AF4</description><value>4</value></enumeratedValue><enumeratedValue><name>AF5</name><description>AF5</description><value>5</value></enumeratedValue><enumeratedValue><name>AF6</name><description>AF6</description><value>6</value></enumeratedValue><enumeratedValue><name>AF7</name><description>AF7</description><value>7</value></enumeratedValue><enumeratedValue><name>AF8</name><description>AF8</description><value>8</value></enumeratedValue><enumeratedValue><name>AF9</name><description>AF9</description><value>9</value></enumeratedValue><enumeratedValue><name>AF10</name><description>AF10</description><value>10</value></enumeratedValue><enumeratedValue><name>AF11</name><description>AF11</description><value>11</value></enumeratedValue><enumeratedValue><name>AF12</name><description>AF12</description><value>12</value></enumeratedValue><enumeratedValue><name>AF13</name><description>AF13</description><value>13</value></enumeratedValue><enumeratedValue><name>AF14</name><description>AF14</description><value>14</value></enumeratedValue><enumeratedValue><name>AF15</name><description>AF15</description><value>15</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>AFRL6</name>
<description>Alternate function selection for port x
bit y (y = 0..7)</description>
<bitOffset>24</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRL7" />
</field>
<field>
<name>AFRL5</name>
<description>Alternate function selection for port x
bit y (y = 0..7)</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRL7" />
</field>
<field>
<name>AFRL4</name>
<description>Alternate function selection for port x
bit y (y = 0..7)</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRL7" />
</field>
<field>
<name>AFRL3</name>
<description>Alternate function selection for port x
bit y (y = 0..7)</description>
<bitOffset>12</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRL7" />
</field>
<field>
<name>AFRL2</name>
<description>Alternate function selection for port x
bit y (y = 0..7)</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRL7" />
</field>
<field>
<name>AFRL1</name>
<description>Alternate function selection for port x
bit y (y = 0..7)</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRL7" />
</field>
<field>
<name>AFRL0</name>
<description>Alternate function selection for port x
bit y (y = 0..7)</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRL7" />
</field>
</fields>
</register>
<register>
<name>AFRH</name>
<displayName>AFRH</displayName>
<description>GPIO alternate function high
register</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AFRH15</name>
<description>Alternate function selection for port x
bit y (y = 8..15)</description>
<bitOffset>28</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues><name>AFRH15</name><usage>read-write</usage><enumeratedValue><name>AF0</name><description>AF0</description><value>0</value></enumeratedValue><enumeratedValue><name>AF1</name><description>AF1</description><value>1</value></enumeratedValue><enumeratedValue><name>AF2</name><description>AF2</description><value>2</value></enumeratedValue><enumeratedValue><name>AF3</name><description>AF3</description><value>3</value></enumeratedValue><enumeratedValue><name>AF4</name><description>AF4</description><value>4</value></enumeratedValue><enumeratedValue><name>AF5</name><description>AF5</description><value>5</value></enumeratedValue><enumeratedValue><name>AF6</name><description>AF6</description><value>6</value></enumeratedValue><enumeratedValue><name>AF7</name><description>AF7</description><value>7</value></enumeratedValue><enumeratedValue><name>AF8</name><description>AF8</description><value>8</value></enumeratedValue><enumeratedValue><name>AF9</name><description>AF9</description><value>9</value></enumeratedValue><enumeratedValue><name>AF10</name><description>AF10</description><value>10</value></enumeratedValue><enumeratedValue><name>AF11</name><description>AF11</description><value>11</value></enumeratedValue><enumeratedValue><name>AF12</name><description>AF12</description><value>12</value></enumeratedValue><enumeratedValue><name>AF13</name><description>AF13</description><value>13</value></enumeratedValue><enumeratedValue><name>AF14</name><description>AF14</description><value>14</value></enumeratedValue><enumeratedValue><name>AF15</name><description>AF15</description><value>15</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>AFRH14</name>
<description>Alternate function selection for port x
bit y (y = 8..15)</description>
<bitOffset>24</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRH15" />
</field>
<field>
<name>AFRH13</name>
<description>Alternate function selection for port x
bit y (y = 8..15)</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRH15" />
</field>
<field>
<name>AFRH12</name>
<description>Alternate function selection for port x
bit y (y = 8..15)</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRH15" />
</field>
<field>
<name>AFRH11</name>
<description>Alternate function selection for port x
bit y (y = 8..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRH15" />
</field>
<field>
<name>AFRH10</name>
<description>Alternate function selection for port x
bit y (y = 8..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRH15" />
</field>
<field>
<name>AFRH9</name>
<description>Alternate function selection for port x
bit y (y = 8..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRH15" />
</field>
<field>
<name>AFRH8</name>
<description>Alternate function selection for port x
bit y (y = 8..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRH15" />
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>GPIOB</name>
<description>General-purpose I/Os</description>
<groupName>GPIO</groupName>
<baseAddress>0x48000400</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>MODER</name>
<displayName>MODER</displayName>
<description>GPIO port mode register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000280</resetValue>
<fields>
<field>
<name>MODER15</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>30</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>MODER15</name><usage>read-write</usage><enumeratedValue><name>Input</name><description>Input mode (reset state)</description><value>0</value></enumeratedValue><enumeratedValue><name>Output</name><description>General purpose output mode</description><value>1</value></enumeratedValue><enumeratedValue><name>Alternate</name><description>Alternate function mode</description><value>2</value></enumeratedValue><enumeratedValue><name>Analog</name><description>Analog mode</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>MODER14</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER13</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>26</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER12</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER11</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER10</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER9</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER8</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER7</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER6</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER5</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER4</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER3</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER2</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER1</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER0</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
</fields>
</register>
<register>
<name>OTYPER</name>
<displayName>OTYPER</displayName>
<description>GPIO port output type register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OT15</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>OT15</name><usage>read-write</usage><enumeratedValue><name>PushPull</name><description>Output push-pull (reset state)</description><value>0</value></enumeratedValue><enumeratedValue><name>OpenDrain</name><description>Output open-drain</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>OT14</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT13</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT12</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT11</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT10</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT9</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT8</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT7</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT6</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT5</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT4</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT3</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT2</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT1</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT0</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
</fields>
</register>
<register>
<name>OSPEEDR</name>
<displayName>OSPEEDR</displayName>
<description>GPIO port output speed
register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x000000C0</resetValue>
<fields>
<field>
<name>OSPEEDR15</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>30</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>OSPEEDR15</name><usage>read-write</usage><enumeratedValue><name>LowSpeed</name><description>Low speed</description><value>0</value></enumeratedValue><enumeratedValue><name>MediumSpeed</name><description>Medium speed</description><value>1</value></enumeratedValue><enumeratedValue><name>HighSpeed</name><description>High speed</description><value>2</value></enumeratedValue><enumeratedValue><name>VeryHighSpeed</name><description>Very high speed</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>OSPEEDR14</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR13</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>26</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR12</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR11</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR10</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR9</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR8</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR7</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR6</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR5</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR4</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR3</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR2</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR1</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR0</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
</fields>
</register>
<register>
<name>PUPDR</name>
<displayName>PUPDR</displayName>
<description>GPIO port pull-up/pull-down
register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000100</resetValue>
<fields>
<field>
<name>PUPDR15</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>30</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>PUPDR15</name><usage>read-write</usage><enumeratedValue><name>Floating</name><description>No pull-up, pull-down</description><value>0</value></enumeratedValue><enumeratedValue><name>PullUp</name><description>Pull-up</description><value>1</value></enumeratedValue><enumeratedValue><name>PullDown</name><description>Pull-down</description><value>2</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PUPDR14</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR13</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>26</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR12</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR11</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR10</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR9</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR8</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR7</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR6</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR5</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR4</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR3</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR2</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR1</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR0</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
</fields>
</register>
<register>
<name>IDR</name>
<displayName>IDR</displayName>
<description>GPIO port input data register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IDR15</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>IDR15</name><usage>read-write</usage><enumeratedValue><name>High</name><description>Input is logic high</description><value>1</value></enumeratedValue><enumeratedValue><name>Low</name><description>Input is logic low</description><value>0</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>IDR14</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR13</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR12</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR11</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR10</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR9</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR8</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR7</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR6</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR5</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR4</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR3</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR2</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR1</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR0</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
</fields>
</register>
<register>
<name>ODR</name>
<displayName>ODR</displayName>
<description>GPIO port output data register</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ODR15</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ODR15</name><usage>read-write</usage><enumeratedValue><name>High</name><description>Set output to logic high</description><value>1</value></enumeratedValue><enumeratedValue><name>Low</name><description>Set output to logic low</description><value>0</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ODR14</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR13</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR12</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR11</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR10</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR9</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR8</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR7</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR6</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR5</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR4</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR3</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR2</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR1</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR0</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
</fields>
</register>
<register>
<name>BSRR</name>
<displayName>BSRR</displayName>
<description>GPIO port bit set/reset
register</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BR15</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>BR15W</name><usage>write</usage><enumeratedValue><name>Reset</name><description>Resets the corresponding ODRx bit</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>BR14</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR13</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR12</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR11</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR10</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR9</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR8</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR7</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR6</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR5</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR4</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR3</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR2</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR1</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR0</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BS15</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>BS15W</name><usage>write</usage><enumeratedValue><name>Set</name><description>Sets the corresponding ODRx bit</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>BS14</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS13</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS12</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS11</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS10</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS9</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS8</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS7</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS6</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS5</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS4</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS3</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS2</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS1</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS0</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
</fields>
</register>
<register>
<name>LCKR</name>
<displayName>LCKR</displayName>
<description>GPIO port configuration lock
register</description>
<addressOffset>0x1C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LCKK</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>LCKK</name><usage>read-write</usage><enumeratedValue><name>NotActive</name><description>Port configuration lock key not active</description><value>0</value></enumeratedValue><enumeratedValue><name>Active</name><description>Port configuration lock key active</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>LCK15</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>LCK15</name><usage>read-write</usage><enumeratedValue><name>Unlocked</name><description>Port configuration not locked</description><value>0</value></enumeratedValue><enumeratedValue><name>Locked</name><description>Port configuration locked</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>LCK14</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK15" />
</field>
<field>
<name>LCK13</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK15" />
</field>
<field>
<name>LCK12</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK15" />
</field>
<field>
<name>LCK11</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK15" />
</field>
<field>
<name>LCK10</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK15" />
</field>
<field>
<name>LCK9</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>LCK9</name><usage>read-write</usage><enumeratedValue><name>Unlocked</name><description>Port configuration not locked</description><value>0</value></enumeratedValue><enumeratedValue><name>Locked</name><description>Port configuration locked</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>LCK8</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
<field>
<name>LCK7</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
<field>
<name>LCK6</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
<field>
<name>LCK5</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
<field>
<name>LCK4</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
<field>
<name>LCK3</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
<field>
<name>LCK2</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
<field>
<name>LCK1</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
<field>
<name>LCK0</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
</fields>
</register>
<register>
<name>AFRL</name>
<displayName>AFRL</displayName>
<description>GPIO alternate function low
register</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AFRL7</name>
<description>Alternate function selection for port x
bit y (y = 0..7)</description>
<bitOffset>28</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues><name>AFRL7</name><usage>read-write</usage><enumeratedValue><name>AF0</name><description>AF0</description><value>0</value></enumeratedValue><enumeratedValue><name>AF1</name><description>AF1</description><value>1</value></enumeratedValue><enumeratedValue><name>AF2</name><description>AF2</description><value>2</value></enumeratedValue><enumeratedValue><name>AF3</name><description>AF3</description><value>3</value></enumeratedValue><enumeratedValue><name>AF4</name><description>AF4</description><value>4</value></enumeratedValue><enumeratedValue><name>AF5</name><description>AF5</description><value>5</value></enumeratedValue><enumeratedValue><name>AF6</name><description>AF6</description><value>6</value></enumeratedValue><enumeratedValue><name>AF7</name><description>AF7</description><value>7</value></enumeratedValue><enumeratedValue><name>AF8</name><description>AF8</description><value>8</value></enumeratedValue><enumeratedValue><name>AF9</name><description>AF9</description><value>9</value></enumeratedValue><enumeratedValue><name>AF10</name><description>AF10</description><value>10</value></enumeratedValue><enumeratedValue><name>AF11</name><description>AF11</description><value>11</value></enumeratedValue><enumeratedValue><name>AF12</name><description>AF12</description><value>12</value></enumeratedValue><enumeratedValue><name>AF13</name><description>AF13</description><value>13</value></enumeratedValue><enumeratedValue><name>AF14</name><description>AF14</description><value>14</value></enumeratedValue><enumeratedValue><name>AF15</name><description>AF15</description><value>15</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>AFRL6</name>
<description>Alternate function selection for port x
bit y (y = 0..7)</description>
<bitOffset>24</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRL7" />
</field>
<field>
<name>AFRL5</name>
<description>Alternate function selection for port x
bit y (y = 0..7)</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRL7" />
</field>
<field>
<name>AFRL4</name>
<description>Alternate function selection for port x
bit y (y = 0..7)</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRL7" />
</field>
<field>
<name>AFRL3</name>
<description>Alternate function selection for port x
bit y (y = 0..7)</description>
<bitOffset>12</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRL7" />
</field>
<field>
<name>AFRL2</name>
<description>Alternate function selection for port x
bit y (y = 0..7)</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRL7" />
</field>
<field>
<name>AFRL1</name>
<description>Alternate function selection for port x
bit y (y = 0..7)</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRL7" />
</field>
<field>
<name>AFRL0</name>
<description>Alternate function selection for port x
bit y (y = 0..7)</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRL7" />
</field>
</fields>
</register>
<register>
<name>AFRH</name>
<displayName>AFRH</displayName>
<description>GPIO alternate function high
register</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AFRH15</name>
<description>Alternate function selection for port x
bit y (y = 8..15)</description>
<bitOffset>28</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues><name>AFRH15</name><usage>read-write</usage><enumeratedValue><name>AF0</name><description>AF0</description><value>0</value></enumeratedValue><enumeratedValue><name>AF1</name><description>AF1</description><value>1</value></enumeratedValue><enumeratedValue><name>AF2</name><description>AF2</description><value>2</value></enumeratedValue><enumeratedValue><name>AF3</name><description>AF3</description><value>3</value></enumeratedValue><enumeratedValue><name>AF4</name><description>AF4</description><value>4</value></enumeratedValue><enumeratedValue><name>AF5</name><description>AF5</description><value>5</value></enumeratedValue><enumeratedValue><name>AF6</name><description>AF6</description><value>6</value></enumeratedValue><enumeratedValue><name>AF7</name><description>AF7</description><value>7</value></enumeratedValue><enumeratedValue><name>AF8</name><description>AF8</description><value>8</value></enumeratedValue><enumeratedValue><name>AF9</name><description>AF9</description><value>9</value></enumeratedValue><enumeratedValue><name>AF10</name><description>AF10</description><value>10</value></enumeratedValue><enumeratedValue><name>AF11</name><description>AF11</description><value>11</value></enumeratedValue><enumeratedValue><name>AF12</name><description>AF12</description><value>12</value></enumeratedValue><enumeratedValue><name>AF13</name><description>AF13</description><value>13</value></enumeratedValue><enumeratedValue><name>AF14</name><description>AF14</description><value>14</value></enumeratedValue><enumeratedValue><name>AF15</name><description>AF15</description><value>15</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>AFRH14</name>
<description>Alternate function selection for port x
bit y (y = 8..15)</description>
<bitOffset>24</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRH15" />
</field>
<field>
<name>AFRH13</name>
<description>Alternate function selection for port x
bit y (y = 8..15)</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRH15" />
</field>
<field>
<name>AFRH12</name>
<description>Alternate function selection for port x
bit y (y = 8..15)</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRH15" />
</field>
<field>
<name>AFRH11</name>
<description>Alternate function selection for port x
bit y (y = 8..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRH15" />
</field>
<field>
<name>AFRH10</name>
<description>Alternate function selection for port x
bit y (y = 8..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRH15" />
</field>
<field>
<name>AFRH9</name>
<description>Alternate function selection for port x
bit y (y = 8..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRH15" />
</field>
<field>
<name>AFRH8</name>
<description>Alternate function selection for port x
bit y (y = 8..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRH15" />
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>GPIOC</name>
<description>General-purpose I/Os</description>
<groupName>GPIO</groupName>
<baseAddress>0x48000800</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>MODER</name>
<displayName>MODER</displayName>
<description>GPIO port mode register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MODER15</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>30</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>MODER15</name><usage>read-write</usage><enumeratedValue><name>Input</name><description>Input mode (reset state)</description><value>0</value></enumeratedValue><enumeratedValue><name>Output</name><description>General purpose output mode</description><value>1</value></enumeratedValue><enumeratedValue><name>Alternate</name><description>Alternate function mode</description><value>2</value></enumeratedValue><enumeratedValue><name>Analog</name><description>Analog mode</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>MODER14</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER13</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>26</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER12</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER11</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER10</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER9</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER8</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER7</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER6</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER5</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER4</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER3</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER2</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER1</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
<field>
<name>MODER0</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="MODER15" />
</field>
</fields>
</register>
<register>
<name>OTYPER</name>
<displayName>OTYPER</displayName>
<description>GPIO port output type register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OT15</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>OT15</name><usage>read-write</usage><enumeratedValue><name>PushPull</name><description>Output push-pull (reset state)</description><value>0</value></enumeratedValue><enumeratedValue><name>OpenDrain</name><description>Output open-drain</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>OT14</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT13</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT12</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT11</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT10</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT9</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT8</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT7</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT6</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT5</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT4</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT3</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT2</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT1</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
<field>
<name>OT0</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="OT15" />
</field>
</fields>
</register>
<register>
<name>OSPEEDR</name>
<displayName>OSPEEDR</displayName>
<description>GPIO port output speed
register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OSPEEDR15</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>30</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>OSPEEDR15</name><usage>read-write</usage><enumeratedValue><name>LowSpeed</name><description>Low speed</description><value>0</value></enumeratedValue><enumeratedValue><name>MediumSpeed</name><description>Medium speed</description><value>1</value></enumeratedValue><enumeratedValue><name>HighSpeed</name><description>High speed</description><value>2</value></enumeratedValue><enumeratedValue><name>VeryHighSpeed</name><description>Very high speed</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>OSPEEDR14</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR13</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>26</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR12</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR11</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR10</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR9</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR8</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR7</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR6</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR5</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR4</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR3</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR2</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR1</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
<field>
<name>OSPEEDR0</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="OSPEEDR15" />
</field>
</fields>
</register>
<register>
<name>PUPDR</name>
<displayName>PUPDR</displayName>
<description>GPIO port pull-up/pull-down
register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PUPDR15</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>30</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>PUPDR15</name><usage>read-write</usage><enumeratedValue><name>Floating</name><description>No pull-up, pull-down</description><value>0</value></enumeratedValue><enumeratedValue><name>PullUp</name><description>Pull-up</description><value>1</value></enumeratedValue><enumeratedValue><name>PullDown</name><description>Pull-down</description><value>2</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PUPDR14</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR13</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>26</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR12</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR11</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR10</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR9</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR8</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR7</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR6</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR5</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR4</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR3</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR2</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR1</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
<field>
<name>PUPDR0</name>
<description>Port x configuration bits (y =
0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues derivedFrom="PUPDR15" />
</field>
</fields>
</register>
<register>
<name>IDR</name>
<displayName>IDR</displayName>
<description>GPIO port input data register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IDR15</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>IDR15</name><usage>read-write</usage><enumeratedValue><name>High</name><description>Input is logic high</description><value>1</value></enumeratedValue><enumeratedValue><name>Low</name><description>Input is logic low</description><value>0</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>IDR14</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR13</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR12</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR11</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR10</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR9</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR8</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR7</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR6</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR5</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR4</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR3</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR2</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR1</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
<field>
<name>IDR0</name>
<description>Port input data (y =
0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="IDR15" />
</field>
</fields>
</register>
<register>
<name>ODR</name>
<displayName>ODR</displayName>
<description>GPIO port output data register</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ODR15</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ODR15</name><usage>read-write</usage><enumeratedValue><name>High</name><description>Set output to logic high</description><value>1</value></enumeratedValue><enumeratedValue><name>Low</name><description>Set output to logic low</description><value>0</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ODR14</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR13</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR12</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR11</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR10</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR9</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR8</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR7</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR6</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR5</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR4</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR3</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR2</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR1</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
<field>
<name>ODR0</name>
<description>Port output data (y =
0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="ODR15" />
</field>
</fields>
</register>
<register>
<name>BSRR</name>
<displayName>BSRR</displayName>
<description>GPIO port bit set/reset
register</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BR15</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>BR15W</name><usage>write</usage><enumeratedValue><name>Reset</name><description>Resets the corresponding ODRx bit</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>BR14</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR13</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR12</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR11</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR10</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR9</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR8</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR7</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR6</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR5</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR4</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR3</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR2</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR1</name>
<description>Port x reset bit y (y =
0..15)</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BR0</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BR15W" />
</field>
<field>
<name>BS15</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>BS15W</name><usage>write</usage><enumeratedValue><name>Set</name><description>Sets the corresponding ODRx bit</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>BS14</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS13</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS12</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS11</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS10</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS9</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS8</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS7</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS6</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS5</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS4</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS3</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS2</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS1</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
<field>
<name>BS0</name>
<description>Port x set bit y (y=
0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="BS15W" />
</field>
</fields>
</register>
<register>
<name>LCKR</name>
<displayName>LCKR</displayName>
<description>GPIO port configuration lock
register</description>
<addressOffset>0x1C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LCKK</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>LCKK</name><usage>read-write</usage><enumeratedValue><name>NotActive</name><description>Port configuration lock key not active</description><value>0</value></enumeratedValue><enumeratedValue><name>Active</name><description>Port configuration lock key active</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>LCK15</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>LCK15</name><usage>read-write</usage><enumeratedValue><name>Unlocked</name><description>Port configuration not locked</description><value>0</value></enumeratedValue><enumeratedValue><name>Locked</name><description>Port configuration locked</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>LCK14</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK15" />
</field>
<field>
<name>LCK13</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK15" />
</field>
<field>
<name>LCK12</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK15" />
</field>
<field>
<name>LCK11</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK15" />
</field>
<field>
<name>LCK10</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK15" />
</field>
<field>
<name>LCK9</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>LCK9</name><usage>read-write</usage><enumeratedValue><name>Unlocked</name><description>Port configuration not locked</description><value>0</value></enumeratedValue><enumeratedValue><name>Locked</name><description>Port configuration locked</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>LCK8</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
<field>
<name>LCK7</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
<field>
<name>LCK6</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
<field>
<name>LCK5</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
<field>
<name>LCK4</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
<field>
<name>LCK3</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
<field>
<name>LCK2</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
<field>
<name>LCK1</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
<field>
<name>LCK0</name>
<description>Port x lock bit y (y=
0..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="LCK9" />
</field>
</fields>
</register>
<register>
<name>AFRL</name>
<displayName>AFRL</displayName>
<description>GPIO alternate function low
register</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AFRL7</name>
<description>Alternate function selection for port x
bit y (y = 0..7)</description>
<bitOffset>28</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues><name>AFRL7</name><usage>read-write</usage><enumeratedValue><name>AF0</name><description>AF0</description><value>0</value></enumeratedValue><enumeratedValue><name>AF1</name><description>AF1</description><value>1</value></enumeratedValue><enumeratedValue><name>AF2</name><description>AF2</description><value>2</value></enumeratedValue><enumeratedValue><name>AF3</name><description>AF3</description><value>3</value></enumeratedValue><enumeratedValue><name>AF4</name><description>AF4</description><value>4</value></enumeratedValue><enumeratedValue><name>AF5</name><description>AF5</description><value>5</value></enumeratedValue><enumeratedValue><name>AF6</name><description>AF6</description><value>6</value></enumeratedValue><enumeratedValue><name>AF7</name><description>AF7</description><value>7</value></enumeratedValue><enumeratedValue><name>AF8</name><description>AF8</description><value>8</value></enumeratedValue><enumeratedValue><name>AF9</name><description>AF9</description><value>9</value></enumeratedValue><enumeratedValue><name>AF10</name><description>AF10</description><value>10</value></enumeratedValue><enumeratedValue><name>AF11</name><description>AF11</description><value>11</value></enumeratedValue><enumeratedValue><name>AF12</name><description>AF12</description><value>12</value></enumeratedValue><enumeratedValue><name>AF13</name><description>AF13</description><value>13</value></enumeratedValue><enumeratedValue><name>AF14</name><description>AF14</description><value>14</value></enumeratedValue><enumeratedValue><name>AF15</name><description>AF15</description><value>15</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>AFRL6</name>
<description>Alternate function selection for port x
bit y (y = 0..7)</description>
<bitOffset>24</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRL7" />
</field>
<field>
<name>AFRL5</name>
<description>Alternate function selection for port x
bit y (y = 0..7)</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRL7" />
</field>
<field>
<name>AFRL4</name>
<description>Alternate function selection for port x
bit y (y = 0..7)</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRL7" />
</field>
<field>
<name>AFRL3</name>
<description>Alternate function selection for port x
bit y (y = 0..7)</description>
<bitOffset>12</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRL7" />
</field>
<field>
<name>AFRL2</name>
<description>Alternate function selection for port x
bit y (y = 0..7)</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRL7" />
</field>
<field>
<name>AFRL1</name>
<description>Alternate function selection for port x
bit y (y = 0..7)</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRL7" />
</field>
<field>
<name>AFRL0</name>
<description>Alternate function selection for port x
bit y (y = 0..7)</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRL7" />
</field>
</fields>
</register>
<register>
<name>AFRH</name>
<displayName>AFRH</displayName>
<description>GPIO alternate function high
register</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AFRH15</name>
<description>Alternate function selection for port x
bit y (y = 8..15)</description>
<bitOffset>28</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues><name>AFRH15</name><usage>read-write</usage><enumeratedValue><name>AF0</name><description>AF0</description><value>0</value></enumeratedValue><enumeratedValue><name>AF1</name><description>AF1</description><value>1</value></enumeratedValue><enumeratedValue><name>AF2</name><description>AF2</description><value>2</value></enumeratedValue><enumeratedValue><name>AF3</name><description>AF3</description><value>3</value></enumeratedValue><enumeratedValue><name>AF4</name><description>AF4</description><value>4</value></enumeratedValue><enumeratedValue><name>AF5</name><description>AF5</description><value>5</value></enumeratedValue><enumeratedValue><name>AF6</name><description>AF6</description><value>6</value></enumeratedValue><enumeratedValue><name>AF7</name><description>AF7</description><value>7</value></enumeratedValue><enumeratedValue><name>AF8</name><description>AF8</description><value>8</value></enumeratedValue><enumeratedValue><name>AF9</name><description>AF9</description><value>9</value></enumeratedValue><enumeratedValue><name>AF10</name><description>AF10</description><value>10</value></enumeratedValue><enumeratedValue><name>AF11</name><description>AF11</description><value>11</value></enumeratedValue><enumeratedValue><name>AF12</name><description>AF12</description><value>12</value></enumeratedValue><enumeratedValue><name>AF13</name><description>AF13</description><value>13</value></enumeratedValue><enumeratedValue><name>AF14</name><description>AF14</description><value>14</value></enumeratedValue><enumeratedValue><name>AF15</name><description>AF15</description><value>15</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>AFRH14</name>
<description>Alternate function selection for port x
bit y (y = 8..15)</description>
<bitOffset>24</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRH15" />
</field>
<field>
<name>AFRH13</name>
<description>Alternate function selection for port x
bit y (y = 8..15)</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRH15" />
</field>
<field>
<name>AFRH12</name>
<description>Alternate function selection for port x
bit y (y = 8..15)</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRH15" />
</field>
<field>
<name>AFRH11</name>
<description>Alternate function selection for port x
bit y (y = 8..15)</description>
<bitOffset>12</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRH15" />
</field>
<field>
<name>AFRH10</name>
<description>Alternate function selection for port x
bit y (y = 8..15)</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRH15" />
</field>
<field>
<name>AFRH9</name>
<description>Alternate function selection for port x
bit y (y = 8..15)</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRH15" />
</field>
<field>
<name>AFRH8</name>
<description>Alternate function selection for port x
bit y (y = 8..15)</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues derivedFrom="AFRH15" />
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral derivedFrom="GPIOC">
<name>GPIOD</name>
<baseAddress>0x48000C00</baseAddress>
</peripheral>
<peripheral derivedFrom="GPIOC">
<name>GPIOE</name>
<baseAddress>0x48001000</baseAddress>
</peripheral>
<peripheral derivedFrom="GPIOC">
<name>GPIOH</name>
<baseAddress>0x48001C00</baseAddress>
</peripheral>
<peripheral>
<name>SAI1</name>
<description>Serial audio interface</description>
<groupName>SAI</groupName>
<baseAddress>0x40015400</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>SAI1</name>
<description>SAI1 global interrupt</description>
<value>74</value>
</interrupt>
<registers>
<cluster><name>CH%s</name><description>Cluster CH%s, containing ?CR1, ?CR2, ?FRCR, ?SLOTR, ?IM, ?SR, ?CLRFR, ?DR</description><addressOffset>0x4</addressOffset><register>
<name>CR1</name>
<displayName>ACR1</displayName>
<description>AConfiguration register 1</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>MCJDIV</name>
<description>Master clock divider</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>NODIV</name>
<description>No divider</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DMAEN</name>
<description>DMA enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SAIAEN</name>
<description>Audio block A enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OutDri</name>
<description>Output drive</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MONO</name>
<description>Mono mode</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SYNCEN</name>
<description>Synchronization enable</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>CKSTR</name>
<description>Clock strobing edge</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LSBFIRST</name>
<description>Least significant bit
first</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DS</name>
<description>Data size</description>
<bitOffset>5</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>PRTCFG</name>
<description>Protocol configuration</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>MODE</name>
<description>Audio block mode</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
</field>
</fields>
</register>
<register>
<name>CR2</name>
<displayName>ACR2</displayName>
<description>AConfiguration register 2</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>COMP</name>
<description>Companding mode</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>CPL</name>
<description>Complement bit</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MUTECN</name>
<description>Mute counter</description>
<bitOffset>7</bitOffset>
<bitWidth>6</bitWidth>
</field>
<field>
<name>MUTEVAL</name>
<description>Mute value</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MUTE</name>
<description>Mute</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TRIS</name>
<description>Tristate management on data
line</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FFLUS</name>
<description>FIFO flush</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FTH</name>
<description>FIFO threshold</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
</field>
</fields>
</register>
<register>
<name>FRCR</name>
<displayName>AFRCR</displayName>
<description>AFRCR</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000007</resetValue>
<fields>
<field>
<name>FSOFF</name>
<description>Frame synchronization
offset</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FSPOL</name>
<description>Frame synchronization
polarity</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FSDEF</name>
<description>Frame synchronization
definition</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FSALL</name>
<description>Frame synchronization active level
length</description>
<bitOffset>8</bitOffset>
<bitWidth>7</bitWidth>
</field>
<field>
<name>FRL</name>
<description>Frame length</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>SLOTR</name>
<displayName>ASLOTR</displayName>
<description>ASlot register</description>
<addressOffset>0xc</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SLOTEN</name>
<description>Slot enable</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
</field>
<field>
<name>NBSLOT</name>
<description>Number of slots in an audio
frame</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>SLOTSZ</name>
<description>Slot size</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>FBOFF</name>
<description>First bit offset</description>
<bitOffset>0</bitOffset>
<bitWidth>5</bitWidth>
</field>
</fields>
</register>
<register>
<name>IM</name>
<displayName>AIM</displayName>
<description>AInterrupt mask register2</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LFSDET</name>
<description>Late frame synchronization detection
interrupt enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AFSDETIE</name>
<description>Anticipated frame synchronization
detection interrupt enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CNRDYIE</name>
<description>Codec not ready interrupt
enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FREQIE</name>
<description>FIFO request interrupt
enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WCKCFG</name>
<description>Wrong clock configuration interrupt
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MUTEDET</name>
<description>Mute detection interrupt
enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OVRUDRIE</name>
<description>Overrun/underrun interrupt
enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>SR</name>
<displayName>ASR</displayName>
<description>AStatus register</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FLVL</name>
<description>FIFO level threshold</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>LFSDET</name>
<description>Late frame synchronization
detection</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AFSDET</name>
<description>Anticipated frame synchronization
detection</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CNRDY</name>
<description>Codec not ready</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FREQ</name>
<description>FIFO request</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WCKCFG</name>
<description>Wrong clock configuration flag. This bit
is read only</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MUTEDET</name>
<description>Mute detection</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OVRUDR</name>
<description>Overrun / underrun</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>CLRFR</name>
<displayName>ACLRFR</displayName>
<description>AClear flag register</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LFSDET</name>
<description>Clear late frame synchronization
detection flag</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CAFSDET</name>
<description>Clear anticipated frame synchronization
detection flag</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CNRDY</name>
<description>Clear codec not ready flag</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WCKCFG</name>
<description>Clear wrong clock configuration
flag</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MUTEDET</name>
<description>Mute detection flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OVRUDR</name>
<description>Clear overrun / underrun</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>DR</name>
<displayName>ADR</displayName>
<description>AData register</description>
<addressOffset>0x1c</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DATA</name>
<description>Data</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<dim>2</dim><dimIndex>A,B</dimIndex><dimIncrement>0x20</dimIncrement></cluster></registers>
</peripheral>
<peripheral>
<name>TIM2</name>
<description>General-purpose-timers</description>
<groupName>TIM</groupName>
<baseAddress>0x40000000</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>TIM2</name>
<description>TIM2 global interrupt</description>
<value>28</value>
</interrupt>
<registers>
<register>
<name>CR1</name>
<displayName>CR1</displayName>
<description>control register 1</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>CKD</name>
<description>Clock division</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>CKD</name><usage>read-write</usage><enumeratedValue><name>NotDivided</name><description>CK_INT not divided</description><value>0</value></enumeratedValue><enumeratedValue><name>DividedBy2</name><description>CK_INT divided by 2</description><value>1</value></enumeratedValue><enumeratedValue><name>DividedBy4</name><description>CK_INT divided by 4</description><value>2</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ARPE</name>
<description>Auto-reload preload enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ARPE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>TIMx_APRR register is not buffered</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>TIMx_APRR register is buffered</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CMS</name>
<description>Center-aligned mode
selection</description>
<bitOffset>5</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>DIR</name>
<description>Direction</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OPM</name>
<description>One-pulse mode</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>OPM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Counter is not stopped at update event</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Counter stops counting at the next update event (clearing the CEN bit)</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>URS</name>
<description>Update request source</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>URS</name><usage>read-write</usage><enumeratedValue><name>AnyEvent</name><description>Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request</description><value>0</value></enumeratedValue><enumeratedValue><name>CounterOnly</name><description>Only counter overflow/underflow generates an update interrupt or DMA request</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>UDIS</name>
<description>Update disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UDIS</name><usage>read-write</usage><enumeratedValue><name>Enabled</name><description>Update event enabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Disabled</name><description>Update event disabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CEN</name>
<description>Counter enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Counter disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Counter enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CR2</name>
<displayName>CR2</displayName>
<description>control register 2</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>TI1S</name>
<description>TI1 selection</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TI1S</name><usage>read-write</usage><enumeratedValue><name>Normal</name><description>The TIMx_CH1 pin is connected to TI1 input</description><value>0</value></enumeratedValue><enumeratedValue><name>XOR</name><description>The TIMx_CH1, CH2, CH3 pins are connected to TI1 input</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>MMS</name>
<description>Master mode selection</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
<enumeratedValues><name>MMS</name><usage>read-write</usage><enumeratedValue><name>Reset</name><description>The UG bit from the TIMx_EGR register is used as trigger output</description><value>0</value></enumeratedValue><enumeratedValue><name>Enable</name><description>The counter enable signal, CNT_EN, is used as trigger output</description><value>1</value></enumeratedValue><enumeratedValue><name>Update</name><description>The update event is selected as trigger output</description><value>2</value></enumeratedValue><enumeratedValue><name>ComparePulse</name><description>The trigger output send a positive pulse when the CC1IF flag it to be set, as soon as a capture or a compare match occurred</description><value>3</value></enumeratedValue><enumeratedValue><name>CompareOC1</name><description>OC1REF signal is used as trigger output</description><value>4</value></enumeratedValue><enumeratedValue><name>CompareOC2</name><description>OC2REF signal is used as trigger output</description><value>5</value></enumeratedValue><enumeratedValue><name>CompareOC3</name><description>OC3REF signal is used as trigger output</description><value>6</value></enumeratedValue><enumeratedValue><name>CompareOC4</name><description>OC4REF signal is used as trigger output</description><value>7</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CCDS</name>
<description>Capture/compare DMA
selection</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CCDS</name><usage>read-write</usage><enumeratedValue><name>OnCompare</name><description>CCx DMA request sent when CCx event occurs</description><value>0</value></enumeratedValue><enumeratedValue><name>OnUpdate</name><description>CCx DMA request sent when update event occurs</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SMCR</name>
<displayName>SMCR</displayName>
<description>slave mode control register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>ETP</name>
<description>External trigger polarity</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ETP</name><usage>read-write</usage><enumeratedValue><name>NotInverted</name><description>ETR is noninverted, active at high level or rising edge</description><value>0</value></enumeratedValue><enumeratedValue><name>Inverted</name><description>ETR is inverted, active at low level or falling edge</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ECE</name>
<description>External clock enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ECE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>External clock mode 2 disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>External clock mode 2 enabled. The counter is clocked by any active edge on the ETRF signal.</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ETPS</name>
<description>External trigger prescaler</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>ETPS</name><usage>read-write</usage><enumeratedValue><name>NoDiv</name><description>Prescaler OFF</description><value>0</value></enumeratedValue><enumeratedValue><name>Div2</name><description>ETRP frequency divided by 2</description><value>1</value></enumeratedValue><enumeratedValue><name>Div4</name><description>ETRP frequency divided by 4</description><value>2</value></enumeratedValue><enumeratedValue><name>Div8</name><description>ETRP frequency divided by 8</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ETF</name>
<description>External trigger filter</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues><name>ETF</name><usage>read-write</usage><enumeratedValue><name>NoFilter</name><description>No filter, sampling is done at fDTS</description><value>0</value></enumeratedValue><enumeratedValue><name>FCK_INT_N2</name><description>fSAMPLING=fCK_INT, N=2</description><value>1</value></enumeratedValue><enumeratedValue><name>FCK_INT_N4</name><description>fSAMPLING=fCK_INT, N=4</description><value>2</value></enumeratedValue><enumeratedValue><name>FCK_INT_N8</name><description>fSAMPLING=fCK_INT, N=8</description><value>3</value></enumeratedValue><enumeratedValue><name>FDTS_Div2_N6</name><description>fSAMPLING=fDTS/2, N=6</description><value>4</value></enumeratedValue><enumeratedValue><name>FDTS_Div2_N8</name><description>fSAMPLING=fDTS/2, N=8</description><value>5</value></enumeratedValue><enumeratedValue><name>FDTS_Div4_N6</name><description>fSAMPLING=fDTS/4, N=6</description><value>6</value></enumeratedValue><enumeratedValue><name>FDTS_Div4_N8</name><description>fSAMPLING=fDTS/4, N=8</description><value>7</value></enumeratedValue><enumeratedValue><name>FDTS_Div8_N6</name><description>fSAMPLING=fDTS/8, N=6</description><value>8</value></enumeratedValue><enumeratedValue><name>FDTS_Div8_N8</name><description>fSAMPLING=fDTS/8, N=8</description><value>9</value></enumeratedValue><enumeratedValue><name>FDTS_Div16_N5</name><description>fSAMPLING=fDTS/16, N=5</description><value>10</value></enumeratedValue><enumeratedValue><name>FDTS_Div16_N6</name><description>fSAMPLING=fDTS/16, N=6</description><value>11</value></enumeratedValue><enumeratedValue><name>FDTS_Div16_N8</name><description>fSAMPLING=fDTS/16, N=8</description><value>12</value></enumeratedValue><enumeratedValue><name>FDTS_Div32_N5</name><description>fSAMPLING=fDTS/32, N=5</description><value>13</value></enumeratedValue><enumeratedValue><name>FDTS_Div32_N6</name><description>fSAMPLING=fDTS/32, N=6</description><value>14</value></enumeratedValue><enumeratedValue><name>FDTS_Div32_N8</name><description>fSAMPLING=fDTS/32, N=8</description><value>15</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>MSM</name>
<description>Master/Slave mode</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>MSM</name><usage>read-write</usage><enumeratedValue><name>NoSync</name><description>No action</description><value>0</value></enumeratedValue><enumeratedValue><name>Sync</name><description>The effect of an event on the trigger input (TRGI) is delayed to allow a perfect synchronization between the current timer and its slaves (through TRGO). It is useful if we want to synchronize several timers on a single external event.</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TS</name>
<description>Trigger selection</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
<enumeratedValues><name>TS</name><usage>read-write</usage><enumeratedValue><name>ITR0</name><description>Internal Trigger 0 (ITR0)</description><value>0</value></enumeratedValue><enumeratedValue><name>ITR1</name><description>Internal Trigger 1 (ITR1)</description><value>1</value></enumeratedValue><enumeratedValue><name>ITR2</name><description>Internal Trigger 2 (ITR2)</description><value>2</value></enumeratedValue><enumeratedValue><name>TI1F_ED</name><description>TI1 Edge Detector (TI1F_ED)</description><value>4</value></enumeratedValue><enumeratedValue><name>TI1FP1</name><description>Filtered Timer Input 1 (TI1FP1)</description><value>5</value></enumeratedValue><enumeratedValue><name>TI2FP2</name><description>Filtered Timer Input 2 (TI2FP2)</description><value>6</value></enumeratedValue><enumeratedValue><name>ETRF</name><description>External Trigger input (ETRF)</description><value>7</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>SMS</name>
<description>Slave mode selection</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<enumeratedValues><name>SMS</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Slave mode disabled - if CEN = ‘1 then the prescaler is clocked directly by the internal clock.</description><value>0</value></enumeratedValue><enumeratedValue><name>Encoder_Mode_1</name><description>Encoder mode 1 - Counter counts up/down on TI2FP1 edge depending on TI1FP2 level.</description><value>1</value></enumeratedValue><enumeratedValue><name>Encoder_Mode_2</name><description>Encoder mode 2 - Counter counts up/down on TI1FP2 edge depending on TI2FP1 level.</description><value>2</value></enumeratedValue><enumeratedValue><name>Encoder_Mode_3</name><description>Encoder mode 3 - Counter counts up/down on both TI1FP1 and TI2FP2 edges depending on the level of the other input.</description><value>3</value></enumeratedValue><enumeratedValue><name>Reset_Mode</name><description>Reset Mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter and generates an update of the registers.</description><value>4</value></enumeratedValue><enumeratedValue><name>Gated_Mode</name><description>Gated Mode - The counter clock is enabled when the trigger input (TRGI) is high. The counter stops (but is not reset) as soon as the trigger becomes low. Both start and stop of the counter are controlled.</description><value>5</value></enumeratedValue><enumeratedValue><name>Trigger_Mode</name><description>Trigger Mode - The counter starts at a rising edge of the trigger TRGI (but it is not reset). Only the start of the counter is controlled.</description><value>6</value></enumeratedValue><enumeratedValue><name>Ext_Clock_Mode</name><description>External Clock Mode 1 - Rising edges of the selected trigger (TRGI) clock the counter.</description><value>7</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>DIER</name>
<displayName>DIER</displayName>
<description>DMA/Interrupt enable register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>TDE</name>
<description>Trigger DMA request enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TDE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Trigger DMA request disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Trigger DMA request enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>COMDE</name>
<description>COM DMA request enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC4DE</name>
<description>Capture/Compare 4 DMA request
enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CC4DE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>CCx DMA request disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>CCx DMA request enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CC3DE</name>
<description>Capture/Compare 3 DMA request
enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CC4DE" />
</field>
<field>
<name>CC2DE</name>
<description>Capture/Compare 2 DMA request
enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CC4DE" />
</field>
<field>
<name>CC1DE</name>
<description>Capture/Compare 1 DMA request
enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CC4DE" />
</field>
<field>
<name>UDE</name>
<description>Update DMA request enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UDE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Update DMA request disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Update DMA request enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TIE</name>
<description>Trigger interrupt enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Trigger interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Trigger interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CC4IE</name>
<description>Capture/Compare 4 interrupt
enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CC4IE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>CCx interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>CCx interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CC3IE</name>
<description>Capture/Compare 3 interrupt
enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CC4IE" />
</field>
<field>
<name>CC2IE</name>
<description>Capture/Compare 2 interrupt
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CC4IE" />
</field>
<field>
<name>CC1IE</name>
<description>Capture/Compare 1 interrupt
enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CC4IE" />
</field>
<field>
<name>UIE</name>
<description>Update interrupt enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Update interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Update interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SR</name>
<displayName>SR</displayName>
<description>status register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>CC4OF</name>
<description>Capture/Compare 4 overcapture
flag</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CC4OFR</name><usage>read</usage><enumeratedValue><name>Overcapture</name><description>The counter value has been captured in TIMx_CCRx register while CCxIF flag was already set</description><value>1</value></enumeratedValue></enumeratedValues>
<enumeratedValues><name>CC4OFW</name><usage>write</usage><enumeratedValue><name>Clear</name><description>Clear flag</description><value>0</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CC3OF</name>
<description>Capture/Compare 3 overcapture
flag</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CC4OFR" />
<enumeratedValues derivedFrom="CC4OFW" />
</field>
<field>
<name>CC2OF</name>
<description>Capture/compare 2 overcapture
flag</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CC4OFR" />
<enumeratedValues derivedFrom="CC4OFW" />
</field>
<field>
<name>CC1OF</name>
<description>Capture/Compare 1 overcapture
flag</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CC4OFR" />
<enumeratedValues derivedFrom="CC4OFW" />
</field>
<field>
<name>TIF</name>
<description>Trigger interrupt flag</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TIFR</name><usage>read</usage><enumeratedValue><name>NoTrigger</name><description>No trigger event occurred</description><value>0</value></enumeratedValue><enumeratedValue><name>Trigger</name><description>Trigger interrupt pending</description><value>1</value></enumeratedValue></enumeratedValues>
<enumeratedValues><name>TIFW</name><usage>write</usage><enumeratedValue><name>Clear</name><description>Clear flag</description><value>0</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CC4IF</name>
<description>Capture/Compare 4 interrupt
flag</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CC4IFR</name><usage>read</usage><enumeratedValue><name>Match</name><description>If CC1 is an output: The content of the counter TIMx_CNT matches the content of the TIMx_CCR1 register. If CC1 is an input: The counter value has been captured in TIMx_CCR1 register.</description><value>1</value></enumeratedValue></enumeratedValues>
<enumeratedValues><name>CC4IFW</name><usage>write</usage><enumeratedValue><name>Clear</name><description>Clear flag</description><value>0</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CC3IF</name>
<description>Capture/Compare 3 interrupt
flag</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CC4IFR" />
<enumeratedValues derivedFrom="CC4IFW" />
</field>
<field>
<name>CC2IF</name>
<description>Capture/Compare 2 interrupt
flag</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CC4IFR" />
<enumeratedValues derivedFrom="CC4IFW" />
</field>
<field>
<name>CC1IF</name>
<description>Capture/compare 1 interrupt
flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CC4IFR" />
<enumeratedValues derivedFrom="CC4IFW" />
</field>
<field>
<name>UIF</name>
<description>Update interrupt flag</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UIF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>No update occurred</description><value>0</value></enumeratedValue><enumeratedValue><name>UpdatePending</name><description>Update interrupt pending.</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>EGR</name>
<displayName>EGR</displayName>
<description>event generation register</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>TG</name>
<description>Trigger generation</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TGW</name><usage>write</usage><enumeratedValue><name>Trigger</name><description>The TIF flag is set in TIMx_SR register. Related interrupt or DMA transfer can occur if enabled.</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CC4G</name>
<description>Capture/compare 4
generation</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CC4GW</name><usage>write</usage><enumeratedValue><name>Trigger</name><description>If CC1 is an output: CC1IF flag is set, Corresponding interrupt or DMA request is sent if enabled. If CC1 is an input: The current value of the counter is captured in TIMx_CCR1 register.</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CC3G</name>
<description>Capture/compare 3
generation</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CC4GW" />
</field>
<field>
<name>CC2G</name>
<description>Capture/compare 2
generation</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CC4GW" />
</field>
<field>
<name>CC1G</name>
<description>Capture/compare 1
generation</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues derivedFrom="CC4GW" />
</field>
<field>
<name>UG</name>
<description>Update generation</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UG</name><usage>read-write</usage><enumeratedValue><name>Update</name><description>Re-initializes the timer counter and generates an update of the reigsters.</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CCMR1_Output</name>
<displayName>CCMR1_Output</displayName>
<description>capture/compare mode register 1 (output
mode)</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OC2CE</name>
<description>Output compare 2 clear
enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC2M</name>
<description>Output compare 2 mode</description>
<bitOffset>12</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>OC2PE</name>
<description>Output compare 2 preload
enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC2FE</name>
<description>Output compare 2 fast
enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC2S</name>
<description>Capture/Compare 2
selection</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>OC1CE</name>
<description>Output compare 1 clear
enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC1M</name>
<description>Output compare 1 mode</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>OC1PE</name>
<description>Output compare 1 preload
enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC1FE</name>
<description>Output compare 1 fast
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1S</name>
<description>Capture/Compare 1
selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
</field>
</fields>
</register>
<register>
<name>CCMR1_Input</name>
<displayName>CCMR1_Input</displayName>
<description>capture/compare mode register 1 (input
mode)</description>
<alternateRegister>CCMR1_Output</alternateRegister>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IC2F</name>
<description>Input capture 2 filter</description>
<bitOffset>12</bitOffset>
<bitWidth>4</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>15</maximum></range></writeConstraint>
</field>
<field>
<name>IC2PSC</name>
<description>Input capture 2 prescaler</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>CC2S</name>
<description>Capture/compare 2
selection</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>CC2S</name><usage>read-write</usage><enumeratedValue><name>Output</name><description>CC2 channel is configured as output</description><value>0</value></enumeratedValue><enumeratedValue><name>TI2</name><description>CC2 channel is configured as input, IC2 is mapped on TI2</description><value>1</value></enumeratedValue><enumeratedValue><name>TI1</name><description>CC2 channel is configured as input, IC2 is mapped on TI1</description><value>2</value></enumeratedValue><enumeratedValue><name>TRC</name><description>CC2 channel is configured as input, IC2 is mapped on TRC</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>IC1F</name>
<description>Input capture 1 filter</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<enumeratedValues><name>IC1F</name><usage>read-write</usage><enumeratedValue><name>NoFilter</name><description>No filter, sampling is done at fDTS</description><value>0</value></enumeratedValue><enumeratedValue><name>FCK_INT_N2</name><description>fSAMPLING=fCK_INT, N=2</description><value>1</value></enumeratedValue><enumeratedValue><name>FCK_INT_N4</name><description>fSAMPLING=fCK_INT, N=4</description><value>2</value></enumeratedValue><enumeratedValue><name>FCK_INT_N8</name><description>fSAMPLING=fCK_INT, N=8</description><value>3</value></enumeratedValue><enumeratedValue><name>FDTS_Div2_N6</name><description>fSAMPLING=fDTS/2, N=6</description><value>4</value></enumeratedValue><enumeratedValue><name>FDTS_Div2_N8</name><description>fSAMPLING=fDTS/2, N=8</description><value>5</value></enumeratedValue><enumeratedValue><name>FDTS_Div4_N6</name><description>fSAMPLING=fDTS/4, N=6</description><value>6</value></enumeratedValue><enumeratedValue><name>FDTS_Div4_N8</name><description>fSAMPLING=fDTS/4, N=8</description><value>7</value></enumeratedValue><enumeratedValue><name>FDTS_Div8_N6</name><description>fSAMPLING=fDTS/8, N=6</description><value>8</value></enumeratedValue><enumeratedValue><name>FDTS_Div8_N8</name><description>fSAMPLING=fDTS/8, N=8</description><value>9</value></enumeratedValue><enumeratedValue><name>FDTS_Div16_N5</name><description>fSAMPLING=fDTS/16, N=5</description><value>10</value></enumeratedValue><enumeratedValue><name>FDTS_Div16_N6</name><description>fSAMPLING=fDTS/16, N=6</description><value>11</value></enumeratedValue><enumeratedValue><name>FDTS_Div16_N8</name><description>fSAMPLING=fDTS/16, N=8</description><value>12</value></enumeratedValue><enumeratedValue><name>FDTS_Div32_N5</name><description>fSAMPLING=fDTS/32, N=5</description><value>13</value></enumeratedValue><enumeratedValue><name>FDTS_Div32_N6</name><description>fSAMPLING=fDTS/32, N=6</description><value>14</value></enumeratedValue><enumeratedValue><name>FDTS_Div32_N8</name><description>fSAMPLING=fDTS/32, N=8</description><value>15</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>IC1PSC</name>
<description>Input capture 1 prescaler</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>CC1S</name>
<description>Capture/Compare 1
selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>CC1S</name><usage>read-write</usage><enumeratedValue><name>Output</name><description>CC1 channel is configured as output</description><value>0</value></enumeratedValue><enumeratedValue><name>TI1</name><description>CC1 channel is configured as input, IC1 is mapped on TI1</description><value>1</value></enumeratedValue><enumeratedValue><name>TI2</name><description>CC1 channel is configured as input, IC1 is mapped on TI2</description><value>2</value></enumeratedValue><enumeratedValue><name>TRC</name><description>CC1 channel is configured as input, IC1 is mapped on TRC</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CCMR2_Output</name>
<displayName>CCMR2_Output</displayName>
<description>capture/compare mode register 2 (output
mode)</description>
<addressOffset>0x1C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OC4CE</name>
<description>Output compare 4 clear
enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC4M</name>
<description>Output compare 4 mode</description>
<bitOffset>12</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>OC4PE</name>
<description>Output compare 4 preload
enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC4FE</name>
<description>Output compare 4 fast
enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC4S</name>
<description>Capture/Compare 4
selection</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>OC3CE</name>
<description>Output compare 3 clear
enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC3M</name>
<description>Output compare 3 mode</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>OC3PE</name>
<description>Output compare 3 preload
enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC3FE</name>
<description>Output compare 3 fast
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC3S</name>
<description>Capture/Compare 3
selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
</field>
</fields>
</register>
<register>
<name>CCMR2_Input</name>
<displayName>CCMR2_Input</displayName>
<description>capture/compare mode register 2 (input
mode)</description>
<alternateRegister>CCMR2_Output</alternateRegister>
<addressOffset>0x1C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IC4F</name>
<description>Input capture 4 filter</description>
<bitOffset>12</bitOffset>
<bitWidth>4</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>15</maximum></range></writeConstraint>
</field>
<field>
<name>IC4PSC</name>
<description>Input capture 4 prescaler</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>3</maximum></range></writeConstraint>
</field>
<field>
<name>CC4S</name>
<description>Capture/Compare 4
selection</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>CC4S</name><usage>read-write</usage><enumeratedValue><name>Output</name><description>CC4 channel is configured as output</description><value>0</value></enumeratedValue><enumeratedValue><name>TI4</name><description>CC4 channel is configured as input, IC4 is mapped on TI4</description><value>1</value></enumeratedValue><enumeratedValue><name>TI3</name><description>CC4 channel is configured as input, IC4 is mapped on TI3</description><value>2</value></enumeratedValue><enumeratedValue><name>TRC</name><description>CC4 channel is configured as input, IC4 is mapped on TRC</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>IC3F</name>
<description>Input capture 3 filter</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>15</maximum></range></writeConstraint>
</field>
<field>
<name>IC3PSC</name>
<description>Input capture 3 prescaler</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>3</maximum></range></writeConstraint>
</field>
<field>
<name>CC3S</name>
<description>Capture/Compare 3
selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>CC3S</name><usage>read-write</usage><enumeratedValue><name>Output</name><description>CC3 channel is configured as output</description><value>0</value></enumeratedValue><enumeratedValue><name>TI3</name><description>CC3 channel is configured as input, IC3 is mapped on TI3</description><value>1</value></enumeratedValue><enumeratedValue><name>TI4</name><description>CC3 channel is configured as input, IC3 is mapped on TI4</description><value>2</value></enumeratedValue><enumeratedValue><name>TRC</name><description>CC3 channel is configured as input, IC3 is mapped on TRC</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CCER</name>
<displayName>CCER</displayName>
<description>capture/compare enable
register</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>CC4NP</name>
<description>Capture/Compare 4 output
Polarity</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC4P</name>
<description>Capture/Compare 3 output
Polarity</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC4E</name>
<description>Capture/Compare 4 output
enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC3NP</name>
<description>Capture/Compare 3 output
Polarity</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC3P</name>
<description>Capture/Compare 3 output
Polarity</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC3E</name>
<description>Capture/Compare 3 output
enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC2NP</name>
<description>Capture/Compare 2 output
Polarity</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC2P</name>
<description>Capture/Compare 2 output
Polarity</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC2E</name>
<description>Capture/Compare 2 output
enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1NP</name>
<description>Capture/Compare 1 output
Polarity</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1P</name>
<description>Capture/Compare 1 output
Polarity</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1E</name>
<description>Capture/Compare 1 output
enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>CNT</name>
<displayName>CNT</displayName>
<description>counter</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field><name>CNT</name><description>Counter value</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth><writeConstraint><range><minimum>0</minimum><maximum>4294967295</maximum></range></writeConstraint>
</field></fields>
</register>
<register>
<name>PSC</name>
<displayName>PSC</displayName>
<description>prescaler</description>
<addressOffset>0x28</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>PSC</name>
<description>Prescaler value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>65536</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>ARR</name>
<displayName>ARR</displayName>
<description>auto-reload register</description>
<addressOffset>0x2C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field><name>ARR</name><description>Auto-reload value</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth><writeConstraint><range><minimum>0</minimum><maximum>4294967295</maximum></range></writeConstraint>
</field></fields>
</register>
<register>
<name>CCR%s</name>
<displayName>CCR1</displayName>
<description>capture/compare register 1</description>
<addressOffset>0x34</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field><name>CCR</name><description>Capture/Compare 1 value</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth><writeConstraint><range><minimum>0</minimum><maximum>4294967295</maximum></range></writeConstraint>
</field></fields>
<dim>4</dim><dimIndex>1,2,3,4</dimIndex><dimIncrement>0x4</dimIncrement></register>
<register>
<name>DCR</name>
<displayName>DCR</displayName>
<description>DMA control register</description>
<addressOffset>0x48</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>DBL</name>
<description>DMA burst length</description>
<bitOffset>8</bitOffset>
<bitWidth>5</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>18</maximum></range></writeConstraint>
</field>
<field>
<name>DBA</name>
<description>DMA base address</description>
<bitOffset>0</bitOffset>
<bitWidth>5</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>31</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>DMAR</name>
<displayName>DMAR</displayName>
<description>DMA address for full transfer</description>
<addressOffset>0x4C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>DMAB</name>
<description>DMA register for burst
accesses</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>OR</name>
<displayName>OR</displayName>
<description>TIM2 option register</description>
<addressOffset>0x50</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>ETR_RMP</name>
<description>Timer2 ETR remap</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>TI4_RMP</name>
<description>Internal trigger</description>
<bitOffset>3</bitOffset>
<bitWidth>2</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral derivedFrom="TIM2">
<name>TIM3</name>
<baseAddress>0x40000400</baseAddress>
<interrupt>
<name>TIM3</name>
<description>TIM3 global interrupt</description>
<value>29</value>
</interrupt>
</peripheral>
<peripheral>
<name>TIM15</name>
<description>General purpose timers</description>
<groupName>TIM</groupName>
<baseAddress>0x40014000</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>TIM1_BRK_TIM15</name>
<description>Timer 15 global interrupt</description>
<value>24</value>
</interrupt>
<registers>
<register>
<name>CR1</name>
<displayName>CR1</displayName>
<description>control register 1</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>CEN</name>
<description>Counter enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Counter disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Counter enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>UDIS</name>
<description>Update disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UDIS</name><usage>read-write</usage><enumeratedValue><name>Enabled</name><description>Update event enabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Disabled</name><description>Update event disabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>URS</name>
<description>Update request source</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>URS</name><usage>read-write</usage><enumeratedValue><name>AnyEvent</name><description>Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request</description><value>0</value></enumeratedValue><enumeratedValue><name>CounterOnly</name><description>Only counter overflow/underflow generates an update interrupt or DMA request</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>OPM</name>
<description>One-pulse mode</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ARPE</name>
<description>Auto-reload preload enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ARPE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>TIMx_APRR register is not buffered</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>TIMx_APRR register is buffered</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CKD</name>
<description>Clock division</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>UIFREMAP</name>
<description>UIF status bit remapping</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>CR2</name>
<displayName>CR2</displayName>
<description>control register 2</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>OIS1N</name>
<description>Output Idle state 1</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OIS1</name>
<description>Output Idle state 1</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CCDS</name>
<description>Capture/compare DMA
selection</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CCUS</name>
<description>Capture/compare control update
selection</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CCPC</name>
<description>Capture/compare preloaded
control</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>DIER</name>
<displayName>DIER</displayName>
<description>DMA/Interrupt enable register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>TDE</name>
<description>Trigger DMA request enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>COMDE</name>
<description>COM DMA request enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1DE</name>
<description>Capture/Compare 1 DMA request
enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>UDE</name>
<description>Update DMA request enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BIE</name>
<description>Break interrupt enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIE</name>
<description>Trigger interrupt enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>COMIE</name>
<description>COM interrupt enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1IE</name>
<description>Capture/Compare 1 interrupt
enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>UIE</name>
<description>Update interrupt enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Update interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Update interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SR</name>
<displayName>SR</displayName>
<description>status register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>CC1OF</name>
<description>Capture/Compare 1 overcapture
flag</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BIF</name>
<description>Break interrupt flag</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIF</name>
<description>Trigger interrupt flag</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>COMIF</name>
<description>COM interrupt flag</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1IF</name>
<description>Capture/compare 1 interrupt
flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>UIF</name>
<description>Update interrupt flag</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UIF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>No update occurred</description><value>0</value></enumeratedValue><enumeratedValue><name>UpdatePending</name><description>Update interrupt pending.</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>EGR</name>
<displayName>EGR</displayName>
<description>event generation register</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>BG</name>
<description>Break generation</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TG</name>
<description>Trigger generation</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>COMG</name>
<description>Capture/Compare control update
generation</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1G</name>
<description>Capture/compare 1
generation</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>UG</name>
<description>Update generation</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UG</name><usage>read-write</usage><enumeratedValue><name>Update</name><description>Re-initializes the timer counter and generates an update of the reigsters.</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CCMR1_Output</name>
<displayName>CCMR1_Output</displayName>
<description>capture/compare mode register (output
mode)</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OC1M_2</name>
<description>Output Compare 1 mode</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC1M</name>
<description>Output Compare 1 mode</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>OC1PE</name>
<description>Output Compare 1 preload
enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC1FE</name>
<description>Output Compare 1 fast
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1S</name>
<description>Capture/Compare 1
selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
</field>
</fields>
</register>
<register>
<name>CCMR1_Input</name>
<displayName>CCMR1_Input</displayName>
<description>capture/compare mode register 1 (input
mode)</description>
<alternateRegister>CCMR1_Output</alternateRegister>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IC1F</name>
<description>Input capture 1 filter</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>IC1PSC</name>
<description>Input capture 1 prescaler</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>CC1S</name>
<description>Capture/Compare 1
selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
</field>
</fields>
</register>
<register>
<name>CCER</name>
<displayName>CCER</displayName>
<description>capture/compare enable
register</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>CC1NP</name>
<description>Capture/Compare 1 output
Polarity</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1NE</name>
<description>Capture/Compare 1 complementary output
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1P</name>
<description>Capture/Compare 1 output
Polarity</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1E</name>
<description>Capture/Compare 1 output
enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>CNT</name>
<displayName>CNT</displayName>
<description>counter</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CNT</name>
<description>counter value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>UIFCPY</name>
<description>UIF Copy</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>PSC</name>
<displayName>PSC</displayName>
<description>prescaler</description>
<addressOffset>0x28</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>PSC</name>
<description>Prescaler value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>65536</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>ARR</name>
<displayName>ARR</displayName>
<description>auto-reload register</description>
<addressOffset>0x2C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ARR</name>
<description>Auto-reload value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>RCR</name>
<displayName>RCR</displayName>
<description>repetition counter register</description>
<addressOffset>0x30</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>REP</name>
<description>Repetition counter value</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>CCR1</name>
<displayName>CCR1</displayName>
<description>capture/compare register 1</description>
<addressOffset>0x34</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CCR1</name>
<description>Capture/Compare 1 value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>BDTR</name>
<displayName>BDTR</displayName>
<description>break and dead-time register</description>
<addressOffset>0x44</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>DTG</name>
<description>Dead-time generator setup</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>LOCK</name>
<description>Lock configuration</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>OSSI</name>
<description>Off-state selection for Idle
mode</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OSSR</name>
<description>Off-state selection for Run
mode</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BKE</name>
<description>Break enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BKP</name>
<description>Break polarity</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AOE</name>
<description>Automatic output enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MOE</name>
<description>Main output enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BKF</name>
<description>Break filter</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
</field>
</fields>
</register>
<register>
<name>DCR</name>
<displayName>DCR</displayName>
<description>DMA control register</description>
<addressOffset>0x48</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>DBL</name>
<description>DMA burst length</description>
<bitOffset>8</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>DBA</name>
<description>DMA base address</description>
<bitOffset>0</bitOffset>
<bitWidth>5</bitWidth>
</field>
</fields>
</register>
<register>
<name>DMAR</name>
<displayName>DMAR</displayName>
<description>DMA address for full transfer</description>
<addressOffset>0x4C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>DMAB</name>
<description>DMA register for burst
accesses</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>TIM16</name>
<description>General purpose timers</description>
<groupName>TIM</groupName>
<baseAddress>0x40014400</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>TIM1_UP_TIM16</name>
<description>Timer 16 global interrupt</description>
<value>25</value>
</interrupt>
<registers>
<register>
<name>CR1</name>
<displayName>CR1</displayName>
<description>control register 1</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>CEN</name>
<description>Counter enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Counter disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Counter enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>UDIS</name>
<description>Update disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UDIS</name><usage>read-write</usage><enumeratedValue><name>Enabled</name><description>Update event enabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Disabled</name><description>Update event disabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>URS</name>
<description>Update request source</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>URS</name><usage>read-write</usage><enumeratedValue><name>AnyEvent</name><description>Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request</description><value>0</value></enumeratedValue><enumeratedValue><name>CounterOnly</name><description>Only counter overflow/underflow generates an update interrupt or DMA request</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>OPM</name>
<description>One-pulse mode</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>OPM</name><usage>read-write</usage><enumeratedValue><name>NotStopped</name><description>Not stopped at update event</description><value>0</value></enumeratedValue><enumeratedValue><name>Stopped</name><description>Counter stops counting at next update event</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ARPE</name>
<description>Auto-reload preload enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ARPE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>TIMx_APRR register is not buffered</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>TIMx_APRR register is buffered</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CKD</name>
<description>Clock division</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>UIFREMAP</name>
<description>UIF status bit remapping</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>CR2</name>
<displayName>CR2</displayName>
<description>control register 2</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>OIS1N</name>
<description>Output Idle state 1</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>OIS1N</name><usage>read-write</usage><enumeratedValue><name>Low</name><description>OC1N=0 after a dead-time when MOE=0</description><value>0</value></enumeratedValue><enumeratedValue><name>High</name><description>OC1N=1 after a dead-time when MOE=0</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>OIS1</name>
<description>Output Idle state 1</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>OIS1</name><usage>read-write</usage><enumeratedValue><name>Low</name><description>OC1=0 (after a dead-time if OC1N is implemented) when MOE=0</description><value>0</value></enumeratedValue><enumeratedValue><name>High</name><description>OC1=1 (after a dead-time if OC1N is implemented) when MOE=0</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CCDS</name>
<description>Capture/compare DMA
selection</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CCDS</name><usage>read-write</usage><enumeratedValue><name>OnCompare</name><description>CCx DMA request sent when CCx event occurs</description><value>0</value></enumeratedValue><enumeratedValue><name>OnUpdate</name><description>CCx DMA request sent when update event occurs</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CCUS</name>
<description>Capture/compare control update
selection</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CCUS</name><usage>read-write</usage><enumeratedValue><name>Default</name><description>Capture/compare are updated only by setting the COMG bit</description><value>0</value></enumeratedValue><enumeratedValue><name>WithRisingEdge</name><description>Capture/compare are updated by setting the COMG bit or when an rising edge occurs on TRGI</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CCPC</name>
<description>Capture/compare preloaded
control</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CCPC</name><usage>read-write</usage><enumeratedValue><name>NotPreloaded</name><description>CCxE, CCxNE and OCxM bits are not preloaded</description><value>0</value></enumeratedValue><enumeratedValue><name>Preloaded</name><description>CCxE, CCxNE and OCxM bits are preloaded</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>DIER</name>
<displayName>DIER</displayName>
<description>DMA/Interrupt enable register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>TDE</name>
<description>Trigger DMA request enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>COMDE</name>
<description>COM DMA request enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1DE</name>
<description>Capture/Compare 1 DMA request
enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CC1DE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>CC1 DMA request disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>CC1 DMA request enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>UDE</name>
<description>Update DMA request enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BIE</name>
<description>Break interrupt enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>BIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Break interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Break interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TIE</name>
<description>Trigger interrupt enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>COMIE</name>
<description>COM interrupt enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>COMIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>COM interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>COM interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CC1IE</name>
<description>Capture/Compare 1 interrupt
enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CC1IE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>CC1 interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>CC1 interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>UIE</name>
<description>Update interrupt enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Update interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Update interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SR</name>
<displayName>SR</displayName>
<description>status register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>CC1OF</name>
<description>Capture/Compare 1 overcapture
flag</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BIF</name>
<description>Break interrupt flag</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIF</name>
<description>Trigger interrupt flag</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>COMIF</name>
<description>COM interrupt flag</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1IF</name>
<description>Capture/compare 1 interrupt
flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>UIF</name>
<description>Update interrupt flag</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UIF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>No update occurred</description><value>0</value></enumeratedValue><enumeratedValue><name>UpdatePending</name><description>Update interrupt pending.</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>EGR</name>
<displayName>EGR</displayName>
<description>event generation register</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>BG</name>
<description>Break generation</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TG</name>
<description>Trigger generation</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>COMG</name>
<description>Capture/Compare control update
generation</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1G</name>
<description>Capture/compare 1
generation</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>UG</name>
<description>Update generation</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UG</name><usage>read-write</usage><enumeratedValue><name>Update</name><description>Re-initializes the timer counter and generates an update of the reigsters.</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CCMR1_Output</name>
<displayName>CCMR1_Output</displayName>
<description>capture/compare mode register (output
mode)</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OC1M_2</name>
<description>Output Compare 1 mode</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC1M</name>
<description>Output Compare 1 mode</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>OC1PE</name>
<description>Output Compare 1 preload
enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC1FE</name>
<description>Output Compare 1 fast
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1S</name>
<description>Capture/Compare 1
selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
</field>
</fields>
</register>
<register>
<name>CCMR1_Input</name>
<displayName>CCMR1_Input</displayName>
<description>capture/compare mode register 1 (input
mode)</description>
<alternateRegister>CCMR1_Output</alternateRegister>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IC1F</name>
<description>Input capture 1 filter</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>IC1PSC</name>
<description>Input capture 1 prescaler</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>CC1S</name>
<description>Capture/Compare 1
selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
</field>
</fields>
</register>
<register>
<name>CCER</name>
<displayName>CCER</displayName>
<description>capture/compare enable
register</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>CC1NP</name>
<description>Capture/Compare 1 output
Polarity</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1NE</name>
<description>Capture/Compare 1 complementary output
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1P</name>
<description>Capture/Compare 1 output
Polarity</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1E</name>
<description>Capture/Compare 1 output
enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>CNT</name>
<displayName>CNT</displayName>
<description>counter</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CNT</name>
<description>counter value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>UIFCPY</name>
<description>UIF Copy</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>PSC</name>
<displayName>PSC</displayName>
<description>prescaler</description>
<addressOffset>0x28</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>PSC</name>
<description>Prescaler value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>65536</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>ARR</name>
<displayName>ARR</displayName>
<description>auto-reload register</description>
<addressOffset>0x2C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ARR</name>
<description>Auto-reload value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>RCR</name>
<displayName>RCR</displayName>
<description>repetition counter register</description>
<addressOffset>0x30</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>REP</name>
<description>Repetition counter value</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>CCR1</name>
<displayName>CCR1</displayName>
<description>capture/compare register 1</description>
<addressOffset>0x34</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CCR1</name>
<description>Capture/Compare 1 value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>BDTR</name>
<displayName>BDTR</displayName>
<description>break and dead-time register</description>
<addressOffset>0x44</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>DTG</name>
<description>Dead-time generator setup</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>LOCK</name>
<description>Lock configuration</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>OSSI</name>
<description>Off-state selection for Idle
mode</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OSSR</name>
<description>Off-state selection for Run
mode</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BKE</name>
<description>Break enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BKP</name>
<description>Break polarity</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AOE</name>
<description>Automatic output enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MOE</name>
<description>Main output enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BKF</name>
<description>Break filter</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
</field>
</fields>
</register>
<register>
<name>DCR</name>
<displayName>DCR</displayName>
<description>DMA control register</description>
<addressOffset>0x48</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>DBL</name>
<description>DMA burst length</description>
<bitOffset>8</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>DBA</name>
<description>DMA base address</description>
<bitOffset>0</bitOffset>
<bitWidth>5</bitWidth>
</field>
</fields>
</register>
<register>
<name>DMAR</name>
<displayName>DMAR</displayName>
<description>DMA address for full transfer</description>
<addressOffset>0x4C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>DMAB</name>
<description>DMA register for burst
accesses</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>OR1</name>
<displayName>OR1</displayName>
<description>TIM16 option register 1</description>
<addressOffset>0x50</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>TI1_RMP</name>
<description>Input capture 1 remap</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
</field>
</fields>
</register>
<register>
<name>OR2</name>
<displayName>OR2</displayName>
<description>TIM17 option register 1</description>
<addressOffset>0x60</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>BKINE</name>
<description>BRK BKIN input enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BKCMP1E</name>
<description>BRK COMP1 enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BKCMP2E</name>
<description>BRK COMP2 enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BKDFBK1E</name>
<description>BRK DFSDM_BREAK1 enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BKINP</name>
<description>BRK BKIN input polarity</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BKCMP1P</name>
<description>BRK COMP1 input polarity</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BKCMP2P</name>
<description>BRK COMP2 input polarit</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>TIM1</name>
<description>Advanced-timers</description>
<groupName>TIM</groupName>
<baseAddress>0x40012C00</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>TIM1_TRG_COM</name>
<description>TIM1 trigger and commutation
interrupt</description>
<value>26</value>
</interrupt>
<interrupt>
<name>TIM1_CC</name>
<description>TIM1 Capture Compare interrupt</description>
<value>27</value>
</interrupt>
<registers>
<register>
<name>CR1</name>
<displayName>CR1</displayName>
<description>control register 1</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>CKD</name>
<description>Clock division</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>ARPE</name>
<description>Auto-reload preload enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ARPE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>TIMx_APRR register is not buffered</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>TIMx_APRR register is buffered</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CMS</name>
<description>Center-aligned mode
selection</description>
<bitOffset>5</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>DIR</name>
<description>Direction</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OPM</name>
<description>One-pulse mode</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>OPM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Counter is not stopped at update event</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Counter stops counting at the next update event (clearing the CEN bit)</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>URS</name>
<description>Update request source</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>URS</name><usage>read-write</usage><enumeratedValue><name>AnyEvent</name><description>Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request</description><value>0</value></enumeratedValue><enumeratedValue><name>CounterOnly</name><description>Only counter overflow/underflow generates an update interrupt or DMA request</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>UDIS</name>
<description>Update disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UDIS</name><usage>read-write</usage><enumeratedValue><name>Enabled</name><description>Update event enabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Disabled</name><description>Update event disabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CEN</name>
<description>Counter enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Counter disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Counter enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CR2</name>
<displayName>CR2</displayName>
<description>control register 2</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>OIS4</name>
<description>Output Idle state 4</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OIS3N</name>
<description>Output Idle state 3</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OIS3</name>
<description>Output Idle state 3</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OIS2N</name>
<description>Output Idle state 2</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OIS2</name>
<description>Output Idle state 2</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OIS1N</name>
<description>Output Idle state 1</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OIS1</name>
<description>Output Idle state 1</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TI1S</name>
<description>TI1 selection</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MMS</name>
<description>Master mode selection</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>CCDS</name>
<description>Capture/compare DMA
selection</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CCUS</name>
<description>Capture/compare control update
selection</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CCPC</name>
<description>Capture/compare preloaded
control</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>SMCR</name>
<displayName>SMCR</displayName>
<description>slave mode control register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>ETP</name>
<description>External trigger polarity</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ECE</name>
<description>External clock enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ETPS</name>
<description>External trigger prescaler</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>ETF</name>
<description>External trigger filter</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>MSM</name>
<description>Master/Slave mode</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TS</name>
<description>Trigger selection</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>SMS</name>
<description>Slave mode selection</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
</field>
</fields>
</register>
<register>
<name>DIER</name>
<displayName>DIER</displayName>
<description>DMA/Interrupt enable register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>TDE</name>
<description>Trigger DMA request enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>COMDE</name>
<description>COM DMA request enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC4DE</name>
<description>Capture/Compare 4 DMA request
enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC3DE</name>
<description>Capture/Compare 3 DMA request
enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC2DE</name>
<description>Capture/Compare 2 DMA request
enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1DE</name>
<description>Capture/Compare 1 DMA request
enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>UDE</name>
<description>Update DMA request enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIE</name>
<description>Trigger interrupt enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC4IE</name>
<description>Capture/Compare 4 interrupt
enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC3IE</name>
<description>Capture/Compare 3 interrupt
enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC2IE</name>
<description>Capture/Compare 2 interrupt
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1IE</name>
<description>Capture/Compare 1 interrupt
enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>UIE</name>
<description>Update interrupt enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Update interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Update interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>BIE</name>
<description>Break interrupt enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>COMIE</name>
<description>COM interrupt enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>SR</name>
<displayName>SR</displayName>
<description>status register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>CC4OF</name>
<description>Capture/Compare 4 overcapture
flag</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC3OF</name>
<description>Capture/Compare 3 overcapture
flag</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC2OF</name>
<description>Capture/compare 2 overcapture
flag</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1OF</name>
<description>Capture/Compare 1 overcapture
flag</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BIF</name>
<description>Break interrupt flag</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIF</name>
<description>Trigger interrupt flag</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>COMIF</name>
<description>COM interrupt flag</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC4IF</name>
<description>Capture/Compare 4 interrupt
flag</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC3IF</name>
<description>Capture/Compare 3 interrupt
flag</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC2IF</name>
<description>Capture/Compare 2 interrupt
flag</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1IF</name>
<description>Capture/compare 1 interrupt
flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>UIF</name>
<description>Update interrupt flag</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UIF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>No update occurred</description><value>0</value></enumeratedValue><enumeratedValue><name>UpdatePending</name><description>Update interrupt pending.</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>EGR</name>
<displayName>EGR</displayName>
<description>event generation register</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>BG</name>
<description>Break generation</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TG</name>
<description>Trigger generation</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>COMG</name>
<description>Capture/Compare control update
generation</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC4G</name>
<description>Capture/compare 4
generation</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC3G</name>
<description>Capture/compare 3
generation</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC2G</name>
<description>Capture/compare 2
generation</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1G</name>
<description>Capture/compare 1
generation</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>UG</name>
<description>Update generation</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UG</name><usage>read-write</usage><enumeratedValue><name>Update</name><description>Re-initializes the timer counter and generates an update of the reigsters.</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CCMR1_Output</name>
<displayName>CCMR1_Output</displayName>
<description>capture/compare mode register 1 (output
mode)</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OC2CE</name>
<description>Output Compare 2 clear
enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC2M</name>
<description>Output Compare 2 mode</description>
<bitOffset>12</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>OC2PE</name>
<description>Output Compare 2 preload
enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC2FE</name>
<description>Output Compare 2 fast
enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC2S</name>
<description>Capture/Compare 2
selection</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>OC1CE</name>
<description>Output Compare 1 clear
enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC1M</name>
<description>Output Compare 1 mode</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>OC1PE</name>
<description>Output Compare 1 preload
enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC1FE</name>
<description>Output Compare 1 fast
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1S</name>
<description>Capture/Compare 1
selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
</field>
</fields>
</register>
<register>
<name>CCMR1_Input</name>
<displayName>CCMR1_Input</displayName>
<description>capture/compare mode register 1 (input
mode)</description>
<alternateRegister>CCMR1_Output</alternateRegister>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IC2F</name>
<description>Input capture 2 filter</description>
<bitOffset>12</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>IC2PSC</name>
<description>Input capture 2 prescaler</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>CC2S</name>
<description>Capture/Compare 2
selection</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>IC1F</name>
<description>Input capture 1 filter</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>IC1PSC</name>
<description>Input capture 1 prescaler</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>CC1S</name>
<description>Capture/Compare 1
selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
</field>
</fields>
</register>
<register>
<name>CCMR2_Output</name>
<displayName>CCMR2_Output</displayName>
<description>capture/compare mode register 2 (output
mode)</description>
<addressOffset>0x1C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OC4CE</name>
<description>Output compare 4 clear
enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC4M</name>
<description>Output compare 4 mode</description>
<bitOffset>12</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>OC4PE</name>
<description>Output compare 4 preload
enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC4FE</name>
<description>Output compare 4 fast
enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC4S</name>
<description>Capture/Compare 4
selection</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>OC3CE</name>
<description>Output compare 3 clear
enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC3M</name>
<description>Output compare 3 mode</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>OC3PE</name>
<description>Output compare 3 preload
enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC3FE</name>
<description>Output compare 3 fast
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC3S</name>
<description>Capture/Compare 3
selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
</field>
</fields>
</register>
<register>
<name>CCMR2_Input</name>
<displayName>CCMR2_Input</displayName>
<description>capture/compare mode register 2 (input
mode)</description>
<alternateRegister>CCMR2_Output</alternateRegister>
<addressOffset>0x1C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IC4F</name>
<description>Input capture 4 filter</description>
<bitOffset>12</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>IC4PSC</name>
<description>Input capture 4 prescaler</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>CC4S</name>
<description>Capture/Compare 4
selection</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>IC3F</name>
<description>Input capture 3 filter</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>IC3PSC</name>
<description>Input capture 3 prescaler</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>CC3S</name>
<description>Capture/compare 3
selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
</field>
</fields>
</register>
<register>
<name>CCER</name>
<displayName>CCER</displayName>
<description>capture/compare enable
register</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>CC4P</name>
<description>Capture/Compare 3 output
Polarity</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC4E</name>
<description>Capture/Compare 4 output
enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC3NP</name>
<description>Capture/Compare 3 output
Polarity</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC3NE</name>
<description>Capture/Compare 3 complementary output
enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC3P</name>
<description>Capture/Compare 3 output
Polarity</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC3E</name>
<description>Capture/Compare 3 output
enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC2NP</name>
<description>Capture/Compare 2 output
Polarity</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC2NE</name>
<description>Capture/Compare 2 complementary output
enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC2P</name>
<description>Capture/Compare 2 output
Polarity</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC2E</name>
<description>Capture/Compare 2 output
enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1NP</name>
<description>Capture/Compare 1 output
Polarity</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1NE</name>
<description>Capture/Compare 1 complementary output
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1P</name>
<description>Capture/Compare 1 output
Polarity</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CC1E</name>
<description>Capture/Compare 1 output
enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>CNT</name>
<displayName>CNT</displayName>
<description>counter</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CNT</name>
<description>counter value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>PSC</name>
<displayName>PSC</displayName>
<description>prescaler</description>
<addressOffset>0x28</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>PSC</name>
<description>Prescaler value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>65536</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>ARR</name>
<displayName>ARR</displayName>
<description>auto-reload register</description>
<addressOffset>0x2C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ARR</name>
<description>Auto-reload value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>RCR</name>
<displayName>RCR</displayName>
<description>repetition counter register</description>
<addressOffset>0x30</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>REP</name>
<description>Repetition counter value</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>CCR%s</name>
<displayName>CCR1</displayName>
<description>capture/compare register 1</description>
<addressOffset>0x34</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CCR</name>
<description>Capture/Compare 1 value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
<dim>4</dim><dimIndex>1,2,3,4</dimIndex><dimIncrement>0x4</dimIncrement></register>
<register>
<name>BDTR</name>
<displayName>BDTR</displayName>
<description>break and dead-time register</description>
<addressOffset>0x44</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>MOE</name>
<description>Main output enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AOE</name>
<description>Automatic output enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BKP</name>
<description>Break polarity</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BKE</name>
<description>Break enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OSSR</name>
<description>Off-state selection for Run
mode</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OSSI</name>
<description>Off-state selection for Idle
mode</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LOCK</name>
<description>Lock configuration</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>DTG</name>
<description>Dead-time generator setup</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>DCR</name>
<displayName>DCR</displayName>
<description>DMA control register</description>
<addressOffset>0x48</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>DBL</name>
<description>DMA burst length</description>
<bitOffset>8</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>DBA</name>
<description>DMA base address</description>
<bitOffset>0</bitOffset>
<bitWidth>5</bitWidth>
</field>
</fields>
</register>
<register>
<name>DMAR</name>
<displayName>DMAR</displayName>
<description>DMA address for full transfer</description>
<addressOffset>0x4C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>DMAB</name>
<description>DMA register for burst
accesses</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>OR1</name>
<displayName>OR1</displayName>
<description>DMA address for full transfer</description>
<addressOffset>0x50</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>ETR_ADC1_RMP</name>
<description>External trigger remap on ADC1 analog
watchdog</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>ETR_ADC3_RMP</name>
<description>External trigger remap on ADC3 analog
watchdog</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>TI1_RMP</name>
<description>Input Capture 1 remap</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>CCMR3_Output</name>
<displayName>CCMR3_Output</displayName>
<description>capture/compare mode register 2 (output
mode)</description>
<addressOffset>0x54</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OC6M_bit3</name>
<description>Output Compare 6 mode bit
3</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC5M_bit3</name>
<description>Output Compare 5 mode bit
3</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>OC6CE</name>
<description>Output compare 6 clear
enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC6M</name>
<description>Output compare 6 mode</description>
<bitOffset>12</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>OC6PE</name>
<description>Output compare 6 preload
enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC6FE</name>
<description>Output compare 6 fast
enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC5CE</name>
<description>Output compare 5 clear
enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC5M</name>
<description>Output compare 5 mode</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>OC5PE</name>
<description>Output compare 5 preload
enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OC5FE</name>
<description>Output compare 5 fast
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>CCR5</name>
<displayName>CCR5</displayName>
<description>capture/compare register 4</description>
<addressOffset>0x58</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CCR</name>
<description>Capture/Compare value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
<field>
<name>GC5C1</name>
<description>Group Channel 5 and Channel
1</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>GC5C2</name>
<description>Group Channel 5 and Channel
2</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>GC5C3</name>
<description>Group Channel 5 and Channel
3</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>CCR6</name>
<displayName>CCR6</displayName>
<description>capture/compare register 4</description>
<addressOffset>0x5C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CCR</name>
<description>Capture/Compare value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>OR2</name>
<displayName>OR2</displayName>
<description>DMA address for full transfer</description>
<addressOffset>0x60</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000001</resetValue>
<fields>
<field>
<name>BKINE</name>
<description>BRK BKIN input enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BKCMP1E</name>
<description>BRK COMP1 enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BKCMP2E</name>
<description>BRK COMP2 enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BKDFBK0E</name>
<description>BRK DFSDM_BREAK0 enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BKINP</name>
<description>BRK BKIN input polarity</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BKCMP1P</name>
<description>BRK COMP1 input polarity</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BKCMP2P</name>
<description>BRK COMP2 input polarity</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ETRSEL</name>
<description>ETR source selection</description>
<bitOffset>14</bitOffset>
<bitWidth>3</bitWidth>
</field>
</fields>
</register>
<register>
<name>OR3</name>
<displayName>OR3</displayName>
<description>DMA address for full transfer</description>
<addressOffset>0x64</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000001</resetValue>
<fields>
<field>
<name>BK2INE</name>
<description>BRK2 BKIN input enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BK2CMP1E</name>
<description>BRK2 COMP1 enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BK2CMP2E</name>
<description>BRK2 COMP2 enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BK2DFBK0E</name>
<description>BRK2 DFSDM_BREAK0 enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BK2INP</name>
<description>BRK2 BKIN input polarity</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BK2CMP1P</name>
<description>BRK2 COMP1 input polarity</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BK2CMP2P</name>
<description>BRK2 COMP2 input polarity</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>TIM6</name>
<description>Basic-timers</description>
<groupName>TIM</groupName>
<baseAddress>0x40001000</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>TIM6_DACUNDER</name>
<description>TIM6 global and DAC1 and 2 underrun error
interrupts</description>
<value>54</value>
</interrupt>
<registers>
<register>
<name>CR1</name>
<displayName>CR1</displayName>
<description>control register 1</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>ARPE</name>
<description>Auto-reload preload enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ARPE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>TIMx_APRR register is not buffered</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>TIMx_APRR register is buffered</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>OPM</name>
<description>One-pulse mode</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>OPM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Counter is not stopped at update event</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Counter stops counting at the next update event (clearing the CEN bit)</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>URS</name>
<description>Update request source</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>URS</name><usage>read-write</usage><enumeratedValue><name>AnyEvent</name><description>Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request</description><value>0</value></enumeratedValue><enumeratedValue><name>CounterOnly</name><description>Only counter overflow/underflow generates an update interrupt or DMA request</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>UDIS</name>
<description>Update disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UDIS</name><usage>read-write</usage><enumeratedValue><name>Enabled</name><description>Update event enabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Disabled</name><description>Update event disabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CEN</name>
<description>Counter enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Counter disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Counter enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CR2</name>
<displayName>CR2</displayName>
<description>control register 2</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>MMS</name>
<description>Master mode selection</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
<enumeratedValues><name>MMS</name><usage>read-write</usage><enumeratedValue><name>Reset</name><description>Use UG bit from TIMx_EGR register</description><value>0</value></enumeratedValue><enumeratedValue><name>Enable</name><description>Use CNT bit from TIMx_CEN register</description><value>1</value></enumeratedValue><enumeratedValue><name>Update</name><description>Use the update event</description><value>2</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>DIER</name>
<displayName>DIER</displayName>
<description>DMA/Interrupt enable register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>UDE</name>
<description>Update DMA request enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UDE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Update DMA request disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Update DMA request enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>UIE</name>
<description>Update interrupt enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Update interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Update interrupt enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SR</name>
<displayName>SR</displayName>
<description>status register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>UIF</name>
<description>Update interrupt flag</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UIF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>No update occurred</description><value>0</value></enumeratedValue><enumeratedValue><name>UpdatePending</name><description>Update interrupt pending.</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>EGR</name>
<displayName>EGR</displayName>
<description>event generation register</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>UG</name>
<description>Update generation</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UG</name><usage>read-write</usage><enumeratedValue><name>Update</name><description>Re-initializes the timer counter and generates an update of the reigsters.</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CNT</name>
<displayName>CNT</displayName>
<description>counter</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CNT</name>
<description>Low counter value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>65536</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>PSC</name>
<displayName>PSC</displayName>
<description>prescaler</description>
<addressOffset>0x28</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>PSC</name>
<description>Prescaler value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>65536</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>ARR</name>
<displayName>ARR</displayName>
<description>auto-reload register</description>
<addressOffset>0x2C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ARR</name>
<description>Low Auto-reload value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>65536</maximum></range></writeConstraint>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral derivedFrom="TIM6">
<name>TIM7</name>
<baseAddress>0x40001400</baseAddress>
<interrupt>
<name>TIM7</name>
<description>TIM7 global interrupt</description>
<value>55</value>
</interrupt>
</peripheral>
<peripheral>
<name>LPTIM1</name>
<description>Low power timer</description>
<groupName>LPTIM</groupName>
<baseAddress>0x40007C00</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>LPTIM1</name>
<description>LP TIM1 interrupt</description>
<value>65</value>
</interrupt>
<registers>
<register>
<name>ISR</name>
<displayName>ISR</displayName>
<description>Interrupt and Status Register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DOWN</name>
<description>Counter direction change up to
down</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>UP</name>
<description>Counter direction change down to
up</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ARROK</name>
<description>Autoreload register update
OK</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CMPOK</name>
<description>Compare register update OK</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EXTTRIG</name>
<description>External trigger edge
event</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ARRM</name>
<description>Autoreload match</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CMPM</name>
<description>Compare match</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>ICR</name>
<displayName>ICR</displayName>
<description>Interrupt Clear Register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DOWNCF</name>
<description>Direction change to down Clear
Flag</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>UPCF</name>
<description>Direction change to UP Clear
Flag</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ARROKCF</name>
<description>Autoreload register update OK Clear
Flag</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CMPOKCF</name>
<description>Compare register update OK Clear
Flag</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EXTTRIGCF</name>
<description>External trigger valid edge Clear
Flag</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ARRMCF</name>
<description>Autoreload match Clear
Flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CMPMCF</name>
<description>compare match Clear Flag</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>IER</name>
<displayName>IER</displayName>
<description>Interrupt Enable Register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DOWNIE</name>
<description>Direction change to down Interrupt
Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>UPIE</name>
<description>Direction change to UP Interrupt
Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ARROKIE</name>
<description>Autoreload register update OK Interrupt
Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CMPOKIE</name>
<description>Compare register update OK Interrupt
Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EXTTRIGIE</name>
<description>External trigger valid edge Interrupt
Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ARRMIE</name>
<description>Autoreload match Interrupt
Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CMPMIE</name>
<description>Compare match Interrupt
Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>CFGR</name>
<displayName>CFGR</displayName>
<description>Configuration Register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ENC</name>
<description>Encoder mode enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>COUNTMODE</name>
<description>counter mode enabled</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PRELOAD</name>
<description>Registers update mode</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WAVPOL</name>
<description>Waveform shape polarity</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WAVE</name>
<description>Waveform shape</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIMOUT</name>
<description>Timeout enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TRIGEN</name>
<description>Trigger enable and
polarity</description>
<bitOffset>17</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>TRIGSEL</name>
<description>Trigger selector</description>
<bitOffset>13</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>PRESC</name>
<description>Clock prescaler</description>
<bitOffset>9</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>TRGFLT</name>
<description>Configurable digital filter for
trigger</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>CKFLT</name>
<description>Configurable digital filter for external
clock</description>
<bitOffset>3</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>CKPOL</name>
<description>Clock Polarity</description>
<bitOffset>1</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>CKSEL</name>
<description>Clock selector</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>CR</name>
<displayName>CR</displayName>
<description>Control Register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CNTSTRT</name>
<description>Timer start in continuous
mode</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SNGSTRT</name>
<description>LPTIM start in single mode</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ENABLE</name>
<description>LPTIM Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>CMP</name>
<displayName>CMP</displayName>
<description>Compare Register</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CMP</name>
<description>Compare value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>ARR</name>
<displayName>ARR</displayName>
<description>Autoreload Register</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000001</resetValue>
<fields>
<field>
<name>ARR</name>
<description>Auto reload value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>CNT</name>
<displayName>CNT</displayName>
<description>Counter Register</description>
<addressOffset>0x1C</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CNT</name>
<description>Counter value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral derivedFrom="LPTIM1">
<name>LPTIM2</name>
<baseAddress>0x40009400</baseAddress>
<interrupt>
<name>LPTIM2</name>
<description>LP TIM2 interrupt</description>
<value>66</value>
</interrupt>
</peripheral>
<peripheral>
<name>USART1</name>
<description>Universal synchronous asynchronous receiver
transmitter</description>
<groupName>USART</groupName>
<baseAddress>0x40013800</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>USART1</name>
<description>USART1 global interrupt</description>
<value>37</value>
</interrupt>
<registers>
<register>
<name>CR1</name>
<displayName>CR1</displayName>
<description>Control register 1</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>M1</name>
<description>Word length</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>M1</name><usage>read-write</usage><enumeratedValue><name>M0</name><description>Use M0 to set the data bits</description><value>0</value></enumeratedValue><enumeratedValue><name>Bit7</name><description>1 start bit, 7 data bits, n stop bits</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>EOBIE</name>
<description>End of Block interrupt
enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>EOBIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is inhibited</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>A USART interrupt is generated when the EOBF flag is set in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RTOIE</name>
<description>Receiver timeout interrupt
enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RTOIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is inhibited</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>An USART interrupt is generated when the RTOF bit is set in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>OVER8</name>
<description>Oversampling mode</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>OVER8</name><usage>read-write</usage><enumeratedValue><name>Oversampling16</name><description>Oversampling by 16</description><value>0</value></enumeratedValue><enumeratedValue><name>Oversampling8</name><description>Oversampling by 8</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CMIE</name>
<description>Character match interrupt
enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CMIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Interrupt is generated when the CMF bit is set in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>MME</name>
<description>Mute mode enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>MME</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Receiver in active mode permanently</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Receiver can switch between mute mode and active mode</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>M0</name>
<description>Word length</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>M0</name><usage>read-write</usage><enumeratedValue><name>Bit8</name><description>1 start bit, 8 data bits, n stop bits</description><value>0</value></enumeratedValue><enumeratedValue><name>Bit9</name><description>1 start bit, 9 data bits, n stop bits</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>WAKE</name>
<description>Receiver wakeup method</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>WAKE</name><usage>read-write</usage><enumeratedValue><name>Idle</name><description>Idle line</description><value>0</value></enumeratedValue><enumeratedValue><name>Address</name><description>Address mask</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PCE</name>
<description>Parity control enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>PCE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Parity control disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Parity control enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PS</name>
<description>Parity selection</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>PS</name><usage>read-write</usage><enumeratedValue><name>Even</name><description>Even parity</description><value>0</value></enumeratedValue><enumeratedValue><name>Odd</name><description>Odd parity</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PEIE</name>
<description>PE interrupt enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>PEIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Interrupt is generated whenever PE=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TXEIE</name>
<description>interrupt enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TXEIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Interrupt is generated whenever TXE=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TCIE</name>
<description>Transmission complete interrupt
enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TCIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Interrupt is generated whenever TC=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RXNEIE</name>
<description>RXNE interrupt enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RXNEIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Interrupt is generated whenever ORE=1 or RXNE=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>IDLEIE</name>
<description>IDLE interrupt enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>IDLEIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Interrupt is generated whenever IDLE=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TE</name>
<description>Transmitter enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Transmitter is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Transmitter is enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RE</name>
<description>Receiver enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Receiver is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Receiver is enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>UESM</name>
<description>USART enable in Stop mode</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UESM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>USART not able to wake up the MCU from Stop mode</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>USART able to wake up the MCU from Stop mode</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>UE</name>
<description>USART enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>UART is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>UART is enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field><name>DEAT</name><description>Driver Enable assertion
time</description><bitOffset>21</bitOffset><bitWidth>5</bitWidth><writeConstraint><range><minimum>0</minimum><maximum>31</maximum></range></writeConstraint>
</field><field><name>DEDT</name><description>Driver Enable de-assertion
time</description><bitOffset>16</bitOffset><bitWidth>5</bitWidth><writeConstraint><range><minimum>0</minimum><maximum>31</maximum></range></writeConstraint>
</field></fields>
</register>
<register>
<name>CR2</name>
<displayName>CR2</displayName>
<description>Control register 2</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>RTOEN</name>
<description>Receiver timeout enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RTOEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Receiver timeout feature disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Receiver timeout feature enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ABREN</name>
<description>Auto baud rate enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ABREN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Auto baud rate detection is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Auto baud rate detection is enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>MSBFIRST</name>
<description>Most significant bit first</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>MSBFIRST</name><usage>read-write</usage><enumeratedValue><name>LSB</name><description>data is transmitted/received with data bit 0 first, following the start bit</description><value>0</value></enumeratedValue><enumeratedValue><name>MSB</name><description>data is transmitted/received with MSB (bit 7/8/9) first, following the start bit</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DATAINV</name>
<description>Binary data inversion</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>DATAINV</name><usage>read-write</usage><enumeratedValue><name>Positive</name><description>Logical data from the data register are send/received in positive/direct logic</description><value>0</value></enumeratedValue><enumeratedValue><name>Negative</name><description>Logical data from the data register are send/received in negative/inverse logic</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TXINV</name>
<description>TX pin active level
inversion</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TXINV</name><usage>read-write</usage><enumeratedValue><name>Standard</name><description>TX pin signal works using the standard logic levels</description><value>0</value></enumeratedValue><enumeratedValue><name>Inverted</name><description>TX pin signal values are inverted</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RXINV</name>
<description>RX pin active level
inversion</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RXINV</name><usage>read-write</usage><enumeratedValue><name>Standard</name><description>RX pin signal works using the standard logic levels</description><value>0</value></enumeratedValue><enumeratedValue><name>Inverted</name><description>RX pin signal values are inverted</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>SWAP</name>
<description>Swap TX/RX pins</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>SWAP</name><usage>read-write</usage><enumeratedValue><name>Standard</name><description>TX/RX pins are used as defined in standard pinout</description><value>0</value></enumeratedValue><enumeratedValue><name>Swapped</name><description>The TX and RX pins functions are swapped</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>LINEN</name>
<description>LIN mode enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>LINEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>LIN mode disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>LIN mode enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>STOP</name>
<description>STOP bits</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>STOP</name><usage>read-write</usage><enumeratedValue><name>Stop1</name><description>1 stop bit</description><value>0</value></enumeratedValue><enumeratedValue><name>Stop0p5</name><description>0.5 stop bit</description><value>1</value></enumeratedValue><enumeratedValue><name>Stop2</name><description>2 stop bit</description><value>2</value></enumeratedValue><enumeratedValue><name>Stop1p5</name><description>1.5 stop bit</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CLKEN</name>
<description>Clock enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CLKEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>CK pin disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>CK pin enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CPOL</name>
<description>Clock polarity</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CPOL</name><usage>read-write</usage><enumeratedValue><name>Low</name><description>Steady low value on CK pin outside transmission window</description><value>0</value></enumeratedValue><enumeratedValue><name>High</name><description>Steady high value on CK pin outside transmission window</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CPHA</name>
<description>Clock phase</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CPHA</name><usage>read-write</usage><enumeratedValue><name>First</name><description>The first clock transition is the first data capture edge</description><value>0</value></enumeratedValue><enumeratedValue><name>Second</name><description>The second clock transition is the first data capture edge</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>LBCL</name>
<description>Last bit clock pulse</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>LBCL</name><usage>read-write</usage><enumeratedValue><name>NotOutput</name><description>The clock pulse of the last data bit is not output to the CK pin</description><value>0</value></enumeratedValue><enumeratedValue><name>Output</name><description>The clock pulse of the last data bit is output to the CK pin</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>LBDIE</name>
<description>LIN break detection interrupt
enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>LBDIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is inhibited</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>An interrupt is generated whenever LBDF=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>LBDL</name>
<description>LIN break detection length</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>LBDL</name><usage>read-write</usage><enumeratedValue><name>Bit10</name><description>10-bit break detection</description><value>0</value></enumeratedValue><enumeratedValue><name>Bit11</name><description>11-bit break detection</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ADDM7</name>
<description>7-bit Address Detection/4-bit Address
Detection</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ADDM7</name><usage>read-write</usage><enumeratedValue><name>Bit4</name><description>4-bit address detection</description><value>0</value></enumeratedValue><enumeratedValue><name>Bit7</name><description>7-bit address detection</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field><name>ADD</name><description>Address of the USART node</description><bitOffset>24</bitOffset><bitWidth>8</bitWidth><writeConstraint><range><minimum>0</minimum><maximum>255</maximum></range></writeConstraint>
</field><field><name>ABRMOD</name><description>Auto baud rate mode</description><bitOffset>21</bitOffset><bitWidth>2</bitWidth><enumeratedValues><name>ABRMOD</name><usage>read-write</usage><enumeratedValue><name>Start</name><description>Measurement of the start bit is used to detect the baud rate</description><value>0</value></enumeratedValue><enumeratedValue><name>Edge</name><description>Falling edge to falling edge measurement</description><value>1</value></enumeratedValue><enumeratedValue><name>Frame7F</name><description>0x7F frame detection</description><value>2</value></enumeratedValue><enumeratedValue><name>Frame55</name><description>0x55 frame detection</description><value>3</value></enumeratedValue></enumeratedValues>
</field></fields>
</register>
<register>
<name>CR3</name>
<displayName>CR3</displayName>
<description>Control register 3</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>WUFIE</name>
<description>Wakeup from Stop mode interrupt
enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>WUFIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is inhibited</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>An USART interrupt is generated whenever WUF=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>WUS</name>
<description>Wakeup from Stop mode interrupt flag
selection</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>WUS</name><usage>read-write</usage><enumeratedValue><name>Address</name><description>WUF active on address match</description><value>0</value></enumeratedValue><enumeratedValue><name>Start</name><description>WuF active on Start bit detection</description><value>2</value></enumeratedValue><enumeratedValue><name>RXNE</name><description>WUF active on RXNE</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>SCARCNT</name>
<description>Smartcard auto-retry count</description>
<bitOffset>17</bitOffset>
<bitWidth>3</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>7</maximum></range></writeConstraint>
</field>
<field>
<name>DEP</name>
<description>Driver enable polarity
selection</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>DEP</name><usage>read-write</usage><enumeratedValue><name>High</name><description>DE signal is active high</description><value>0</value></enumeratedValue><enumeratedValue><name>Low</name><description>DE signal is active low</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DEM</name>
<description>Driver enable mode</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>DEM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>DE function is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>The DE signal is output on the RTS pin</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DDRE</name>
<description>DMA Disable on Reception
Error</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>DDRE</name><usage>read-write</usage><enumeratedValue><name>NotDisabled</name><description>DMA is not disabled in case of reception error</description><value>0</value></enumeratedValue><enumeratedValue><name>Disabled</name><description>DMA is disabled following a reception error</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>OVRDIS</name>
<description>Overrun Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>OVRDIS</name><usage>read-write</usage><enumeratedValue><name>Enabled</name><description>Overrun Error Flag, ORE, is set when received data is not read before receiving new data</description><value>0</value></enumeratedValue><enumeratedValue><name>Disabled</name><description>Overrun functionality is disabled. If new data is received while the RXNE flag is still set the ORE flag is not set and the new received data overwrites the previous content of the RDR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ONEBIT</name>
<description>One sample bit method
enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ONEBIT</name><usage>read-write</usage><enumeratedValue><name>Sample3</name><description>Three sample bit method</description><value>0</value></enumeratedValue><enumeratedValue><name>Sample1</name><description>One sample bit method</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CTSIE</name>
<description>CTS interrupt enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CTSIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is inhibited</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>An interrupt is generated whenever CTSIF=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CTSE</name>
<description>CTS enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CTSE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>CTS hardware flow control disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>CTS mode enabled, data is only transmitted when the CTS input is asserted</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RTSE</name>
<description>RTS enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RTSE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>RTS hardware flow control disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>RTS output enabled, data is only requested when there is space in the receive buffer</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DMAT</name>
<description>DMA enable transmitter</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>DMAT</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>DMA mode is disabled for transmission</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>DMA mode is enabled for transmission</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DMAR</name>
<description>DMA enable receiver</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>DMAR</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>DMA mode is disabled for reception</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>DMA mode is enabled for reception</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>SCEN</name>
<description>Smartcard mode enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>SCEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Smartcard Mode disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Smartcard Mode enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>NACK</name>
<description>Smartcard NACK enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>NACK</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>NACK transmission in case of parity error is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>NACK transmission during parity error is enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>HDSEL</name>
<description>Half-duplex selection</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>HDSEL</name><usage>read-write</usage><enumeratedValue><name>NotSelected</name><description>Half duplex mode is not selected</description><value>0</value></enumeratedValue><enumeratedValue><name>Selected</name><description>Half duplex mode is selected</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>IRLP</name>
<description>Ir low-power</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>IRLP</name><usage>read-write</usage><enumeratedValue><name>Normal</name><description>Normal mode</description><value>0</value></enumeratedValue><enumeratedValue><name>LowPower</name><description>Low-power mode</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>IREN</name>
<description>Ir mode enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>IREN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>IrDA disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>IrDA enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>EIE</name>
<description>Error interrupt enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>EIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is inhibited</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>An interrupt is generated when FE=1 or ORE=1 or NF=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>BRR</name>
<displayName>BRR</displayName>
<description>Baud rate register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field><name>BRR</name><description>DIV_Mantissa</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth><writeConstraint><range><minimum>0</minimum><maximum>65535</maximum></range></writeConstraint>
</field></fields>
</register>
<register>
<name>GTPR</name>
<displayName>GTPR</displayName>
<description>Guard time and prescaler
register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>GT</name>
<description>Guard time value</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>255</maximum></range></writeConstraint>
</field>
<field>
<name>PSC</name>
<description>Prescaler value</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>255</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>RTOR</name>
<displayName>RTOR</displayName>
<description>Receiver timeout register</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>BLEN</name>
<description>Block Length</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>255</maximum></range></writeConstraint>
</field>
<field>
<name>RTO</name>
<description>Receiver timeout value</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>16777215</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>RQR</name>
<displayName>RQR</displayName>
<description>Request register</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>TXFRQ</name>
<description>Transmit data flush
request</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TXFRQ</name><usage>read-write</usage><enumeratedValue><name>Discard</name><description>Set the TXE flags. This allows to discard the transmit data</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RXFRQ</name>
<description>Receive data flush request</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RXFRQ</name><usage>read-write</usage><enumeratedValue><name>Discard</name><description>clears the RXNE flag. This allows to discard the received data without reading it, and avoid an overrun condition</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>MMRQ</name>
<description>Mute mode request</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>MMRQ</name><usage>read-write</usage><enumeratedValue><name>Mute</name><description>Puts the USART in mute mode and sets the RWU flag</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>SBKRQ</name>
<description>Send break request</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>SBKRQ</name><usage>read-write</usage><enumeratedValue><name>Break</name><description>sets the SBKF flag and request to send a BREAK on the line, as soon as the transmit machine is available</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ABRRQ</name>
<description>Auto baud rate request</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ABRRQ</name><usage>read-write</usage><enumeratedValue><name>Request</name><description>resets the ABRF flag in the USART_ISR and request an automatic baud rate measurement on the next received data frame</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>ISR</name>
<displayName>ISR</displayName>
<description>Interrupt & status
register</description>
<addressOffset>0x1C</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00C0</resetValue>
<fields>
<field>
<name>REACK</name>
<description>REACK</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TEACK</name>
<description>TEACK</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WUF</name>
<description>WUF</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RWU</name>
<description>RWU</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SBKF</name>
<description>SBKF</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CMF</name>
<description>CMF</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BUSY</name>
<description>BUSY</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ABRF</name>
<description>ABRF</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ABRE</name>
<description>ABRE</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EOBF</name>
<description>EOBF</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RTOF</name>
<description>RTOF</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CTS</name>
<description>CTS</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CTSIF</name>
<description>CTSIF</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LBDF</name>
<description>LBDF</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXE</name>
<description>TXE</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TC</name>
<description>TC</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RXNE</name>
<description>RXNE</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>IDLE</name>
<description>IDLE</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ORE</name>
<description>ORE</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>NF</name>
<description>NF</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FE</name>
<description>FE</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PE</name>
<description>PE</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>ICR</name>
<displayName>ICR</displayName>
<description>Interrupt flag clear register</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>WUCF</name>
<description>Wakeup from Stop mode clear
flag</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>WUCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the WUF flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CMCF</name>
<description>Character match clear flag</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CMCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the CMF flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>EOBCF</name>
<description>End of block clear flag</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>EOBCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the EOBF flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RTOCF</name>
<description>Receiver timeout clear
flag</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RTOCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the RTOF flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CTSCF</name>
<description>CTS clear flag</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CTSCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the CTSIF flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>LBDCF</name>
<description>LIN break detection clear
flag</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>LBDCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the LBDF flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TCCF</name>
<description>Transmission complete clear
flag</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TCCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the TC flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>IDLECF</name>
<description>Idle line detected clear
flag</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>IDLECF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the IDLE flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ORECF</name>
<description>Overrun error clear flag</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ORECF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the ORE flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>NCF</name>
<description>Noise detected clear flag</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>NCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the NF flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>FECF</name>
<description>Framing error clear flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>FECF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the FE flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PECF</name>
<description>Parity error clear flag</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>PECF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the PE flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>RDR</name>
<displayName>RDR</displayName>
<description>Receive data register</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>RDR</name>
<description>Receive data value</description>
<bitOffset>0</bitOffset>
<bitWidth>9</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>255</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>TDR</name>
<displayName>TDR</displayName>
<description>Transmit data register</description>
<addressOffset>0x28</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>TDR</name>
<description>Transmit data value</description>
<bitOffset>0</bitOffset>
<bitWidth>9</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>255</maximum></range></writeConstraint>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral derivedFrom="USART1">
<name>USART2</name>
<baseAddress>0x40004400</baseAddress>
<interrupt>
<name>USART2</name>
<description>USART2 global interrupt</description>
<value>38</value>
</interrupt>
</peripheral>
<peripheral derivedFrom="USART1">
<name>UART4</name>
<baseAddress>0x40004C00</baseAddress>
<interrupt>
<name>UART4</name>
<description>UART4 global Interrupt</description>
<value>52</value>
</interrupt>
</peripheral>
<peripheral>
<name>USART3</name>
<description>Universal synchronous asynchronous receiver
transmitter</description>
<groupName>USART</groupName>
<baseAddress>0x40004800</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>USART3</name>
<description>USART3 global interrupt</description>
<value>39</value>
</interrupt>
<registers>
<register>
<name>CR1</name>
<displayName>CR1</displayName>
<description>Control register 1</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>M1</name>
<description>Word length</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>M1</name><usage>read-write</usage><enumeratedValue><name>M0</name><description>Use M0 to set the data bits</description><value>0</value></enumeratedValue><enumeratedValue><name>Bit7</name><description>1 start bit, 7 data bits, n stop bits</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>EOBIE</name>
<description>End of Block interrupt
enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>EOBIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is inhibited</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>A USART interrupt is generated when the EOBF flag is set in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RTOIE</name>
<description>Receiver timeout interrupt
enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RTOIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is inhibited</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>An USART interrupt is generated when the RTOF bit is set in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>OVER8</name>
<description>Oversampling mode</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>OVER8</name><usage>read-write</usage><enumeratedValue><name>Oversampling16</name><description>Oversampling by 16</description><value>0</value></enumeratedValue><enumeratedValue><name>Oversampling8</name><description>Oversampling by 8</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CMIE</name>
<description>Character match interrupt
enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CMIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Interrupt is generated when the CMF bit is set in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>MME</name>
<description>Mute mode enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>MME</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Receiver in active mode permanently</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Receiver can switch between mute mode and active mode</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>M0</name>
<description>Word length</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>M0</name><usage>read-write</usage><enumeratedValue><name>Bit8</name><description>1 start bit, 8 data bits, n stop bits</description><value>0</value></enumeratedValue><enumeratedValue><name>Bit9</name><description>1 start bit, 9 data bits, n stop bits</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>WAKE</name>
<description>Receiver wakeup method</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>WAKE</name><usage>read-write</usage><enumeratedValue><name>Idle</name><description>Idle line</description><value>0</value></enumeratedValue><enumeratedValue><name>Address</name><description>Address mask</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PCE</name>
<description>Parity control enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>PCE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Parity control disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Parity control enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PS</name>
<description>Parity selection</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>PS</name><usage>read-write</usage><enumeratedValue><name>Even</name><description>Even parity</description><value>0</value></enumeratedValue><enumeratedValue><name>Odd</name><description>Odd parity</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PEIE</name>
<description>PE interrupt enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>PEIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Interrupt is generated whenever PE=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TXEIE</name>
<description>interrupt enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TXEIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Interrupt is generated whenever TXE=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TCIE</name>
<description>Transmission complete interrupt
enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TCIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Interrupt is generated whenever TC=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RXNEIE</name>
<description>RXNE interrupt enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RXNEIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Interrupt is generated whenever ORE=1 or RXNE=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>IDLEIE</name>
<description>IDLE interrupt enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>IDLEIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Interrupt is generated whenever IDLE=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TE</name>
<description>Transmitter enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Transmitter is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Transmitter is enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RE</name>
<description>Receiver enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Receiver is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Receiver is enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>UESM</name>
<description>USART enable in Stop mode</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UESM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>USART not able to wake up the MCU from Stop mode</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>USART able to wake up the MCU from Stop mode</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>UE</name>
<description>USART enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>UART is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>UART is enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field><name>DEAT</name><description>Driver Enable assertion
time</description><bitOffset>21</bitOffset><bitWidth>5</bitWidth><writeConstraint><range><minimum>0</minimum><maximum>31</maximum></range></writeConstraint>
</field><field><name>DEDT</name><description>Driver Enable de-assertion
time</description><bitOffset>16</bitOffset><bitWidth>5</bitWidth><writeConstraint><range><minimum>0</minimum><maximum>31</maximum></range></writeConstraint>
</field></fields>
</register>
<register>
<name>CR2</name>
<displayName>CR2</displayName>
<description>Control register 2</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>RTOEN</name>
<description>Receiver timeout enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RTOEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Receiver timeout feature disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Receiver timeout feature enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ABREN</name>
<description>Auto baud rate enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ABREN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Auto baud rate detection is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Auto baud rate detection is enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>MSBFIRST</name>
<description>Most significant bit first</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>MSBFIRST</name><usage>read-write</usage><enumeratedValue><name>LSB</name><description>data is transmitted/received with data bit 0 first, following the start bit</description><value>0</value></enumeratedValue><enumeratedValue><name>MSB</name><description>data is transmitted/received with MSB (bit 7/8/9) first, following the start bit</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DATAINV</name>
<description>Binary data inversion</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>DATAINV</name><usage>read-write</usage><enumeratedValue><name>Positive</name><description>Logical data from the data register are send/received in positive/direct logic</description><value>0</value></enumeratedValue><enumeratedValue><name>Negative</name><description>Logical data from the data register are send/received in negative/inverse logic</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TXINV</name>
<description>TX pin active level
inversion</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TXINV</name><usage>read-write</usage><enumeratedValue><name>Standard</name><description>TX pin signal works using the standard logic levels</description><value>0</value></enumeratedValue><enumeratedValue><name>Inverted</name><description>TX pin signal values are inverted</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RXINV</name>
<description>RX pin active level
inversion</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RXINV</name><usage>read-write</usage><enumeratedValue><name>Standard</name><description>RX pin signal works using the standard logic levels</description><value>0</value></enumeratedValue><enumeratedValue><name>Inverted</name><description>RX pin signal values are inverted</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>SWAP</name>
<description>Swap TX/RX pins</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>SWAP</name><usage>read-write</usage><enumeratedValue><name>Standard</name><description>TX/RX pins are used as defined in standard pinout</description><value>0</value></enumeratedValue><enumeratedValue><name>Swapped</name><description>The TX and RX pins functions are swapped</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>LINEN</name>
<description>LIN mode enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>LINEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>LIN mode disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>LIN mode enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>STOP</name>
<description>STOP bits</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>STOP</name><usage>read-write</usage><enumeratedValue><name>Stop1</name><description>1 stop bit</description><value>0</value></enumeratedValue><enumeratedValue><name>Stop0p5</name><description>0.5 stop bit</description><value>1</value></enumeratedValue><enumeratedValue><name>Stop2</name><description>2 stop bit</description><value>2</value></enumeratedValue><enumeratedValue><name>Stop1p5</name><description>1.5 stop bit</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CLKEN</name>
<description>Clock enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CLKEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>CK pin disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>CK pin enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CPOL</name>
<description>Clock polarity</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CPOL</name><usage>read-write</usage><enumeratedValue><name>Low</name><description>Steady low value on CK pin outside transmission window</description><value>0</value></enumeratedValue><enumeratedValue><name>High</name><description>Steady high value on CK pin outside transmission window</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CPHA</name>
<description>Clock phase</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CPHA</name><usage>read-write</usage><enumeratedValue><name>First</name><description>The first clock transition is the first data capture edge</description><value>0</value></enumeratedValue><enumeratedValue><name>Second</name><description>The second clock transition is the first data capture edge</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>LBCL</name>
<description>Last bit clock pulse</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>LBCL</name><usage>read-write</usage><enumeratedValue><name>NotOutput</name><description>The clock pulse of the last data bit is not output to the CK pin</description><value>0</value></enumeratedValue><enumeratedValue><name>Output</name><description>The clock pulse of the last data bit is output to the CK pin</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>LBDIE</name>
<description>LIN break detection interrupt
enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>LBDIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is inhibited</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>An interrupt is generated whenever LBDF=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>LBDL</name>
<description>LIN break detection length</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>LBDL</name><usage>read-write</usage><enumeratedValue><name>Bit10</name><description>10-bit break detection</description><value>0</value></enumeratedValue><enumeratedValue><name>Bit11</name><description>11-bit break detection</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ADDM7</name>
<description>7-bit Address Detection/4-bit Address
Detection</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ADDM7</name><usage>read-write</usage><enumeratedValue><name>Bit4</name><description>4-bit address detection</description><value>0</value></enumeratedValue><enumeratedValue><name>Bit7</name><description>7-bit address detection</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field><name>ADD</name><description>Address of the USART node</description><bitOffset>24</bitOffset><bitWidth>8</bitWidth><writeConstraint><range><minimum>0</minimum><maximum>255</maximum></range></writeConstraint>
</field><field><name>ABRMOD</name><description>Auto baud rate mode</description><bitOffset>21</bitOffset><bitWidth>2</bitWidth><enumeratedValues><name>ABRMOD</name><usage>read-write</usage><enumeratedValue><name>Start</name><description>Measurement of the start bit is used to detect the baud rate</description><value>0</value></enumeratedValue><enumeratedValue><name>Edge</name><description>Falling edge to falling edge measurement</description><value>1</value></enumeratedValue><enumeratedValue><name>Frame7F</name><description>0x7F frame detection</description><value>2</value></enumeratedValue><enumeratedValue><name>Frame55</name><description>0x55 frame detection</description><value>3</value></enumeratedValue></enumeratedValues>
</field></fields>
</register>
<register>
<name>CR3</name>
<displayName>CR3</displayName>
<description>Control register 3</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>WUFIE</name>
<description>Wakeup from Stop mode interrupt
enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>WUFIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is inhibited</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>An USART interrupt is generated whenever WUF=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>WUS</name>
<description>Wakeup from Stop mode interrupt flag
selection</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>WUS</name><usage>read-write</usage><enumeratedValue><name>Address</name><description>WUF active on address match</description><value>0</value></enumeratedValue><enumeratedValue><name>Start</name><description>WuF active on Start bit detection</description><value>2</value></enumeratedValue><enumeratedValue><name>RXNE</name><description>WUF active on RXNE</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>SCARCNT</name>
<description>Smartcard auto-retry count</description>
<bitOffset>17</bitOffset>
<bitWidth>3</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>7</maximum></range></writeConstraint>
</field>
<field>
<name>DEP</name>
<description>Driver enable polarity
selection</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>DEP</name><usage>read-write</usage><enumeratedValue><name>High</name><description>DE signal is active high</description><value>0</value></enumeratedValue><enumeratedValue><name>Low</name><description>DE signal is active low</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DEM</name>
<description>Driver enable mode</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>DEM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>DE function is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>The DE signal is output on the RTS pin</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DDRE</name>
<description>DMA Disable on Reception
Error</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>DDRE</name><usage>read-write</usage><enumeratedValue><name>NotDisabled</name><description>DMA is not disabled in case of reception error</description><value>0</value></enumeratedValue><enumeratedValue><name>Disabled</name><description>DMA is disabled following a reception error</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>OVRDIS</name>
<description>Overrun Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>OVRDIS</name><usage>read-write</usage><enumeratedValue><name>Enabled</name><description>Overrun Error Flag, ORE, is set when received data is not read before receiving new data</description><value>0</value></enumeratedValue><enumeratedValue><name>Disabled</name><description>Overrun functionality is disabled. If new data is received while the RXNE flag is still set the ORE flag is not set and the new received data overwrites the previous content of the RDR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ONEBIT</name>
<description>One sample bit method
enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ONEBIT</name><usage>read-write</usage><enumeratedValue><name>Sample3</name><description>Three sample bit method</description><value>0</value></enumeratedValue><enumeratedValue><name>Sample1</name><description>One sample bit method</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CTSIE</name>
<description>CTS interrupt enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CTSIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is inhibited</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>An interrupt is generated whenever CTSIF=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CTSE</name>
<description>CTS enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CTSE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>CTS hardware flow control disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>CTS mode enabled, data is only transmitted when the CTS input is asserted</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RTSE</name>
<description>RTS enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RTSE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>RTS hardware flow control disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>RTS output enabled, data is only requested when there is space in the receive buffer</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DMAT</name>
<description>DMA enable transmitter</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>DMAT</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>DMA mode is disabled for transmission</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>DMA mode is enabled for transmission</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DMAR</name>
<description>DMA enable receiver</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>DMAR</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>DMA mode is disabled for reception</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>DMA mode is enabled for reception</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>SCEN</name>
<description>Smartcard mode enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>SCEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Smartcard Mode disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Smartcard Mode enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>NACK</name>
<description>Smartcard NACK enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>NACK</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>NACK transmission in case of parity error is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>NACK transmission during parity error is enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>HDSEL</name>
<description>Half-duplex selection</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>HDSEL</name><usage>read-write</usage><enumeratedValue><name>NotSelected</name><description>Half duplex mode is not selected</description><value>0</value></enumeratedValue><enumeratedValue><name>Selected</name><description>Half duplex mode is selected</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>IRLP</name>
<description>Ir low-power</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>IRLP</name><usage>read-write</usage><enumeratedValue><name>Normal</name><description>Normal mode</description><value>0</value></enumeratedValue><enumeratedValue><name>LowPower</name><description>Low-power mode</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>IREN</name>
<description>Ir mode enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>IREN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>IrDA disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>IrDA enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>EIE</name>
<description>Error interrupt enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>EIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is inhibited</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>An interrupt is generated when FE=1 or ORE=1 or NF=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>UCESM</name>
<description>USART Clock Enable in Stop
mode</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UCESM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>USART clock is disabled in STOP mode</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>USART clock is enabled in STOP mode</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TCBGTIE</name>
<description>Transmission complete before guard time
interrupt enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TCBGTIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is inhibited</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>An USART interrupt is generated whenever TCBGT=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>BRR</name>
<displayName>BRR</displayName>
<description>Baud rate register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field><name>BRR</name><description>USARTDIV</description><bitOffset>0</bitOffset><bitWidth>12</bitWidth><writeConstraint><range><minimum>0</minimum><maximum>65535</maximum></range></writeConstraint>
</field></fields>
</register>
<register>
<name>GTPR</name>
<displayName>GTPR</displayName>
<description>Guard time and prescaler
register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>GT</name>
<description>Guard time value</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>255</maximum></range></writeConstraint>
</field>
<field>
<name>PSC</name>
<description>Prescaler value</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>255</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>RTOR</name>
<displayName>RTOR</displayName>
<description>Receiver timeout register</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>BLEN</name>
<description>Block Length</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>255</maximum></range></writeConstraint>
</field>
<field>
<name>RTO</name>
<description>Receiver timeout value</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>16777215</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>RQR</name>
<displayName>RQR</displayName>
<description>Request register</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>TXFRQ</name>
<description>Transmit data flush
request</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TXFRQ</name><usage>read-write</usage><enumeratedValue><name>Discard</name><description>Set the TXE flags. This allows to discard the transmit data</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RXFRQ</name>
<description>Receive data flush request</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RXFRQ</name><usage>read-write</usage><enumeratedValue><name>Discard</name><description>clears the RXNE flag. This allows to discard the received data without reading it, and avoid an overrun condition</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>MMRQ</name>
<description>Mute mode request</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>MMRQ</name><usage>read-write</usage><enumeratedValue><name>Mute</name><description>Puts the USART in mute mode and sets the RWU flag</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>SBKRQ</name>
<description>Send break request</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>SBKRQ</name><usage>read-write</usage><enumeratedValue><name>Break</name><description>sets the SBKF flag and request to send a BREAK on the line, as soon as the transmit machine is available</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ABRRQ</name>
<description>Auto baud rate request</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ABRRQ</name><usage>read-write</usage><enumeratedValue><name>Request</name><description>resets the ABRF flag in the USART_ISR and request an automatic baud rate measurement on the next received data frame</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>ISR</name>
<displayName>ISR</displayName>
<description>Interrupt & status
register</description>
<addressOffset>0x1C</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00C0</resetValue>
<fields>
<field>
<name>REACK</name>
<description>REACK</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TEACK</name>
<description>TEACK</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WUF</name>
<description>WUF</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RWU</name>
<description>RWU</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SBKF</name>
<description>SBKF</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CMF</name>
<description>CMF</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BUSY</name>
<description>BUSY</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ABRF</name>
<description>ABRF</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ABRE</name>
<description>ABRE</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EOBF</name>
<description>EOBF</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RTOF</name>
<description>RTOF</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CTS</name>
<description>CTS</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CTSIF</name>
<description>CTSIF</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LBDF</name>
<description>LBDF</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXE</name>
<description>TXE</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TC</name>
<description>TC</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RXNE</name>
<description>RXNE</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>IDLE</name>
<description>IDLE</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ORE</name>
<description>ORE</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>NF</name>
<description>NF</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FE</name>
<description>FE</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PE</name>
<description>PE</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TCBGT</name>
<description>Transmission complete before guard time
completion</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TCBGT</name><usage>read-write</usage><enumeratedValue><name>NotCompleted</name><description>Transmission not completed</description><value>0</value></enumeratedValue><enumeratedValue><name>Completed</name><description>Transmission has completed</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>ICR</name>
<displayName>ICR</displayName>
<description>Interrupt flag clear register</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>WUCF</name>
<description>Wakeup from Stop mode clear
flag</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>WUCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the WUF flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CMCF</name>
<description>Character match clear flag</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CMCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the CMF flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>EOBCF</name>
<description>End of block clear flag</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>EOBCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the EOBF flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RTOCF</name>
<description>Receiver timeout clear
flag</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RTOCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the RTOF flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CTSCF</name>
<description>CTS clear flag</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CTSCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the CTSIF flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>LBDCF</name>
<description>LIN break detection clear
flag</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>LBDCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the LBDF flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TCCF</name>
<description>Transmission complete clear
flag</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TCCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the TC flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>IDLECF</name>
<description>Idle line detected clear
flag</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>IDLECF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the IDLE flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ORECF</name>
<description>Overrun error clear flag</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ORECF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the ORE flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>NCF</name>
<description>Noise detected clear flag</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>NCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the NF flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>FECF</name>
<description>Framing error clear flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>FECF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the FE flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PECF</name>
<description>Parity error clear flag</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>PECF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the PE flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>RDR</name>
<displayName>RDR</displayName>
<description>Receive data register</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>RDR</name>
<description>Receive data value</description>
<bitOffset>0</bitOffset>
<bitWidth>9</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>255</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>TDR</name>
<displayName>TDR</displayName>
<description>Transmit data register</description>
<addressOffset>0x28</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>TDR</name>
<description>Transmit data value</description>
<bitOffset>0</bitOffset>
<bitWidth>9</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>255</maximum></range></writeConstraint>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>LPUART1</name>
<description>Universal synchronous asynchronous receiver
transmitter</description>
<groupName>USART</groupName>
<baseAddress>0x40008000</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>LPUART1</name>
<description>LPUART1 global interrupt</description>
<value>70</value>
</interrupt>
<registers>
<register>
<name>CR1</name>
<displayName>CR1</displayName>
<description>Control register 1</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>M1</name>
<description>Word length</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>M1</name><usage>read-write</usage><enumeratedValue><name>M0</name><description>Use M0 to set the data bits</description><value>0</value></enumeratedValue><enumeratedValue><name>Bit7</name><description>1 start bit, 7 data bits, n stop bits</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CMIE</name>
<description>Character match interrupt
enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CMIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Interrupt is generated when the CMF bit is set in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>MME</name>
<description>Mute mode enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>MME</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Receiver in active mode permanently</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Receiver can switch between mute mode and active mode</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>M0</name>
<description>Word length</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>M0</name><usage>read-write</usage><enumeratedValue><name>Bit8</name><description>1 start bit, 8 data bits, n stop bits</description><value>0</value></enumeratedValue><enumeratedValue><name>Bit9</name><description>1 start bit, 9 data bits, n stop bits</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>WAKE</name>
<description>Receiver wakeup method</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>WAKE</name><usage>read-write</usage><enumeratedValue><name>Idle</name><description>Idle line</description><value>0</value></enumeratedValue><enumeratedValue><name>Address</name><description>Address mask</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PCE</name>
<description>Parity control enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>PCE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Parity control disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Parity control enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PS</name>
<description>Parity selection</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>PS</name><usage>read-write</usage><enumeratedValue><name>Even</name><description>Even parity</description><value>0</value></enumeratedValue><enumeratedValue><name>Odd</name><description>Odd parity</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PEIE</name>
<description>PE interrupt enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>PEIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Interrupt is generated whenever PE=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TXEIE</name>
<description>interrupt enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TXEIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Interrupt is generated whenever TXE=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TCIE</name>
<description>Transmission complete interrupt
enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TCIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Interrupt is generated whenever TC=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RXNEIE</name>
<description>RXNE interrupt enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RXNEIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Interrupt is generated whenever ORE=1 or RXNE=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>IDLEIE</name>
<description>IDLE interrupt enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>IDLEIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Interrupt is generated whenever IDLE=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TE</name>
<description>Transmitter enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Transmitter is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Transmitter is enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RE</name>
<description>Receiver enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Receiver is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Receiver is enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>UESM</name>
<description>USART enable in Stop mode</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UESM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>USART not able to wake up the MCU from Stop mode</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>USART able to wake up the MCU from Stop mode</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>UE</name>
<description>USART enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>UE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>UART is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>UART is enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field><name>DEAT</name><description>Driver Enable assertion
time</description><bitOffset>21</bitOffset><bitWidth>5</bitWidth><writeConstraint><range><minimum>0</minimum><maximum>31</maximum></range></writeConstraint>
</field><field><name>DEDT</name><description>Driver Enable de-assertion
time</description><bitOffset>16</bitOffset><bitWidth>5</bitWidth><writeConstraint><range><minimum>0</minimum><maximum>31</maximum></range></writeConstraint>
</field></fields>
</register>
<register>
<name>CR2</name>
<displayName>CR2</displayName>
<description>Control register 2</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>MSBFIRST</name>
<description>Most significant bit first</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>MSBFIRST</name><usage>read-write</usage><enumeratedValue><name>LSB</name><description>data is transmitted/received with data bit 0 first, following the start bit</description><value>0</value></enumeratedValue><enumeratedValue><name>MSB</name><description>data is transmitted/received with MSB (bit 7/8/9) first, following the start bit</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DATAINV</name>
<description>Binary data inversion</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>DATAINV</name><usage>read-write</usage><enumeratedValue><name>Positive</name><description>Logical data from the data register are send/received in positive/direct logic</description><value>0</value></enumeratedValue><enumeratedValue><name>Negative</name><description>Logical data from the data register are send/received in negative/inverse logic</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TXINV</name>
<description>TX pin active level
inversion</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TXINV</name><usage>read-write</usage><enumeratedValue><name>Standard</name><description>TX pin signal works using the standard logic levels</description><value>0</value></enumeratedValue><enumeratedValue><name>Inverted</name><description>TX pin signal values are inverted</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RXINV</name>
<description>RX pin active level
inversion</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RXINV</name><usage>read-write</usage><enumeratedValue><name>Standard</name><description>RX pin signal works using the standard logic levels</description><value>0</value></enumeratedValue><enumeratedValue><name>Inverted</name><description>RX pin signal values are inverted</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>SWAP</name>
<description>Swap TX/RX pins</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>SWAP</name><usage>read-write</usage><enumeratedValue><name>Standard</name><description>TX/RX pins are used as defined in standard pinout</description><value>0</value></enumeratedValue><enumeratedValue><name>Swapped</name><description>The TX and RX pins functions are swapped</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>STOP</name>
<description>STOP bits</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>STOP</name><usage>read-write</usage><enumeratedValue><name>Stop1</name><description>1 stop bit</description><value>0</value></enumeratedValue><enumeratedValue><name>Stop0p5</name><description>0.5 stop bit</description><value>1</value></enumeratedValue><enumeratedValue><name>Stop2</name><description>2 stop bit</description><value>2</value></enumeratedValue><enumeratedValue><name>Stop1p5</name><description>1.5 stop bit</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CLKEN</name>
<description>Clock enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CLKEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>CK pin disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>CK pin enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ADDM7</name>
<description>7-bit Address Detection/4-bit Address
Detection</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ADDM7</name><usage>read-write</usage><enumeratedValue><name>Bit4</name><description>4-bit address detection</description><value>0</value></enumeratedValue><enumeratedValue><name>Bit7</name><description>7-bit address detection</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field><name>ADD</name><description>Address of the USART node</description><bitOffset>24</bitOffset><bitWidth>8</bitWidth><writeConstraint><range><minimum>0</minimum><maximum>255</maximum></range></writeConstraint>
</field></fields>
</register>
<register>
<name>CR3</name>
<displayName>CR3</displayName>
<description>Control register 3</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>WUFIE</name>
<description>Wakeup from Stop mode interrupt
enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>WUFIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is inhibited</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>An USART interrupt is generated whenever WUF=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>WUS</name>
<description>Wakeup from Stop mode interrupt flag
selection</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>WUS</name><usage>read-write</usage><enumeratedValue><name>Address</name><description>WUF active on address match</description><value>0</value></enumeratedValue><enumeratedValue><name>Start</name><description>WuF active on Start bit detection</description><value>2</value></enumeratedValue><enumeratedValue><name>RXNE</name><description>WUF active on RXNE</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DEP</name>
<description>Driver enable polarity
selection</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>DEP</name><usage>read-write</usage><enumeratedValue><name>High</name><description>DE signal is active high</description><value>0</value></enumeratedValue><enumeratedValue><name>Low</name><description>DE signal is active low</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DEM</name>
<description>Driver enable mode</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>DEM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>DE function is disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>The DE signal is output on the RTS pin</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DDRE</name>
<description>DMA Disable on Reception
Error</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>DDRE</name><usage>read-write</usage><enumeratedValue><name>NotDisabled</name><description>DMA is not disabled in case of reception error</description><value>0</value></enumeratedValue><enumeratedValue><name>Disabled</name><description>DMA is disabled following a reception error</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>OVRDIS</name>
<description>Overrun Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>OVRDIS</name><usage>read-write</usage><enumeratedValue><name>Enabled</name><description>Overrun Error Flag, ORE, is set when received data is not read before receiving new data</description><value>0</value></enumeratedValue><enumeratedValue><name>Disabled</name><description>Overrun functionality is disabled. If new data is received while the RXNE flag is still set the ORE flag is not set and the new received data overwrites the previous content of the RDR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CTSIE</name>
<description>CTS interrupt enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CTSIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is inhibited</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>An interrupt is generated whenever CTSIF=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CTSE</name>
<description>CTS enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CTSE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>CTS hardware flow control disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>CTS mode enabled, data is only transmitted when the CTS input is asserted</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RTSE</name>
<description>RTS enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RTSE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>RTS hardware flow control disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>RTS output enabled, data is only requested when there is space in the receive buffer</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DMAT</name>
<description>DMA enable transmitter</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>DMAT</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>DMA mode is disabled for transmission</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>DMA mode is enabled for transmission</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DMAR</name>
<description>DMA enable receiver</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>DMAR</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>DMA mode is disabled for reception</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>DMA mode is enabled for reception</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>HDSEL</name>
<description>Half-duplex selection</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>HDSEL</name><usage>read-write</usage><enumeratedValue><name>NotSelected</name><description>Half duplex mode is not selected</description><value>0</value></enumeratedValue><enumeratedValue><name>Selected</name><description>Half duplex mode is selected</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>EIE</name>
<description>Error interrupt enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>EIE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Interrupt is inhibited</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>An interrupt is generated when FE=1 or ORE=1 or NF=1 in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>BRR</name>
<displayName>BRR</displayName>
<description>Baud rate register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>BRR</name>
<description>BRR</description>
<bitOffset>0</bitOffset>
<bitWidth>20</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>1048575</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>RQR</name>
<displayName>RQR</displayName>
<description>Request register</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>RXFRQ</name>
<description>Receive data flush request</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RXFRQ</name><usage>read-write</usage><enumeratedValue><name>Discard</name><description>clears the RXNE flag. This allows to discard the received data without reading it, and avoid an overrun condition</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>MMRQ</name>
<description>Mute mode request</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>MMRQ</name><usage>read-write</usage><enumeratedValue><name>Mute</name><description>Puts the USART in mute mode and sets the RWU flag</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>SBKRQ</name>
<description>Send break request</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>SBKRQ</name><usage>read-write</usage><enumeratedValue><name>Break</name><description>sets the SBKF flag and request to send a BREAK on the line, as soon as the transmit machine is available</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>ISR</name>
<displayName>ISR</displayName>
<description>Interrupt & status
register</description>
<addressOffset>0x1C</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00C0</resetValue>
<fields>
<field>
<name>REACK</name>
<description>REACK</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TEACK</name>
<description>TEACK</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WUF</name>
<description>WUF</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RWU</name>
<description>RWU</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SBKF</name>
<description>SBKF</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CMF</name>
<description>CMF</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BUSY</name>
<description>BUSY</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CTS</name>
<description>CTS</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CTSIF</name>
<description>CTSIF</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXE</name>
<description>TXE</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TC</name>
<description>TC</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RXNE</name>
<description>RXNE</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>IDLE</name>
<description>IDLE</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ORE</name>
<description>ORE</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>NF</name>
<description>NF</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FE</name>
<description>FE</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PE</name>
<description>PE</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>ICR</name>
<displayName>ICR</displayName>
<description>Interrupt flag clear register</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>WUCF</name>
<description>Wakeup from Stop mode clear
flag</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>WUCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the WUF flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CMCF</name>
<description>Character match clear flag</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CMCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the CMF flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CTSCF</name>
<description>CTS clear flag</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CTSCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the CTSIF flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>TCCF</name>
<description>Transmission complete clear
flag</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>TCCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the TC flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>IDLECF</name>
<description>Idle line detected clear
flag</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>IDLECF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the IDLE flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ORECF</name>
<description>Overrun error clear flag</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ORECF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the ORE flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>NCF</name>
<description>Noise detected clear flag</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>NCF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the NF flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>FECF</name>
<description>Framing error clear flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>FECF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the FE flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PECF</name>
<description>Parity error clear flag</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>PECF</name><usage>read-write</usage><enumeratedValue><name>Clear</name><description>Clears the PE flag in the ISR register</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>RDR</name>
<displayName>RDR</displayName>
<description>Receive data register</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>RDR</name>
<description>Receive data value</description>
<bitOffset>0</bitOffset>
<bitWidth>9</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>255</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>TDR</name>
<displayName>TDR</displayName>
<description>Transmit data register</description>
<addressOffset>0x28</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>TDR</name>
<description>Transmit data value</description>
<bitOffset>0</bitOffset>
<bitWidth>9</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>255</maximum></range></writeConstraint>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>SPI1</name>
<description>Serial peripheral interface/Inter-IC
sound</description>
<groupName>SPI</groupName>
<baseAddress>0x40013000</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>SPI1</name>
<description>SPI1 global interrupt</description>
<value>35</value>
</interrupt>
<registers>
<register>
<name>CR1</name>
<displayName>CR1</displayName>
<description>control register 1</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>BIDIMODE</name>
<description>Bidirectional data mode
enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BIDIOE</name>
<description>Output enable in bidirectional
mode</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CRCEN</name>
<description>Hardware CRC calculation
enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CRCNEXT</name>
<description>CRC transfer next</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DFF</name>
<description>Data frame format</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RXONLY</name>
<description>Receive only</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SSM</name>
<description>Software slave management</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SSI</name>
<description>Internal slave select</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LSBFIRST</name>
<description>Frame format</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SPE</name>
<description>SPI enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BR</name>
<description>Baud rate control</description>
<bitOffset>3</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>MSTR</name>
<description>Master selection</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CPOL</name>
<description>Clock polarity</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CPHA</name>
<description>Clock phase</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>CR2</name>
<displayName>CR2</displayName>
<description>control register 2</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>RXDMAEN</name>
<description>Rx buffer DMA enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXDMAEN</name>
<description>Tx buffer DMA enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SSOE</name>
<description>SS output enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>NSSP</name>
<description>NSS pulse management</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FRF</name>
<description>Frame format</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ERRIE</name>
<description>Error interrupt enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RXNEIE</name>
<description>RX buffer not empty interrupt
enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXEIE</name>
<description>Tx buffer empty interrupt
enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DS</name>
<description>Data size</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>FRXTH</name>
<description>FIFO reception threshold</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LDMA_RX</name>
<description>Last DMA transfer for
reception</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LDMA_TX</name>
<description>Last DMA transfer for
transmission</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>SR</name>
<displayName>SR</displayName>
<description>status register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<resetValue>0x0002</resetValue>
<fields>
<field>
<name>RXNE</name>
<description>Receive buffer not empty</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXE</name>
<description>Transmit buffer empty</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CRCERR</name>
<description>CRC error flag</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MODF</name>
<description>Mode fault</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVR</name>
<description>Overrun flag</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BSY</name>
<description>Busy flag</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TIFRFE</name>
<description>TI frame format error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FRLVL</name>
<description>FIFO reception level</description>
<bitOffset>9</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FTLVL</name>
<description>FIFO transmission level</description>
<bitOffset>11</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>DR</name>
<displayName>DR</displayName>
<description>data register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>DR</name>
<description>Data register</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>CRCPR</name>
<displayName>CRCPR</displayName>
<description>CRC polynomial register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0007</resetValue>
<fields>
<field>
<name>CRCPOLY</name>
<description>CRC polynomial register</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>RXCRCR</name>
<displayName>RXCRCR</displayName>
<description>RX CRC register</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>RxCRC</name>
<description>Rx CRC register</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>TXCRCR</name>
<displayName>TXCRCR</displayName>
<description>TX CRC register</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>TxCRC</name>
<description>Tx CRC register</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral derivedFrom="SPI1">
<name>SPI3</name>
<baseAddress>0x40003C00</baseAddress>
<interrupt>
<name>SPI3</name>
<description>SPI3 global Interrupt</description>
<value>51</value>
</interrupt>
</peripheral>
<peripheral derivedFrom="SPI1">
<name>SPI2</name>
<baseAddress>0x40003800</baseAddress>
<interrupt>
<name>SPI2</name>
<description>SPI2 global interrupt</description>
<value>36</value>
</interrupt>
</peripheral>
<peripheral>
<name>SDMMC</name>
<description>Secure digital input/output
interface</description>
<groupName>SDIO</groupName>
<baseAddress>0x40012800</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>SDMMC1</name>
<description>SDMMC global Interrupt</description>
<value>49</value>
</interrupt>
<registers>
<register>
<name>POWER</name>
<displayName>POWER</displayName>
<description>power control register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PWRCTRL</name>
<description>PWRCTRL</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
</field>
</fields>
</register>
<register>
<name>CLKCR</name>
<displayName>CLKCR</displayName>
<description>SDI clock control register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>HWFC_EN</name>
<description>HW Flow Control enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>NEGEDGE</name>
<description>SDIO_CK dephasing selection
bit</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WIDBUS</name>
<description>Wide bus mode enable bit</description>
<bitOffset>11</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>BYPASS</name>
<description>Clock divider bypass enable
bit</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PWRSAV</name>
<description>Power saving configuration
bit</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CLKEN</name>
<description>Clock enable bit</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CLKDIV</name>
<description>Clock divide factor</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>ARG</name>
<displayName>ARG</displayName>
<description>argument register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CMDARG</name>
<description>Command argument</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>CMD</name>
<displayName>CMD</displayName>
<description>command register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CE_ATACMD</name>
<description>CE-ATA command</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>nIEN</name>
<description>not Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ENCMDcompl</name>
<description>Enable CMD completion</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SDIOSuspend</name>
<description>SD I/O suspend command</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CPSMEN</name>
<description>Command path state machine (CPSM) Enable
bit</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WAITPEND</name>
<description>CPSM Waits for ends of data transfer
(CmdPend internal signal)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WAITINT</name>
<description>CPSM waits for interrupt
request</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WAITRESP</name>
<description>Wait for response bits</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>CMDINDEX</name>
<description>Command index</description>
<bitOffset>0</bitOffset>
<bitWidth>6</bitWidth>
</field>
</fields>
</register>
<register>
<name>RESPCMD</name>
<displayName>RESPCMD</displayName>
<description>command response register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RESPCMD</name>
<description>Response command index</description>
<bitOffset>0</bitOffset>
<bitWidth>6</bitWidth>
</field>
</fields>
</register>
<register>
<name>RESP1</name>
<displayName>RESP1</displayName>
<description>response 1..4 register</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CARDSTATUS1</name>
<description>see Table 132</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>RESP2</name>
<displayName>RESP2</displayName>
<description>response 1..4 register</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CARDSTATUS2</name>
<description>see Table 132</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>RESP3</name>
<displayName>RESP3</displayName>
<description>response 1..4 register</description>
<addressOffset>0x1C</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CARDSTATUS3</name>
<description>see Table 132</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>RESP4</name>
<displayName>RESP4</displayName>
<description>response 1..4 register</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CARDSTATUS4</name>
<description>see Table 132</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>DTIMER</name>
<displayName>DTIMER</displayName>
<description>data timer register</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DATATIME</name>
<description>Data timeout period</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>DLEN</name>
<displayName>DLEN</displayName>
<description>data length register</description>
<addressOffset>0x28</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DATALENGTH</name>
<description>Data length value</description>
<bitOffset>0</bitOffset>
<bitWidth>25</bitWidth>
</field>
</fields>
</register>
<register>
<name>DCTRL</name>
<displayName>DCTRL</displayName>
<description>data control register</description>
<addressOffset>0x2C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SDIOEN</name>
<description>SD I/O enable functions</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RWMOD</name>
<description>Read wait mode</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RWSTOP</name>
<description>Read wait stop</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RWSTART</name>
<description>Read wait start</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DBLOCKSIZE</name>
<description>Data block size</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>DMAEN</name>
<description>DMA enable bit</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DTMODE</name>
<description>Data transfer mode selection 1: Stream
or SDIO multibyte data transfer</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DTDIR</name>
<description>Data transfer direction
selection</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DTEN</name>
<description>DTEN</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>DCOUNT</name>
<displayName>DCOUNT</displayName>
<description>data counter register</description>
<addressOffset>0x30</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DATACOUNT</name>
<description>Data count value</description>
<bitOffset>0</bitOffset>
<bitWidth>25</bitWidth>
</field>
</fields>
</register>
<register>
<name>STA</name>
<displayName>STA</displayName>
<description>status register</description>
<addressOffset>0x34</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CEATAEND</name>
<description>CE-ATA command completion signal
received for CMD61</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SDIOIT</name>
<description>SDIO interrupt received</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RXDAVL</name>
<description>Data available in receive
FIFO</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXDAVL</name>
<description>Data available in transmit
FIFO</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RXFIFOE</name>
<description>Receive FIFO empty</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXFIFOE</name>
<description>Transmit FIFO empty</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RXFIFOF</name>
<description>Receive FIFO full</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXFIFOF</name>
<description>Transmit FIFO full</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RXFIFOHF</name>
<description>Receive FIFO half full: there are at
least 8 words in the FIFO</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXFIFOHE</name>
<description>Transmit FIFO half empty: at least 8
words can be written into the FIFO</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RXACT</name>
<description>Data receive in progress</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXACT</name>
<description>Data transmit in progress</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CMDACT</name>
<description>Command transfer in
progress</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DBCKEND</name>
<description>Data block sent/received (CRC check
passed)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>STBITERR</name>
<description>Start bit not detected on all data
signals in wide bus mode</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DATAEND</name>
<description>Data end (data counter, SDIDCOUNT, is
zero)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CMDSENT</name>
<description>Command sent (no response
required)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CMDREND</name>
<description>Command response received (CRC check
passed)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RXOVERR</name>
<description>Received FIFO overrun
error</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXUNDERR</name>
<description>Transmit FIFO underrun
error</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DTIMEOUT</name>
<description>Data timeout</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CTIMEOUT</name>
<description>Command response timeout</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DCRCFAIL</name>
<description>Data block sent/received (CRC check
failed)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CCRCFAIL</name>
<description>Command response received (CRC check
failed)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>ICR</name>
<displayName>ICR</displayName>
<description>interrupt clear register</description>
<addressOffset>0x38</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CEATAENDC</name>
<description>CEATAEND flag clear bit</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SDIOITC</name>
<description>SDIOIT flag clear bit</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DBCKENDC</name>
<description>DBCKEND flag clear bit</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>STBITERRC</name>
<description>STBITERR flag clear bit</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DATAENDC</name>
<description>DATAEND flag clear bit</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CMDSENTC</name>
<description>CMDSENT flag clear bit</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CMDRENDC</name>
<description>CMDREND flag clear bit</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RXOVERRC</name>
<description>RXOVERR flag clear bit</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXUNDERRC</name>
<description>TXUNDERR flag clear bit</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DTIMEOUTC</name>
<description>DTIMEOUT flag clear bit</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CTIMEOUTC</name>
<description>CTIMEOUT flag clear bit</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DCRCFAILC</name>
<description>DCRCFAIL flag clear bit</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CCRCFAILC</name>
<description>CCRCFAIL flag clear bit</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>MASK</name>
<displayName>MASK</displayName>
<description>mask register</description>
<addressOffset>0x3C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CEATAENDIE</name>
<description>CE-ATA command completion signal
received interrupt enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SDIOITIE</name>
<description>SDIO mode interrupt received interrupt
enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RXDAVLIE</name>
<description>Data available in Rx FIFO interrupt
enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXDAVLIE</name>
<description>Data available in Tx FIFO interrupt
enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RXFIFOEIE</name>
<description>Rx FIFO empty interrupt
enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXFIFOEIE</name>
<description>Tx FIFO empty interrupt
enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RXFIFOFIE</name>
<description>Rx FIFO full interrupt
enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXFIFOFIE</name>
<description>Tx FIFO full interrupt
enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RXFIFOHFIE</name>
<description>Rx FIFO half full interrupt
enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXFIFOHEIE</name>
<description>Tx FIFO half empty interrupt
enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RXACTIE</name>
<description>Data receive acting interrupt
enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXACTIE</name>
<description>Data transmit acting interrupt
enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CMDACTIE</name>
<description>Command acting interrupt
enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DBCKENDIE</name>
<description>Data block end interrupt
enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>STBITERRIE</name>
<description>Start bit error interrupt
enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DATAENDIE</name>
<description>Data end interrupt enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CMDSENTIE</name>
<description>Command sent interrupt
enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CMDRENDIE</name>
<description>Command response received interrupt
enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RXOVERRIE</name>
<description>Rx FIFO overrun error interrupt
enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXUNDERRIE</name>
<description>Tx FIFO underrun error interrupt
enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DTIMEOUTIE</name>
<description>Data timeout interrupt
enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CTIMEOUTIE</name>
<description>Command timeout interrupt
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DCRCFAILIE</name>
<description>Data CRC fail interrupt
enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CCRCFAILIE</name>
<description>Command CRC fail interrupt
enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>FIFOCNT</name>
<displayName>FIFOCNT</displayName>
<description>FIFO counter register</description>
<addressOffset>0x48</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FIFOCOUNT</name>
<description>Remaining number of words to be written
to or read from the FIFO</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
</field>
</fields>
</register>
<register>
<name>FIFO</name>
<displayName>FIFO</displayName>
<description>data FIFO register</description>
<addressOffset>0x80</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FIFOData</name>
<description>Receive and transmit FIFO
data</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>EXTI</name>
<description>External interrupt/event
controller</description>
<groupName>EXTI</groupName>
<baseAddress>0x40010400</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>PVD_PVM</name>
<description>PVD through EXTI line detection</description>
<value>1</value>
</interrupt>
<interrupt>
<name>EXTI0</name>
<description>EXTI Line 0 interrupt</description>
<value>6</value>
</interrupt>
<interrupt>
<name>EXTI1</name>
<description>EXTI Line 1 interrupt</description>
<value>7</value>
</interrupt>
<interrupt>
<name>EXTI2</name>
<description>EXTI Line 2 interrupt</description>
<value>8</value>
</interrupt>
<interrupt>
<name>EXTI3</name>
<description>EXTI Line 3 interrupt</description>
<value>9</value>
</interrupt>
<interrupt>
<name>EXTI4</name>
<description>EXTI Line4 interrupt</description>
<value>10</value>
</interrupt>
<interrupt>
<name>EXTI9_5</name>
<description>EXTI Line5 to Line9 interrupts</description>
<value>23</value>
</interrupt>
<interrupt>
<name>EXTI15_10</name>
<description>EXTI Lines 10 to 15 interrupts</description>
<value>40</value>
</interrupt>
<registers>
<register>
<name>IMR1</name>
<displayName>IMR1</displayName>
<description>Interrupt mask register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0xFF820000</resetValue>
<fields>
<field>
<name>MR0</name>
<description>Interrupt Mask on line 0</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR1</name>
<description>Interrupt Mask on line 1</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR2</name>
<description>Interrupt Mask on line 2</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR3</name>
<description>Interrupt Mask on line 3</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR4</name>
<description>Interrupt Mask on line 4</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR5</name>
<description>Interrupt Mask on line 5</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR6</name>
<description>Interrupt Mask on line 6</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR7</name>
<description>Interrupt Mask on line 7</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR8</name>
<description>Interrupt Mask on line 8</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR9</name>
<description>Interrupt Mask on line 9</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR10</name>
<description>Interrupt Mask on line 10</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR11</name>
<description>Interrupt Mask on line 11</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR12</name>
<description>Interrupt Mask on line 12</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR13</name>
<description>Interrupt Mask on line 13</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR14</name>
<description>Interrupt Mask on line 14</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR15</name>
<description>Interrupt Mask on line 15</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR16</name>
<description>Interrupt Mask on line 16</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR17</name>
<description>Interrupt Mask on line 17</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR18</name>
<description>Interrupt Mask on line 18</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR19</name>
<description>Interrupt Mask on line 19</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR20</name>
<description>Interrupt Mask on line 20</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR21</name>
<description>Interrupt Mask on line 21</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR22</name>
<description>Interrupt Mask on line 22</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR23</name>
<description>Interrupt Mask on line 23</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR24</name>
<description>Interrupt Mask on line 24</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR25</name>
<description>Interrupt Mask on line 25</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR26</name>
<description>Interrupt Mask on line 26</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR27</name>
<description>Interrupt Mask on line 27</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR28</name>
<description>Interrupt Mask on line 28</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR29</name>
<description>Interrupt Mask on line 29</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR30</name>
<description>Interrupt Mask on line 30</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR31</name>
<description>Interrupt Mask on line 31</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>EMR1</name>
<displayName>EMR1</displayName>
<description>Event mask register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MR0</name>
<description>Event Mask on line 0</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR1</name>
<description>Event Mask on line 1</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR2</name>
<description>Event Mask on line 2</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR3</name>
<description>Event Mask on line 3</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR4</name>
<description>Event Mask on line 4</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR5</name>
<description>Event Mask on line 5</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR6</name>
<description>Event Mask on line 6</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR7</name>
<description>Event Mask on line 7</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR8</name>
<description>Event Mask on line 8</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR9</name>
<description>Event Mask on line 9</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR10</name>
<description>Event Mask on line 10</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR11</name>
<description>Event Mask on line 11</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR12</name>
<description>Event Mask on line 12</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR13</name>
<description>Event Mask on line 13</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR14</name>
<description>Event Mask on line 14</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR15</name>
<description>Event Mask on line 15</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR16</name>
<description>Event Mask on line 16</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR17</name>
<description>Event Mask on line 17</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR18</name>
<description>Event Mask on line 18</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR19</name>
<description>Event Mask on line 19</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR20</name>
<description>Event Mask on line 20</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR21</name>
<description>Event Mask on line 21</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR22</name>
<description>Event Mask on line 22</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR23</name>
<description>Event Mask on line 23</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR24</name>
<description>Event Mask on line 24</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR25</name>
<description>Event Mask on line 25</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR26</name>
<description>Event Mask on line 26</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR27</name>
<description>Event Mask on line 27</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR28</name>
<description>Event Mask on line 28</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR29</name>
<description>Event Mask on line 29</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR30</name>
<description>Event Mask on line 30</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR31</name>
<description>Event Mask on line 31</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>RTSR1</name>
<displayName>RTSR1</displayName>
<description>Rising Trigger selection
register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TR0</name>
<description>Rising trigger event configuration of
line 0</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR1</name>
<description>Rising trigger event configuration of
line 1</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR2</name>
<description>Rising trigger event configuration of
line 2</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR3</name>
<description>Rising trigger event configuration of
line 3</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR4</name>
<description>Rising trigger event configuration of
line 4</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR5</name>
<description>Rising trigger event configuration of
line 5</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR6</name>
<description>Rising trigger event configuration of
line 6</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR7</name>
<description>Rising trigger event configuration of
line 7</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR8</name>
<description>Rising trigger event configuration of
line 8</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR9</name>
<description>Rising trigger event configuration of
line 9</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR10</name>
<description>Rising trigger event configuration of
line 10</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR11</name>
<description>Rising trigger event configuration of
line 11</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR12</name>
<description>Rising trigger event configuration of
line 12</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR13</name>
<description>Rising trigger event configuration of
line 13</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR14</name>
<description>Rising trigger event configuration of
line 14</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR15</name>
<description>Rising trigger event configuration of
line 15</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR16</name>
<description>Rising trigger event configuration of
line 16</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR18</name>
<description>Rising trigger event configuration of
line 18</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR19</name>
<description>Rising trigger event configuration of
line 19</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR20</name>
<description>Rising trigger event configuration of
line 20</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR21</name>
<description>Rising trigger event configuration of
line 21</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR22</name>
<description>Rising trigger event configuration of
line 22</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>FTSR1</name>
<displayName>FTSR1</displayName>
<description>Falling Trigger selection
register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TR0</name>
<description>Falling trigger event configuration of
line 0</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR1</name>
<description>Falling trigger event configuration of
line 1</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR2</name>
<description>Falling trigger event configuration of
line 2</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR3</name>
<description>Falling trigger event configuration of
line 3</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR4</name>
<description>Falling trigger event configuration of
line 4</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR5</name>
<description>Falling trigger event configuration of
line 5</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR6</name>
<description>Falling trigger event configuration of
line 6</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR7</name>
<description>Falling trigger event configuration of
line 7</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR8</name>
<description>Falling trigger event configuration of
line 8</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR9</name>
<description>Falling trigger event configuration of
line 9</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR10</name>
<description>Falling trigger event configuration of
line 10</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR11</name>
<description>Falling trigger event configuration of
line 11</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR12</name>
<description>Falling trigger event configuration of
line 12</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR13</name>
<description>Falling trigger event configuration of
line 13</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR14</name>
<description>Falling trigger event configuration of
line 14</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR15</name>
<description>Falling trigger event configuration of
line 15</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR16</name>
<description>Falling trigger event configuration of
line 16</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR18</name>
<description>Falling trigger event configuration of
line 18</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR19</name>
<description>Falling trigger event configuration of
line 19</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR20</name>
<description>Falling trigger event configuration of
line 20</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR21</name>
<description>Falling trigger event configuration of
line 21</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TR22</name>
<description>Falling trigger event configuration of
line 22</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>SWIER1</name>
<displayName>SWIER1</displayName>
<description>Software interrupt event
register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SWIER0</name>
<description>Software Interrupt on line
0</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWIER1</name>
<description>Software Interrupt on line
1</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWIER2</name>
<description>Software Interrupt on line
2</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWIER3</name>
<description>Software Interrupt on line
3</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWIER4</name>
<description>Software Interrupt on line
4</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWIER5</name>
<description>Software Interrupt on line
5</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWIER6</name>
<description>Software Interrupt on line
6</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWIER7</name>
<description>Software Interrupt on line
7</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWIER8</name>
<description>Software Interrupt on line
8</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWIER9</name>
<description>Software Interrupt on line
9</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWIER10</name>
<description>Software Interrupt on line
10</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWIER11</name>
<description>Software Interrupt on line
11</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWIER12</name>
<description>Software Interrupt on line
12</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWIER13</name>
<description>Software Interrupt on line
13</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWIER14</name>
<description>Software Interrupt on line
14</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWIER15</name>
<description>Software Interrupt on line
15</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWIER16</name>
<description>Software Interrupt on line
16</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWIER18</name>
<description>Software Interrupt on line
18</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWIER19</name>
<description>Software Interrupt on line
19</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWIER20</name>
<description>Software Interrupt on line
20</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWIER21</name>
<description>Software Interrupt on line
21</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWIER22</name>
<description>Software Interrupt on line
22</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>PR1</name>
<displayName>PR1</displayName>
<description>Pending register</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PR0</name>
<description>Pending bit 0</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PR1</name>
<description>Pending bit 1</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PR2</name>
<description>Pending bit 2</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PR3</name>
<description>Pending bit 3</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PR4</name>
<description>Pending bit 4</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PR5</name>
<description>Pending bit 5</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PR6</name>
<description>Pending bit 6</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PR7</name>
<description>Pending bit 7</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PR8</name>
<description>Pending bit 8</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PR9</name>
<description>Pending bit 9</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PR10</name>
<description>Pending bit 10</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PR11</name>
<description>Pending bit 11</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PR12</name>
<description>Pending bit 12</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PR13</name>
<description>Pending bit 13</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PR14</name>
<description>Pending bit 14</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PR15</name>
<description>Pending bit 15</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PR16</name>
<description>Pending bit 16</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PR18</name>
<description>Pending bit 18</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PR19</name>
<description>Pending bit 19</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PR20</name>
<description>Pending bit 20</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PR21</name>
<description>Pending bit 21</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PR22</name>
<description>Pending bit 22</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>IMR2</name>
<displayName>IMR2</displayName>
<description>Interrupt mask register</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0xFFFFFF87</resetValue>
<fields>
<field>
<name>MR32</name>
<description>Interrupt Mask on external/internal line
32</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR33</name>
<description>Interrupt Mask on external/internal line
33</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR34</name>
<description>Interrupt Mask on external/internal line
34</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR35</name>
<description>Interrupt Mask on external/internal line
35</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR36</name>
<description>Interrupt Mask on external/internal line
36</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR37</name>
<description>Interrupt Mask on external/internal line
37</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR38</name>
<description>Interrupt Mask on external/internal line
38</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR39</name>
<description>Interrupt Mask on external/internal line
39</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>EMR2</name>
<displayName>EMR2</displayName>
<description>Event mask register</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MR32</name>
<description>Event mask on external/internal line
32</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR33</name>
<description>Event mask on external/internal line
33</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR34</name>
<description>Event mask on external/internal line
34</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR35</name>
<description>Event mask on external/internal line
35</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR36</name>
<description>Event mask on external/internal line
36</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR37</name>
<description>Event mask on external/internal line
37</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR38</name>
<description>Event mask on external/internal line
38</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MR39</name>
<description>Event mask on external/internal line
39</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>RTSR2</name>
<displayName>RTSR2</displayName>
<description>Rising Trigger selection
register</description>
<addressOffset>0x28</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RT35</name>
<description>Rising trigger event configuration bit
of line 35</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RT36</name>
<description>Rising trigger event configuration bit
of line 36</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RT37</name>
<description>Rising trigger event configuration bit
of line 37</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RT38</name>
<description>Rising trigger event configuration bit
of line 38</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>FTSR2</name>
<displayName>FTSR2</displayName>
<description>Falling Trigger selection
register</description>
<addressOffset>0x2C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FT35</name>
<description>Falling trigger event configuration bit
of line 35</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FT36</name>
<description>Falling trigger event configuration bit
of line 36</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FT37</name>
<description>Falling trigger event configuration bit
of line 37</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FT38</name>
<description>Falling trigger event configuration bit
of line 38</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>SWIER2</name>
<displayName>SWIER2</displayName>
<description>Software interrupt event
register</description>
<addressOffset>0x30</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SWI35</name>
<description>Software interrupt on line
35</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWI36</name>
<description>Software interrupt on line
36</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWI37</name>
<description>Software interrupt on line
37</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWI38</name>
<description>Software interrupt on line
38</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>PR2</name>
<displayName>PR2</displayName>
<description>Pending register</description>
<addressOffset>0x34</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PIF35</name>
<description>Pending interrupt flag on line
35</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PIF36</name>
<description>Pending interrupt flag on line
36</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PIF37</name>
<description>Pending interrupt flag on line
37</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PIF38</name>
<description>Pending interrupt flag on line
38</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>VREFBUF</name>
<description>Voltage reference buffer</description>
<groupName>VREF</groupName>
<baseAddress>0x40010030</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x1D0</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>FPU</name>
<description>Floating point interrupt</description>
<value>81</value>
</interrupt>
<registers>
<register>
<name>CSR</name>
<displayName>CSR</displayName>
<description>VREF control and status
register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<resetValue>0x00000002</resetValue>
<fields>
<field>
<name>ENVR</name>
<description>Voltage reference buffer
enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>HIZ</name>
<description>High impedance mode</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>VRS</name>
<description>Voltage reference scale</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>VRR</name>
<description>Voltage reference buffer
ready</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CCR</name>
<displayName>CCR</displayName>
<description>calibration control register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TRIM</name>
<description>Trimming code</description>
<bitOffset>0</bitOffset>
<bitWidth>6</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>CAN1</name>
<description>Controller area network</description>
<groupName>CAN</groupName>
<baseAddress>0x40006400</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>CAN1_TX</name>
<description>CAN1 TX interrupts</description>
<value>19</value>
</interrupt>
<interrupt>
<name>CAN1_RX0</name>
<description>CAN1 RX0 interrupts</description>
<value>20</value>
</interrupt>
<interrupt>
<name>CAN1_RX1</name>
<description>CAN1 RX1 interrupts</description>
<value>21</value>
</interrupt>
<interrupt>
<name>CAN1_SCE</name>
<description>CAN1 SCE interrupt</description>
<value>22</value>
</interrupt>
<registers>
<register>
<name>MCR</name>
<displayName>MCR</displayName>
<description>master control register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00010002</resetValue>
<fields>
<field>
<name>DBF</name>
<description>DBF</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RESET</name>
<description>RESET</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TTCM</name>
<description>TTCM</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ABOM</name>
<description>ABOM</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AWUM</name>
<description>AWUM</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>NART</name>
<description>NART</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RFLM</name>
<description>RFLM</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXFP</name>
<description>TXFP</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SLEEP</name>
<description>SLEEP</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>INRQ</name>
<description>INRQ</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>MSR</name>
<displayName>MSR</displayName>
<description>master status register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<resetValue>0x00000C02</resetValue>
<fields>
<field>
<name>RX</name>
<description>RX</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SAMP</name>
<description>SAMP</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXM</name>
<description>RXM</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXM</name>
<description>TXM</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SLAKI</name>
<description>SLAKI</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WKUI</name>
<description>WKUI</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ERRI</name>
<description>ERRI</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SLAK</name>
<description>SLAK</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INAK</name>
<description>INAK</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>TSR</name>
<displayName>TSR</displayName>
<description>transmit status register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<resetValue>0x1C000000</resetValue>
<fields>
<field>
<name>LOW2</name>
<description>Lowest priority flag for mailbox
2</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LOW1</name>
<description>Lowest priority flag for mailbox
1</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LOW0</name>
<description>Lowest priority flag for mailbox
0</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TME2</name>
<description>Lowest priority flag for mailbox
2</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TME1</name>
<description>Lowest priority flag for mailbox
1</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TME0</name>
<description>Lowest priority flag for mailbox
0</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CODE</name>
<description>CODE</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ABRQ2</name>
<description>ABRQ2</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TERR2</name>
<description>TERR2</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ALST2</name>
<description>ALST2</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TXOK2</name>
<description>TXOK2</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RQCP2</name>
<description>RQCP2</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ABRQ1</name>
<description>ABRQ1</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TERR1</name>
<description>TERR1</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ALST1</name>
<description>ALST1</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TXOK1</name>
<description>TXOK1</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RQCP1</name>
<description>RQCP1</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ABRQ0</name>
<description>ABRQ0</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TERR0</name>
<description>TERR0</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ALST0</name>
<description>ALST0</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TXOK0</name>
<description>TXOK0</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RQCP0</name>
<description>RQCP0</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RF%sR</name>
<displayName>RF0R</displayName>
<description>receive FIFO 0 register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RFOM</name>
<description>RFOM0</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FOVR</name>
<description>FOVR0</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FULL</name>
<description>FULL0</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FMP</name>
<description>FMP0</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
</field>
</fields>
<dim>2</dim><dimIndex>0,1</dimIndex><dimIncrement>0x4</dimIncrement></register>
<register>
<name>IER</name>
<displayName>IER</displayName>
<description>interrupt enable register</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SLKIE</name>
<description>SLKIE</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WKUIE</name>
<description>WKUIE</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ERRIE</name>
<description>ERRIE</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LECIE</name>
<description>LECIE</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BOFIE</name>
<description>BOFIE</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EPVIE</name>
<description>EPVIE</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EWGIE</name>
<description>EWGIE</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FOVIE1</name>
<description>FOVIE1</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FFIE1</name>
<description>FFIE1</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FMPIE1</name>
<description>FMPIE1</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FOVIE0</name>
<description>FOVIE0</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FFIE0</name>
<description>FFIE0</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FMPIE0</name>
<description>FMPIE0</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TMEIE</name>
<description>TMEIE</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>ESR</name>
<displayName>ESR</displayName>
<description>interrupt enable register</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>REC</name>
<description>REC</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TEC</name>
<description>TEC</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LEC</name>
<description>LEC</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BOFF</name>
<description>BOFF</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EPVF</name>
<description>EPVF</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EWGF</name>
<description>EWGF</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>BTR</name>
<displayName>BTR</displayName>
<description>bit timing register</description>
<addressOffset>0x1C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SILM</name>
<description>SILM</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LBKM</name>
<description>LBKM</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SJW</name>
<description>SJW</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>TS2</name>
<description>TS2</description>
<bitOffset>20</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>TS1</name>
<description>TS1</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>BRP</name>
<description>BRP</description>
<bitOffset>0</bitOffset>
<bitWidth>10</bitWidth>
</field>
</fields>
</register>
<register>
<name>FMR</name>
<displayName>FMR</displayName>
<description>filter master register</description>
<addressOffset>0x200</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x2A1C0E01</resetValue>
<fields>
<field>
<name>FINIT</name>
<description>Filter initialization mode</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>FM1R</name>
<displayName>FM1R</displayName>
<description>filter mode register</description>
<addressOffset>0x204</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FBM0</name>
<description>Filter mode</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FBM1</name>
<description>Filter mode</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FBM2</name>
<description>Filter mode</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FBM3</name>
<description>Filter mode</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FBM4</name>
<description>Filter mode</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FBM5</name>
<description>Filter mode</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FBM6</name>
<description>Filter mode</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FBM7</name>
<description>Filter mode</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FBM8</name>
<description>Filter mode</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FBM9</name>
<description>Filter mode</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FBM10</name>
<description>Filter mode</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FBM11</name>
<description>Filter mode</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FBM12</name>
<description>Filter mode</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FBM13</name>
<description>Filter mode</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>FS1R</name>
<displayName>FS1R</displayName>
<description>filter scale register</description>
<addressOffset>0x20C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FSC0</name>
<description>Filter scale configuration</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FSC1</name>
<description>Filter scale configuration</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FSC2</name>
<description>Filter scale configuration</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FSC3</name>
<description>Filter scale configuration</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FSC4</name>
<description>Filter scale configuration</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FSC5</name>
<description>Filter scale configuration</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FSC6</name>
<description>Filter scale configuration</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FSC7</name>
<description>Filter scale configuration</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FSC8</name>
<description>Filter scale configuration</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FSC9</name>
<description>Filter scale configuration</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FSC10</name>
<description>Filter scale configuration</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FSC11</name>
<description>Filter scale configuration</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FSC12</name>
<description>Filter scale configuration</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FSC13</name>
<description>Filter scale configuration</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>FFA1R</name>
<displayName>FFA1R</displayName>
<description>filter FIFO assignment
register</description>
<addressOffset>0x214</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FFA0</name>
<description>Filter FIFO assignment for filter
0</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FFA1</name>
<description>Filter FIFO assignment for filter
1</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FFA2</name>
<description>Filter FIFO assignment for filter
2</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FFA3</name>
<description>Filter FIFO assignment for filter
3</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FFA4</name>
<description>Filter FIFO assignment for filter
4</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FFA5</name>
<description>Filter FIFO assignment for filter
5</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FFA6</name>
<description>Filter FIFO assignment for filter
6</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FFA7</name>
<description>Filter FIFO assignment for filter
7</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FFA8</name>
<description>Filter FIFO assignment for filter
8</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FFA9</name>
<description>Filter FIFO assignment for filter
9</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FFA10</name>
<description>Filter FIFO assignment for filter
10</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FFA11</name>
<description>Filter FIFO assignment for filter
11</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FFA12</name>
<description>Filter FIFO assignment for filter
12</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FFA13</name>
<description>Filter FIFO assignment for filter
13</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>FA1R</name>
<displayName>FA1R</displayName>
<description>filter activation register</description>
<addressOffset>0x21C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FACT0</name>
<description>Filter active</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FACT1</name>
<description>Filter active</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FACT2</name>
<description>Filter active</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FACT3</name>
<description>Filter active</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FACT4</name>
<description>Filter active</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FACT5</name>
<description>Filter active</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FACT6</name>
<description>Filter active</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FACT7</name>
<description>Filter active</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FACT8</name>
<description>Filter active</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FACT9</name>
<description>Filter active</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FACT10</name>
<description>Filter active</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FACT11</name>
<description>Filter active</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FACT12</name>
<description>Filter active</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FACT13</name>
<description>Filter active</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<cluster><name>TX%s</name><description>CAN Transmit cluster</description><addressOffset>0x180</addressOffset><register>
<name>TIR</name>
<displayName>TI0R</displayName>
<description>TX mailbox identifier register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>STID</name>
<description>STID</description>
<bitOffset>21</bitOffset>
<bitWidth>11</bitWidth>
</field>
<field>
<name>EXID</name>
<description>EXID</description>
<bitOffset>3</bitOffset>
<bitWidth>18</bitWidth>
</field>
<field>
<name>IDE</name>
<description>IDE</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RTR</name>
<description>RTR</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXRQ</name>
<description>TXRQ</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>TDTR</name>
<displayName>TDT0R</displayName>
<description>mailbox data length control and time stamp
register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TIME</name>
<description>TIME</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
</field>
<field>
<name>TGT</name>
<description>TGT</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DLC</name>
<description>DLC</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
</field>
</fields>
</register>
<register>
<name>TDLR</name>
<displayName>TDL0R</displayName>
<description>mailbox data low register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DATA3</name>
<description>DATA3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>DATA2</name>
<description>DATA2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>DATA1</name>
<description>DATA1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>DATA0</name>
<description>DATA0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>TDHR</name>
<displayName>TDH0R</displayName>
<description>mailbox data high register</description>
<addressOffset>0xc</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DATA7</name>
<description>DATA7</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>DATA6</name>
<description>DATA6</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>DATA5</name>
<description>DATA5</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>DATA4</name>
<description>DATA4</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<dim>3</dim><dimIndex>0,1,2</dimIndex><dimIncrement>0x10</dimIncrement></cluster><cluster><name>RX%s</name><description>CAN Receive cluster</description><addressOffset>0x1b0</addressOffset><register>
<name>RIR</name>
<displayName>RI0R</displayName>
<description>receive FIFO mailbox identifier
register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>STID</name>
<description>STID</description>
<bitOffset>21</bitOffset>
<bitWidth>11</bitWidth>
</field>
<field>
<name>EXID</name>
<description>EXID</description>
<bitOffset>3</bitOffset>
<bitWidth>18</bitWidth>
</field>
<field>
<name>IDE</name>
<description>IDE</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RTR</name>
<description>RTR</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>RDTR</name>
<displayName>RDT0R</displayName>
<description>mailbox data high register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TIME</name>
<description>TIME</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
</field>
<field>
<name>FMI</name>
<description>FMI</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>DLC</name>
<description>DLC</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
</field>
</fields>
</register>
<register>
<name>RDLR</name>
<displayName>RDL0R</displayName>
<description>mailbox data high register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DATA3</name>
<description>DATA3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>DATA2</name>
<description>DATA2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>DATA1</name>
<description>DATA1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>DATA0</name>
<description>DATA0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>RDHR</name>
<displayName>RDH0R</displayName>
<description>receive FIFO mailbox data high
register</description>
<addressOffset>0xc</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DATA7</name>
<description>DATA7</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>DATA6</name>
<description>DATA6</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>DATA5</name>
<description>DATA5</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>DATA4</name>
<description>DATA4</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<dim>2</dim><dimIndex>0,1</dimIndex><dimIncrement>0x10</dimIncrement></cluster><cluster><name>FB%s</name><description>CAN Filter Bank cluster</description><addressOffset>0x240</addressOffset><register>
<name>FR1</name>
<displayName>F0R1</displayName>
<description>Filter bank 0 register 1</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field><name>FB</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields>
</register>
<register>
<name>FR2</name>
<displayName>F0R2</displayName>
<description>Filter bank 0 register 2</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field><name>FB</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields>
</register>
<dim>28</dim><dimIndex>0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27</dimIndex><dimIncrement>0x8</dimIncrement></cluster></registers>
</peripheral>
<peripheral>
<name>RTC</name>
<description>Real-time clock</description>
<groupName>RTC</groupName>
<baseAddress>0x40002800</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>RTC_TAMP_STAMP</name>
<description>Tamper and TimeStamp interrupts</description>
<value>2</value>
</interrupt>
<interrupt>
<name>RTC_WKUP</name>
<description>RTC Tamper or TimeStamp /CSS on LSE through
EXTI line 19 interrupts</description>
<value>3</value>
</interrupt>
<interrupt>
<name>RTC_ALARM</name>
<description>RTC alarms through EXTI line 18
interrupts</description>
<value>41</value>
</interrupt>
<registers>
<register>
<name>TR</name>
<displayName>TR</displayName>
<description>time register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PM</name>
<description>AM/PM notation</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>HT</name>
<description>Hour tens in BCD format</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>HU</name>
<description>Hour units in BCD format</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>MNT</name>
<description>Minute tens in BCD format</description>
<bitOffset>12</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>MNU</name>
<description>Minute units in BCD format</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>ST</name>
<description>Second tens in BCD format</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>SU</name>
<description>Second units in BCD format</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
</field>
</fields>
</register>
<register>
<name>DR</name>
<displayName>DR</displayName>
<description>date register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00002101</resetValue>
<fields>
<field>
<name>YT</name>
<description>Year tens in BCD format</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>YU</name>
<description>Year units in BCD format</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>WDU</name>
<description>Week day units</description>
<bitOffset>13</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>MT</name>
<description>Month tens in BCD format</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MU</name>
<description>Month units in BCD format</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>DT</name>
<description>Date tens in BCD format</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>DU</name>
<description>Date units in BCD format</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
</field>
</fields>
</register>
<register>
<name>CR</name>
<displayName>CR</displayName>
<description>control register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WCKSEL</name>
<description>Wakeup clock selection</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>TSEDGE</name>
<description>Time-stamp event active
edge</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>REFCKON</name>
<description>Reference clock detection enable (50 or
60 Hz)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BYPSHAD</name>
<description>Bypass the shadow
registers</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FMT</name>
<description>Hour format</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ALRAE</name>
<description>Alarm A enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ALRBE</name>
<description>Alarm B enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WUTE</name>
<description>Wakeup timer enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TSE</name>
<description>Time stamp enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ALRAIE</name>
<description>Alarm A interrupt enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ALRBIE</name>
<description>Alarm B interrupt enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WUTIE</name>
<description>Wakeup timer interrupt
enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TSIE</name>
<description>Time-stamp interrupt
enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ADD1H</name>
<description>Add 1 hour (summer time
change)</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SUB1H</name>
<description>Subtract 1 hour (winter time
change)</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BKP</name>
<description>Backup</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>COSEL</name>
<description>Calibration output
selection</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>POL</name>
<description>Output polarity</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OSEL</name>
<description>Output selection</description>
<bitOffset>21</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>COE</name>
<description>Calibration output enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ITSE</name>
<description>timestamp on internal event
enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>ISR</name>
<displayName>ISR</displayName>
<description>initialization and status
register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<resetValue>0x00000007</resetValue>
<fields>
<field>
<name>ALRAWF</name>
<description>Alarm A write flag</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ALRBWF</name>
<description>Alarm B write flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WUTWF</name>
<description>Wakeup timer write flag</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHPF</name>
<description>Shift operation pending</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>INITS</name>
<description>Initialization status flag</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RSF</name>
<description>Registers synchronization
flag</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>INITF</name>
<description>Initialization flag</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INIT</name>
<description>Initialization mode</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ALRAF</name>
<description>Alarm A flag</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ALRBF</name>
<description>Alarm B flag</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WUTF</name>
<description>Wakeup timer flag</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TSF</name>
<description>Time-stamp flag</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TSOVF</name>
<description>Time-stamp overflow flag</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TAMP1F</name>
<description>Tamper detection flag</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TAMP2F</name>
<description>RTC_TAMP2 detection flag</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TAMP3F</name>
<description>RTC_TAMP3 detection flag</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RECALPF</name>
<description>Recalibration pending Flag</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>PRER</name>
<displayName>PRER</displayName>
<description>prescaler register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x007F00FF</resetValue>
<fields>
<field>
<name>PREDIV_A</name>
<description>Asynchronous prescaler
factor</description>
<bitOffset>16</bitOffset>
<bitWidth>7</bitWidth>
</field>
<field>
<name>PREDIV_S</name>
<description>Synchronous prescaler
factor</description>
<bitOffset>0</bitOffset>
<bitWidth>15</bitWidth>
</field>
</fields>
</register>
<register>
<name>WUTR</name>
<displayName>WUTR</displayName>
<description>wakeup timer register</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000FFFF</resetValue>
<fields>
<field>
<name>WUT</name>
<description>Wakeup auto-reload value
bits</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>ALRMAR</name>
<displayName>ALRMAR</displayName>
<description>alarm A register</description>
<addressOffset>0x1C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MSK4</name>
<description>Alarm A date mask</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WDSEL</name>
<description>Week day selection</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DT</name>
<description>Date tens in BCD format</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>DU</name>
<description>Date units or day in BCD
format</description>
<bitOffset>24</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>MSK3</name>
<description>Alarm A hours mask</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PM</name>
<description>AM/PM notation</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>HT</name>
<description>Hour tens in BCD format</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>HU</name>
<description>Hour units in BCD format</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>MSK2</name>
<description>Alarm A minutes mask</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MNT</name>
<description>Minute tens in BCD format</description>
<bitOffset>12</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>MNU</name>
<description>Minute units in BCD format</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>MSK1</name>
<description>Alarm A seconds mask</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ST</name>
<description>Second tens in BCD format</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>SU</name>
<description>Second units in BCD format</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
</field>
</fields>
</register>
<register>
<name>ALRMBR</name>
<displayName>ALRMBR</displayName>
<description>alarm B register</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MSK4</name>
<description>Alarm B date mask</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WDSEL</name>
<description>Week day selection</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DT</name>
<description>Date tens in BCD format</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>DU</name>
<description>Date units or day in BCD
format</description>
<bitOffset>24</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>MSK3</name>
<description>Alarm B hours mask</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PM</name>
<description>AM/PM notation</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>HT</name>
<description>Hour tens in BCD format</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>HU</name>
<description>Hour units in BCD format</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>MSK2</name>
<description>Alarm B minutes mask</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MNT</name>
<description>Minute tens in BCD format</description>
<bitOffset>12</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>MNU</name>
<description>Minute units in BCD format</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>MSK1</name>
<description>Alarm B seconds mask</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ST</name>
<description>Second tens in BCD format</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>SU</name>
<description>Second units in BCD format</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
</field>
</fields>
</register>
<register>
<name>WPR</name>
<displayName>WPR</displayName>
<description>write protection register</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>KEY</name>
<description>Write protection key</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>SSR</name>
<displayName>SSR</displayName>
<description>sub second register</description>
<addressOffset>0x28</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SS</name>
<description>Sub second value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>SHIFTR</name>
<displayName>SHIFTR</displayName>
<description>shift control register</description>
<addressOffset>0x2C</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADD1S</name>
<description>Add one second</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SUBFS</name>
<description>Subtract a fraction of a
second</description>
<bitOffset>0</bitOffset>
<bitWidth>15</bitWidth>
</field>
</fields>
</register>
<register>
<name>TSTR</name>
<displayName>TSTR</displayName>
<description>time stamp time register</description>
<addressOffset>0x30</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SU</name>
<description>Second units in BCD format</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>ST</name>
<description>Second tens in BCD format</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>MNU</name>
<description>Minute units in BCD format</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>MNT</name>
<description>Minute tens in BCD format</description>
<bitOffset>12</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>HU</name>
<description>Hour units in BCD format</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>HT</name>
<description>Hour tens in BCD format</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>PM</name>
<description>AM/PM notation</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>TSDR</name>
<displayName>TSDR</displayName>
<description>time stamp date register</description>
<addressOffset>0x34</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WDU</name>
<description>Week day units</description>
<bitOffset>13</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>MT</name>
<description>Month tens in BCD format</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MU</name>
<description>Month units in BCD format</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>DT</name>
<description>Date tens in BCD format</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>DU</name>
<description>Date units in BCD format</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
</field>
</fields>
</register>
<register>
<name>TSSSR</name>
<displayName>TSSSR</displayName>
<description>timestamp sub second register</description>
<addressOffset>0x38</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SS</name>
<description>Sub second value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>CALR</name>
<displayName>CALR</displayName>
<description>calibration register</description>
<addressOffset>0x3C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CALP</name>
<description>Increase frequency of RTC by 488.5
ppm</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CALW8</name>
<description>Use an 8-second calibration cycle
period</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CALW16</name>
<description>Use a 16-second calibration cycle
period</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CALM</name>
<description>Calibration minus</description>
<bitOffset>0</bitOffset>
<bitWidth>9</bitWidth>
</field>
</fields>
</register>
<register>
<name>TAMPCR</name>
<displayName>TAMPCR</displayName>
<description>tamper configuration register</description>
<addressOffset>0x40</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TAMP1E</name>
<description>Tamper 1 detection enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TAMP1TRG</name>
<description>Active level for tamper 1</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TAMPIE</name>
<description>Tamper interrupt enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TAMP2E</name>
<description>Tamper 2 detection enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TAMP2TRG</name>
<description>Active level for tamper 2</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TAMP3E</name>
<description>Tamper 3 detection enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TAMP3TRG</name>
<description>Active level for tamper 3</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TAMPTS</name>
<description>Activate timestamp on tamper detection
event</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TAMPFREQ</name>
<description>Tamper sampling frequency</description>
<bitOffset>8</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>TAMPFLT</name>
<description>Tamper filter count</description>
<bitOffset>11</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>TAMPPRCH</name>
<description>Tamper precharge duration</description>
<bitOffset>13</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>TAMPPUDIS</name>
<description>TAMPER pull-up disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TAMP1IE</name>
<description>Tamper 1 interrupt enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TAMP1NOERASE</name>
<description>Tamper 1 no erase</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TAMP1MF</name>
<description>Tamper 1 mask flag</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TAMP2IE</name>
<description>Tamper 2 interrupt enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TAMP2NOERASE</name>
<description>Tamper 2 no erase</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TAMP2MF</name>
<description>Tamper 2 mask flag</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TAMP3IE</name>
<description>Tamper 3 interrupt enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TAMP3NOERASE</name>
<description>Tamper 3 no erase</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TAMP3MF</name>
<description>Tamper 3 mask flag</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>ALRMASSR</name>
<displayName>ALRMASSR</displayName>
<description>alarm A sub second register</description>
<addressOffset>0x44</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MASKSS</name>
<description>Mask the most-significant bits starting
at this bit</description>
<bitOffset>24</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>SS</name>
<description>Sub seconds value</description>
<bitOffset>0</bitOffset>
<bitWidth>15</bitWidth>
</field>
</fields>
</register>
<register>
<name>ALRMBSSR</name>
<displayName>ALRMBSSR</displayName>
<description>alarm B sub second register</description>
<addressOffset>0x48</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MASKSS</name>
<description>Mask the most-significant bits starting
at this bit</description>
<bitOffset>24</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>SS</name>
<description>Sub seconds value</description>
<bitOffset>0</bitOffset>
<bitWidth>15</bitWidth>
</field>
</fields>
</register>
<register>
<name>OR</name>
<displayName>OR</displayName>
<description>option register</description>
<addressOffset>0x4C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RTC_ALARM_TYPE</name>
<description>RTC_ALARM on PC13 output
type</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RTC_OUT_RMP</name>
<description>RTC_OUT remap</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>BKP%sR</name>
<displayName>BKP0R</displayName>
<description>backup register</description>
<addressOffset>0x50</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BKP</name>
<description>BKP</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
<dim>32</dim><dimIndex>0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31</dimIndex><dimIncrement>0x4</dimIncrement></register>
</registers>
</peripheral>
<peripheral>
<name>SWPMI1</name>
<description>Single Wire Protocol Master
Interface</description>
<groupName>SWPMI</groupName>
<baseAddress>0x40008800</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>SWPMI1</name>
<description>SWPMI1 global interrupt</description>
<value>76</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<displayName>CR</displayName>
<description>SWPMI Configuration/Control
register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RXDMA</name>
<description>Reception DMA enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXDMA</name>
<description>Transmission DMA enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RXMODE</name>
<description>Reception buffering mode</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXMODE</name>
<description>Transmission buffering
mode</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LPBK</name>
<description>Loopback mode enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SWPME</name>
<description>Single wire protocol master interface
enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DEACT</name>
<description>Single wire protocol master interface
deactivate</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>BRR</name>
<displayName>BRR</displayName>
<description>SWPMI Bitrate register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000001</resetValue>
<fields>
<field>
<name>BR</name>
<description>Bitrate prescaler</description>
<bitOffset>0</bitOffset>
<bitWidth>6</bitWidth>
</field>
</fields>
</register>
<register>
<name>ISR</name>
<displayName>ISR</displayName>
<description>SWPMI Interrupt and Status
register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x000002C2</resetValue>
<fields>
<field>
<name>RXBFF</name>
<description>Receive buffer full flag</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXBEF</name>
<description>Transmit buffer empty flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RXBERF</name>
<description>Receive CRC error flag</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RXOVRF</name>
<description>Receive overrun error flag</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXUNRF</name>
<description>Transmit underrun error
flag</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RXNE</name>
<description>Receive data register not
empty</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXE</name>
<description>Transmit data register
empty</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TCF</name>
<description>Transfer complete flag</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SRF</name>
<description>Slave resume flag</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SUSP</name>
<description>SUSPEND flag</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DEACTF</name>
<description>DEACTIVATED flag</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>ICR</name>
<displayName>ICR</displayName>
<description>SWPMI Interrupt Flag Clear
register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CRXBFF</name>
<description>Clear receive buffer full
flag</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CTXBEF</name>
<description>Clear transmit buffer empty
flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CRXBERF</name>
<description>Clear receive CRC error
flag</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CRXOVRF</name>
<description>Clear receive overrun error
flag</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CTXUNRF</name>
<description>Clear transmit underrun error
flag</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CTCF</name>
<description>Clear transfer complete
flag</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CSRF</name>
<description>Clear slave resume flag</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>IER</name>
<displayName>IER</displayName>
<description>SWPMI Interrupt Enable
register</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RXBFIE</name>
<description>Receive buffer full interrupt
enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXBEIE</name>
<description>Transmit buffer empty interrupt
enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RXBERIE</name>
<description>Receive CRC error interrupt
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RXOVRIE</name>
<description>Receive overrun error interrupt
enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TXUNRIE</name>
<description>Transmit underrun error interrupt
enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RIE</name>
<description>Receive interrupt enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TIE</name>
<description>Transmit interrupt enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TCIE</name>
<description>Transmit complete interrupt
enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SRIE</name>
<description>Slave resume interrupt
enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>RFL</name>
<displayName>RFL</displayName>
<description>SWPMI Receive Frame Length
register</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RFL</name>
<description>Receive frame length</description>
<bitOffset>0</bitOffset>
<bitWidth>5</bitWidth>
</field>
</fields>
</register>
<register>
<name>TDR</name>
<displayName>TDR</displayName>
<description>SWPMI Transmit data register</description>
<addressOffset>0x1C</addressOffset>
<size>0x20</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TD</name>
<description>Transmit data</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>RDR</name>
<displayName>RDR</displayName>
<description>SWPMI Receive data register</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RD</name>
<description>received data</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>OPAMP</name>
<description>Operational amplifiers</description>
<groupName>OPAMP</groupName>
<baseAddress>0x40007800</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>OPAMP1_CSR</name>
<displayName>OPAMP1_CSR</displayName>
<description>OPAMP1 control/status register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OPAEN</name>
<description>Operational amplifier
Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OPALPM</name>
<description>Operational amplifier Low Power
Mode</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OPAMODE</name>
<description>Operational amplifier PGA
mode</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>PGA_GAIN</name>
<description>Operational amplifier Programmable
amplifier gain value</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>VM_SEL</name>
<description>Inverting input selection</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>VP_SEL</name>
<description>Non inverted input
selection</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CALON</name>
<description>Calibration mode enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CALSEL</name>
<description>Calibration selection</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>USERTRIM</name>
<description>allows to switch from AOP offset trimmed
values to AOP offset</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CALOUT</name>
<description>Operational amplifier calibration
output</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OPA_RANGE</name>
<description>Operational amplifier power supply range
for stability</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>OPAMP1_OTR</name>
<displayName>OPAMP1_OTR</displayName>
<description>OPAMP1 offset trimming register in normal
mode</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TRIMOFFSETN</name>
<description>Trim for NMOS differential
pairs</description>
<bitOffset>0</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>TRIMOFFSETP</name>
<description>Trim for PMOS differential
pairs</description>
<bitOffset>8</bitOffset>
<bitWidth>5</bitWidth>
</field>
</fields>
</register>
<register>
<name>OPAMP1_LPOTR</name>
<displayName>OPAMP1_LPOTR</displayName>
<description>OPAMP1 offset trimming register in low-power
mode</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TRIMLPOFFSETN</name>
<description>Trim for NMOS differential
pairs</description>
<bitOffset>0</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>TRIMLPOFFSETP</name>
<description>Trim for PMOS differential
pairs</description>
<bitOffset>8</bitOffset>
<bitWidth>5</bitWidth>
</field>
</fields>
</register>
<register>
<name>OPAMP2_CSR</name>
<displayName>OPAMP2_CSR</displayName>
<description>OPAMP2 control/status register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OPAEN</name>
<description>Operational amplifier
Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OPALPM</name>
<description>Operational amplifier Low Power
Mode</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OPAMODE</name>
<description>Operational amplifier PGA
mode</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>PGA_GAIN</name>
<description>Operational amplifier Programmable
amplifier gain value</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>VM_SEL</name>
<description>Inverting input selection</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>VP_SEL</name>
<description>Non inverted input
selection</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CALON</name>
<description>Calibration mode enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CALSEL</name>
<description>Calibration selection</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>USERTRIM</name>
<description>allows to switch from AOP offset trimmed
values to AOP offset</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CALOUT</name>
<description>Operational amplifier calibration
output</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>OPAMP2_OTR</name>
<displayName>OPAMP2_OTR</displayName>
<description>OPAMP2 offset trimming register in normal
mode</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TRIMOFFSETN</name>
<description>Trim for NMOS differential
pairs</description>
<bitOffset>0</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>TRIMOFFSETP</name>
<description>Trim for PMOS differential
pairs</description>
<bitOffset>8</bitOffset>
<bitWidth>5</bitWidth>
</field>
</fields>
</register>
<register>
<name>OPAMP2_LPOTR</name>
<displayName>OPAMP2_LPOTR</displayName>
<description>OPAMP2 offset trimming register in low-power
mode</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TRIMLPOFFSETN</name>
<description>Trim for NMOS differential
pairs</description>
<bitOffset>0</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>TRIMLPOFFSETP</name>
<description>Trim for PMOS differential
pairs</description>
<bitOffset>8</bitOffset>
<bitWidth>5</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>NVIC</name>
<description>Nested Vectored Interrupt
Controller</description>
<groupName>NVIC</groupName>
<baseAddress>0xE000E100</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x355</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>ISER0</name>
<displayName>ISER0</displayName>
<description>Interrupt Set-Enable Register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SETENA</name>
<description>SETENA</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>ISER1</name>
<displayName>ISER1</displayName>
<description>Interrupt Set-Enable Register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SETENA</name>
<description>SETENA</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>ISER2</name>
<displayName>ISER2</displayName>
<description>Interrupt Set-Enable Register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SETENA</name>
<description>SETENA</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>ICER0</name>
<displayName>ICER0</displayName>
<description>Interrupt Clear-Enable
Register</description>
<addressOffset>0x80</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CLRENA</name>
<description>CLRENA</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>ICER1</name>
<displayName>ICER1</displayName>
<description>Interrupt Clear-Enable
Register</description>
<addressOffset>0x84</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CLRENA</name>
<description>CLRENA</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>ICER2</name>
<displayName>ICER2</displayName>
<description>Interrupt Clear-Enable
Register</description>
<addressOffset>0x88</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CLRENA</name>
<description>CLRENA</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>ISPR0</name>
<displayName>ISPR0</displayName>
<description>Interrupt Set-Pending Register</description>
<addressOffset>0x100</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SETPEND</name>
<description>SETPEND</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>ISPR1</name>
<displayName>ISPR1</displayName>
<description>Interrupt Set-Pending Register</description>
<addressOffset>0x104</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SETPEND</name>
<description>SETPEND</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>ISPR2</name>
<displayName>ISPR2</displayName>
<description>Interrupt Set-Pending Register</description>
<addressOffset>0x108</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SETPEND</name>
<description>SETPEND</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>ICPR0</name>
<displayName>ICPR0</displayName>
<description>Interrupt Clear-Pending
Register</description>
<addressOffset>0x180</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CLRPEND</name>
<description>CLRPEND</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>ICPR1</name>
<displayName>ICPR1</displayName>
<description>Interrupt Clear-Pending
Register</description>
<addressOffset>0x184</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CLRPEND</name>
<description>CLRPEND</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>ICPR2</name>
<displayName>ICPR2</displayName>
<description>Interrupt Clear-Pending
Register</description>
<addressOffset>0x188</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CLRPEND</name>
<description>CLRPEND</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>IABR0</name>
<displayName>IABR0</displayName>
<description>Interrupt Active Bit Register</description>
<addressOffset>0x200</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ACTIVE</name>
<description>ACTIVE</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>IABR1</name>
<displayName>IABR1</displayName>
<description>Interrupt Active Bit Register</description>
<addressOffset>0x204</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ACTIVE</name>
<description>ACTIVE</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>IABR2</name>
<displayName>IABR2</displayName>
<description>Interrupt Active Bit Register</description>
<addressOffset>0x208</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ACTIVE</name>
<description>ACTIVE</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>IPR0</name>
<displayName>IPR0</displayName>
<description>Interrupt Priority Register</description>
<addressOffset>0x300</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IPR_N0</name>
<description>IPR_N0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N1</name>
<description>IPR_N1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N2</name>
<description>IPR_N2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N3</name>
<description>IPR_N3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>IPR1</name>
<displayName>IPR1</displayName>
<description>Interrupt Priority Register</description>
<addressOffset>0x304</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IPR_N0</name>
<description>IPR_N0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N1</name>
<description>IPR_N1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N2</name>
<description>IPR_N2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N3</name>
<description>IPR_N3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>IPR2</name>
<displayName>IPR2</displayName>
<description>Interrupt Priority Register</description>
<addressOffset>0x308</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IPR_N0</name>
<description>IPR_N0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N1</name>
<description>IPR_N1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N2</name>
<description>IPR_N2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N3</name>
<description>IPR_N3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>IPR3</name>
<displayName>IPR3</displayName>
<description>Interrupt Priority Register</description>
<addressOffset>0x30C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IPR_N0</name>
<description>IPR_N0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N1</name>
<description>IPR_N1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N2</name>
<description>IPR_N2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N3</name>
<description>IPR_N3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>IPR4</name>
<displayName>IPR4</displayName>
<description>Interrupt Priority Register</description>
<addressOffset>0x310</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IPR_N0</name>
<description>IPR_N0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N1</name>
<description>IPR_N1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N2</name>
<description>IPR_N2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N3</name>
<description>IPR_N3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>IPR5</name>
<displayName>IPR5</displayName>
<description>Interrupt Priority Register</description>
<addressOffset>0x314</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IPR_N0</name>
<description>IPR_N0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N1</name>
<description>IPR_N1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N2</name>
<description>IPR_N2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N3</name>
<description>IPR_N3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>IPR6</name>
<displayName>IPR6</displayName>
<description>Interrupt Priority Register</description>
<addressOffset>0x318</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IPR_N0</name>
<description>IPR_N0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N1</name>
<description>IPR_N1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N2</name>
<description>IPR_N2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N3</name>
<description>IPR_N3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>IPR7</name>
<displayName>IPR7</displayName>
<description>Interrupt Priority Register</description>
<addressOffset>0x31C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IPR_N0</name>
<description>IPR_N0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N1</name>
<description>IPR_N1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N2</name>
<description>IPR_N2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N3</name>
<description>IPR_N3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>IPR8</name>
<displayName>IPR8</displayName>
<description>Interrupt Priority Register</description>
<addressOffset>0x320</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IPR_N0</name>
<description>IPR_N0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N1</name>
<description>IPR_N1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N2</name>
<description>IPR_N2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N3</name>
<description>IPR_N3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>IPR9</name>
<displayName>IPR9</displayName>
<description>Interrupt Priority Register</description>
<addressOffset>0x324</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IPR_N0</name>
<description>IPR_N0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N1</name>
<description>IPR_N1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N2</name>
<description>IPR_N2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N3</name>
<description>IPR_N3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>IPR10</name>
<displayName>IPR10</displayName>
<description>Interrupt Priority Register</description>
<addressOffset>0x328</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IPR_N0</name>
<description>IPR_N0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N1</name>
<description>IPR_N1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N2</name>
<description>IPR_N2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N3</name>
<description>IPR_N3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>IPR11</name>
<displayName>IPR11</displayName>
<description>Interrupt Priority Register</description>
<addressOffset>0x32C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IPR_N0</name>
<description>IPR_N0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N1</name>
<description>IPR_N1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N2</name>
<description>IPR_N2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N3</name>
<description>IPR_N3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>IPR12</name>
<displayName>IPR12</displayName>
<description>Interrupt Priority Register</description>
<addressOffset>0x330</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IPR_N0</name>
<description>IPR_N0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N1</name>
<description>IPR_N1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N2</name>
<description>IPR_N2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N3</name>
<description>IPR_N3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>IPR13</name>
<displayName>IPR13</displayName>
<description>Interrupt Priority Register</description>
<addressOffset>0x334</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IPR_N0</name>
<description>IPR_N0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N1</name>
<description>IPR_N1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N2</name>
<description>IPR_N2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N3</name>
<description>IPR_N3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>IPR14</name>
<displayName>IPR14</displayName>
<description>Interrupt Priority Register</description>
<addressOffset>0x338</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IPR_N0</name>
<description>IPR_N0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N1</name>
<description>IPR_N1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N2</name>
<description>IPR_N2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N3</name>
<description>IPR_N3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>IPR15</name>
<displayName>IPR15</displayName>
<description>Interrupt Priority Register</description>
<addressOffset>0x33C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IPR_N0</name>
<description>IPR_N0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N1</name>
<description>IPR_N1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N2</name>
<description>IPR_N2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N3</name>
<description>IPR_N3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>IPR16</name>
<displayName>IPR16</displayName>
<description>Interrupt Priority Register</description>
<addressOffset>0x340</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IPR_N0</name>
<description>IPR_N0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N1</name>
<description>IPR_N1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N2</name>
<description>IPR_N2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N3</name>
<description>IPR_N3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>IPR17</name>
<displayName>IPR17</displayName>
<description>Interrupt Priority Register</description>
<addressOffset>0x344</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IPR_N0</name>
<description>IPR_N0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N1</name>
<description>IPR_N1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N2</name>
<description>IPR_N2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N3</name>
<description>IPR_N3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>IPR18</name>
<displayName>IPR18</displayName>
<description>Interrupt Priority Register</description>
<addressOffset>0x348</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IPR_N0</name>
<description>IPR_N0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N1</name>
<description>IPR_N1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N2</name>
<description>IPR_N2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N3</name>
<description>IPR_N3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>IPR19</name>
<displayName>IPR19</displayName>
<description>Interrupt Priority Register</description>
<addressOffset>0x34C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IPR_N0</name>
<description>IPR_N0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N1</name>
<description>IPR_N1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N2</name>
<description>IPR_N2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N3</name>
<description>IPR_N3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>IPR20</name>
<displayName>IPR20</displayName>
<description>Interrupt Priority Register</description>
<addressOffset>0x350</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IPR_N0</name>
<description>IPR_N0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N1</name>
<description>IPR_N1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N2</name>
<description>IPR_N2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IPR_N3</name>
<description>IPR_N3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>CRS</name>
<description>Clock recovery system</description>
<groupName>CRS</groupName>
<baseAddress>0x40006000</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>CRS</name>
<description>CRS interrupt</description>
<value>82</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<displayName>CR</displayName>
<description>control register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00002000</resetValue>
<fields>
<field>
<name>TRIM</name>
<description>HSI48 oscillator smooth
trimming</description>
<bitOffset>8</bitOffset>
<bitWidth>6</bitWidth>
</field>
<field>
<name>SWSYNC</name>
<description>Generate software SYNC
event</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AUTOTRIMEN</name>
<description>Automatic trimming enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CEN</name>
<description>Frequency error counter
enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ESYNCIE</name>
<description>Expected SYNC interrupt
enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ERRIE</name>
<description>Synchronization or trimming error
interrupt enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SYNCWARNIE</name>
<description>SYNC warning interrupt
enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SYNCOKIE</name>
<description>SYNC event OK interrupt
enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>CFGR</name>
<displayName>CFGR</displayName>
<description>configuration register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x2022BB7F</resetValue>
<fields>
<field>
<name>SYNCPOL</name>
<description>SYNC polarity selection</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SYNCSRC</name>
<description>SYNC signal source
selection</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>SYNCDIV</name>
<description>SYNC divider</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>FELIM</name>
<description>Frequency error limit</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>RELOAD</name>
<description>Counter reload value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>ISR</name>
<displayName>ISR</displayName>
<description>interrupt and status register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FECAP</name>
<description>Frequency error capture</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
</field>
<field>
<name>FEDIR</name>
<description>Frequency error direction</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TRIMOVF</name>
<description>Trimming overflow or
underflow</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SYNCMISS</name>
<description>SYNC missed</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SYNCERR</name>
<description>SYNC error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ESYNCF</name>
<description>Expected SYNC flag</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ERRF</name>
<description>Error flag</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SYNCWARNF</name>
<description>SYNC warning flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SYNCOKF</name>
<description>SYNC event OK flag</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>ICR</name>
<displayName>ICR</displayName>
<description>interrupt flag clear register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ESYNCC</name>
<description>Expected SYNC clear flag</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ERRC</name>
<description>Error clear flag</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SYNCWARNC</name>
<description>SYNC warning clear flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SYNCOKC</name>
<description>SYNC event OK clear flag</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>USB</name>
<description>Universal serial bus full-speed device
interface</description>
<groupName>USB</groupName>
<baseAddress>0x40006800</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>EP%sR</name>
<displayName>EP0R</displayName>
<description>endpoint 0 register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EA</name>
<description>Endpoint address</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>15</maximum></range></writeConstraint>
</field>
<field>
<name>STAT_TX</name>
<description>Status bits, for transmission
transfers</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>STAT_TX</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>all transmission requests addressed to this endpoint are ignored</description><value>0</value></enumeratedValue><enumeratedValue><name>Stall</name><description>the endpoint is stalled and all transmission requests result in a STALL handshake</description><value>1</value></enumeratedValue><enumeratedValue><name>Nak</name><description>the endpoint is naked and all transmission requests result in a NAK handshake</description><value>2</value></enumeratedValue><enumeratedValue><name>Valid</name><description>this endpoint is enabled for transmission</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DTOG_TX</name>
<description>Data Toggle, for transmission
transfers</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CTR_TX</name>
<description>Correct Transfer for
transmission</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EP_KIND</name>
<description>Endpoint kind</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EP_TYPE</name>
<description>Endpoint type</description>
<bitOffset>9</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>EP_TYPE</name><usage>read-write</usage><enumeratedValue><name>Bulk</name><description>Bulk endpoint</description><value>0</value></enumeratedValue><enumeratedValue><name>Control</name><description>Control endpoint</description><value>1</value></enumeratedValue><enumeratedValue><name>Iso</name><description>Iso endpoint</description><value>2</value></enumeratedValue><enumeratedValue><name>Interrupt</name><description>Interrupt endpoint</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>SETUP</name>
<description>Setup transaction
completed</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>STAT_RX</name>
<description>Status bits, for reception
transfers</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<enumeratedValues><name>STAT_RX</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>all reception requests addressed to this endpoint are ignored</description><value>0</value></enumeratedValue><enumeratedValue><name>Stall</name><description>the endpoint is stalled and all reception requests result in a STALL handshake</description><value>1</value></enumeratedValue><enumeratedValue><name>Nak</name><description>the endpoint is naked and all reception requests result in a NAK handshake</description><value>2</value></enumeratedValue><enumeratedValue><name>Valid</name><description>this endpoint is enabled for reception</description><value>3</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DTOG_RX</name>
<description>Data Toggle, for reception
transfers</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CTR_RX</name>
<description>Correct transfer for
reception</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
<dim>8</dim><dimIndex>0,1,2,3,4,5,6,7</dimIndex><dimIncrement>0x4</dimIncrement></register>
<register>
<name>CNTR</name>
<displayName>CNTR</displayName>
<description>control register</description>
<addressOffset>0x40</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000003</resetValue>
<fields>
<field>
<name>FRES</name>
<description>Force USB Reset</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>FRES</name><usage>read-write</usage><enumeratedValue><name>NoReset</name><description>Clear USB reset</description><value>0</value></enumeratedValue><enumeratedValue><name>Reset</name><description>Force a reset of the USB peripheral, exactly like a RESET signaling on the USB</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PDWN</name>
<description>Power down</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>PDWN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>No power down</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Enter power down mode</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>LPMODE</name>
<description>Low-power mode</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>LPMODE</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>No low-power mode</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Enter low-power mode</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>FSUSP</name>
<description>Force suspend</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>FSUSP</name><usage>read-write</usage><enumeratedValue><name>NoEffect</name><description>No effect</description><value>0</value></enumeratedValue><enumeratedValue><name>Suspend</name><description>Enter suspend mode. Clocks and static power dissipation in the analog transceiver are left unaffected</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RESUME</name>
<description>Resume request</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RESUME</name><usage>read-write</usage><enumeratedValue><name>Requested</name><description>Resume requested</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>L1RESUME</name>
<description>LPM L1 Resume request</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>L1RESUME</name><usage>read-write</usage><enumeratedValue><name>Requested</name><description>LPM L1 request requested</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>L1REQM</name>
<description>LPM L1 state request interrupt
mask</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>L1REQM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>L1REQ Interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>L1REQ Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ESOFM</name>
<description>Expected start of frame interrupt
mask</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ESOFM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>ESOF Interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>ESOF Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>SOFM</name>
<description>Start of frame interrupt
mask</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>SOFM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>SOF Interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>SOF Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RESETM</name>
<description>USB reset interrupt mask</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RESETM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>RESET Interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>RESET Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>SUSPM</name>
<description>Suspend mode interrupt
mask</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>SUSPM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Suspend Mode Request SUSP Interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>SUSP Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>WKUPM</name>
<description>Wakeup interrupt mask</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>WKUPM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>WKUP Interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>WKUP Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ERRM</name>
<description>Error interrupt mask</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>ERRM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>ERR Interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>ERR Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PMAOVRM</name>
<description>Packet memory area over / underrun
interrupt mask</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>PMAOVRM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>PMAOVR Interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>PMAOVR Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CTRM</name>
<description>Correct transfer interrupt
mask</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>CTRM</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Correct Transfer (CTR) Interrupt disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>CTR Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>ISTR</name>
<displayName>ISTR</displayName>
<description>interrupt status register</description>
<addressOffset>0x44</addressOffset>
<size>0x20</size>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EP_ID</name>
<description>Endpoint Identifier</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-only</access>
<writeConstraint><range><minimum>0</minimum><maximum>15</maximum></range></writeConstraint>
</field>
<field>
<name>DIR</name>
<description>Direction of transaction</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
<enumeratedValues><name>DIR</name><usage>read-write</usage><enumeratedValue><name>To</name><description>data transmitted by the USB peripheral to the host PC</description><value>0</value></enumeratedValue><enumeratedValue><name>From</name><description>data received by the USB peripheral from the host PC</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>L1REQ</name>
<description>LPM L1 state request</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues><name>L1REQ</name><usage>read-write</usage><enumeratedValue><name>Received</name><description>LPM command to enter the L1 state is successfully received and acknowledged</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ESOF</name>
<description>Expected start frame</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues><name>ESOF</name><usage>read-write</usage><enumeratedValue><name>ExpectedStartOfFrame</name><description>an SOF packet is expected but not received</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>SOF</name>
<description>start of frame</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues><name>SOF</name><usage>read-write</usage><enumeratedValue><name>StartOfFrame</name><description>beginning of a new USB frame and it is set when a SOF packet arrives through the USB bus</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RESET</name>
<description>reset request</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues><name>RESET</name><usage>read-write</usage><enumeratedValue><name>Reset</name><description>peripheral detects an active USB RESET signal at its inputs</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>SUSP</name>
<description>Suspend mode request</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues><name>SUSP</name><usage>read-write</usage><enumeratedValue><name>Suspend</name><description>no traffic has been received for 3 ms, indicating a suspend mode request from the USB bus</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>WKUP</name>
<description>Wakeup</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues><name>WKUP</name><usage>read-write</usage><enumeratedValue><name>Wakeup</name><description>activity is detected that wakes up the USB peripheral</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>ERR</name>
<description>Error</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues><name>ERR</name><usage>read-write</usage><enumeratedValue><name>Error</name><description>One of No ANSwer, Cyclic Redundancy Check, Bit Stuffing or Framing format Violation error occurred</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PMAOVR</name>
<description>Packet memory area over /
underrun</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues><name>PMAOVR</name><usage>read-write</usage><enumeratedValue><name>Overrun</name><description>microcontroller has not been able to respond in time to an USB memory request</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>CTR</name>
<description>Correct transfer</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
<enumeratedValues><name>CTR</name><usage>read-write</usage><enumeratedValue><name>Completed</name><description>endpoint has successfully completed a transaction</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>FNR</name>
<displayName>FNR</displayName>
<description>frame number register</description>
<addressOffset>0x48</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>FN</name>
<description>Frame number</description>
<bitOffset>0</bitOffset>
<bitWidth>11</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>2047</maximum></range></writeConstraint>
</field>
<field>
<name>LSOF</name>
<description>Lost SOF</description>
<bitOffset>11</bitOffset>
<bitWidth>2</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>3</maximum></range></writeConstraint>
</field>
<field>
<name>LCK</name>
<description>Locked</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>LCK</name><usage>read-write</usage><enumeratedValue><name>Locked</name><description>the frame timer remains in this state until an USB reset or USB suspend event occurs</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RXDM</name>
<description>Receive data - line status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RXDM</name><usage>read-write</usage><enumeratedValue><name>Received</name><description>received data minus upstream port data line</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>RXDP</name>
<description>Receive data + line status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>RXDP</name><usage>read-write</usage><enumeratedValue><name>Received</name><description>received data plus upstream port data line</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>DADDR</name>
<displayName>DADDR</displayName>
<description>device address</description>
<addressOffset>0x4C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>ADD</name>
<description>Device address</description>
<bitOffset>0</bitOffset>
<bitWidth>7</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>127</maximum></range></writeConstraint>
</field>
<field>
<name>EF</name>
<description>Enable function</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<enumeratedValues><name>EF</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>USB device disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>USB device enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
<register>
<name>BTABLE</name>
<displayName>BTABLE</displayName>
<description>Buffer table address</description>
<addressOffset>0x50</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>BTABLE</name>
<description>Buffer table</description>
<bitOffset>3</bitOffset>
<bitWidth>13</bitWidth>
<writeConstraint><range><minimum>0</minimum><maximum>8191</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>LPMCSR</name>
<displayName>LPMCSR</displayName>
<description>LPM control and status
register</description>
<addressOffset>0x54</addressOffset>
<size>0x20</size>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>LPMEN</name>
<description>LPM support enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues><name>LPMEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>enable the LPM support within the USB device</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>no LPM transactions are handled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>LPMACK</name>
<description>LPM Token acknowledge
enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues><name>LPMACK</name><usage>read-write</usage><enumeratedValue><name>Nyet</name><description>the valid LPM Token will be NYET</description><value>0</value></enumeratedValue><enumeratedValue><name>Ack</name><description>the valid LPM Token will be ACK</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>REMWAKE</name>
<description>bRemoteWake value</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BESL</name>
<description>BESL value</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-only</access>
<writeConstraint><range><minimum>0</minimum><maximum>15</maximum></range></writeConstraint>
</field>
</fields>
</register>
<register>
<name>BCDR</name>
<displayName>BCDR</displayName>
<description>Battery charging detector</description>
<addressOffset>0x58</addressOffset>
<size>0x20</size>
<resetValue>0x0000</resetValue>
<fields>
<field>
<name>BCDEN</name>
<description>Battery charging detector</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues><name>BCDEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>disable the BCD support</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>enable the BCD support within the USB device</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DCDEN</name>
<description>Data contact detection</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues><name>DCDEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Data contact detection (DCD) mode disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Data contact detection (DCD) mode enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PDEN</name>
<description>Primary detection</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues><name>PDEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Primary detection (PD) mode disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Primary detection (PD) mode enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>SDEN</name>
<description>Secondary detection</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues><name>SDEN</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>Secondary detection (SD) mode disabled</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>Secondary detection (SD) mode enabled</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DCDET</name>
<description>Data contact detection</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
<enumeratedValues><name>DCDET</name><usage>read-write</usage><enumeratedValue><name>NotDetected</name><description>data lines contact not detected</description><value>0</value></enumeratedValue><enumeratedValue><name>Detected</name><description>data lines contact detected</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PDET</name>
<description>Primary detection</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
<enumeratedValues><name>PDET</name><usage>read-write</usage><enumeratedValue><name>NoBCD</name><description>no BCD support detected</description><value>0</value></enumeratedValue><enumeratedValue><name>BCD</name><description>BCD support detected</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>SDET</name>
<description>Secondary detection</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
<enumeratedValues><name>SDET</name><usage>read-write</usage><enumeratedValue><name>CDP</name><description>CDP detected</description><value>0</value></enumeratedValue><enumeratedValue><name>DCP</name><description>DCP detected</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>PS2DET</name>
<description>DM pull-up detection
status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
<enumeratedValues><name>PS2DET</name><usage>read-write</usage><enumeratedValue><name>Normal</name><description>Normal port detected</description><value>0</value></enumeratedValue><enumeratedValue><name>PS2</name><description>PS2 port or proprietary charger detected</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
<field>
<name>DPPU</name>
<description>DP pull-up control</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues><name>DPPU</name><usage>read-write</usage><enumeratedValue><name>Disabled</name><description>signalize disconnect to the host when needed by the user software</description><value>0</value></enumeratedValue><enumeratedValue><name>Enabled</name><description>enable the embedded pull-up on the DP line</description><value>1</value></enumeratedValue></enumeratedValues>
</field>
</fields>
</register>
</registers>
<interrupt><name>USB</name><description>USB event interrupt through EXTI</description><value>67</value></interrupt>
</peripheral>
<peripheral>
<name>DFSDM</name>
<description>Digital filter for sigma delta
modulators</description>
<groupName>DFSDM</groupName>
<baseAddress>0x40016000</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x500</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>DFSDM1_FLT3</name>
<description>DFSDM1_FLT3 global interrupt</description>
<value>42</value>
</interrupt>
<interrupt>
<name>DFSDM1</name>
<description>DFSDM1_FLT0 global interrupt</description>
<value>61</value>
</interrupt>
<interrupt>
<name>DFSDM2</name>
<description>DFSDM1_FLT1 global interrupt</description>
<value>62</value>
</interrupt>
<interrupt>
<name>DFSDM1_FLT2</name>
<description>DFSDM1_FLT2 global interrupt</description>
<value>63</value>
</interrupt>
<interrupt>
<name>I2C4_ER</name>
<description>I2C4 error interrupt</description>
<value>84</value>
</interrupt>
<registers>
<register>
<name>DFSDM0_CR2</name>
<displayName>DFSDM0_CR2</displayName>
<description>control register 2</description>
<addressOffset>0x104</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AWDCH</name>
<description>Analog watchdog channel
selection</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>EXCH</name>
<description>Extremes detector channel
selection</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>CKABIE</name>
<description>Clock absence interrupt
enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SCDIE</name>
<description>Short-circuit detector interrupt
enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AWDIE</name>
<description>Analog watchdog interrupt
enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ROVRIE</name>
<description>Regular data overrun interrupt
enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>JOVRIE</name>
<description>Injected data overrun interrupt
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>REOCIE</name>
<description>Regular end of conversion interrupt
enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>JEOCIE</name>
<description>Injected end of conversion interrupt
enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>DFSDM1_CR2</name>
<displayName>DFSDM1_CR2</displayName>
<description>control register 2</description>
<addressOffset>0x204</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AWDCH</name>
<description>Analog watchdog channel
selection</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>EXCH</name>
<description>Extremes detector channel
selection</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>CKABIE</name>
<description>Clock absence interrupt
enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SCDIE</name>
<description>Short-circuit detector interrupt
enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AWDIE</name>
<description>Analog watchdog interrupt
enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ROVRIE</name>
<description>Regular data overrun interrupt
enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>JOVRIE</name>
<description>Injected data overrun interrupt
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>REOCIE</name>
<description>Regular end of conversion interrupt
enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>JEOCIE</name>
<description>Injected end of conversion interrupt
enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>DFSDM2_CR2</name>
<displayName>DFSDM2_CR2</displayName>
<description>control register 2</description>
<addressOffset>0x304</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AWDCH</name>
<description>Analog watchdog channel
selection</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>EXCH</name>
<description>Extremes detector channel
selection</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>CKABIE</name>
<description>Clock absence interrupt
enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SCDIE</name>
<description>Short-circuit detector interrupt
enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AWDIE</name>
<description>Analog watchdog interrupt
enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ROVRIE</name>
<description>Regular data overrun interrupt
enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>JOVRIE</name>
<description>Injected data overrun interrupt
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>REOCIE</name>
<description>Regular end of conversion interrupt
enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>JEOCIE</name>
<description>Injected end of conversion interrupt
enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>DFSDM3_CR2</name>
<displayName>DFSDM3_CR2</displayName>
<description>control register 2</description>
<addressOffset>0x404</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AWDCH</name>
<description>Analog watchdog channel
selection</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>EXCH</name>
<description>Extremes detector channel
selection</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>CKABIE</name>
<description>Clock absence interrupt
enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SCDIE</name>
<description>Short-circuit detector interrupt
enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AWDIE</name>
<description>Analog watchdog interrupt
enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ROVRIE</name>
<description>Regular data overrun interrupt
enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>JOVRIE</name>
<description>Injected data overrun interrupt
enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>REOCIE</name>
<description>Regular end of conversion interrupt
enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>JEOCIE</name>
<description>Injected end of conversion interrupt
enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<cluster><name>CH%s</name><description>DFSDM Channel cluster: contains CHCFG?R1, CHCFG?R2, CHAWSCD?R, CHWDAT?R and CHDATIN?R registers</description><addressOffset>0x0</addressOffset><register>
<name>CFGR1</name>
<displayName>CHCFG0R1</displayName>
<description>channel configuration y
register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0</resetValue>
<fields>
<field>
<name>DFSDMEN</name>
<description>DFSDMEN</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CKOUTSRC</name>
<description>CKOUTSRC</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CKOUTDIV</name>
<description>CKOUTDIV</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>DATPACK</name>
<description>DATPACK</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>DATMPX</name>
<description>DATMPX</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>CHINSEL</name>
<description>CHINSEL</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CHEN</name>
<description>CHEN</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CKABEN</name>
<description>CKABEN</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SCDEN</name>
<description>SCDEN</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SPICKSEL</name>
<description>SPICKSEL</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>SITP</name>
<description>SITP</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
</field>
</fields>
</register>
<register>
<name>CFGR2</name>
<displayName>CHCFG0R2</displayName>
<description>channel configuration y
register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0</resetValue>
<fields>
<field>
<name>OFFSET</name>
<description>OFFSET</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
</field>
<field>
<name>DTRBS</name>
<description>DTRBS</description>
<bitOffset>3</bitOffset>
<bitWidth>5</bitWidth>
</field>
</fields>
</register>
<register>
<name>AWSCDR</name>
<displayName>AWSCD0R</displayName>
<description>analog watchdog and short-circuit detector
register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0</resetValue>
<fields>
<field>
<name>AWFORD</name>
<description>AWFORD</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>AWFOSR</name>
<description>AWFOSR</description>
<bitOffset>16</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>BKSCD</name>
<description>BKSCD</description>
<bitOffset>12</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>SCDT</name>
<description>SCDT</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>WDATR</name>
<displayName>CHWDAT0R</displayName>
<description>channel watchdog filter data
register</description>
<addressOffset>0xc</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0</resetValue>
<fields>
<field>
<name>WDATA</name>
<description>WDATA</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>DATINR</name>
<displayName>CHDATIN0R</displayName>
<description>channel data input register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0</resetValue>
<fields>
<field>
<name>INDAT1</name>
<description>INDAT1</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
</field>
<field>
<name>INDAT0</name>
<description>INDAT0</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<dim>8</dim><dimIndex>0,1,2,3,4,5,6,7</dimIndex><dimIncrement>0x20</dimIncrement></cluster><cluster><name>FLT%s</name><description>Cluster FLT%s, containing DFSDM?_CR1, DFSDM?_ISR, DFSDM?_ICR, DFSDM?_JCHGR, DFSDM?_FCR, DFSDM?_JDATAR, DFSDM?_RDATAR, DFSDM?_AWHTR, DFSDM?_AWLTR, DFSDM?_AWSR, DFSDM?_AWCFR, DFSDM?_EXMAX, DFSDM?_EXMIN, DFSDM?_CNVTIMR</description><addressOffset>0x100</addressOffset><register>
<name>CR2</name>
<displayName>DFSDM0_CR1</displayName>
<description>control register 1</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AWFSEL</name>
<description>Analog watchdog fast mode
select</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FAST</name>
<description>Fast conversion mode selection for
regular conversions</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RCH</name>
<description>Regular channel selection</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>RDMAEN</name>
<description>DMA channel enabled to read data for the
regular conversion</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RSYNC</name>
<description>Launch regular conversion synchronously
with DFSDM0</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RCONT</name>
<description>Continuous mode selection for regular
conversions</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RSWSTART</name>
<description>Software start of a conversion on the
regular channel</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>JEXTEN</name>
<description>Trigger enable and trigger edge
selection for injected conversions</description>
<bitOffset>13</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>JEXTSEL</name>
<description>Trigger signal selection for launching
injected conversions</description>
<bitOffset>8</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>JDMAEN</name>
<description>DMA channel enabled to read data for the
injected channel group</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>JSCAN</name>
<description>Scanning conversion mode for injected
conversions</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>JSYNC</name>
<description>Launch an injected conversion
synchronously with the DFSDM0 JSWSTART
trigger</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>JSWSTART</name>
<description>Start a conversion of the injected group
of channels</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DFEN</name>
<description>DFSDM enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>ISR</name>
<displayName>DFSDM0_ISR</displayName>
<description>interrupt and status register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00FF0000</resetValue>
<fields>
<field>
<name>SCDF</name>
<description>short-circuit detector
flag</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>CKABF</name>
<description>Clock absence flag</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>RCIP</name>
<description>Regular conversion in progress
status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>JCIP</name>
<description>Injected conversion in progress
status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AWDF</name>
<description>Analog watchdog</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ROVRF</name>
<description>Regular conversion overrun
flag</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>JOVRF</name>
<description>Injected conversion overrun
flag</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>REOCF</name>
<description>End of regular conversion
flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>JEOCF</name>
<description>End of injected conversion
flag</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>ICR</name>
<displayName>DFSDM0_ICR</displayName>
<description>interrupt flag clear register</description>
<addressOffset>0xc</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CLRSCDF</name>
<description>Clear the short-circuit detector
flag</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>CLRCKABF</name>
<description>Clear the clock absence
flag</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>CLRROVRF</name>
<description>Clear the regular conversion overrun
flag</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CLRJOVRF</name>
<description>Clear the injected conversion overrun
flag</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>JCHGR</name>
<displayName>DFSDM0_JCHGR</displayName>
<description>injected channel group selection
register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000001</resetValue>
<fields>
<field>
<name>JCHG</name>
<description>Injected channel group
selection</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>FCR</name>
<displayName>DFSDM0_FCR</displayName>
<description>filter control register</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FORD</name>
<description>Sinc filter order</description>
<bitOffset>29</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>FOSR</name>
<description>Sinc filter oversampling ratio
(decimation rate)</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
</field>
<field>
<name>IOSR</name>
<description>Integrator oversampling ratio (averaging
length)</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>JDATAR</name>
<displayName>DFSDM0_JDATAR</displayName>
<description>data register for injected
group</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>JDATA</name>
<description>Injected group conversion
data</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
</field>
<field>
<name>JDATACH</name>
<description>Injected channel most recently
converted</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
</field>
</fields>
</register>
<register>
<name>RDATAR</name>
<displayName>DFSDM0_RDATAR</displayName>
<description>data register for the regular
channel</description>
<addressOffset>0x1c</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RDATA</name>
<description>Regular channel conversion
data</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
</field>
<field>
<name>RPEND</name>
<description>Regular channel pending
data</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RDATACH</name>
<description>Regular channel most recently
converted</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
</field>
</fields>
</register>
<register>
<name>AWHTR</name>
<displayName>DFSDM0_AWHTR</displayName>
<description>analog watchdog high threshold
register</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AWHT</name>
<description>Analog watchdog high
threshold</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
</field>
<field>
<name>BKAWH</name>
<description>Break signal assignment to analog
watchdog high threshold event</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
</field>
</fields>
</register>
<register>
<name>AWLTR</name>
<displayName>DFSDM0_AWLTR</displayName>
<description>analog watchdog low threshold
register</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AWLT</name>
<description>Analog watchdog low
threshold</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
</field>
<field>
<name>BKAWL</name>
<description>Break signal assignment to analog
watchdog low threshold event</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
</field>
</fields>
</register>
<register>
<name>AWSR</name>
<displayName>DFSDM0_AWSR</displayName>
<description>analog watchdog status
register</description>
<addressOffset>0x28</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>AWHTF</name>
<description>Analog watchdog high threshold
flag</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>AWLTF</name>
<description>Analog watchdog low threshold
flag</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>AWCFR</name>
<displayName>DFSDM0_AWCFR</displayName>
<description>analog watchdog clear flag
register</description>
<addressOffset>0x2c</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CLRAWHTF</name>
<description>Clear the analog watchdog high threshold
flag</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>CLRAWLTF</name>
<description>Clear the analog watchdog low threshold
flag</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>EXMAX</name>
<displayName>DFSDM0_EXMAX</displayName>
<description>Extremes detector maximum
register</description>
<addressOffset>0x30</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x80000000</resetValue>
<fields>
<field>
<name>EXMAX</name>
<description>Extremes detector maximum
value</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
</field>
<field>
<name>EXMAXCH</name>
<description>Extremes detector maximum data
channel</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
</field>
</fields>
</register>
<register>
<name>EXMIN</name>
<displayName>DFSDM0_EXMIN</displayName>
<description>Extremes detector minimum
register</description>
<addressOffset>0x34</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x7FFFFF00</resetValue>
<fields>
<field>
<name>EXMIN</name>
<description>EXMIN</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
</field>
<field>
<name>EXMINCH</name>
<description>Extremes detector minimum data
channel</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
</field>
</fields>
</register>
<register>
<name>CNVTIMR</name>
<displayName>DFSDM0_CNVTIMR</displayName>
<description>conversion timer register</description>
<addressOffset>0x38</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CNVCNT</name>
<description>28-bit timer counting conversion time t
= CNVCNT[27:0] / fDFSDM_CKIN</description>
<bitOffset>4</bitOffset>
<bitWidth>28</bitWidth>
</field>
</fields>
</register>
<dim>4</dim><dimIndex>0,1,2,3</dimIndex><dimIncrement>0x100</dimIncrement></cluster></registers>
</peripheral>
<peripheral>
<name>QUADSPI</name>
<description>QuadSPI interface</description>
<groupName>QUADSPI</groupName>
<baseAddress>0xA0001000</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>QUADSPI</name>
<description>Quad SPI global interrupt</description>
<value>71</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<displayName>CR</displayName>
<description>control register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PRESCALER</name>
<description>Clock prescaler</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>PMM</name>
<description>Polling match mode</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>APMS</name>
<description>Automatic poll mode stop</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TOIE</name>
<description>TimeOut interrupt enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SMIE</name>
<description>Status match interrupt
enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FTIE</name>
<description>FIFO threshold interrupt
enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TCIE</name>
<description>Transfer complete interrupt
enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TEIE</name>
<description>Transfer error interrupt
enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FTHRES</name>
<description>IFO threshold level</description>
<bitOffset>8</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>FSEL</name>
<description>FLASH memory selection</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DFM</name>
<description>Dual-flash mode</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SSHIFT</name>
<description>Sample shift</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TCEN</name>
<description>Timeout counter enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DMAEN</name>
<description>DMA enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ABORT</name>
<description>Abort request</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EN</name>
<description>Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>DCR</name>
<displayName>DCR</displayName>
<description>device configuration register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FSIZE</name>
<description>FLASH memory size</description>
<bitOffset>16</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>CSHT</name>
<description>Chip select high time</description>
<bitOffset>8</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>CKMODE</name>
<description>Mode 0 / mode 3</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>SR</name>
<displayName>SR</displayName>
<description>status register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FLEVEL</name>
<description>FIFO level</description>
<bitOffset>8</bitOffset>
<bitWidth>7</bitWidth>
</field>
<field>
<name>BUSY</name>
<description>Busy</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TOF</name>
<description>Timeout flag</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SMF</name>
<description>Status match flag</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FTF</name>
<description>FIFO threshold flag</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TCF</name>
<description>Transfer complete flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TEF</name>
<description>Transfer error flag</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>FCR</name>
<displayName>FCR</displayName>
<description>flag clear register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CTOF</name>
<description>Clear timeout flag</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CSMF</name>
<description>Clear status match flag</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CTCF</name>
<description>Clear transfer complete
flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CTEF</name>
<description>Clear transfer error flag</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>DLR</name>
<displayName>DLR</displayName>
<description>data length register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DL</name>
<description>Data length</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>CCR</name>
<displayName>CCR</displayName>
<description>communication configuration
register</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DDRM</name>
<description>Double data rate mode</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DHHC</name>
<description>DDR hold half cycle</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SIOO</name>
<description>Send instruction only once
mode</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FMODE</name>
<description>Functional mode</description>
<bitOffset>26</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>DMODE</name>
<description>Data mode</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>DCYC</name>
<description>Number of dummy cycles</description>
<bitOffset>18</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>ABSIZE</name>
<description>Alternate bytes size</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>ABMODE</name>
<description>Alternate bytes mode</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>ADSIZE</name>
<description>Address size</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>ADMODE</name>
<description>Address mode</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>IMODE</name>
<description>Instruction mode</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>INSTRUCTION</name>
<description>Instruction</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>AR</name>
<displayName>AR</displayName>
<description>address register</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADDRESS</name>
<description>Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>ABR</name>
<displayName>ABR</displayName>
<description>ABR</description>
<addressOffset>0x1C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ALTERNATE</name>
<description>ALTERNATE</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>DR</name>
<displayName>DR</displayName>
<description>data register</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DATA</name>
<description>Data</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>PSMKR</name>
<displayName>PSMKR</displayName>
<description>polling status mask register</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MASK</name>
<description>Status mask</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>PSMAR</name>
<displayName>PSMAR</displayName>
<description>polling status match register</description>
<addressOffset>0x28</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MATCH</name>
<description>Status match</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>PIR</name>
<displayName>PIR</displayName>
<description>polling interval register</description>
<addressOffset>0x2C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>INTERVAL</name>
<description>Polling interval</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>LPTR</name>
<displayName>LPTR</displayName>
<description>low-power timeout register</description>
<addressOffset>0x30</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TIMEOUT</name>
<description>Timeout period</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>DBGMCU</name>
<description>MCU debug component</description>
<groupName>DBGMCU</groupName>
<baseAddress>0xE0042000</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x15</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>IDCODE</name>
<displayName>IDCODE</displayName>
<description>DBGMCU_IDCODE</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DEV_ID</name>
<description>Device identifier</description>
<bitOffset>0</bitOffset>
<bitWidth>12</bitWidth>
</field>
<field>
<name>REV_ID</name>
<description>Revision identifie</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>CR</name>
<displayName>CR</displayName>
<description>Debug MCU configuration
register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DBG_SLEEP</name>
<description>Debug Sleep mode</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DBG_STOP</name>
<description>Debug Stop mode</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DBG_STANDBY</name>
<description>Debug Standby mode</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TRACE_IOEN</name>
<description>Trace pin assignment
control</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TRACE_MODE</name>
<description>Trace pin assignment
control</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
</field>
</fields>
</register>
<register>
<name>APB1FZR1</name>
<displayName>APB1FZR1</displayName>
<description>Debug MCU APB1 freeze
register1</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DBG_TIM2_STOP</name>
<description>TIM2 counter stopped when core is
halted</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DBG_TIM6_STOP</name>
<description>TIM6 counter stopped when core is
halted</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DBG_TIM7_STOP</name>
<description>TIM7 counter stopped when core is
halted</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DBG_RTC_STOP</name>
<description>RTC counter stopped when core is
halted</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DBG_WWDG_STOP</name>
<description>Window watchdog counter stopped when
core is halted</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DBG_IWDG_STOP</name>
<description>Independent watchdog counter stopped
when core is halted</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DBG_I2C1_STOP</name>
<description>I2C1 SMBUS timeout counter stopped when
core is halted</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DBG_I2C2_STOP</name>
<description>I2C2 SMBUS timeout counter stopped when
core is halted</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DBG_I2C3_STOP</name>
<description>I2C3 SMBUS timeout counter stopped when
core is halted</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DBG_CAN_STOP</name>
<description>bxCAN stopped when core is
halted</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DBG_LPTIM1_STOP</name>
<description>LPTIM1 counter stopped when core is
halted</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>APB1FZR2</name>
<displayName>APB1FZR2</displayName>
<description>Debug MCU APB1 freeze register
2</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DBG_LPTIM2_STOP</name>
<description>LPTIM2 counter stopped when core is
halted</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>APB2FZR</name>
<displayName>APB2FZR</displayName>
<description>Debug MCU APB2 freeze register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DBG_TIM1_STOP</name>
<description>TIM1 counter stopped when core is
halted</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DBG_TIM15_STOP</name>
<description>TIM15 counter stopped when core is
halted</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DBG_TIM16_STOP</name>
<description>TIM16 counter stopped when core is
halted</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>FPU</name>
<description>Floting point unit</description>
<groupName>FPU</groupName>
<baseAddress>0xE000EF34</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0xD</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>FPU</name>
<description>Floating point unit interrupt</description>
<value>81</value>
</interrupt>
<interrupt>
<name>FPU</name>
<description>Floating point interrupt</description>
<value>81</value>
</interrupt>
<registers>
<register>
<name>FPCCR</name>
<displayName>FPCCR</displayName>
<description>Floating-point context control
register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LSPACT</name>
<description>LSPACT</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>USER</name>
<description>USER</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>THREAD</name>
<description>THREAD</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>HFRDY</name>
<description>HFRDY</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MMRDY</name>
<description>MMRDY</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BFRDY</name>
<description>BFRDY</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MONRDY</name>
<description>MONRDY</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LSPEN</name>
<description>LSPEN</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ASPEN</name>
<description>ASPEN</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>FPCAR</name>
<displayName>FPCAR</displayName>
<description>Floating-point context address
register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADDRESS</name>
<description>Location of unpopulated
floating-point</description>
<bitOffset>3</bitOffset>
<bitWidth>29</bitWidth>
</field>
</fields>
</register>
<register>
<name>FPSCR</name>
<displayName>FPSCR</displayName>
<description>Floating-point status control
register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IOC</name>
<description>Invalid operation cumulative exception
bit</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DZC</name>
<description>Division by zero cumulative exception
bit.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>OFC</name>
<description>Overflow cumulative exception
bit</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>UFC</name>
<description>Underflow cumulative exception
bit</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>IXC</name>
<description>Inexact cumulative exception
bit</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>IDC</name>
<description>Input denormal cumulative exception
bit.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>RMode</name>
<description>Rounding Mode control
field</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>FZ</name>
<description>Flush-to-zero mode control
bit:</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DN</name>
<description>Default NaN mode control
bit</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>AHP</name>
<description>Alternative half-precision control
bit</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>V</name>
<description>Overflow condition code
flag</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>C</name>
<description>Carry condition code flag</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>Z</name>
<description>Zero condition code flag</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>N</name>
<description>Negative condition code
flag</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>MPU</name>
<description>Memory protection unit</description>
<groupName>MPU</groupName>
<baseAddress>0xE000ED90</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x15</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>MPU_TYPER</name>
<displayName>MPU_TYPER</displayName>
<description>MPU type register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0X00000800</resetValue>
<fields>
<field>
<name>SEPARATE</name>
<description>Separate flag</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DREGION</name>
<description>Number of MPU data regions</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>IREGION</name>
<description>Number of MPU instruction
regions</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>MPU_CTRL</name>
<displayName>MPU_CTRL</displayName>
<description>MPU control register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0X00000000</resetValue>
<fields>
<field>
<name>ENABLE</name>
<description>Enables the MPU</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>HFNMIENA</name>
<description>Enables the operation of MPU during hard
fault</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PRIVDEFENA</name>
<description>Enable priviliged software access to
default memory map</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>MPU_RNR</name>
<displayName>MPU_RNR</displayName>
<description>MPU region number register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0X00000000</resetValue>
<fields>
<field>
<name>REGION</name>
<description>MPU region</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>MPU_RBAR</name>
<displayName>MPU_RBAR</displayName>
<description>MPU region base address
register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0X00000000</resetValue>
<fields>
<field>
<name>REGION</name>
<description>MPU region field</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>VALID</name>
<description>MPU region number valid</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ADDR</name>
<description>Region base address field</description>
<bitOffset>5</bitOffset>
<bitWidth>27</bitWidth>
</field>
</fields>
</register>
<register>
<name>MPU_RASR</name>
<displayName>MPU_RASR</displayName>
<description>MPU region attribute and size
register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0X00000000</resetValue>
<fields>
<field>
<name>ENABLE</name>
<description>Region enable bit.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SIZE</name>
<description>Size of the MPU protection
region</description>
<bitOffset>1</bitOffset>
<bitWidth>5</bitWidth>
</field>
<field>
<name>SRD</name>
<description>Subregion disable bits</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>B</name>
<description>memory attribute</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>C</name>
<description>memory attribute</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>S</name>
<description>Shareable memory attribute</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TEX</name>
<description>memory attribute</description>
<bitOffset>19</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>AP</name>
<description>Access permission</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>XN</name>
<description>Instruction access disable
bit</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>STK</name>
<description>SysTick timer</description>
<groupName>STK</groupName>
<baseAddress>0xE000E010</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x11</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>CTRL</name>
<displayName>CTRL</displayName>
<description>SysTick control and status
register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0X00000000</resetValue>
<fields>
<field>
<name>ENABLE</name>
<description>Counter enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>TICKINT</name>
<description>SysTick exception request
enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>CLKSOURCE</name>
<description>Clock source selection</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>COUNTFLAG</name>
<description>COUNTFLAG</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>LOAD</name>
<displayName>LOAD</displayName>
<description>SysTick reload value register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0X00000000</resetValue>
<fields>
<field>
<name>RELOAD</name>
<description>RELOAD value</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
</field>
</fields>
</register>
<register>
<name>VAL</name>
<displayName>VAL</displayName>
<description>SysTick current value register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0X00000000</resetValue>
<fields>
<field>
<name>CURRENT</name>
<description>Current counter value</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
</field>
</fields>
</register>
<register>
<name>CALIB</name>
<displayName>CALIB</displayName>
<description>SysTick calibration value
register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0X00000000</resetValue>
<fields>
<field>
<name>TENMS</name>
<description>Calibration value</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
</field>
<field>
<name>SKEW</name>
<description>SKEW flag: Indicates whether the TENMS
value is exact</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>NOREF</name>
<description>NOREF flag. Reads as zero</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>SCB</name>
<description>System control block</description>
<groupName>SCB</groupName>
<baseAddress>0xE000ED00</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x41</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>CPUID</name>
<displayName>CPUID</displayName>
<description>CPUID base register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x410FC241</resetValue>
<fields>
<field>
<name>Revision</name>
<description>Revision number</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>PartNo</name>
<description>Part number of the
processor</description>
<bitOffset>4</bitOffset>
<bitWidth>12</bitWidth>
</field>
<field>
<name>Constant</name>
<description>Reads as 0xF</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>Variant</name>
<description>Variant number</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>Implementer</name>
<description>Implementer code</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>ICSR</name>
<displayName>ICSR</displayName>
<description>Interrupt control and state
register</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>VECTACTIVE</name>
<description>Active vector</description>
<bitOffset>0</bitOffset>
<bitWidth>9</bitWidth>
</field>
<field>
<name>RETTOBASE</name>
<description>Return to base level</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>VECTPENDING</name>
<description>Pending vector</description>
<bitOffset>12</bitOffset>
<bitWidth>7</bitWidth>
</field>
<field>
<name>ISRPENDING</name>
<description>Interrupt pending flag</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PENDSTCLR</name>
<description>SysTick exception clear-pending
bit</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PENDSTSET</name>
<description>SysTick exception set-pending
bit</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PENDSVCLR</name>
<description>PendSV clear-pending bit</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PENDSVSET</name>
<description>PendSV set-pending bit</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>NMIPENDSET</name>
<description>NMI set-pending bit.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>VTOR</name>
<displayName>VTOR</displayName>
<description>Vector table offset register</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TBLOFF</name>
<description>Vector table base offset
field</description>
<bitOffset>9</bitOffset>
<bitWidth>21</bitWidth>
</field>
</fields>
</register>
<register>
<name>AIRCR</name>
<displayName>AIRCR</displayName>
<description>Application interrupt and reset control
register</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>VECTRESET</name>
<description>VECTRESET</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>VECTCLRACTIVE</name>
<description>VECTCLRACTIVE</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SYSRESETREQ</name>
<description>SYSRESETREQ</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PRIGROUP</name>
<description>PRIGROUP</description>
<bitOffset>8</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>ENDIANESS</name>
<description>ENDIANESS</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>VECTKEYSTAT</name>
<description>Register key</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
</field>
</fields>
</register>
<register>
<name>SCR</name>
<displayName>SCR</displayName>
<description>System control register</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SLEEPONEXIT</name>
<description>SLEEPONEXIT</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SLEEPDEEP</name>
<description>SLEEPDEEP</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SEVEONPEND</name>
<description>Send Event on Pending bit</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>CCR</name>
<displayName>CCR</displayName>
<description>Configuration and control
register</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>NONBASETHRDENA</name>
<description>Configures how the processor enters
Thread mode</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>USERSETMPEND</name>
<description>USERSETMPEND</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>UNALIGN__TRP</name>
<description>UNALIGN_ TRP</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DIV_0_TRP</name>
<description>DIV_0_TRP</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BFHFNMIGN</name>
<description>BFHFNMIGN</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>STKALIGN</name>
<description>STKALIGN</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>SHPR1</name>
<displayName>SHPR1</displayName>
<description>System handler priority
registers</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PRI_4</name>
<description>Priority of system handler
4</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>PRI_5</name>
<description>Priority of system handler
5</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>PRI_6</name>
<description>Priority of system handler
6</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>SHPR2</name>
<displayName>SHPR2</displayName>
<description>System handler priority
registers</description>
<addressOffset>0x1C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PRI_11</name>
<description>Priority of system handler
11</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>SHPR3</name>
<displayName>SHPR3</displayName>
<description>System handler priority
registers</description>
<addressOffset>0x20</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PRI_14</name>
<description>Priority of system handler
14</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>PRI_15</name>
<description>Priority of system handler
15</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>SHCRS</name>
<displayName>SHCRS</displayName>
<description>System handler control and state
register</description>
<addressOffset>0x24</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MEMFAULTACT</name>
<description>Memory management fault exception active
bit</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BUSFAULTACT</name>
<description>Bus fault exception active
bit</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>USGFAULTACT</name>
<description>Usage fault exception active
bit</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SVCALLACT</name>
<description>SVC call active bit</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MONITORACT</name>
<description>Debug monitor active bit</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PENDSVACT</name>
<description>PendSV exception active
bit</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SYSTICKACT</name>
<description>SysTick exception active
bit</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>USGFAULTPENDED</name>
<description>Usage fault exception pending
bit</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MEMFAULTPENDED</name>
<description>Memory management fault exception
pending bit</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BUSFAULTPENDED</name>
<description>Bus fault exception pending
bit</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>SVCALLPENDED</name>
<description>SVC call pending bit</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MEMFAULTENA</name>
<description>Memory management fault enable
bit</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BUSFAULTENA</name>
<description>Bus fault enable bit</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>USGFAULTENA</name>
<description>Usage fault enable bit</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>CFSR_UFSR_BFSR_MMFSR</name>
<displayName>CFSR_UFSR_BFSR_MMFSR</displayName>
<description>Configurable fault status
register</description>
<addressOffset>0x28</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IACCVIOL</name>
<description>Instruction access violation
flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MUNSTKERR</name>
<description>Memory manager fault on unstacking for a
return from exception</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MSTKERR</name>
<description>Memory manager fault on stacking for
exception entry.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MLSPERR</name>
<description>MLSPERR</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MMARVALID</name>
<description>Memory Management Fault Address Register
(MMAR) valid flag</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>IBUSERR</name>
<description>Instruction bus error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PRECISERR</name>
<description>Precise data bus error</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>IMPRECISERR</name>
<description>Imprecise data bus error</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>UNSTKERR</name>
<description>Bus fault on unstacking for a return
from exception</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>STKERR</name>
<description>Bus fault on stacking for exception
entry</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>LSPERR</name>
<description>Bus fault on floating-point lazy state
preservation</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BFARVALID</name>
<description>Bus Fault Address Register (BFAR) valid
flag</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>UNDEFINSTR</name>
<description>Undefined instruction usage
fault</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>INVSTATE</name>
<description>Invalid state usage fault</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>INVPC</name>
<description>Invalid PC load usage
fault</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>NOCP</name>
<description>No coprocessor usage
fault.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>UNALIGNED</name>
<description>Unaligned access usage
fault</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DIVBYZERO</name>
<description>Divide by zero usage fault</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>HFSR</name>
<displayName>HFSR</displayName>
<description>Hard fault status register</description>
<addressOffset>0x2C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>VECTTBL</name>
<description>Vector table hard fault</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FORCED</name>
<description>Forced hard fault</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DEBUG_VT</name>
<description>Reserved for Debug use</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>MMFAR</name>
<displayName>MMFAR</displayName>
<description>Memory management fault address
register</description>
<addressOffset>0x34</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MMFAR</name>
<description>Memory management fault
address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>BFAR</name>
<displayName>BFAR</displayName>
<description>Bus fault address register</description>
<addressOffset>0x38</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BFAR</name>
<description>Bus fault address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>AFSR</name>
<displayName>AFSR</displayName>
<description>Auxiliary fault status
register</description>
<addressOffset>0x3C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IMPDEF</name>
<description>Implementation defined</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>NVIC_STIR</name>
<description>Nested vectored interrupt
controller</description>
<groupName>NVIC</groupName>
<baseAddress>0xE000EF00</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x5</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>STIR</name>
<displayName>STIR</displayName>
<description>Software trigger interrupt
register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>INTID</name>
<description>Software generated interrupt
ID</description>
<bitOffset>0</bitOffset>
<bitWidth>9</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>FPU_CPACR</name>
<description>Floating point unit CPACR</description>
<groupName>FPU</groupName>
<baseAddress>0xE000ED88</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x5</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>CPACR</name>
<displayName>CPACR</displayName>
<description>Coprocessor access control
register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x0000000</resetValue>
<fields>
<field>
<name>CP</name>
<description>CP</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>SCB_ACTRL</name>
<description>System control block ACTLR</description>
<groupName>SCB</groupName>
<baseAddress>0xE000E008</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x5</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>ACTRL</name>
<displayName>ACTRL</displayName>
<description>Auxiliary control register</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DISMCYCINT</name>
<description>DISMCYCINT</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DISDEFWBUF</name>
<description>DISDEFWBUF</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DISFOLD</name>
<description>DISFOLD</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DISFPCA</name>
<description>DISFPCA</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>DISOOFP</name>
<description>DISOOFP</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
</registers>
</peripheral>
</peripherals>
</device>