Struct stm32h7xx_hal::device::ramecc1::RegisterBlock

source · 
#[repr(C)]
pub struct RegisterBlock {
Show 31 fields
    pub ier: Reg<IER_SPEC>,
    pub m1cr: Reg<M1CR_SPEC>,
    pub m1sr: Reg<M1SR_SPEC>,
    pub m1far: Reg<M1FAR_SPEC>,
    pub m1fdrl: Reg<M1FDRL_SPEC>,
    pub m1fdrh: Reg<M1FDRH_SPEC>,
    pub m1fecr: Reg<M1FECR_SPEC>,
    pub m2cr: Reg<M2CR_SPEC>,
    pub m2sr: Reg<M2SR_SPEC>,
    pub m2far: Reg<M2FAR_SPEC>,
    pub m2fdrl: Reg<M2FDRL_SPEC>,
    pub m2fdrh: Reg<M2FDRH_SPEC>,
    pub m2fecr: Reg<M2FECR_SPEC>,
    pub m3cr: Reg<M3CR_SPEC>,
    pub m3sr: Reg<M3SR_SPEC>,
    pub m3far: Reg<M3FAR_SPEC>,
    pub m3fdrl: Reg<M3FDRL_SPEC>,
    pub m3fdrh: Reg<M3FDRH_SPEC>,
    pub m3fecr: Reg<M3FECR_SPEC>,
    pub m4cr: Reg<M4CR_SPEC>,
    pub m4sr: Reg<M4SR_SPEC>,
    pub m4far: Reg<M4FAR_SPEC>,
    pub m4fdrl: Reg<M4FDRL_SPEC>,
    pub m4fdrh: Reg<M4FDRH_SPEC>,
    pub m4fecr: Reg<M4FECR_SPEC>,
    pub m5cr: Reg<M5CR_SPEC>,
    pub m5sr: Reg<M5SR_SPEC>,
    pub m5far: Reg<M5FAR_SPEC>,
    pub m5fdrl: Reg<M5FDRL_SPEC>,
    pub m5fdrh: Reg<M5FDRH_SPEC>,
    pub m5fecr: Reg<M5FECR_SPEC>,
    /* private fields */

}
Expand description

Register block

Fields§

§ier: Reg<IER_SPEC>

0x00 - RAMECC interrupt enable register

§m1cr: Reg<M1CR_SPEC>

0x20 - RAMECC monitor 1 configuration register

§m1sr: Reg<M1SR_SPEC>

0x24 - RAMECC monitor 1 status register

§m1far: Reg<M1FAR_SPEC>

0x28 - RAMECC monitor 1 failing address register

§m1fdrl: Reg<M1FDRL_SPEC>

0x2c - RAMECC monitor 1 failing data low register

§m1fdrh: Reg<M1FDRH_SPEC>

0x30 - RAMECC monitor 1 failing data high register

§m1fecr: Reg<M1FECR_SPEC>

0x34 - RAMECC monitor 1 failing error code register

§m2cr: Reg<M2CR_SPEC>

0x40 - RAMECC monitor 2 configuration register

§m2sr: Reg<M2SR_SPEC>

0x44 - RAMECC monitor 2 status register

§m2far: Reg<M2FAR_SPEC>

0x48 - RAMECC monitor 2 failing address register

§m2fdrl: Reg<M2FDRL_SPEC>

0x4c - RAMECC monitor 2 failing data low register

§m2fdrh: Reg<M2FDRH_SPEC>

0x50 - RAMECC monitor 2 failing data high register

§m2fecr: Reg<M2FECR_SPEC>

0x54 - RAMECC monitor 2 failing error code register

§m3cr: Reg<M3CR_SPEC>

0x60 - RAMECC monitor 3 configuration register

§m3sr: Reg<M3SR_SPEC>

0x64 - RAMECC monitor 3 status register

§m3far: Reg<M3FAR_SPEC>

0x68 - RAMECC monitor 3 failing address register

§m3fdrl: Reg<M3FDRL_SPEC>

0x6c - RAMECC monitor 3 failing data low register

§m3fdrh: Reg<M3FDRH_SPEC>

0x70 - RAMECC monitor 3 failing data high register

§m3fecr: Reg<M3FECR_SPEC>

0x74 - RAMECC monitor 3 failing error code register

§m4cr: Reg<M4CR_SPEC>

0x80 - RAMECC monitor 4 configuration register

§m4sr: Reg<M4SR_SPEC>

0x84 - RAMECC monitor 4 status register

§m4far: Reg<M4FAR_SPEC>

0x88 - RAMECC monitor 4 failing address register

§m4fdrl: Reg<M4FDRL_SPEC>

0x8c - RAMECC monitor 4 failing data low register

§m4fdrh: Reg<M4FDRH_SPEC>

0x90 - RAMECC monitor 4 failing data high register

§m4fecr: Reg<M4FECR_SPEC>

0x94 - RAMECC monitor 4 failing error code register

§m5cr: Reg<M5CR_SPEC>

0xa0 - RAMECC monitor 5 configuration register

§m5sr: Reg<M5SR_SPEC>

0xa4 - RAMECC monitor 5 status register

§m5far: Reg<M5FAR_SPEC>

0xa8 - RAMECC monitor 5 failing address register

§m5fdrl: Reg<M5FDRL_SPEC>

0xac - RAMECC monitor 5 failing data low register

§m5fdrh: Reg<M5FDRH_SPEC>

0xb0 - RAMECC monitor 5 failing data high register

§m5fecr: Reg<M5FECR_SPEC>

0xb4 - RAMECC monitor 5 failing error code register

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