[][src]Enum stm32h7xx_hal::device::tim4::ccmr1_output::OC1MR

pub enum OC1MR {
    FROZEN,
    ACTIVEONMATCH,
    INACTIVEONMATCH,
    TOGGLE,
    FORCEINACTIVE,
    FORCEACTIVE,
    PWMMODE1,
    PWMMODE2,
    OPMMODE1,
    OPMMODE2,
    COMBINEDPWMMODE1,
    COMBINEDPWMMODE2,
    ASYMMETRICPWMMODE1,
    ASYMMETRICPWMMODE2,
    _Reserved(u8),
}

Possible values of the field OC1M

Variants

FROZEN

The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs

ACTIVEONMATCH

Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register

INACTIVEONMATCH

Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register

TOGGLE

OCyREF toggles when TIMx_CNT=TIMx_CCRy

FORCEINACTIVE

OCyREF is forced low

FORCEACTIVE

OCyREF is forced high

PWMMODE1

In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active

PWMMODE2

Inversely to PwmMode1

OPMMODE1

Retriggerable OPM mode 1 - In up-counting mode, the channel is active until a trigger event is detected (on TRGI signal). In down-counting mode, the channel is inactive

OPMMODE2

Inversely to OpmMode1

COMBINEDPWMMODE1

OCyREF has the same behavior as in PWM mode 1. OCyREFC is the logical OR between OC1REF and OC2REF

COMBINEDPWMMODE2

OCyREF has the same behavior as in PWM mode 2. OCyREFC is the logical AND between OC1REF and OC2REF

ASYMMETRICPWMMODE1

OCyREF has the same behavior as in PWM mode 1. OCyREFC outputs OC1REF when the counter is counting up, OC2REF when it is counting down

ASYMMETRICPWMMODE2

OCyREF has the same behavior as in PWM mode 2. OCyREFC outputs OC1REF when the counter is counting up, OC2REF when it is counting down

_Reserved(u8)

Reserved

Methods

impl OC1MR[src]

pub fn bits(&self) -> u8[src]

Value of the field as raw bits

pub fn is_frozen(&self) -> bool[src]

Checks if the value of the field is FROZEN

pub fn is_active_on_match(&self) -> bool[src]

Checks if the value of the field is ACTIVEONMATCH

pub fn is_inactive_on_match(&self) -> bool[src]

Checks if the value of the field is INACTIVEONMATCH

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_force_inactive(&self) -> bool[src]

Checks if the value of the field is FORCEINACTIVE

pub fn is_force_active(&self) -> bool[src]

Checks if the value of the field is FORCEACTIVE

pub fn is_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is PWMMODE1

pub fn is_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is PWMMODE2

pub fn is_opm_mode1(&self) -> bool[src]

Checks if the value of the field is OPMMODE1

pub fn is_opm_mode2(&self) -> bool[src]

Checks if the value of the field is OPMMODE2

pub fn is_combined_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is COMBINEDPWMMODE1

pub fn is_combined_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is COMBINEDPWMMODE2

pub fn is_asymmetric_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is ASYMMETRICPWMMODE1

pub fn is_asymmetric_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is ASYMMETRICPWMMODE2

Trait Implementations

impl PartialEq<OC1MR> for OC1MR[src]

impl Copy for OC1MR[src]

impl Clone for OC1MR[src]

impl Debug for OC1MR[src]

Auto Trait Implementations

impl Unpin for OC1MR

impl Send for OC1MR

impl Sync for OC1MR

Blanket Implementations

impl<T> From<T> for T[src]

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Same<T> for T

type Output = T

Should always be Self