Struct stm32h743::i2c1::I2C_OAR1
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pub struct I2C_OAR1 { /* fields omitted */ }
Access: No wait states, except if a write access occurs while a write access to this register is ongoing. In this case, wait states are inserted in the second write access until the previous one is completed. The latency of the second write access can be up to 2 x PCLK1 + 6 x I2CCLK.
Methods
impl I2C_OAR1
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pub fn modify<F>(&self, f: F) where
F: FnOnce(&R, &'w mut W) -> &'w mut W,
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F: FnOnce(&R, &'w mut W) -> &'w mut W,
Modifies the contents of the register
pub fn read(&self) -> R
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Reads the contents of the register
pub fn write<F>(&self, f: F) where
F: FnOnce(&mut W) -> &mut W,
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F: FnOnce(&mut W) -> &mut W,
Writes to the register
pub fn reset(&self)
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Writes the reset value to the register