Struct stm32g0::stm32g0c1::lpuart1::cr3::W

pub struct W(_);

Register CR3 writer

Implementations

impl W

pub fn eie(&mut self) -> EIE_W<'_, 0>

Bit 0 - Error interrupt enable Error Interrupt Enable Bit is required to enable interrupt generation in case of a framing error, overrun error or noise flag (FEÂ =Â 1 or OREÂ =Â 1 or NEÂ =Â 1 in the LPUART_ISR register).

pub fn hdsel(&mut self) -> HDSEL_W<'_, 3>

Bit 3 - Half-duplex selection Selection of Single-wire Half-duplex mode This bit can only be written when the LPUART is disabled (UEÂ =Â 0).

pub fn dmar(&mut self) -> DMAR_W<'_, 6>

Bit 6 - DMA enable receiver This bit is set/reset by software

pub fn dmat(&mut self) -> DMAT_W<'_, 7>

Bit 7 - DMA enable transmitter This bit is set/reset by software

pub fn rtse(&mut self) -> RTSE_W<'_, 8>

Bit 8 - RTS enable This bit can only be written when the LPUART is disabled (UEÂ =Â 0).

pub fn ctse(&mut self) -> CTSE_W<'_, 9>

Bit 9 - CTS enable This bit can only be written when the LPUART is disabled (UEÂ =Â 0)

pub fn ctsie(&mut self) -> CTSIE_W<'_, 10>

Bit 10 - CTS interrupt enable

pub fn ovrdis(&mut self) -> OVRDIS_W<'_, 12>

Bit 12 - Overrun Disable This bit is used to disable the receive overrun detection. the ORE flag is not set and the new received data overwrites the previous content of the LPUART_RDR register. This bit can only be written when the LPUART is disabled (UEÂ =Â 0). Note: This control bit enables checking the communication flow w/o reading the data.

pub fn ddre(&mut self) -> DDRE_W<'_, 13>

Bit 13 - DMA Disable on Reception Error This bit can only be written when the LPUART is disabled (UEÂ =Â 0). Note: The reception errors are: parity error, framing error or noise error.

pub fn dem(&mut self) -> DEM_W<'_, 14>

Bit 14 - Driver enable mode This bit enables the user to activate the external transceiver control, through the DE signal. This bit can only be written when the LPUART is disabled (UEÂ =Â 0).

pub fn dep(&mut self) -> DEP_W<'_, 15>

Bit 15 - Driver enable polarity selection This bit can only be written when the LPUART is disabled (UEÂ =Â 0).

pub fn wus(&mut self) -> WUS_W<'_, 20>

Bits 20:21 - Wakeup from low-power mode interrupt flag selection This bitfield specifies the event which activates the WUF (Wakeup from low-power mode flag). This bitfield can only be written when the LPUART is disabled (UEÂ =Â 0). Note: If the LPUART does not support the wakeup from Stop feature, this bit is reserved and must be kept at reset value. Refer to .

pub fn wufie(&mut self) -> WUFIE_W<'_, 22>

Bit 22 - Wakeup from low-power mode interrupt enable This bit is set and cleared by software. Note: WUFIE must be set before entering in low-power mode. If the LPUART does not support the wakeup from Stop feature, this bit is reserved and must be kept at reset value. Refer to .

pub fn txftie(&mut self) -> TXFTIE_W<'_, 23>

Bit 23 - TXFIFO threshold interrupt enable This bit is set and cleared by software.

pub fn rxftcfg(&mut self) -> RXFTCFG_W<'_, 25>

Bits 25:27 - Receive FIFO threshold configuration Remaining combinations: Reserved.

pub fn rxftie(&mut self) -> RXFTIE_W<'_, 28>

Bit 28 - RXFIFO threshold interrupt enable This bit is set and cleared by software.

pub fn txftcfg(&mut self) -> TXFTCFG_W<'_, 29>

Bits 29:31 - TXFIFO threshold configuration Remaining combinations: Reserved.

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<CR3_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Trait Implementations

impl Deref for W

type Target = W<CR3_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<CR3_SPEC>> for W

fn from(writer: W<CR3_SPEC>) -> Self

Converts to this type from the input type.