Struct stm32g0::stm32g0c1::fdcan1::rxgfc::W

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pub struct W(_);

Expand description

Register RXGFC writer

Implementations

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impl W

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pub fn rrfe(&mut self) -> RRFE_W<'_, 0>

Bit 0 - Reject remote frames extended These are protected write (P) bits, which means that write access by the bits is possible only when the bit 1 [CCE] and bit 0 [INIT] of CCCR register are set to 1.

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pub fn rrfs(&mut self) -> RRFS_W<'_, 1>

Bit 1 - Reject remote frames standard These are protected write (P) bits, which means that write access by the bits is possible only when the bit 1 [CCE] and bit 0 [INIT] of CCCR register are set to 1.

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pub fn anfe(&mut self) -> ANFE_W<'_, 2>

Bits 2:3 - Accept non-matching frames extended Defines how received messages with 29-bit IDs that do not match any element of the filter list are treated. These are protected write (P) bits, which means that write access by the bits is possible only when the bit 1 [CCE] and bit 0 [INIT] of CCCR register are set to 1.

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pub fn anfs(&mut self) -> ANFS_W<'_, 4>

Bits 4:5 - Accept Non-matching frames standard Defines how received messages with 11-bit IDs that do not match any element of the filter list are treated. These are protected write (P) bits, which means that write access by the bits is possible only when the bit 1 [CCE] and bit 0 [INIT] of CCCR register are set to 1.

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pub fn f1om(&mut self) -> F1OM_W<'_, 8>

Bit 8 - FIFO 1 operation mode (overwrite or blocking) This is a protected write (P) bits, which means that write access by the bits is possible only when the bit 1 [CCE] and bit 0 [INIT] of CCCR register are set to 1.

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pub fn f0om(&mut self) -> F0OM_W<'_, 9>

Bit 9 - FIFO 0 operation mode (overwrite or blocking) This is protected write (P) bits, which means that write access by the bits is possible only when the bit 1 [CCE] and bit 0 [INIT] of CCCR register are set to 1.

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pub fn lss(&mut self) -> LSS_W<'_, 16>

Bits 16:20 - List size standard >28: Values greater than 28 are interpreted as 28. These are protected write (P) bits, which means that write access by the bits is possible only when the bit 1 [CCE] and bit 0 [INIT] of CCCR register are set to 1.

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pub fn lse(&mut self) -> LSE_W<'_, 24>

Bits 24:27 - List size extended >8: Values greater than 8 are interpreted as 8. These are protected write (P) bits, which means that write access by the bits is possible only when the bit 1 [CCE] and bit 0 [INIT] of CCCR register are set to 1.

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