Struct stm32g0::stm32g0c1::fdcan1::ils::W

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pub struct W(_);

Expand description

Register ILS writer

Implementations

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impl W

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pub fn rx_fifo0(&mut self) -> RXFIFO0_W<'_, 0>

Bit 0 - RX FIFO bit grouping the following interruption RF0LL: Rx FIFO 0 message lost interrupt line RF0FL: Rx FIFO 0 full interrupt line RF0NL: Rx FIFO 0 new message interrupt line

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pub fn rx_fifo1(&mut self) -> RXFIFO1_W<'_, 1>

Bit 1 - RX FIFO bit grouping the following interruption RF1LL: Rx FIFO 1 message lost interrupt line RF1FL: Rx FIFO 1 full Interrupt line RF1NL: Rx FIFO 1 new message interrupt line

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pub fn smsg(&mut self) -> SMSG_W<'_, 2>

Bit 2 - Status message bit grouping the following interruption TCFL: Transmission cancellation finished interrupt line TCL: Transmission completed interrupt line HPML: High-priority message interrupt line

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pub fn tferr(&mut self) -> TFERR_W<'_, 3>

Bit 3 - Tx FIFO ERROR grouping the following interruption TEFLL: Tx event FIFO element lost interrupt line TEFFL: Tx event FIFO full interrupt line TEFNL: Tx event FIFO new entry interrupt line TFEL: Tx FIFO empty interrupt line

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pub fn misc(&mut self) -> MISC_W<'_, 4>

Bit 4 - Interrupt regrouping the following interruption TOOL: Timeout occurred interrupt line MRAFL: Message RAM access failure interrupt line TSWL: Timestamp wraparound interrupt line

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pub fn berr(&mut self) -> BERR_W<'_, 5>

Bit 5 - BERR

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pub fn perr(&mut self) -> PERR_W<'_, 6>

Bit 6 - Protocol error grouping the following interruption ARAL: Access to reserved address line PEDL: Protocol error in data phase line PEAL: Protocol error in arbitration phase line WDIL: Watchdog interrupt line BOL: Bus_Off status EWL: Warning status interrupt line

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