Struct stm32g0::stm32g0b0::tim15::cr2::W

pub struct W(_);

Register CR2 writer

Implementations

impl W

pub fn ccpc(&mut self) -> CCPC_W<'_, 0>

Bit 0 - Capture/compare preloaded control Note: This bit acts only on channels that have a complementary output.

pub fn ccus(&mut self) -> CCUS_W<'_, 2>

Bit 2 - Capture/compare control update selection Note: This bit acts only on channels that have a complementary output.

pub fn ccds(&mut self) -> CCDS_W<'_, 3>

Bit 3 - Capture/compare DMA selection

pub fn mms(&mut self) -> MMS_W<'_, 4>

Bits 4:6 - Master mode selection These bits allow to select the information to be sent in master mode to slave timers for synchronization (TRGO). The combination is as follows:

pub fn ti1s(&mut self) -> TI1S_W<'_, 7>

Bit 7 - TI1 selection

pub fn ois1(&mut self) -> OIS1_W<'_, 8>

Bit 8 - Output Idle state 1 (OC1 output) Note: This bit can not be modified as long as LOCK level 1, 2 or 3 has been programmed (LOCK bits in TIM15_BDTR register).

pub fn ois1n(&mut self) -> OIS1N_W<'_, 9>

Bit 9 - Output Idle state 1 (OC1N output) Note: This bit can not be modified as long as LOCK level 1, 2 or 3 has been programmed (LOCK bits in TIM15_BDTR register).

pub fn ois2(&mut self) -> OIS2_W<'_, 10>

Bit 10 - Output idle state 2 (OC2 output) Note: This bit cannot be modified as long as LOCK level 1, 2 or 3 has been programmed (LOCK bits in the TIM15_BDTR register).

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<CR2_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Trait Implementations

impl Deref for W

type Target = W<CR2_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<CR2_SPEC>> for W

fn from(writer: W<CR2_SPEC>) -> Self

Converts to this type from the input type.