Module stm32g0::stm32g030::dmamux::rg1cr

DMAMux - DMA request generator channel x control register

Structs

R

Register RG1CR reader

RG1CR_SPEC

DMAMux - DMA request generator channel x control register

W

Register RG1CR writer

Type Definitions

GE_R

Field GE reader - DMA request generator channel enable/disable

GE_W

Field GE writer - DMA request generator channel enable/disable

GNBREQ_R

Field GNBREQ reader - Number of DMA requests to generate Defines the number of DMA requests generated after a trigger event, then stop generating. The actual number of generated DMA requests is GNBREQ+1. Note: This field can only be written when GE bit is reset.

GNBREQ_W

Field GNBREQ writer - Number of DMA requests to generate Defines the number of DMA requests generated after a trigger event, then stop generating. The actual number of generated DMA requests is GNBREQ+1. Note: This field can only be written when GE bit is reset.

GPOL_R

Field GPOL reader - DMA request generator trigger event type selection Defines the trigger event on the selected DMA request trigger input

GPOL_W

Field GPOL writer - DMA request generator trigger event type selection Defines the trigger event on the selected DMA request trigger input

OIE_R

Field OIE reader - Interrupt enable at trigger event overrun

OIE_W

Field OIE writer - Interrupt enable at trigger event overrun

SIG_ID_R

Field SIG_ID reader - DMA request trigger input selected

SIG_ID_W

Field SIG_ID writer - DMA request trigger input selected