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#[doc = "Reader of register APBENR1"] pub type R = crate::R<u32, super::APBENR1>; #[doc = "Writer for register APBENR1"] pub type W = crate::W<u32, super::APBENR1>; #[doc = "Register APBENR1 `reset()`'s with value 0"] impl crate::ResetValue for super::APBENR1 { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `TIM2EN`"] pub type TIM2EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TIM2EN`"] pub struct TIM2EN_W<'a> { w: &'a mut W, } impl<'a> TIM2EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "Reader of field `TIM3EN`"] pub type TIM3EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TIM3EN`"] pub struct TIM3EN_W<'a> { w: &'a mut W, } impl<'a> TIM3EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "Reader of field `TIM6EN`"] pub type TIM6EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TIM6EN`"] pub struct TIM6EN_W<'a> { w: &'a mut W, } impl<'a> TIM6EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); self.w } } #[doc = "Reader of field `TIM7EN`"] pub type TIM7EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TIM7EN`"] pub struct TIM7EN_W<'a> { w: &'a mut W, } impl<'a> TIM7EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); self.w } } #[doc = "Reader of field `RTCAPBEN`"] pub type RTCAPBEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `RTCAPBEN`"] pub struct RTCAPBEN_W<'a> { w: &'a mut W, } impl<'a> RTCAPBEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); self.w } } #[doc = "Reader of field `WWDGEN`"] pub type WWDGEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `WWDGEN`"] pub struct WWDGEN_W<'a> { w: &'a mut W, } impl<'a> WWDGEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); self.w } } #[doc = "Reader of field `SPI2EN`"] pub type SPI2EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `SPI2EN`"] pub struct SPI2EN_W<'a> { w: &'a mut W, } impl<'a> SPI2EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); self.w } } #[doc = "Reader of field `USART2EN`"] pub type USART2EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `USART2EN`"] pub struct USART2EN_W<'a> { w: &'a mut W, } impl<'a> USART2EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); self.w } } #[doc = "Reader of field `USART3EN`"] pub type USART3EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `USART3EN`"] pub struct USART3EN_W<'a> { w: &'a mut W, } impl<'a> USART3EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); self.w } } #[doc = "Reader of field `USART4EN`"] pub type USART4EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `USART4EN`"] pub struct USART4EN_W<'a> { w: &'a mut W, } impl<'a> USART4EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); self.w } } #[doc = "Reader of field `LPUART1EN`"] pub type LPUART1EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `LPUART1EN`"] pub struct LPUART1EN_W<'a> { w: &'a mut W, } impl<'a> LPUART1EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20); self.w } } #[doc = "Reader of field `I2C1EN`"] pub type I2C1EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `I2C1EN`"] pub struct I2C1EN_W<'a> { w: &'a mut W, } impl<'a> I2C1EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21); self.w } } #[doc = "Reader of field `I2C2EN`"] pub type I2C2EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `I2C2EN`"] pub struct I2C2EN_W<'a> { w: &'a mut W, } impl<'a> I2C2EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22); self.w } } #[doc = "Reader of field `CECEN`"] pub type CECEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `CECEN`"] pub struct CECEN_W<'a> { w: &'a mut W, } impl<'a> CECEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24); self.w } } #[doc = "Reader of field `UCPD1EN`"] pub type UCPD1EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `UCPD1EN`"] pub struct UCPD1EN_W<'a> { w: &'a mut W, } impl<'a> UCPD1EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25); self.w } } #[doc = "Reader of field `UCPD2EN`"] pub type UCPD2EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `UCPD2EN`"] pub struct UCPD2EN_W<'a> { w: &'a mut W, } impl<'a> UCPD2EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26); self.w } } #[doc = "Reader of field `DBGEN`"] pub type DBGEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DBGEN`"] pub struct DBGEN_W<'a> { w: &'a mut W, } impl<'a> DBGEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27); self.w } } #[doc = "Reader of field `PWREN`"] pub type PWREN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `PWREN`"] pub struct PWREN_W<'a> { w: &'a mut W, } impl<'a> PWREN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28); self.w } } #[doc = "Reader of field `DAC1EN`"] pub type DAC1EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DAC1EN`"] pub struct DAC1EN_W<'a> { w: &'a mut W, } impl<'a> DAC1EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29); self.w } } #[doc = "Reader of field `LPTIM2EN`"] pub type LPTIM2EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `LPTIM2EN`"] pub struct LPTIM2EN_W<'a> { w: &'a mut W, } impl<'a> LPTIM2EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30); self.w } } #[doc = "Reader of field `LPTIM1EN`"] pub type LPTIM1EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `LPTIM1EN`"] pub struct LPTIM1EN_W<'a> { w: &'a mut W, } impl<'a> LPTIM1EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31); self.w } } impl R { #[doc = "Bit 0 - TIM2 timer clock enable"] #[inline(always)] pub fn tim2en(&self) -> TIM2EN_R { TIM2EN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - TIM3 timer clock enable"] #[inline(always)] pub fn tim3en(&self) -> TIM3EN_R { TIM3EN_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 4 - TIM6 timer clock enable"] #[inline(always)] pub fn tim6en(&self) -> TIM6EN_R { TIM6EN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - TIM7 timer clock enable"] #[inline(always)] pub fn tim7en(&self) -> TIM7EN_R { TIM7EN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 10 - RTC APB clock enable"] #[inline(always)] pub fn rtcapben(&self) -> RTCAPBEN_R { RTCAPBEN_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11 - WWDG clock enable"] #[inline(always)] pub fn wwdgen(&self) -> WWDGEN_R { WWDGEN_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 14 - SPI2 clock enable"] #[inline(always)] pub fn spi2en(&self) -> SPI2EN_R { SPI2EN_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 17 - USART2 clock enable"] #[inline(always)] pub fn usart2en(&self) -> USART2EN_R { USART2EN_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18 - USART3 clock enable"] #[inline(always)] pub fn usart3en(&self) -> USART3EN_R { USART3EN_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19 - USART4 clock enable"] #[inline(always)] pub fn usart4en(&self) -> USART4EN_R { USART4EN_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 20 - LPUART1 clock enable"] #[inline(always)] pub fn lpuart1en(&self) -> LPUART1EN_R { LPUART1EN_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 21 - I2C1 clock enable"] #[inline(always)] pub fn i2c1en(&self) -> I2C1EN_R { I2C1EN_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 22 - I2C2 clock enable"] #[inline(always)] pub fn i2c2en(&self) -> I2C2EN_R { I2C2EN_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 24 - HDMI CEC clock enable"] #[inline(always)] pub fn cecen(&self) -> CECEN_R { CECEN_R::new(((self.bits >> 24) & 0x01) != 0) } #[doc = "Bit 25 - UCPD1 clock enable"] #[inline(always)] pub fn ucpd1en(&self) -> UCPD1EN_R { UCPD1EN_R::new(((self.bits >> 25) & 0x01) != 0) } #[doc = "Bit 26 - UCPD2 clock enable"] #[inline(always)] pub fn ucpd2en(&self) -> UCPD2EN_R { UCPD2EN_R::new(((self.bits >> 26) & 0x01) != 0) } #[doc = "Bit 27 - Debug support clock enable"] #[inline(always)] pub fn dbgen(&self) -> DBGEN_R { DBGEN_R::new(((self.bits >> 27) & 0x01) != 0) } #[doc = "Bit 28 - Power interface clock enable"] #[inline(always)] pub fn pwren(&self) -> PWREN_R { PWREN_R::new(((self.bits >> 28) & 0x01) != 0) } #[doc = "Bit 29 - DAC1 interface clock enable"] #[inline(always)] pub fn dac1en(&self) -> DAC1EN_R { DAC1EN_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 30 - LPTIM2 clock enable"] #[inline(always)] pub fn lptim2en(&self) -> LPTIM2EN_R { LPTIM2EN_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 31 - LPTIM1 clock enable"] #[inline(always)] pub fn lptim1en(&self) -> LPTIM1EN_R { LPTIM1EN_R::new(((self.bits >> 31) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - TIM2 timer clock enable"] #[inline(always)] pub fn tim2en(&mut self) -> TIM2EN_W { TIM2EN_W { w: self } } #[doc = "Bit 1 - TIM3 timer clock enable"] #[inline(always)] pub fn tim3en(&mut self) -> TIM3EN_W { TIM3EN_W { w: self } } #[doc = "Bit 4 - TIM6 timer clock enable"] #[inline(always)] pub fn tim6en(&mut self) -> TIM6EN_W { TIM6EN_W { w: self } } #[doc = "Bit 5 - TIM7 timer clock enable"] #[inline(always)] pub fn tim7en(&mut self) -> TIM7EN_W { TIM7EN_W { w: self } } #[doc = "Bit 10 - RTC APB clock enable"] #[inline(always)] pub fn rtcapben(&mut self) -> RTCAPBEN_W { RTCAPBEN_W { w: self } } #[doc = "Bit 11 - WWDG clock enable"] #[inline(always)] pub fn wwdgen(&mut self) -> WWDGEN_W { WWDGEN_W { w: self } } #[doc = "Bit 14 - SPI2 clock enable"] #[inline(always)] pub fn spi2en(&mut self) -> SPI2EN_W { SPI2EN_W { w: self } } #[doc = "Bit 17 - USART2 clock enable"] #[inline(always)] pub fn usart2en(&mut self) -> USART2EN_W { USART2EN_W { w: self } } #[doc = "Bit 18 - USART3 clock enable"] #[inline(always)] pub fn usart3en(&mut self) -> USART3EN_W { USART3EN_W { w: self } } #[doc = "Bit 19 - USART4 clock enable"] #[inline(always)] pub fn usart4en(&mut self) -> USART4EN_W { USART4EN_W { w: self } } #[doc = "Bit 20 - LPUART1 clock enable"] #[inline(always)] pub fn lpuart1en(&mut self) -> LPUART1EN_W { LPUART1EN_W { w: self } } #[doc = "Bit 21 - I2C1 clock enable"] #[inline(always)] pub fn i2c1en(&mut self) -> I2C1EN_W { I2C1EN_W { w: self } } #[doc = "Bit 22 - I2C2 clock enable"] #[inline(always)] pub fn i2c2en(&mut self) -> I2C2EN_W { I2C2EN_W { w: self } } #[doc = "Bit 24 - HDMI CEC clock enable"] #[inline(always)] pub fn cecen(&mut self) -> CECEN_W { CECEN_W { w: self } } #[doc = "Bit 25 - UCPD1 clock enable"] #[inline(always)] pub fn ucpd1en(&mut self) -> UCPD1EN_W { UCPD1EN_W { w: self } } #[doc = "Bit 26 - UCPD2 clock enable"] #[inline(always)] pub fn ucpd2en(&mut self) -> UCPD2EN_W { UCPD2EN_W { w: self } } #[doc = "Bit 27 - Debug support clock enable"] #[inline(always)] pub fn dbgen(&mut self) -> DBGEN_W { DBGEN_W { w: self } } #[doc = "Bit 28 - Power interface clock enable"] #[inline(always)] pub fn pwren(&mut self) -> PWREN_W { PWREN_W { w: self } } #[doc = "Bit 29 - DAC1 interface clock enable"] #[inline(always)] pub fn dac1en(&mut self) -> DAC1EN_W { DAC1EN_W { w: self } } #[doc = "Bit 30 - LPTIM2 clock enable"] #[inline(always)] pub fn lptim2en(&mut self) -> LPTIM2EN_W { LPTIM2EN_W { w: self } } #[doc = "Bit 31 - LPTIM1 clock enable"] #[inline(always)] pub fn lptim1en(&mut self) -> LPTIM1EN_W { LPTIM1EN_W { w: self } } }