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#[doc = "Reader of register APBENR2"] pub type R = crate::R<u32, super::APBENR2>; #[doc = "Writer for register APBENR2"] pub type W = crate::W<u32, super::APBENR2>; #[doc = "Register APBENR2 `reset()`'s with value 0"] impl crate::ResetValue for super::APBENR2 { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `SYSCFGEN`"] pub type SYSCFGEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `SYSCFGEN`"] pub struct SYSCFGEN_W<'a> { w: &'a mut W, } impl<'a> SYSCFGEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "Reader of field `TIM1EN`"] pub type TIM1EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TIM1EN`"] pub struct TIM1EN_W<'a> { w: &'a mut W, } impl<'a> TIM1EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); self.w } } #[doc = "Reader of field `SPI1EN`"] pub type SPI1EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `SPI1EN`"] pub struct SPI1EN_W<'a> { w: &'a mut W, } impl<'a> SPI1EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); self.w } } #[doc = "Reader of field `USART1EN`"] pub type USART1EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `USART1EN`"] pub struct USART1EN_W<'a> { w: &'a mut W, } impl<'a> USART1EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); self.w } } #[doc = "Reader of field `TIM14EN`"] pub type TIM14EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TIM14EN`"] pub struct TIM14EN_W<'a> { w: &'a mut W, } impl<'a> TIM14EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15); self.w } } #[doc = "Reader of field `TIM16EN`"] pub type TIM16EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TIM16EN`"] pub struct TIM16EN_W<'a> { w: &'a mut W, } impl<'a> TIM16EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); self.w } } #[doc = "Reader of field `TIM17EN`"] pub type TIM17EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TIM17EN`"] pub struct TIM17EN_W<'a> { w: &'a mut W, } impl<'a> TIM17EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); self.w } } #[doc = "Reader of field `ADCEN`"] pub type ADCEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `ADCEN`"] pub struct ADCEN_W<'a> { w: &'a mut W, } impl<'a> ADCEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20); self.w } } impl R { #[doc = "Bit 0 - SYSCFG, COMP and VREFBUF clock enable"] #[inline(always)] pub fn syscfgen(&self) -> SYSCFGEN_R { SYSCFGEN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 11 - TIM1 timer clock enable"] #[inline(always)] pub fn tim1en(&self) -> TIM1EN_R { TIM1EN_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 12 - SPI1 clock enable"] #[inline(always)] pub fn spi1en(&self) -> SPI1EN_R { SPI1EN_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 14 - USART1 clock enable"] #[inline(always)] pub fn usart1en(&self) -> USART1EN_R { USART1EN_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15 - TIM14 timer clock enable"] #[inline(always)] pub fn tim14en(&self) -> TIM14EN_R { TIM14EN_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 17 - TIM16 timer clock enable"] #[inline(always)] pub fn tim16en(&self) -> TIM16EN_R { TIM16EN_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18 - TIM16 timer clock enable"] #[inline(always)] pub fn tim17en(&self) -> TIM17EN_R { TIM17EN_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 20 - ADC clock enable"] #[inline(always)] pub fn adcen(&self) -> ADCEN_R { ADCEN_R::new(((self.bits >> 20) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - SYSCFG, COMP and VREFBUF clock enable"] #[inline(always)] pub fn syscfgen(&mut self) -> SYSCFGEN_W { SYSCFGEN_W { w: self } } #[doc = "Bit 11 - TIM1 timer clock enable"] #[inline(always)] pub fn tim1en(&mut self) -> TIM1EN_W { TIM1EN_W { w: self } } #[doc = "Bit 12 - SPI1 clock enable"] #[inline(always)] pub fn spi1en(&mut self) -> SPI1EN_W { SPI1EN_W { w: self } } #[doc = "Bit 14 - USART1 clock enable"] #[inline(always)] pub fn usart1en(&mut self) -> USART1EN_W { USART1EN_W { w: self } } #[doc = "Bit 15 - TIM14 timer clock enable"] #[inline(always)] pub fn tim14en(&mut self) -> TIM14EN_W { TIM14EN_W { w: self } } #[doc = "Bit 17 - TIM16 timer clock enable"] #[inline(always)] pub fn tim16en(&mut self) -> TIM16EN_W { TIM16EN_W { w: self } } #[doc = "Bit 18 - TIM16 timer clock enable"] #[inline(always)] pub fn tim17en(&mut self) -> TIM17EN_W { TIM17EN_W { w: self } } #[doc = "Bit 20 - ADC clock enable"] #[inline(always)] pub fn adcen(&mut self) -> ADCEN_W { ADCEN_W { w: self } } }