Struct stm32f7xx_hal::pac::adc1::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 20 fields
pub sr: Reg<u32, _SR>,
pub cr1: Reg<u32, _CR1>,
pub cr2: Reg<u32, _CR2>,
pub smpr1: Reg<u32, _SMPR1>,
pub smpr2: Reg<u32, _SMPR2>,
pub jofr1: Reg<u32, _JOFR>,
pub jofr2: Reg<u32, _JOFR>,
pub jofr3: Reg<u32, _JOFR>,
pub jofr4: Reg<u32, _JOFR>,
pub htr: Reg<u32, _HTR>,
pub ltr: Reg<u32, _LTR>,
pub sqr1: Reg<u32, _SQR1>,
pub sqr2: Reg<u32, _SQR2>,
pub sqr3: Reg<u32, _SQR3>,
pub jsqr: Reg<u32, _JSQR>,
pub jdr1: Reg<u32, _JDR>,
pub jdr2: Reg<u32, _JDR>,
pub jdr3: Reg<u32, _JDR>,
pub jdr4: Reg<u32, _JDR>,
pub dr: Reg<u32, _DR>,
}
Expand description
Register block
Fields
sr: Reg<u32, _SR>
0x00 - status register
cr1: Reg<u32, _CR1>
0x04 - control register 1
cr2: Reg<u32, _CR2>
0x08 - control register 2
smpr1: Reg<u32, _SMPR1>
0x0c - sample time register 1
smpr2: Reg<u32, _SMPR2>
0x10 - sample time register 2
jofr1: Reg<u32, _JOFR>
0x14 - injected channel data offset register x
jofr2: Reg<u32, _JOFR>
0x18 - injected channel data offset register x
jofr3: Reg<u32, _JOFR>
0x1c - injected channel data offset register x
jofr4: Reg<u32, _JOFR>
0x20 - injected channel data offset register x
htr: Reg<u32, _HTR>
0x24 - watchdog higher threshold register
ltr: Reg<u32, _LTR>
0x28 - watchdog lower threshold register
sqr1: Reg<u32, _SQR1>
0x2c - regular sequence register 1
sqr2: Reg<u32, _SQR2>
0x30 - regular sequence register 2
sqr3: Reg<u32, _SQR3>
0x34 - regular sequence register 3
jsqr: Reg<u32, _JSQR>
0x38 - injected sequence register
jdr1: Reg<u32, _JDR>
0x3c - injected data register x
jdr2: Reg<u32, _JDR>
0x40 - injected data register x
jdr3: Reg<u32, _JDR>
0x44 - injected data register x
jdr4: Reg<u32, _JDR>
0x48 - injected data register x
dr: Reg<u32, _DR>
0x4c - regular data register