Struct stm32f4xx_hal::spi::SpiSlave

pub struct SpiSlave<SPI: Instance, const BIDI: bool = false, W = u8> { /* private fields */ }

Spi in Slave mode

Implementations

impl<SPI: Instance, const BIDI: bool, W: FrameSize> SpiSlave<SPI, BIDI, W>

pub fn init(self) -> Self

impl<SPI: Instance, W: FrameSize> SpiSlave<SPI, false, W>

pub fn to_bidi_transfer_mode(self) -> SpiSlave<SPI, true, W>

impl<SPI: Instance, W: FrameSize> SpiSlave<SPI, true, W>

pub fn to_normal_transfer_mode(self) -> SpiSlave<SPI, false, W>

impl<SPI, const BIDI: bool> SpiSlave<SPI, BIDI, u8>

where SPI: Instance,

pub fn frame_size_16bit(self) -> SpiSlave<SPI, BIDI, u16>

Converts from 8bit dataframe to 16bit.

impl<SPI, const BIDI: bool> SpiSlave<SPI, BIDI, u16>

where SPI: Instance,

pub fn frame_size_8bit(self) -> SpiSlave<SPI, BIDI, u8>

Converts from 16bit dataframe to 8bit.

impl<SPI: Instance> SpiSlave<SPI, false, u8>

pub fn new( spi: SPI, pins: (impl Into<SPI::Sck>, impl Into<SPI::Miso>, impl Into<SPI::Mosi>, Option<SPI::Nss>), mode: impl Into<Mode> ) -> Self

Enables the SPI clock, resets the peripheral, sets Alternate mode for pins and initialize the peripheral as SPI Slave Normal mode.

Note

Depending on freq you may need to set GPIO speed for pins (the Speed::Low is default for GPIO) before create Spi instance. Otherwise it may lead to the ‘wrong last bit in every received byte’ problem.

impl<SPI: Instance> SpiSlave<SPI, true, u8>

pub fn new_bidi( spi: SPI, pins: (impl Into<SPI::Sck>, impl Into<SPI::Miso>, Option<SPI::Nss>), mode: impl Into<Mode> ) -> Self

where NoPin: Into<SPI::Mosi>,

Enables the SPI clock, resets the peripheral, sets Alternate mode for pins and initialize the peripheral as SPI Slave BIDI mode.

Note

Depending on freq you may need to set GPIO speed for pins (the Speed::Low is default for GPIO) before create Spi instance. Otherwise it may lead to the ‘wrong last bit in every received byte’ problem.

impl<SPI: Instance, const BIDI: bool, W> SpiSlave<SPI, BIDI, W>

pub fn release( self ) -> (SPI, (SPI::Sck, SPI::Miso, SPI::Mosi, Option<SPI::Nss>))

impl<SPI: Instance, const BIDI: bool, W> SpiSlave<SPI, BIDI, W>

pub fn set_internal_nss(&mut self, value: bool)

Set the slave select bit programmatically.

impl<SPI: Instance, const BIDI: bool> SpiSlave<SPI, BIDI, u8>

pub fn use_dma(self) -> DmaBuilder<SPI>

impl<SPI: Instance, const BIDI: bool, W: FrameSize> SpiSlave<SPI, BIDI, W>

pub fn read_nonblocking(&mut self) -> Result<W, Error>

pub fn write_nonblocking(&mut self, byte: W) -> Result<(), Error>

pub fn transfer_in_place(&mut self, words: &mut [W]) -> Result<(), Error>

pub fn transfer(&mut self, buff: &mut [W], data: &[W]) -> Result<(), Error>

pub fn flush(&mut self) -> Result<(), Error>

pub fn write(&mut self, words: &[W]) -> Result<(), Error>

pub fn read(&mut self, words: &mut [W]) -> Result<(), Error>

Methods from Deref<Target = Inner<SPI>>

pub fn enable(&mut self, enable: bool)

Enable/disable spi

pub fn bit_format(&mut self, format: BitFormat)

Select which frame format is used for data transfers

pub fn is_tx_empty(&self) -> bool

Return true if the TXE flag is set, i.e. new data to transmit can be written to the SPI.

pub fn is_rx_not_empty(&self) -> bool

Return true if the RXNE flag is set, i.e. new data has been received and can be read from the SPI.

pub fn is_modf(&self) -> bool

Return true if the MODF flag is set, i.e. the SPI has experienced a Master Mode Fault. (see chapter 28.3.10 of the STM32F4 Reference Manual)

pub fn is_busy(&self) -> bool

Returns true if the transfer is in progress

pub fn is_overrun(&self) -> bool

Return true if the OVR flag is set, i.e. new data has been received while the receive data register was already filled.

Trait Implementations

impl<SPI: Debug + Instance, const BIDI: bool, W: Debug> Debug for SpiSlave<SPI, BIDI, W>

where SPI::Sck: Debug, SPI::Miso: Debug, SPI::Mosi: Debug, SPI::Nss: Debug,

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl<SPI: Instance, const BIDI: bool, W> Deref for SpiSlave<SPI, BIDI, W>

type Target = Inner<SPI>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl<SPI: Instance, const BIDI: bool, W> DerefMut for SpiSlave<SPI, BIDI, W>

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.