Struct stm32f4xx_hal::pac::rcc::ahb1enr::R

pub struct R(/* private fields */);

Register AHB1ENR reader

Implementations

impl R

pub fn otghsulpien(&self) -> BitReaderRaw<GPIOAEN_A>

Bit 30 - USB OTG HSULPI clock enable

pub fn otghsen(&self) -> BitReaderRaw<GPIOAEN_A>

Bit 29 - USB OTG HS clock enable

pub fn ethmacptpen(&self) -> BitReaderRaw<GPIOAEN_A>

Bit 28 - Ethernet PTP clock enable

pub fn ethmacrxen(&self) -> BitReaderRaw<GPIOAEN_A>

Bit 27 - Ethernet Reception clock enable

pub fn ethmactxen(&self) -> BitReaderRaw<GPIOAEN_A>

Bit 26 - Ethernet Transmission clock enable

pub fn ethmacen(&self) -> BitReaderRaw<GPIOAEN_A>

Bit 25 - Ethernet MAC clock enable

pub fn dma2en(&self) -> BitReaderRaw<GPIOAEN_A>

Bit 22 - DMA2 clock enable

pub fn dma1en(&self) -> BitReaderRaw<GPIOAEN_A>

Bit 21 - DMA1 clock enable

pub fn ccmdataramen(&self) -> BitReaderRaw<GPIOAEN_A>

Bit 20 - CCM data RAM clock enable

pub fn bkpsramen(&self) -> BitReaderRaw<GPIOAEN_A>

Bit 18 - Backup SRAM interface clock enable

pub fn crcen(&self) -> BitReaderRaw<GPIOAEN_A>

Bit 12 - CRC clock enable

pub fn gpioien(&self) -> BitReaderRaw<GPIOAEN_A>

Bit 8 - IO port I clock enable

pub fn gpiohen(&self) -> BitReaderRaw<GPIOAEN_A>

Bit 7 - IO port H clock enable

pub fn gpiogen(&self) -> BitReaderRaw<GPIOAEN_A>

Bit 6 - IO port G clock enable

pub fn gpiofen(&self) -> BitReaderRaw<GPIOAEN_A>

Bit 5 - IO port F clock enable

pub fn gpioeen(&self) -> BitReaderRaw<GPIOAEN_A>

Bit 4 - IO port E clock enable

pub fn gpioden(&self) -> BitReaderRaw<GPIOAEN_A>

Bit 3 - IO port D clock enable

pub fn gpiocen(&self) -> BitReaderRaw<GPIOAEN_A>

Bit 2 - IO port C clock enable

pub fn gpioben(&self) -> BitReaderRaw<GPIOAEN_A>

Bit 1 - IO port B clock enable

pub fn gpioaen(&self) -> BitReaderRaw<GPIOAEN_A>

Bit 0 - IO port A clock enable

pub fn dma2den(&self) -> BitReaderRaw<GPIOAEN_A>

Bit 23 - DMA2D clock enable

pub fn gpiojen(&self) -> BitReaderRaw<GPIOAEN_A>

Bit 9 - IO port J clock enable

pub fn gpioken(&self) -> BitReaderRaw<GPIOAEN_A>

Bit 10 - IO port K clock enable

Methods from Deref<Target = R<AHB1ENR_SPEC>>

pub fn bits(&self) -> <REG as RegisterSpec>::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<AHB1ENR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<R as Deref>::Target

Dereferences the value.

impl From<R<AHB1ENR_SPEC>> for R

fn from(reader: R<AHB1ENR_SPEC>) -> R

Converts to this type from the input type.