Struct stm32f4xx_hal::stm32::dma2::s0cr::W

pub struct W { /* fields omitted */ }

Value to write to the register

Methods

impl W

pub fn reset_value() -> W

Reset value of the register

pub unsafe fn bits(&mut self, bits: u32) -> &mut W

Writes raw bits to the register

pub fn chsel(&mut self) -> _CHSELW

Bits 25:27 - Channel selection

pub fn mburst(&mut self) -> _MBURSTW

Bits 23:24 - Memory burst transfer configuration

pub fn pburst(&mut self) -> _PBURSTW

Bits 21:22 - Peripheral burst transfer configuration

pub fn ct(&mut self) -> _CTW

Bit 19 - Current target (only in double buffer mode)

pub fn dbm(&mut self) -> _DBMW

Bit 18 - Double buffer mode

pub fn pl(&mut self) -> _PLW

Bits 16:17 - Priority level

pub fn pincos(&mut self) -> _PINCOSW

Bit 15 - Peripheral increment offset size

pub fn msize(&mut self) -> _MSIZEW

Bits 13:14 - Memory data size

pub fn psize(&mut self) -> _PSIZEW

Bits 11:12 - Peripheral data size

pub fn minc(&mut self) -> _MINCW

Bit 10 - Memory increment mode

pub fn pinc(&mut self) -> _PINCW

Bit 9 - Peripheral increment mode

pub fn circ(&mut self) -> _CIRCW

Bit 8 - Circular mode

pub fn dir(&mut self) -> _DIRW

Bits 6:7 - Data transfer direction

pub fn pfctrl(&mut self) -> _PFCTRLW

Bit 5 - Peripheral flow controller

pub fn tcie(&mut self) -> _TCIEW

Bit 4 - Transfer complete interrupt enable

pub fn htie(&mut self) -> _HTIEW

Bit 3 - Half transfer interrupt enable

pub fn teie(&mut self) -> _TEIEW

Bit 2 - Transfer error interrupt enable

pub fn dmeie(&mut self) -> _DMEIEW

Bit 1 - Direct mode error interrupt enable

pub fn en(&mut self) -> _ENW

Bit 0 - Stream enable / flag stream ready when read low