Trait stm32f4xx_hal::dma::traits::DMASet

pub unsafe trait DMASet<STREAM, const CHANNEL: u8, DIRECTION> { }

Trait to mark a set of Stream, Channel and Direction for a Peripheral as correct together.

Safety

Memory corruption might occur if this trait is implemented for an invalid combination.

Implementations on Foreign Types

impl<SPI, PINS, MODE, STREAM, const CHANNEL: u8, DIR> DMASet<STREAM, CHANNEL, DIR> for I2s<I2s<SPI, PINS>, MODE> where
    SPI: DMASet<STREAM, CHANNEL, DIR>, 

DMA is available for I2S based on the underlying implementations for SPI

Implementors

impl DMASet<StreamX<DMA1, 0_u8>, 0_u8, PeripheralToMemory> for SPI3

impl DMASet<StreamX<DMA1, 0_u8>, 0_u8, PeripheralToMemory> for stm32f4xx_hal::spi::Rx<SPI3>

impl DMASet<StreamX<DMA1, 0_u8>, 1_u8, PeripheralToMemory> for I2C1

impl DMASet<StreamX<DMA1, 0_u8>, 2_u8, MemoryToPeripheral> for CCR1<TIM4>

impl DMASet<StreamX<DMA1, 0_u8>, 2_u8, PeripheralToMemory> for CCR1<TIM4>

impl DMASet<StreamX<DMA1, 0_u8>, 4_u8, PeripheralToMemory> for UART5

impl DMASet<StreamX<DMA1, 0_u8>, 5_u8, MemoryToPeripheral> for UART8

impl DMASet<StreamX<DMA1, 0_u8>, 6_u8, MemoryToPeripheral> for CCR3<TIM5>

impl DMASet<StreamX<DMA1, 0_u8>, 6_u8, MemoryToPeripheral> for DMAR<TIM5>

impl DMASet<StreamX<DMA1, 0_u8>, 6_u8, PeripheralToMemory> for CCR3<TIM5>

impl DMASet<StreamX<DMA1, 0_u8>, 6_u8, PeripheralToMemory> for DMAR<TIM5>

impl DMASet<StreamX<DMA1, 1_u8>, 3_u8, MemoryToPeripheral> for CCR3<TIM2>

impl DMASet<StreamX<DMA1, 1_u8>, 3_u8, MemoryToPeripheral> for DMAR<TIM2>

impl DMASet<StreamX<DMA1, 1_u8>, 3_u8, PeripheralToMemory> for CCR3<TIM2>

impl DMASet<StreamX<DMA1, 1_u8>, 3_u8, PeripheralToMemory> for DMAR<TIM2>

impl DMASet<StreamX<DMA1, 1_u8>, 4_u8, PeripheralToMemory> for USART3

impl DMASet<StreamX<DMA1, 1_u8>, 4_u8, PeripheralToMemory> for stm32f4xx_hal::serial::Rx<USART3>

impl DMASet<StreamX<DMA1, 1_u8>, 5_u8, MemoryToPeripheral> for UART7

impl DMASet<StreamX<DMA1, 1_u8>, 6_u8, MemoryToPeripheral> for CCR4<TIM5>

impl DMASet<StreamX<DMA1, 1_u8>, 6_u8, MemoryToPeripheral> for DMAR<TIM5>

impl DMASet<StreamX<DMA1, 1_u8>, 6_u8, PeripheralToMemory> for CCR4<TIM5>

impl DMASet<StreamX<DMA1, 1_u8>, 6_u8, PeripheralToMemory> for DMAR<TIM5>

impl DMASet<StreamX<DMA1, 2_u8>, 0_u8, PeripheralToMemory> for SPI3

impl DMASet<StreamX<DMA1, 2_u8>, 0_u8, PeripheralToMemory> for stm32f4xx_hal::spi::Rx<SPI3>

impl DMASet<StreamX<DMA1, 2_u8>, 3_u8, PeripheralToMemory> for I2C3

impl DMASet<StreamX<DMA1, 2_u8>, 4_u8, PeripheralToMemory> for UART4

impl DMASet<StreamX<DMA1, 2_u8>, 5_u8, MemoryToPeripheral> for CCR4<TIM3>

impl DMASet<StreamX<DMA1, 2_u8>, 5_u8, MemoryToPeripheral> for DMAR<TIM3>

impl DMASet<StreamX<DMA1, 2_u8>, 5_u8, PeripheralToMemory> for CCR4<TIM3>

impl DMASet<StreamX<DMA1, 2_u8>, 5_u8, PeripheralToMemory> for DMAR<TIM3>

impl DMASet<StreamX<DMA1, 2_u8>, 6_u8, MemoryToPeripheral> for CCR1<TIM5>

impl DMASet<StreamX<DMA1, 2_u8>, 6_u8, PeripheralToMemory> for CCR1<TIM5>

impl DMASet<StreamX<DMA1, 2_u8>, 7_u8, PeripheralToMemory> for I2C2

impl DMASet<StreamX<DMA1, 3_u8>, 0_u8, PeripheralToMemory> for SPI2

impl DMASet<StreamX<DMA1, 3_u8>, 0_u8, PeripheralToMemory> for stm32f4xx_hal::spi::Rx<SPI2>

impl DMASet<StreamX<DMA1, 3_u8>, 2_u8, MemoryToPeripheral> for CCR2<TIM4>

impl DMASet<StreamX<DMA1, 3_u8>, 2_u8, PeripheralToMemory> for CCR2<TIM4>

impl DMASet<StreamX<DMA1, 3_u8>, 4_u8, MemoryToPeripheral> for USART3

impl DMASet<StreamX<DMA1, 3_u8>, 4_u8, MemoryToPeripheral> for stm32f4xx_hal::serial::Tx<USART3>

impl DMASet<StreamX<DMA1, 3_u8>, 5_u8, PeripheralToMemory> for UART7

impl DMASet<StreamX<DMA1, 3_u8>, 6_u8, MemoryToPeripheral> for CCR4<TIM5>

impl DMASet<StreamX<DMA1, 3_u8>, 6_u8, MemoryToPeripheral> for DMAR<TIM5>

impl DMASet<StreamX<DMA1, 3_u8>, 6_u8, PeripheralToMemory> for CCR4<TIM5>

impl DMASet<StreamX<DMA1, 3_u8>, 6_u8, PeripheralToMemory> for DMAR<TIM5>

impl DMASet<StreamX<DMA1, 3_u8>, 7_u8, PeripheralToMemory> for I2C2

impl DMASet<StreamX<DMA1, 4_u8>, 0_u8, MemoryToPeripheral> for SPI2

impl DMASet<StreamX<DMA1, 4_u8>, 0_u8, MemoryToPeripheral> for stm32f4xx_hal::spi::Tx<SPI2>

impl DMASet<StreamX<DMA1, 4_u8>, 3_u8, MemoryToPeripheral> for I2C3

impl DMASet<StreamX<DMA1, 4_u8>, 4_u8, MemoryToPeripheral> for UART4

impl DMASet<StreamX<DMA1, 4_u8>, 5_u8, MemoryToPeripheral> for CCR1<TIM3>

impl DMASet<StreamX<DMA1, 4_u8>, 5_u8, MemoryToPeripheral> for DMAR<TIM3>

impl DMASet<StreamX<DMA1, 4_u8>, 5_u8, PeripheralToMemory> for CCR1<TIM3>

impl DMASet<StreamX<DMA1, 4_u8>, 5_u8, PeripheralToMemory> for DMAR<TIM3>

impl DMASet<StreamX<DMA1, 4_u8>, 6_u8, MemoryToPeripheral> for CCR2<TIM5>

impl DMASet<StreamX<DMA1, 4_u8>, 6_u8, PeripheralToMemory> for CCR2<TIM5>

impl DMASet<StreamX<DMA1, 4_u8>, 7_u8, MemoryToPeripheral> for USART3

impl DMASet<StreamX<DMA1, 4_u8>, 7_u8, MemoryToPeripheral> for stm32f4xx_hal::serial::Tx<USART3>

impl DMASet<StreamX<DMA1, 5_u8>, 0_u8, MemoryToPeripheral> for SPI3

impl DMASet<StreamX<DMA1, 5_u8>, 0_u8, MemoryToPeripheral> for stm32f4xx_hal::spi::Tx<SPI3>

impl DMASet<StreamX<DMA1, 5_u8>, 1_u8, PeripheralToMemory> for I2C1

impl DMASet<StreamX<DMA1, 5_u8>, 3_u8, MemoryToPeripheral> for CCR1<TIM2>

impl DMASet<StreamX<DMA1, 5_u8>, 3_u8, PeripheralToMemory> for CCR1<TIM2>

impl DMASet<StreamX<DMA1, 5_u8>, 4_u8, PeripheralToMemory> for USART2

impl DMASet<StreamX<DMA1, 5_u8>, 4_u8, PeripheralToMemory> for stm32f4xx_hal::serial::Rx<USART2>

impl DMASet<StreamX<DMA1, 5_u8>, 5_u8, MemoryToPeripheral> for CCR2<TIM3>

impl DMASet<StreamX<DMA1, 5_u8>, 5_u8, PeripheralToMemory> for CCR2<TIM3>

impl DMASet<StreamX<DMA1, 6_u8>, 1_u8, MemoryToPeripheral> for I2C1

impl DMASet<StreamX<DMA1, 6_u8>, 2_u8, MemoryToPeripheral> for DMAR<TIM4>

impl DMASet<StreamX<DMA1, 6_u8>, 2_u8, PeripheralToMemory> for DMAR<TIM4>

impl DMASet<StreamX<DMA1, 6_u8>, 3_u8, MemoryToPeripheral> for CCR2<TIM2>

impl DMASet<StreamX<DMA1, 6_u8>, 3_u8, MemoryToPeripheral> for CCR4<TIM2>

impl DMASet<StreamX<DMA1, 6_u8>, 3_u8, PeripheralToMemory> for CCR2<TIM2>

impl DMASet<StreamX<DMA1, 6_u8>, 3_u8, PeripheralToMemory> for CCR4<TIM2>

impl DMASet<StreamX<DMA1, 6_u8>, 4_u8, MemoryToPeripheral> for USART2

impl DMASet<StreamX<DMA1, 6_u8>, 4_u8, MemoryToPeripheral> for stm32f4xx_hal::serial::Tx<USART2>

impl DMASet<StreamX<DMA1, 6_u8>, 5_u8, PeripheralToMemory> for UART8

impl DMASet<StreamX<DMA1, 6_u8>, 6_u8, MemoryToPeripheral> for DMAR<TIM5>

impl DMASet<StreamX<DMA1, 6_u8>, 6_u8, PeripheralToMemory> for DMAR<TIM5>

impl DMASet<StreamX<DMA1, 7_u8>, 0_u8, MemoryToPeripheral> for SPI3

impl DMASet<StreamX<DMA1, 7_u8>, 0_u8, MemoryToPeripheral> for stm32f4xx_hal::spi::Tx<SPI3>

impl DMASet<StreamX<DMA1, 7_u8>, 1_u8, MemoryToPeripheral> for I2C1

impl DMASet<StreamX<DMA1, 7_u8>, 2_u8, MemoryToPeripheral> for CCR3<TIM4>

impl DMASet<StreamX<DMA1, 7_u8>, 2_u8, PeripheralToMemory> for CCR3<TIM4>

impl DMASet<StreamX<DMA1, 7_u8>, 3_u8, MemoryToPeripheral> for CCR4<TIM2>

impl DMASet<StreamX<DMA1, 7_u8>, 3_u8, MemoryToPeripheral> for DMAR<TIM2>

impl DMASet<StreamX<DMA1, 7_u8>, 3_u8, PeripheralToMemory> for CCR4<TIM2>

impl DMASet<StreamX<DMA1, 7_u8>, 3_u8, PeripheralToMemory> for DMAR<TIM2>

impl DMASet<StreamX<DMA1, 7_u8>, 4_u8, MemoryToPeripheral> for UART5

impl DMASet<StreamX<DMA1, 7_u8>, 5_u8, MemoryToPeripheral> for CCR3<TIM3>

impl DMASet<StreamX<DMA1, 7_u8>, 5_u8, PeripheralToMemory> for CCR3<TIM3>

impl DMASet<StreamX<DMA1, 7_u8>, 7_u8, MemoryToPeripheral> for I2C2

impl DMASet<StreamX<DMA2, 0_u8>, 0_u8, MemoryToMemory<u8>> for MemoryToMemory<u8>

impl DMASet<StreamX<DMA2, 0_u8>, 0_u8, MemoryToMemory<u16>> for MemoryToMemory<u16>

impl DMASet<StreamX<DMA2, 0_u8>, 0_u8, MemoryToMemory<u32>> for MemoryToMemory<u32>

impl DMASet<StreamX<DMA2, 0_u8>, 0_u8, PeripheralToMemory> for Adc<ADC1>

impl DMASet<StreamX<DMA2, 0_u8>, 0_u8, PeripheralToMemory> for ADC1

impl DMASet<StreamX<DMA2, 0_u8>, 2_u8, PeripheralToMemory> for Adc<ADC3>

impl DMASet<StreamX<DMA2, 0_u8>, 2_u8, PeripheralToMemory> for ADC3

impl DMASet<StreamX<DMA2, 0_u8>, 3_u8, PeripheralToMemory> for SPI1

impl DMASet<StreamX<DMA2, 0_u8>, 3_u8, PeripheralToMemory> for stm32f4xx_hal::spi::Rx<SPI1>

impl DMASet<StreamX<DMA2, 0_u8>, 4_u8, PeripheralToMemory> for SPI4

impl DMASet<StreamX<DMA2, 0_u8>, 4_u8, PeripheralToMemory> for stm32f4xx_hal::spi::Rx<SPI4>

impl DMASet<StreamX<DMA2, 0_u8>, 6_u8, MemoryToPeripheral> for DMAR<TIM1>

impl DMASet<StreamX<DMA2, 0_u8>, 6_u8, PeripheralToMemory> for DMAR<TIM1>

impl DMASet<StreamX<DMA2, 1_u8>, 0_u8, MemoryToMemory<u8>> for MemoryToMemory<u8>

impl DMASet<StreamX<DMA2, 1_u8>, 0_u8, MemoryToMemory<u16>> for MemoryToMemory<u16>

impl DMASet<StreamX<DMA2, 1_u8>, 0_u8, MemoryToMemory<u32>> for MemoryToMemory<u32>

impl DMASet<StreamX<DMA2, 1_u8>, 1_u8, PeripheralToMemory> for DCMI

impl DMASet<StreamX<DMA2, 1_u8>, 2_u8, PeripheralToMemory> for Adc<ADC3>

impl DMASet<StreamX<DMA2, 1_u8>, 2_u8, PeripheralToMemory> for ADC3

impl DMASet<StreamX<DMA2, 1_u8>, 4_u8, MemoryToPeripheral> for SPI4

impl DMASet<StreamX<DMA2, 1_u8>, 4_u8, MemoryToPeripheral> for stm32f4xx_hal::spi::Tx<SPI4>

impl DMASet<StreamX<DMA2, 1_u8>, 5_u8, PeripheralToMemory> for USART6

impl DMASet<StreamX<DMA2, 1_u8>, 5_u8, PeripheralToMemory> for stm32f4xx_hal::serial::Rx<USART6>

impl DMASet<StreamX<DMA2, 1_u8>, 6_u8, MemoryToPeripheral> for CCR1<TIM1>

impl DMASet<StreamX<DMA2, 1_u8>, 6_u8, PeripheralToMemory> for CCR1<TIM1>

impl DMASet<StreamX<DMA2, 1_u8>, 7_u8, MemoryToPeripheral> for DMAR<TIM8>

impl DMASet<StreamX<DMA2, 1_u8>, 7_u8, PeripheralToMemory> for DMAR<TIM8>

impl DMASet<StreamX<DMA2, 2_u8>, 0_u8, MemoryToMemory<u8>> for MemoryToMemory<u8>

impl DMASet<StreamX<DMA2, 2_u8>, 0_u8, MemoryToMemory<u16>> for MemoryToMemory<u16>

impl DMASet<StreamX<DMA2, 2_u8>, 0_u8, MemoryToMemory<u32>> for MemoryToMemory<u32>

impl DMASet<StreamX<DMA2, 2_u8>, 0_u8, MemoryToPeripheral> for CCR1<TIM8>

impl DMASet<StreamX<DMA2, 2_u8>, 0_u8, MemoryToPeripheral> for CCR2<TIM8>

impl DMASet<StreamX<DMA2, 2_u8>, 0_u8, MemoryToPeripheral> for CCR3<TIM8>

impl DMASet<StreamX<DMA2, 2_u8>, 0_u8, PeripheralToMemory> for CCR1<TIM8>

impl DMASet<StreamX<DMA2, 2_u8>, 0_u8, PeripheralToMemory> for CCR2<TIM8>

impl DMASet<StreamX<DMA2, 2_u8>, 0_u8, PeripheralToMemory> for CCR3<TIM8>

impl DMASet<StreamX<DMA2, 2_u8>, 1_u8, PeripheralToMemory> for Adc<ADC3>

impl DMASet<StreamX<DMA2, 2_u8>, 1_u8, PeripheralToMemory> for ADC2

impl DMASet<StreamX<DMA2, 2_u8>, 3_u8, PeripheralToMemory> for SPI1

impl DMASet<StreamX<DMA2, 2_u8>, 3_u8, PeripheralToMemory> for stm32f4xx_hal::spi::Rx<SPI1>

impl DMASet<StreamX<DMA2, 2_u8>, 4_u8, PeripheralToMemory> for USART1

impl DMASet<StreamX<DMA2, 2_u8>, 4_u8, PeripheralToMemory> for stm32f4xx_hal::serial::Rx<USART1>

impl DMASet<StreamX<DMA2, 2_u8>, 5_u8, PeripheralToMemory> for USART6

impl DMASet<StreamX<DMA2, 2_u8>, 5_u8, PeripheralToMemory> for stm32f4xx_hal::serial::Rx<USART6>

impl DMASet<StreamX<DMA2, 2_u8>, 6_u8, MemoryToPeripheral> for CCR2<TIM1>

impl DMASet<StreamX<DMA2, 2_u8>, 6_u8, PeripheralToMemory> for CCR2<TIM1>

impl DMASet<StreamX<DMA2, 2_u8>, 7_u8, MemoryToPeripheral> for CCR1<TIM8>

impl DMASet<StreamX<DMA2, 2_u8>, 7_u8, PeripheralToMemory> for CCR1<TIM8>

impl DMASet<StreamX<DMA2, 3_u8>, 0_u8, MemoryToMemory<u8>> for MemoryToMemory<u8>

impl DMASet<StreamX<DMA2, 3_u8>, 0_u8, MemoryToMemory<u16>> for MemoryToMemory<u16>

impl DMASet<StreamX<DMA2, 3_u8>, 0_u8, MemoryToMemory<u32>> for MemoryToMemory<u32>

impl DMASet<StreamX<DMA2, 3_u8>, 1_u8, PeripheralToMemory> for Adc<ADC3>

impl DMASet<StreamX<DMA2, 3_u8>, 1_u8, PeripheralToMemory> for ADC2

impl DMASet<StreamX<DMA2, 3_u8>, 2_u8, PeripheralToMemory> for SPI5

impl DMASet<StreamX<DMA2, 3_u8>, 2_u8, PeripheralToMemory> for stm32f4xx_hal::spi::Rx<SPI5>

impl DMASet<StreamX<DMA2, 3_u8>, 3_u8, MemoryToPeripheral> for SPI1

impl DMASet<StreamX<DMA2, 3_u8>, 3_u8, MemoryToPeripheral> for stm32f4xx_hal::spi::Tx<SPI1>

impl DMASet<StreamX<DMA2, 3_u8>, 4_u8, MemoryToPeripheral> for SDIO

impl DMASet<StreamX<DMA2, 3_u8>, 4_u8, PeripheralToMemory> for SDIO

impl DMASet<StreamX<DMA2, 3_u8>, 5_u8, PeripheralToMemory> for SPI4

impl DMASet<StreamX<DMA2, 3_u8>, 5_u8, PeripheralToMemory> for stm32f4xx_hal::spi::Rx<SPI4>

impl DMASet<StreamX<DMA2, 3_u8>, 6_u8, MemoryToPeripheral> for CCR1<TIM1>

impl DMASet<StreamX<DMA2, 3_u8>, 6_u8, PeripheralToMemory> for CCR1<TIM1>

impl DMASet<StreamX<DMA2, 3_u8>, 7_u8, MemoryToPeripheral> for CCR2<TIM8>

impl DMASet<StreamX<DMA2, 3_u8>, 7_u8, PeripheralToMemory> for CCR2<TIM8>

impl DMASet<StreamX<DMA2, 4_u8>, 0_u8, MemoryToMemory<u8>> for MemoryToMemory<u8>

impl DMASet<StreamX<DMA2, 4_u8>, 0_u8, MemoryToMemory<u16>> for MemoryToMemory<u16>

impl DMASet<StreamX<DMA2, 4_u8>, 0_u8, MemoryToMemory<u32>> for MemoryToMemory<u32>

impl DMASet<StreamX<DMA2, 4_u8>, 0_u8, PeripheralToMemory> for ADC1

impl DMASet<StreamX<DMA2, 4_u8>, 2_u8, MemoryToPeripheral> for SPI5

impl DMASet<StreamX<DMA2, 4_u8>, 2_u8, MemoryToPeripheral> for stm32f4xx_hal::spi::Tx<SPI5>

impl DMASet<StreamX<DMA2, 4_u8>, 5_u8, MemoryToPeripheral> for SPI4

impl DMASet<StreamX<DMA2, 4_u8>, 5_u8, MemoryToPeripheral> for stm32f4xx_hal::spi::Tx<SPI4>

impl DMASet<StreamX<DMA2, 4_u8>, 6_u8, MemoryToPeripheral> for CCR4<TIM1>

impl DMASet<StreamX<DMA2, 4_u8>, 6_u8, MemoryToPeripheral> for DMAR<TIM1>

impl DMASet<StreamX<DMA2, 4_u8>, 6_u8, PeripheralToMemory> for CCR4<TIM1>

impl DMASet<StreamX<DMA2, 4_u8>, 6_u8, PeripheralToMemory> for DMAR<TIM1>

impl DMASet<StreamX<DMA2, 4_u8>, 7_u8, MemoryToPeripheral> for CCR3<TIM8>

impl DMASet<StreamX<DMA2, 4_u8>, 7_u8, PeripheralToMemory> for CCR3<TIM8>

impl DMASet<StreamX<DMA2, 5_u8>, 0_u8, MemoryToMemory<u8>> for MemoryToMemory<u8>

impl DMASet<StreamX<DMA2, 5_u8>, 0_u8, MemoryToMemory<u16>> for MemoryToMemory<u16>

impl DMASet<StreamX<DMA2, 5_u8>, 0_u8, MemoryToMemory<u32>> for MemoryToMemory<u32>

impl DMASet<StreamX<DMA2, 5_u8>, 1_u8, MemoryToPeripheral> for SPI6

impl DMASet<StreamX<DMA2, 5_u8>, 1_u8, MemoryToPeripheral> for stm32f4xx_hal::spi::Tx<SPI6>

impl DMASet<StreamX<DMA2, 5_u8>, 2_u8, PeripheralToMemory> for CRYP

impl DMASet<StreamX<DMA2, 5_u8>, 3_u8, MemoryToPeripheral> for SPI1

impl DMASet<StreamX<DMA2, 5_u8>, 3_u8, MemoryToPeripheral> for stm32f4xx_hal::spi::Tx<SPI1>

impl DMASet<StreamX<DMA2, 5_u8>, 4_u8, PeripheralToMemory> for USART1

impl DMASet<StreamX<DMA2, 5_u8>, 4_u8, PeripheralToMemory> for stm32f4xx_hal::serial::Rx<USART1>

impl DMASet<StreamX<DMA2, 5_u8>, 6_u8, MemoryToPeripheral> for DMAR<TIM1>

impl DMASet<StreamX<DMA2, 5_u8>, 6_u8, PeripheralToMemory> for DMAR<TIM1>

impl DMASet<StreamX<DMA2, 5_u8>, 7_u8, PeripheralToMemory> for SPI5

impl DMASet<StreamX<DMA2, 5_u8>, 7_u8, PeripheralToMemory> for stm32f4xx_hal::spi::Rx<SPI5>

impl DMASet<StreamX<DMA2, 6_u8>, 0_u8, MemoryToMemory<u8>> for MemoryToMemory<u8>

impl DMASet<StreamX<DMA2, 6_u8>, 0_u8, MemoryToMemory<u16>> for MemoryToMemory<u16>

impl DMASet<StreamX<DMA2, 6_u8>, 0_u8, MemoryToMemory<u32>> for MemoryToMemory<u32>

impl DMASet<StreamX<DMA2, 6_u8>, 0_u8, MemoryToPeripheral> for CCR1<TIM1>

impl DMASet<StreamX<DMA2, 6_u8>, 0_u8, MemoryToPeripheral> for CCR2<TIM1>

impl DMASet<StreamX<DMA2, 6_u8>, 0_u8, MemoryToPeripheral> for CCR3<TIM1>

impl DMASet<StreamX<DMA2, 6_u8>, 0_u8, PeripheralToMemory> for CCR1<TIM1>

impl DMASet<StreamX<DMA2, 6_u8>, 0_u8, PeripheralToMemory> for CCR2<TIM1>

impl DMASet<StreamX<DMA2, 6_u8>, 0_u8, PeripheralToMemory> for CCR3<TIM1>

impl DMASet<StreamX<DMA2, 6_u8>, 1_u8, PeripheralToMemory> for SPI6

impl DMASet<StreamX<DMA2, 6_u8>, 1_u8, PeripheralToMemory> for stm32f4xx_hal::spi::Rx<SPI6>

impl DMASet<StreamX<DMA2, 6_u8>, 2_u8, MemoryToPeripheral> for CRYP

impl DMASet<StreamX<DMA2, 6_u8>, 4_u8, MemoryToPeripheral> for SDIO

impl DMASet<StreamX<DMA2, 6_u8>, 4_u8, PeripheralToMemory> for SDIO

impl DMASet<StreamX<DMA2, 6_u8>, 5_u8, MemoryToPeripheral> for USART6

impl DMASet<StreamX<DMA2, 6_u8>, 5_u8, MemoryToPeripheral> for stm32f4xx_hal::serial::Tx<USART6>

impl DMASet<StreamX<DMA2, 6_u8>, 6_u8, MemoryToPeripheral> for CCR3<TIM1>

impl DMASet<StreamX<DMA2, 6_u8>, 6_u8, PeripheralToMemory> for CCR3<TIM1>

impl DMASet<StreamX<DMA2, 6_u8>, 7_u8, MemoryToPeripheral> for SPI5

impl DMASet<StreamX<DMA2, 6_u8>, 7_u8, MemoryToPeripheral> for stm32f4xx_hal::spi::Tx<SPI5>

impl DMASet<StreamX<DMA2, 7_u8>, 0_u8, MemoryToMemory<u8>> for MemoryToMemory<u8>

impl DMASet<StreamX<DMA2, 7_u8>, 0_u8, MemoryToMemory<u16>> for MemoryToMemory<u16>

impl DMASet<StreamX<DMA2, 7_u8>, 0_u8, MemoryToMemory<u32>> for MemoryToMemory<u32>

impl DMASet<StreamX<DMA2, 7_u8>, 1_u8, PeripheralToMemory> for DCMI

impl DMASet<StreamX<DMA2, 7_u8>, 2_u8, MemoryToPeripheral> for HASH

impl DMASet<StreamX<DMA2, 7_u8>, 4_u8, MemoryToPeripheral> for USART1

impl DMASet<StreamX<DMA2, 7_u8>, 4_u8, MemoryToPeripheral> for stm32f4xx_hal::serial::Tx<USART1>

impl DMASet<StreamX<DMA2, 7_u8>, 5_u8, MemoryToPeripheral> for USART6

impl DMASet<StreamX<DMA2, 7_u8>, 5_u8, MemoryToPeripheral> for stm32f4xx_hal::serial::Tx<USART6>

impl DMASet<StreamX<DMA2, 7_u8>, 7_u8, MemoryToPeripheral> for CCR4<TIM8>

impl DMASet<StreamX<DMA2, 7_u8>, 7_u8, MemoryToPeripheral> for DMAR<TIM8>

impl DMASet<StreamX<DMA2, 7_u8>, 7_u8, PeripheralToMemory> for CCR4<TIM8>

impl DMASet<StreamX<DMA2, 7_u8>, 7_u8, PeripheralToMemory> for DMAR<TIM8>