Trait stm32f4xx_hal::fsmc_lcd::ChipSelectPins
source · [−]pub trait ChipSelectPins: Sealed {
type Lcds: Conjure;
}Expand description
One, two, three, or four chip select pins
Due to trait system limitations, this trait is only implemented for pins wrapped in the
ChipSelect1, ChipSelect2, ChipSelect3, and ChipSelect4 wrappers.
This trait is implemented for all non-empty subsets of the 4 possible chip select signals. The pins must be in order.
Example types that implement ChipSelectPins
Wrapped single pins:
ChipSelect1<PD7<Alternate<12>>>ChipSelect2<PG9<Alternate<12>>>ChipSelect3<PG10<Alternate<12>>>ChipSelect4<PG12<Alternate<12>>>
Tuples of wrapped pins:
(ChipSelect1<PD7<Alternate<12>>>, ChipSelect2<PG9<Alternate<12>>>)(ChipSelect1<PD7<Alternate<12>>>, ChipSelect4<PG4<Alternate<12>>>)(ChipSelect1<PD7<Alternate<12>>>, ChipSelect2<PG9<Alternate<12>>>, ChipSelect3<PG10<Alternate<12>>>, ChipSelect4<PG12<Alternate<12>>>)