Struct stm32f3xx_hal::pac::TIM1

pub struct TIM1 { /* private fields */ }

Advanced timer

Implementations

impl TIM1

pub const PTR: *const RegisterBlock = {0x40012c00 as *const stm32f3::stm32f303::tim1::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

Methods from Deref<Target = RegisterBlock>

pub fn ccr1(&self) -> &Reg<CCR_SPEC>

0x34 - capture/compare register

pub fn ccr2(&self) -> &Reg<CCR_SPEC>

0x38 - capture/compare register

pub fn ccr3(&self) -> &Reg<CCR_SPEC>

0x3c - capture/compare register

pub fn ccr4(&self) -> &Reg<CCR_SPEC>

0x40 - capture/compare register

pub fn ccmr1_input(&self) -> &Reg<CCMR1_INPUT_SPEC>

0x18 - capture/compare mode register 1 (input mode)

pub fn ccmr1_output(&self) -> &Reg<CCMR1_OUTPUT_SPEC>

0x18 - capture/compare mode register (output mode)

pub fn ccmr2_input(&self) -> &Reg<CCMR2_INPUT_SPEC>

0x1c - capture/compare mode register 2 (input mode)

pub fn ccmr2_output(&self) -> &Reg<CCMR2_OUTPUT_SPEC>

0x1c - capture/compare mode register (output mode)

Trait Implementations

impl Debug for TIM1

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl Deref for TIM1

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &<TIM1 as Deref>::Target

Dereferences the value.

impl Enable for TIM1

fn enable(bus: &mut Self::Bus)

Enables peripheral

fn disable(bus: &mut Self::Bus)

Disables peripheral

fn is_enabled() -> bool

Check if peripheral enabled

fn is_disabled() -> bool

Check if peripheral disabled

unsafe fn enable_unchecked()

Enables peripheral

unsafe fn disable_unchecked()

Disables peripheral

impl InterruptNumber for TIM1

type Interrupt = InterruptTypes

The type used to represent the Interrupt Number.

const INTERRUPT: Self::Interrupt = crate::timer::interrupts::TIM1_TYPES

The assocaited constant of the interrupt

impl RccBus for TIM1

type Bus = APB2

The underlying bus peripheral

impl Reset for TIM1

fn reset(bus: &mut Self::Bus)

Resets peripheral

unsafe fn reset_unchecked()

Safety

impl CommonRegisterBlock for TIM1

impl Instance for TIM1

impl Send for TIM1