Struct stm32f334::hrtim_timb::timbcr::W
[−]
[src]
pub struct W { /* fields omitted */ }Value to write to the register
Methods
impl W[src]
pub fn reset_value() -> W[src]
Reset value of the register
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self[src]
Writes raw bits to the register
pub fn updgat(&mut self) -> _UPDGATW[src]
Bits 28:31 - Update Gating
pub fn preen(&mut self) -> _PREENW[src]
Bit 27 - Preload enable
pub fn dacsync(&mut self) -> _DACSYNCW[src]
Bits 25:26 - AC Synchronization
pub fn mstu(&mut self) -> _MSTUW[src]
Bit 24 - Master Timer update
pub fn teu(&mut self) -> _TEUW[src]
Bit 23 - TEU
pub fn tdu(&mut self) -> _TDUW[src]
Bit 22 - TDU
pub fn tcu(&mut self) -> _TCUW[src]
Bit 21 - TCU
pub fn tbu(&mut self) -> _TBUW[src]
Bit 20 - TBU
pub fn tx_rstu(&mut self) -> _TXRSTUW[src]
Bit 18 - Timerx reset update
pub fn tx_repu(&mut self) -> _TXREPUW[src]
Bit 17 - Timer x Repetition update
pub fn delcmp4(&mut self) -> _DELCMP4W[src]
Bits 14:15 - Delayed CMP4 mode
pub fn delcmp2(&mut self) -> _DELCMP2W[src]
Bits 12:13 - Delayed CMP2 mode
pub fn syncstrtx(&mut self) -> _SYNCSTRTXW[src]
Bit 11 - Synchronization Starts Timer x
pub fn syncrstx(&mut self) -> _SYNCRSTXW[src]
Bit 10 - Synchronization Resets Timer x
pub fn pshpll(&mut self) -> _PSHPLLW[src]
Bit 6 - Push-Pull mode enable
pub fn half(&mut self) -> _HALFW[src]
Bit 5 - Half mode enable
pub fn retrig(&mut self) -> _RETRIGW[src]
Bit 4 - Re-triggerable mode
pub fn cont(&mut self) -> _CONTW[src]
Bit 3 - Continuous mode
pub fn ck_pscx(&mut self) -> _CK_PSCXW[src]
Bits 0:2 - HRTIM Timer x Clock prescaler