Struct stm32f334::hrtim_timb::timbcr::R
[−]
[src]
pub struct R { /* fields omitted */ }Value read from the register
Methods
impl R[src]
pub fn bits(&self) -> u32[src]
Value of the register as raw bits
pub fn updgat(&self) -> UPDGATR[src]
Bits 28:31 - Update Gating
pub fn preen(&self) -> PREENR[src]
Bit 27 - Preload enable
pub fn dacsync(&self) -> DACSYNCR[src]
Bits 25:26 - AC Synchronization
pub fn mstu(&self) -> MSTUR[src]
Bit 24 - Master Timer update
pub fn teu(&self) -> TEUR[src]
Bit 23 - TEU
pub fn tdu(&self) -> TDUR[src]
Bit 22 - TDU
pub fn tcu(&self) -> TCUR[src]
Bit 21 - TCU
pub fn tbu(&self) -> TBUR[src]
Bit 20 - TBU
pub fn tx_rstu(&self) -> TXRSTUR[src]
Bit 18 - Timerx reset update
pub fn tx_repu(&self) -> TXREPUR[src]
Bit 17 - Timer x Repetition update
pub fn delcmp4(&self) -> DELCMP4R[src]
Bits 14:15 - Delayed CMP4 mode
pub fn delcmp2(&self) -> DELCMP2R[src]
Bits 12:13 - Delayed CMP2 mode
pub fn syncstrtx(&self) -> SYNCSTRTXR[src]
Bit 11 - Synchronization Starts Timer x
pub fn syncrstx(&self) -> SYNCRSTXR[src]
Bit 10 - Synchronization Resets Timer x
pub fn pshpll(&self) -> PSHPLLR[src]
Bit 6 - Push-Pull mode enable
pub fn half(&self) -> HALFR[src]
Bit 5 - Half mode enable
pub fn retrig(&self) -> RETRIGR[src]
Bit 4 - Re-triggerable mode
pub fn cont(&self) -> CONTR[src]
Bit 3 - Continuous mode
pub fn ck_pscx(&self) -> CK_PSCXR[src]
Bits 0:2 - HRTIM Timer x Clock prescaler