Struct stm32f334::hrtim_common::adc1r::R
[−]
[src]
pub struct R { /* fields omitted */ }Value read from the register
Methods
impl R[src]
pub fn bits(&self) -> u32[src]
Value of the register as raw bits
pub fn ad1teper(&self) -> AD1TEPERR[src]
Bit 31 - ADC trigger 1 on Timer E Period
pub fn ad1tec4(&self) -> AD1TEC4R[src]
Bit 30 - ADC trigger 1 on Timer E compare 4
pub fn ad1tec3(&self) -> AD1TEC3R[src]
Bit 29 - ADC trigger 1 on Timer E compare 3
pub fn ad1tec2(&self) -> AD1TEC2R[src]
Bit 28 - ADC trigger 1 on Timer E compare 2
pub fn ad1tdper(&self) -> AD1TDPERR[src]
Bit 27 - ADC trigger 1 on Timer D Period
pub fn ad1tdc4(&self) -> AD1TDC4R[src]
Bit 26 - ADC trigger 1 on Timer D compare 4
pub fn ad1tdc3(&self) -> AD1TDC3R[src]
Bit 25 - ADC trigger 1 on Timer D compare 3
pub fn ad1tdc2(&self) -> AD1TDC2R[src]
Bit 24 - ADC trigger 1 on Timer D compare 2
pub fn ad1tcper(&self) -> AD1TCPERR[src]
Bit 23 - ADC trigger 1 on Timer C Period
pub fn ad1tcc4(&self) -> AD1TCC4R[src]
Bit 22 - ADC trigger 1 on Timer C compare 4
pub fn ad1tcc3(&self) -> AD1TCC3R[src]
Bit 21 - ADC trigger 1 on Timer C compare 3
pub fn ad1tcc2(&self) -> AD1TCC2R[src]
Bit 20 - ADC trigger 1 on Timer C compare 2
pub fn ad1tbrst(&self) -> AD1TBRSTR[src]
Bit 19 - ADC trigger 1 on Timer B Reset
pub fn ad1tbper(&self) -> AD1TBPERR[src]
Bit 18 - ADC trigger 1 on Timer B Period
pub fn ad1tbc4(&self) -> AD1TBC4R[src]
Bit 17 - ADC trigger 1 on Timer B compare 4
pub fn ad1tbc3(&self) -> AD1TBC3R[src]
Bit 16 - ADC trigger 1 on Timer B compare 3
pub fn ad1tbc2(&self) -> AD1TBC2R[src]
Bit 15 - ADC trigger 1 on Timer B compare 2
pub fn ad1tarst(&self) -> AD1TARSTR[src]
Bit 14 - ADC trigger 1 on Timer A Reset
pub fn ad1taper(&self) -> AD1TAPERR[src]
Bit 13 - ADC trigger 1 on Timer A Period
pub fn ad1tac4(&self) -> AD1TAC4R[src]
Bit 12 - ADC trigger 1 on Timer A compare 4
pub fn ad1tac3(&self) -> AD1TAC3R[src]
Bit 11 - ADC trigger 1 on Timer A compare 3
pub fn ad1tac2(&self) -> AD1TAC2R[src]
Bit 10 - ADC trigger 1 on Timer A compare 2
pub fn ad1eev5(&self) -> AD1EEV5R[src]
Bit 9 - ADC trigger 1 on External Event 5
pub fn ad1eev4(&self) -> AD1EEV4R[src]
Bit 8 - ADC trigger 1 on External Event 4
pub fn ad1eev3(&self) -> AD1EEV3R[src]
Bit 7 - ADC trigger 1 on External Event 3
pub fn ad1eev2(&self) -> AD1EEV2R[src]
Bit 6 - ADC trigger 1 on External Event 2
pub fn ad1eev1(&self) -> AD1EEV1R[src]
Bit 5 - ADC trigger 1 on External Event 1
pub fn ad1mper(&self) -> AD1MPERR[src]
Bit 4 - ADC trigger 1 on Master Period
pub fn ad1mc4(&self) -> AD1MC4R[src]
Bit 3 - ADC trigger 1 on Master Compare 4
pub fn ad1mc3(&self) -> AD1MC3R[src]
Bit 2 - ADC trigger 1 on Master Compare 3
pub fn ad1mc2(&self) -> AD1MC2R[src]
Bit 1 - ADC trigger 1 on Master Compare 2
pub fn ad1mc1(&self) -> AD1MC1R[src]
Bit 0 - ADC trigger 1 on Master Compare 1