1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84
#[doc = "Reader of register SR"] pub type R = crate::R<u32, super::SR>; #[doc = "Writer for register SR"] pub type W = crate::W<u32, super::SR>; #[doc = "Register SR `reset()`'s with value 0"] impl crate::ResetValue for super::SR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `DMAUDR2`"] pub type DMAUDR2_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DMAUDR2`"] pub struct DMAUDR2_W<'a> { w: &'a mut W, } impl<'a> DMAUDR2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29); self.w } } #[doc = "Reader of field `DMAUDR1`"] pub type DMAUDR1_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DMAUDR1`"] pub struct DMAUDR1_W<'a> { w: &'a mut W, } impl<'a> DMAUDR1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); self.w } } impl R { #[doc = "Bit 29 - DAC channel2 DMA underrun flag"] #[inline(always)] pub fn dmaudr2(&self) -> DMAUDR2_R { DMAUDR2_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 13 - DAC channel1 DMA underrun flag"] #[inline(always)] pub fn dmaudr1(&self) -> DMAUDR1_R { DMAUDR1_R::new(((self.bits >> 13) & 0x01) != 0) } } impl W { #[doc = "Bit 29 - DAC channel2 DMA underrun flag"] #[inline(always)] pub fn dmaudr2(&mut self) -> DMAUDR2_W { DMAUDR2_W { w: self } } #[doc = "Bit 13 - DAC channel1 DMA underrun flag"] #[inline(always)] pub fn dmaudr1(&mut self) -> DMAUDR1_W { DMAUDR1_W { w: self } } }