Struct stm32f1xx_hal::rcc::CFGR

pub struct CFGR { /* fields omitted */ }

Clock configuration register (CFGR)

Used to configure the frequencies of the clocks present in the processor.

After setting all frequencies, call the freeze function to apply the configuration.

NOTE: Currently, it is not guaranteed that the exact frequencies selected will be used, only frequencies close to it.

Implementations

impl CFGR

pub fn use_hse<F>(self, freq: F) -> Self where
    F: Into<Hertz>, 

Uses HSE (external oscillator) instead of HSI (internal RC oscillator) as the clock source. Will result in a hang if an external oscillator is not connected or it fails to start. The frequency specified must be the frequency of the external oscillator

pub fn hclk<F>(self, freq: F) -> Self where
    F: Into<Hertz>, 

Sets the desired frequency for the HCLK clock

pub fn pclk1<F>(self, freq: F) -> Self where
    F: Into<Hertz>, 

Sets the desired frequency for the PCKL1 clock

pub fn pclk2<F>(self, freq: F) -> Self where
    F: Into<Hertz>, 

Sets the desired frequency for the PCLK2 clock

pub fn sysclk<F>(self, freq: F) -> Self where
    F: Into<Hertz>, 

Sets the desired frequency for the SYSCLK clock

pub fn adcclk<F>(self, freq: F) -> Self where
    F: Into<Hertz>, 

Sets the desired frequency for the ADCCLK clock

pub fn freeze(self, acr: &mut ACR) -> Clocks

Applies the clock configuration and returns a Clocks struct that signifies that the clocks are frozen, and contains the frequencies used. After this function is called, the clocks can not change

Usage:

let dp = pac::Peripherals::take().unwrap();
let mut flash = dp.FLASH.constrain();
let mut rcc = dp.RCC.constrain();
let clocks = rcc.cfgr.freeze(&mut flash.acr);