Struct stm32f1xx_hal::pac::sdio::RegisterBlock
source · pub struct RegisterBlock {Show 16 fields
pub power: Reg<POWER_SPEC>,
pub clkcr: Reg<CLKCR_SPEC>,
pub arg: Reg<ARG_SPEC>,
pub cmd: Reg<CMD_SPEC>,
pub respcmd: Reg<RESPCMD_SPEC>,
pub respi1: Reg<RESPI1_SPEC>,
pub resp: [Reg<RESP_SPEC>; 3],
pub dtimer: Reg<DTIMER_SPEC>,
pub dlen: Reg<DLEN_SPEC>,
pub dctrl: Reg<DCTRL_SPEC>,
pub dcount: Reg<DCOUNT_SPEC>,
pub sta: Reg<STA_SPEC>,
pub icr: Reg<ICR_SPEC>,
pub mask: Reg<MASK_SPEC>,
pub fifocnt: Reg<FIFOCNT_SPEC>,
pub fifo: Reg<FIFO_SPEC>,
/* private fields */
}Expand description
Register block
Fields§
§power: Reg<POWER_SPEC>0x00 - Bits 1:0 = PWRCTRL: Power supply control bits
clkcr: Reg<CLKCR_SPEC>0x04 - SDI clock control register (SDIO_CLKCR)
arg: Reg<ARG_SPEC>0x08 - Bits 31:0 = : Command argument
cmd: Reg<CMD_SPEC>0x0c - SDIO command register (SDIO_CMD)
respcmd: Reg<RESPCMD_SPEC>0x10 - SDIO command register
respi1: Reg<RESPI1_SPEC>0x14 - Bits 31:0 = CARDSTATUS1
resp: [Reg<RESP_SPEC>; 3]0x18..0x24 - Bits 31:0 = CARDSTATUS2
dtimer: Reg<DTIMER_SPEC>0x24 - Bits 31:0 = DATATIME: Data timeout period
dlen: Reg<DLEN_SPEC>0x28 - Bits 24:0 = DATALENGTH: Data length value
dctrl: Reg<DCTRL_SPEC>0x2c - SDIO data control register (SDIO_DCTRL)
dcount: Reg<DCOUNT_SPEC>0x30 - Bits 24:0 = DATACOUNT: Data count value
sta: Reg<STA_SPEC>0x34 - SDIO status register (SDIO_STA)
icr: Reg<ICR_SPEC>0x38 - SDIO interrupt clear register (SDIO_ICR)
mask: Reg<MASK_SPEC>0x3c - SDIO mask register (SDIO_MASK)
fifocnt: Reg<FIFOCNT_SPEC>0x48 - Bits 23:0 = FIFOCOUNT: Remaining number of words to be written to or read from the FIFO
fifo: Reg<FIFO_SPEC>0x80 - bits 31:0 = FIFOData: Receive and transmit FIFO data