pub struct W(_);
Expand description
Register CRL
writer
Implementations§
source§impl W
impl W
sourcepub fn mode0(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, MODE0_A, Safe, 2, 0>
pub fn mode0(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, MODE0_A, Safe, 2, 0>
Bits 0:1 - Port n.0 mode bits
sourcepub fn cnf0(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, CNF0_A, Safe, 2, 2>
pub fn cnf0(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, CNF0_A, Safe, 2, 2>
Bits 2:3 - Port n.0 configuration bits
sourcepub fn mode1(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, MODE0_A, Safe, 2, 4>
pub fn mode1(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, MODE0_A, Safe, 2, 4>
Bits 4:5 - Port n.1 mode bits
sourcepub fn cnf1(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, CNF0_A, Safe, 2, 6>
pub fn cnf1(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, CNF0_A, Safe, 2, 6>
Bits 6:7 - Port n.1 configuration bits
sourcepub fn mode2(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, MODE0_A, Safe, 2, 8>
pub fn mode2(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, MODE0_A, Safe, 2, 8>
Bits 8:9 - Port n.2 mode bits
sourcepub fn cnf2(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, CNF0_A, Safe, 2, 10>
pub fn cnf2(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, CNF0_A, Safe, 2, 10>
Bits 10:11 - Port n.2 configuration bits
sourcepub fn mode3(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, MODE0_A, Safe, 2, 12>
pub fn mode3(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, MODE0_A, Safe, 2, 12>
Bits 12:13 - Port n.3 mode bits
sourcepub fn cnf3(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, CNF0_A, Safe, 2, 14>
pub fn cnf3(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, CNF0_A, Safe, 2, 14>
Bits 14:15 - Port n.3 configuration bits
sourcepub fn mode4(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, MODE0_A, Safe, 2, 16>
pub fn mode4(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, MODE0_A, Safe, 2, 16>
Bits 16:17 - Port n.4 mode bits
sourcepub fn cnf4(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, CNF0_A, Safe, 2, 18>
pub fn cnf4(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, CNF0_A, Safe, 2, 18>
Bits 18:19 - Port n.4 configuration bits
sourcepub fn mode5(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, MODE0_A, Safe, 2, 20>
pub fn mode5(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, MODE0_A, Safe, 2, 20>
Bits 20:21 - Port n.5 mode bits
sourcepub fn cnf5(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, CNF0_A, Safe, 2, 22>
pub fn cnf5(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, CNF0_A, Safe, 2, 22>
Bits 22:23 - Port n.5 configuration bits
sourcepub fn mode6(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, MODE0_A, Safe, 2, 24>
pub fn mode6(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, MODE0_A, Safe, 2, 24>
Bits 24:25 - Port n.6 mode bits
sourcepub fn cnf6(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, CNF0_A, Safe, 2, 26>
pub fn cnf6(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, CNF0_A, Safe, 2, 26>
Bits 26:27 - Port n.6 configuration bits
sourcepub fn mode7(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, MODE0_A, Safe, 2, 28>
pub fn mode7(
&mut self
) -> FieldWriterRaw<'_, u32, CRL_SPEC, u8, MODE0_A, Safe, 2, 28>
Bits 28:29 - Port n.7 mode bits
Methods from Deref<Target = W<CRL_SPEC>>§
sourcepub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.