pub struct W(_);
Expand description
Register CLKCR
writer
Implementations§
source§impl W
impl W
sourcepub fn clkdiv(
&mut self
) -> FieldWriterRaw<'_, u32, CLKCR_SPEC, u8, u8, Unsafe, 8, 0>
pub fn clkdiv(
&mut self
) -> FieldWriterRaw<'_, u32, CLKCR_SPEC, u8, u8, Unsafe, 8, 0>
Bits 0:7 - Clock divide factor
sourcepub fn clken(&mut self) -> BitWriterRaw<'_, u32, CLKCR_SPEC, bool, BitM, 8>
pub fn clken(&mut self) -> BitWriterRaw<'_, u32, CLKCR_SPEC, bool, BitM, 8>
Bit 8 - Clock enable bit
sourcepub fn pwrsav(&mut self) -> BitWriterRaw<'_, u32, CLKCR_SPEC, bool, BitM, 9>
pub fn pwrsav(&mut self) -> BitWriterRaw<'_, u32, CLKCR_SPEC, bool, BitM, 9>
Bit 9 - Power saving configuration bit
sourcepub fn bypass(&mut self) -> BitWriterRaw<'_, u32, CLKCR_SPEC, bool, BitM, 10>
pub fn bypass(&mut self) -> BitWriterRaw<'_, u32, CLKCR_SPEC, bool, BitM, 10>
Bit 10 - Clock divider bypass enable bit
sourcepub fn widbus(
&mut self
) -> FieldWriterRaw<'_, u32, CLKCR_SPEC, u8, u8, Unsafe, 2, 11>
pub fn widbus(
&mut self
) -> FieldWriterRaw<'_, u32, CLKCR_SPEC, u8, u8, Unsafe, 2, 11>
Bits 11:12 - Wide bus mode enable bit
sourcepub fn negedge(&mut self) -> BitWriterRaw<'_, u32, CLKCR_SPEC, bool, BitM, 13>
pub fn negedge(&mut self) -> BitWriterRaw<'_, u32, CLKCR_SPEC, bool, BitM, 13>
Bit 13 - SDIO_CK dephasing selection bit
sourcepub fn hwfc_en(&mut self) -> BitWriterRaw<'_, u32, CLKCR_SPEC, bool, BitM, 14>
pub fn hwfc_en(&mut self) -> BitWriterRaw<'_, u32, CLKCR_SPEC, bool, BitM, 14>
Bit 14 - HW Flow Control enable
Methods from Deref<Target = W<CLKCR_SPEC>>§
sourcepub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.