Struct stm32f1xx_hal::pac::adc3::RegisterBlock
source · pub struct RegisterBlock {Show 14 fields
pub sr: Reg<SR_SPEC>,
pub cr1: Reg<CR1_SPEC>,
pub cr2: Reg<CR2_SPEC>,
pub smpr1: Reg<SMPR1_SPEC>,
pub smpr2: Reg<SMPR2_SPEC>,
pub jofr: [Reg<JOFR_SPEC>; 4],
pub htr: Reg<HTR_SPEC>,
pub ltr: Reg<LTR_SPEC>,
pub sqr1: Reg<SQR1_SPEC>,
pub sqr2: Reg<SQR2_SPEC>,
pub sqr3: Reg<SQR3_SPEC>,
pub jsqr: Reg<JSQR_SPEC>,
pub jdr: [Reg<JDR_SPEC>; 4],
pub dr: Reg<DR_SPEC>,
}
Expand description
Register block
Fields§
§sr: Reg<SR_SPEC>
0x00 - status register
cr1: Reg<CR1_SPEC>
0x04 - control register 1
cr2: Reg<CR2_SPEC>
0x08 - control register 2
smpr1: Reg<SMPR1_SPEC>
0x0c - sample time register 1
smpr2: Reg<SMPR2_SPEC>
0x10 - sample time register 2
jofr: [Reg<JOFR_SPEC>; 4]
0x14..0x24 - injected channel data offset register x
htr: Reg<HTR_SPEC>
0x24 - watchdog higher threshold register
ltr: Reg<LTR_SPEC>
0x28 - watchdog lower threshold register
sqr1: Reg<SQR1_SPEC>
0x2c - regular sequence register 1
sqr2: Reg<SQR2_SPEC>
0x30 - regular sequence register 2
sqr3: Reg<SQR3_SPEC>
0x34 - regular sequence register 3
jsqr: Reg<JSQR_SPEC>
0x38 - injected sequence register
jdr: [Reg<JDR_SPEC>; 4]
0x3c..0x4c - injected data register x
dr: Reg<DR_SPEC>
0x4c - regular data register