Struct stm32f0x2::Peripherals [] [src]

pub struct Peripherals<'a> {
    pub CPUID: &'a CPUID,
    pub DCB: &'a DCB,
    pub DWT: &'a DWT,
    pub FPB: &'a FPB,
    pub FPU: &'a FPU,
    pub ITM: &'a ITM,
    pub MPU: &'a MPU,
    pub NVIC: &'a NVIC,
    pub SCB: &'a SCB,
    pub SYST: &'a SYST,
    pub TPIU: &'a TPIU,
    pub CRC: &'a CRC,
    pub GPIOF: &'a GPIOF,
    pub GPIOD: &'a GPIOD,
    pub GPIOC: &'a GPIOC,
    pub GPIOB: &'a GPIOB,
    pub GPIOE: &'a GPIOE,
    pub GPIOA: &'a GPIOA,
    pub SPI1: &'a SPI1,
    pub SPI2: &'a SPI2,
    pub DAC: &'a DAC,
    pub PWR: &'a PWR,
    pub I2C1: &'a I2C1,
    pub I2C2: &'a I2C2,
    pub IWDG: &'a IWDG,
    pub WWDG: &'a WWDG,
    pub TIM1: &'a TIM1,
    pub TIM2: &'a TIM2,
    pub TIM3: &'a TIM3,
    pub TIM14: &'a TIM14,
    pub TIM6: &'a TIM6,
    pub TIM7: &'a TIM7,
    pub EXTI: &'a EXTI,
    pub DMA1: &'a DMA1,
    pub RCC: &'a RCC,
    pub SYSCFG_COMP: &'a SYSCFG_COMP,
    pub ADC: &'a ADC,
    pub USART1: &'a USART1,
    pub USART2: &'a USART2,
    pub USART3: &'a USART3,
    pub USART4: &'a USART4,
    pub RTC: &'a RTC,
    pub TIM15: &'a TIM15,
    pub TIM16: &'a TIM16,
    pub TIM17: &'a TIM17,
    pub TSC: &'a TSC,
    pub CEC: &'a CEC,
    pub FLASH: &'a FLASH,
    pub DBGMCU: &'a DBGMCU,
    pub USB: &'a USB,
    pub CRS: &'a CRS,
    pub CAN: &'a CAN,
}

All the peripherals

Fields

CPUID

DCB

DWT

FPB

FPU

ITM

MPU

NVIC

SCB

SYST

TPIU

CRC

GPIOF

GPIOD

GPIOC

GPIOB

GPIOE

GPIOA

SPI1

SPI2

DAC

PWR

I2C1

I2C2

IWDG

WWDG

TIM1

TIM2

TIM3

TIM14

TIM6

TIM7

EXTI

DMA1

RCC

SYSCFG_COMP

ADC

USART1

USART2

USART3

USART4

RTC

TIM15

TIM16

TIM17

TSC

CEC

FLASH

DBGMCU

USB

CRS

CAN

Methods

impl<'a> Peripherals<'a>
[src]

[src]

Grants access to all the peripherals