pub enum PLLSRCR {
HSI_DIV_2,
HSI_DIV_PREDIV,
HSE_DIV_PREDIV,
HSI48_DIV_PREDIV,
}
Expand description
Possible values of the field PLLSRC
Variants§
HSI_DIV_2
HSI divided by 2 selected as PLL input clock
HSI_DIV_PREDIV
HSI divided by PREDIV selected as PLL input clock
HSE_DIV_PREDIV
HSE divided by PREDIV selected as PLL input clock
HSI48_DIV_PREDIV
HSI48 divided by PREDIV selected as PLL input clock
Implementations§
source§impl PLLSRCR
impl PLLSRCR
sourcepub fn is_hsi_div_2(&self) -> bool
pub fn is_hsi_div_2(&self) -> bool
Checks if the value of the field is HSI_DIV_2
sourcepub fn is_hsi_div_prediv(&self) -> bool
pub fn is_hsi_div_prediv(&self) -> bool
Checks if the value of the field is HSI_DIV_PREDIV
sourcepub fn is_hse_div_prediv(&self) -> bool
pub fn is_hse_div_prediv(&self) -> bool
Checks if the value of the field is HSE_DIV_PREDIV
sourcepub fn is_hsi48_div_prediv(&self) -> bool
pub fn is_hsi48_div_prediv(&self) -> bool
Checks if the value of the field is HSI48_DIV_PREDIV