Expand description

Provides support for timers. Includes initialization, interrupts, and PWM features.

Low-power timers (LPTIM) are not yet supported.

Structs

Represents a Basic timer, used primarily to trigger the onboard DAC. Eg Tim6 or Tim7.

Represents a General Purpose or Advanced Control timer.

Initial configuration data for Timer peripherals.

Used for when attempting to set a timer period that is out of range.

Enums

Output alignment. Sets TIMx_CR1 register, CMS field.

Capture/Compare selection. This field defines the direction of the channel (input/output) as well as the used input. It affects the TIMx_CCMR1 register, CCxS fields.

Capture/Compaer DMA selection. Sets TIMx_CR2 register, CCDS field.

Timer count direction

These bits allow selected information to be sent in master mode to slave timers for synchronization (TRGO). Sets CR2 register, MMS field.

See F303 ref man, section 21.4.7. H745 RM, section 41.4.8. Sets TIMx_CCMR1 register, OC1M field. These bits define the behavior of the output reference signal OC1REF from which OC1 and OC1N are derived. OC1REF is active high whereas OC1 and OC1N active level depends on CC1P and CC1NP bits.

Capture/Compare output polarity. Defaults to ActiveHigh in hardware. Sets TIMx_CCER register, CCxP and CCXNP fields.

Timer channel

Timer interrupt

Update Request source. This bit is set and cleared by software to select the UEV event sources. Sets TIMx_CR1 register, URS field.