STM32-HAL
This library provides high-level access to STM32 peripherals. It's based on the STM32 Peripheral Access Crates generated by svd2rust. It provides a consistent API across multiple STM32 families, with minimal code repetition. This makes it easy to switch MCUs within, or across families, for a given project.
Family support: F3, F4, L4, L5, G0, G4, and H7. U5 is planned once its SVD files and PAC become available.
Motivation: Use STM32s in real-world hardware projects. Be able to switch MCUs with minimal code change.
Design priority: Get hardware working with a robust feature set, aimed at practical uses.
Getting started
Review the syntax overview example
for example uses of many of this library's features. Copy and paste its whole folder (It's set up
using Knurling's app template), or copy parts of Cargo.toml
and main.rs
as required.
Example highlights:
use entry;
use ;
!
The library is influenced by the stm32fyxx
HALs, and a number of the modules here are modified
versions of those. There are some areas where design philosophy is different. For example: GPIO
type-checking, level-of-abstraction from registers/PAC, role of EH traits in the API,
feature parity among STM32 families, and clock config.
Most peripheral modules are independent: The only dependency they have within this library
is the ClockCfg
trait, which we may move to a standalone crate later. This makes
it easy to interchange them with other projects.
PRs encouraged. Documenting each step using reference manuals is encouraged, but not required.
Errata
- DMA and CAN unimplemented
- USART synchronous mode, and auto-baud-rate detection unimplemented
- USART unimplemented for F4
- H7 clocks are missing advanced features
- PWM input unimplemented
- SPI unimplemented for H7
- CRC unimplemented for L5, F4, G0, and G4
- Low power timers (LPTIM) unimplemented
- Timer 15 can't set PSC on L5 due to a PAC error that's now fixed upstream on GH
- ADC is unimplemented on F4
- ADC 3 and 4 unimplemented on G4. ADC3 is unimplemented on H7
- Some timer implementations are missing
- Low power modes beyond sleep and cstop aren't implemented for H7
- Waiting on U5 PAC before implementing
- SPI3 unimplemented on L4x3 and L5. (PAC inconsistency of rcc
sp3en
instead ofspi3en
.)