pub struct SdramConfiguration {
    pub column_bits: u8,
    pub row_bits: u8,
    pub memory_data_width: u8,
    pub internal_banks: u8,
    pub cas_latency: u8,
    pub write_protection: bool,
    pub read_burst: bool,
    pub read_pipe_delay_cycles: u8,
}
Expand description

FMC SDRAM Configuration Structure definition

Fields§

§column_bits: u8

Number of bits of column address

§row_bits: u8

Number of bits of column address

§memory_data_width: u8

Memory device width

§internal_banks: u8

Number of the device’s internal banks

§cas_latency: u8

SDRAM CAS latency in number of memory clock cycles

§write_protection: bool

Enables the SDRAM device to be accessed in write mode

§read_burst: bool

This bit enable the SDRAM controller to anticipate the next read

§read_pipe_delay_cycles: u8

Delay in system clock cycles on read data path

Trait Implementations§

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Auto Trait Implementations§

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