Struct serpente::sercom::v2::uart::Uart[][src]

pub struct Uart<C, D> where
    C: ValidConfig,
    D: Capability
{ /* fields omitted */ }
Expand description

Abstraction over a UART peripheral, allowing to perform UART transactions. The second type parameter, D, denotes what the struct’s Capability is.

  • Rx or RxDuplex: Can perform receive transactions
  • Tx or TxDuplex: Can perform transmit transactions
  • Duplex: Can perform receive and transmit transactions. Additionally, you can call split to return a (Uart<C, RxDuplex>, Uart<C, TxDuplex>) tuple.

Implementations

Read the interrupt flags

Clear interrupt status flags

Setting the ERROR, RXBRK, CTSIC, RXS, or TXC flag will clear the interrupts. This function has no effect on the DRE or RXC flags.

Note that only the flags pertinent to Self’s Capability will be cleared. The other flags will be SILENTLY IGNORED.

  • Available flags for Receive capability: RXC, RXS, RXBRK and ERROR
  • Available flags for Transmit capability: DRE and TXC. Note: The CTSIC flag can only be cleared if a CTS Pad was specified in the Config via the clear_ctsic method.
  • Since Duplex Uarts are Receive + Transmit they have all flags available.

Warning: The implementation of of Write::flush waits on and clears the TXC flag. Manually clearing this flag could cause it to hang indefinitely.

Enable interrupts for the specified flags.

Note that only the flags pertinent to Self’s Capability will be cleared. The other flags will be SILENTLY IGNORED.

  • Available flags for Receive capability: RXC, RXS, RXBRK and ERROR
  • Available flags for Transmit capability: DRE and TXC. Note: The CTSIC interrupt can only be enabled if a CTS Pad was specified in the Config via the enable_ctsic method.
  • Since Duplex Uarts are Receive + Transmit they have all flags available.

Disable interrupts for the specified flags.

Note that only the flags pertinent to Self’s Capability will be cleared. The other flags will be SILENTLY IGNORED

  • Available flags for Receive capability: RXC, RXS, RXBRK and ERROR
  • Available flags for Transmit capability: DRE and TXC. Note: The CTSIC interrupt can only be disabled if a CTS Pad was specified in the Config via the disable_ctsic method.
  • Since Duplex Uarts are Receive + Transmit they have all flags available.

Read the status flags

Clear the status flags

Note that only the status flags pertinent to Self’s Capability will be cleared. The other stattus flags will be SILENTLY IGNORED.

Clear the CTSIC interrupt flag

Enable the CTSIC interrupt

Disable the CTSIC interrupt

Disable the UART peripheral and return the underlying Config

Reconfigure the UART.

Calling this method will temporarily disable the SERCOM peripheral, as some registers are enable-protected. This may interrupt any ongoing transactions.

use atsamd_hal::sercom::v2::uart::{BaudMode, Oversampling, Uart};
uart.reconfigure(|c| c.set_run_in_standby(false));

Split the Uart into RxDuplex and TxDuplex halves

Disable the UART peripheral and return the underlying Config

Update the UART Configuration.

Calling this method will temporarily disable the SERCOM peripheral, as some registers are enable-protected. This may interrupt any ongoing transactions.

use atsamd_hal::sercom::v2::uart::{BaudMode, Oversampling, Uart};
uart.reconfigure(|c| c.set_run_in_standby(false));

Join RxDuplex and TxDuplex halves back into a full Uart<C, Duplex>

Read from the DATA register

Safety

Reading from the data register directly is unsafe, because it will clear the RXC flag, which could break assumptions made elsewhere in this module.

Flush the RX buffer and clear RX errors.

Note: The datasheet states that disabling the receiver (RXEN) clears the RX buffer, and clears the BUFOVF, PERR and FERR bits. However, in practice, it seems like BUFOVF errors still pop up after a disable/enable cycle of the receiver, then immediately begin reading bytes from the DATA register. Instead, this method uses a workaround, which reads a few bytes to clear the RX buffer (3 bytes seems to be the trick), then manually clear the error bits.

Write to the DATA register

Safety

Writing to the data register directly is unsafe, because it will clear the DRE flag, which could break assumptions made elsewhere in this module.

Trait Implementations

Performs the conversion.

Wait for an RXC flag, then read the word

Read error

Wait for a DRE flag, then write a word

Wait for a TXC flag

Write error

Auto Trait Implementations

Blanket Implementations

Gets the TypeId of self. Read more

Immutably borrows from an owned value. Read more

Mutably borrows from an owned value. Read more

Performs the conversion.

Performs the conversion.

Should always be Self

The type returned in the event of a conversion error.

Performs the conversion.

The type returned in the event of a conversion error.

Performs the conversion.

The type of error that can occur when writing

Writes a slice, blocking until everything has been written Read more

Block until the serial interface has sent all buffered words