Struct serpente::sercom::v2::spi::Spi

pub struct Spi<C> where
    C: ValidConfig,  { /* fields omitted */ }

An enabled SPI peripheral that can perform transactions using the embedded HAL traits

When an Spi is Tx+Rx, it implements FullDuplex, with a word type that depends on CharSize. The word type is u8 for an EightBit CharSize and u16 for a NineBit CharSize.

For half-duplex transactions, Spi implements the serial Read and Write traits. They are only implemented when the Pads are not Tx+Rx, so they don’t compete with FullDuplex.

Spi uses the default implementations for the blocking::spi and blocking::serial traits.

For a non-blocking alternative that can be used to transfer slices, see the SpiFuture type.

Implementations

impl<C> Spi<C> where
    C: ValidConfig, 

pub unsafe fn sercom(&self) -> &<C as AnyConfig>::Sercom

Obtain a reference to the PAC SERCOM struct

Directly accessing the SERCOM could break the invariants of the type-level tracking in this module, so it is unsafe.

pub fn reconfigure<F>(&mut self, update: F) where
    F: FnOnce(Config<<C as AnyConfig>::Pads, <C as AnyConfig>::OpMode, <C as AnyConfig>::CharSize>) -> Config<<C as AnyConfig>::Pads, <C as AnyConfig>::OpMode, <C as AnyConfig>::CharSize>, 

Update the SPI configuration.

Calling this method will temporarily disable the SERCOM peripheral, as some registers are enable-protected. This may interrupt any ongoing transactions.

pub fn enable_interrupts(&mut self, flags: Flags)

Enable interrupts for the specified flags

pub fn disable_interrupts(&mut self, flags: Flags)

Disable interrupts for the specified flags

pub fn read_flags(&self) -> Flags

Read the interrupt status flags

pub fn clear_flags(&mut self, flags: Flags)

Clear interrupt status flags

Setting the ERROR, SSL or TXC flag will clear the interrupt. Clearing any flag will have no effect. This function has no effect on the DRE or RXC flags.

Warning: The implementation of of Write::flush waits on and clears the TXC flag. Manually clearing this flag could cause it to hang indefinitely.

pub fn read_errors(&self) -> Errors

Read the error status flags

pub fn clear_errors(&mut self, errors: Errors)

Clear error status flags

Setting a flag will clear the error. Clearing any flag will have no effect.

pub fn read_flags_errors(&self) -> Result<Flags, Error>

pub unsafe fn read_data(&mut self) -> u16

Read from the DATA register

Reading from the data register directly is unsafe, because it will clear the RXC flag, which could break assumptions made elsewhere in this module.

pub unsafe fn write_data(&mut self, data: u16)

Write to the DATA register

Writing to the data register directly is unsafe, because it will clear the DRE flag, which could break assumptions made elsewhere in this module.

pub fn disable(self) -> C

Disable the SPI peripheral and return the Config struct

impl<C> Spi<C> where
    C: ValidConfig,
    <C as AnyConfig>::Pads: Rx,
    <C as AnyConfig>::Pads: NotTx,
    <C as AnyConfig>::OpMode: MasterMode,
    <C as AnyConfig>::Word: PrimInt, 

pub unsafe fn reset_serial_read_state(&mut self)

Reset the internal state tracking serial Read transactions

See the implementation of Read for more details.

Trait Implementations

impl<C> AnySpi for Spi<C> where
    C: ValidConfig, 

type Sercom = <C as AnyConfig>::Sercom

type Pads = <C as AnyConfig>::Pads

type OpMode = <C as AnyConfig>::OpMode

type CharSize = <C as AnyConfig>::CharSize

type Word = <C as AnyConfig>::Word

type Config = C

impl<C> AsMut<Spi<C>> for Spi<C> where
    C: ValidConfig, 

pub fn as_mut(&mut self) -> &mut Spi<C>

Performs the conversion.

impl<C> AsRef<Spi<C>> for Spi<C> where
    C: ValidConfig, 

pub fn as_ref(&self) -> &Spi<C>

Performs the conversion.

impl<C> FullDuplex<<C as AnyConfig>::Word> for Spi<C> where
    C: ValidConfig,
    <C as AnyConfig>::Pads: Tx,
    <C as AnyConfig>::Pads: Rx,
    <C as AnyConfig>::OpMode: MasterMode,
    <C as AnyConfig>::Word: PrimInt,
    <C as AnyConfig>::Word: AsPrimitive<u16>,
    u16: AsPrimitive<<C as AnyConfig>::Word>, 

Perform a non-blocking, FullDuplex trasaction

FullDuplex is only implemented when Pads is both Tx and Rx and the OpMode is a MasterMode. The word type is dependent on CharSize.

type Error = Error

An enumeration of SPI errors

pub fn read(&mut self) -> Result<<C as AnyConfig>::Word, Error<Error>>

Reads the word stored in the shift register

pub fn send(&mut self, word: <C as AnyConfig>::Word) -> Result<(), Error<Error>>

Sends a word to the slave

impl<P, C> Read<<C as CharSize>::Word> for Spi<Config<P, Slave, C>> where
    C: CharSize,
    P: Rx + NotTx,
    Config<P, Slave, C>: ValidConfig,
    <C as CharSize>::Word: PrimInt,
    u16: AsPrimitive<<C as CharSize>::Word>, 

Implement Read for Slave OpMode

Read is only implemented when the Pads are Rx but NotTx. If the Pads are both Rx and Tx, then use FullDuplex.

In Slave OpMode, Read does not have to initiate transactions, so it does not have to store any internal state. It only has to wait on RXC.

pub fn read(&mut self) -> Result<<C as CharSize>::Word, Error<Error>>

Wait for an RXC flag, then read the word

type Error = Error

Read error

impl<P, M, C> Read<<C as CharSize>::Word> for Spi<Config<P, M, C>> where
    C: CharSize,
    P: Rx + NotTx,
    M: MasterMode,
    Config<P, M, C>: ValidConfig,
    <C as CharSize>::Word: PrimInt,
    u16: AsPrimitive<<C as CharSize>::Word>, 

Implement Read for MasterModes

Read is only implemented when the Pads are Rx but NotTx. If the Pads are both Rx and Tx, then use FullDuplex.

In a MasterMode, Read has to initiate transactions and receive the responses. To do so, it uses a static allocation to keep track of the transaction state. If a transaction is in progress, it will wait on RXC. If not, it will wait on DRE and then send 0.

It should not be possible for the tracked state to become invalid using only safe code. However, if using unsafe, the state could fall out of sync. In that case, the Spi::reset_serial_read_state method can be used to reset the state. After reset, a transaction is assumed to NOT be in progress.

pub fn read(&mut self) -> Result<<C as CharSize>::Word, Error<Error>>

If a transaction is already in progress, wait for an RXC flag, then read the word. If not, wait for a DRE flag, then write 0.

Track the transaction state with an internal static. It should not be possible for the state to get out of sync with the hardware using only safe code. If using unsafe and the state does get out of sync, use Spi::reset_serial_read_state to reset it.

type Error = Error

Read error

impl<C> Write<<C as AnyConfig>::Word> for Spi<C> where
    C: ValidConfig,
    <C as AnyConfig>::Pads: Tx,
    <C as AnyConfig>::Pads: NotRx,
    <C as AnyConfig>::Word: PrimInt,
    <C as AnyConfig>::Word: AsPrimitive<u16>, 

Implement Write for Spi

Write is only implemented when the Pads are Tx but NotRx. If the Pads are both Tx and Rx, then use FullDuplex.

Because Write is only implemented when the Pads are NotRx, this implementation never reads the DATA register and ignores all buffer overflow errors.

pub fn write(
    &mut self,
    word: <C as AnyConfig>::Word
) -> Result<(), Error<Error>>

Wait for a DRE flag, then write a word

pub fn flush(&mut self) -> Result<(), Error<Error>>

Wait for a TXC flag

type Error = Error

Write error

impl<C> Default<<C as AnyConfig>::Word> for Spi<C> where
    C: ValidConfig,
    Spi<C>: FullDuplex<<C as AnyConfig>::Word>, 

impl<C> Default<<C as AnyConfig>::Word> for Spi<C> where
    C: ValidConfig,
    Spi<C>: Write<<C as AnyConfig>::Word>, 

impl<C> Default<<C as AnyConfig>::Word> for Spi<C> where
    C: ValidConfig,
    Spi<C>: FullDuplex<<C as AnyConfig>::Word>,