[−][src]Struct sam3x8e::uotghs::RegisterBlock
Register block
Fields
devctrl: DEVCTRL
0x00 - Device General Control Register
devisr: DEVISR
0x04 - Device Global Interrupt Status Register
devicr: DEVICR
0x08 - Device Global Interrupt Clear Register
devifr: DEVIFR
0x0c - Device Global Interrupt Set Register
devimr: DEVIMR
0x10 - Device Global Interrupt Mask Register
devidr: DEVIDR
0x14 - Device Global Interrupt Disable Register
devier: DEVIER
0x18 - Device Global Interrupt Enable Register
devept: DEVEPT
0x1c - Device Endpoint Register
devfnum: DEVFNUM
0x20 - Device Frame Number Register
deveptcfg: [DEVEPTCFG; 10]
0x100 - Device Endpoint Configuration Register (n = 0)
deveptisr: DEVEPTISR_UNION
Device Endpoint Status Register (n = 0)
devepticr: DEVEPTICR_UNION
Device Endpoint Clear Register (n = 0)
deveptifr: DEVEPTIFR_UNION
Device Endpoint Set Register (n = 0)
deveptimr: DEVEPTIMR_UNION
Device Endpoint Mask Register (n = 0)
deveptier: DEVEPTIER_UNION
Device Endpoint Enable Register (n = 0)
deveptidr: DEVEPTIDR_UNION
Device Endpoint Disable Register (n = 0)
devdmanxtdsc1: DEVDMANXTDSC1
0x310 - Device DMA Channel Next Descriptor Address Register (n = 1)
devdmaaddress1: DEVDMAADDRESS1
0x314 - Device DMA Channel Address Register (n = 1)
devdmacontrol1: DEVDMACONTROL1
0x318 - Device DMA Channel Control Register (n = 1)
devdmastatus1: DEVDMASTATUS1
0x31c - Device DMA Channel Status Register (n = 1)
devdmanxtdsc2: DEVDMANXTDSC2
0x320 - Device DMA Channel Next Descriptor Address Register (n = 2)
devdmaaddress2: DEVDMAADDRESS2
0x324 - Device DMA Channel Address Register (n = 2)
devdmacontrol2: DEVDMACONTROL2
0x328 - Device DMA Channel Control Register (n = 2)
devdmastatus2: DEVDMASTATUS2
0x32c - Device DMA Channel Status Register (n = 2)
devdmanxtdsc3: DEVDMANXTDSC3
0x330 - Device DMA Channel Next Descriptor Address Register (n = 3)
devdmaaddress3: DEVDMAADDRESS3
0x334 - Device DMA Channel Address Register (n = 3)
devdmacontrol3: DEVDMACONTROL3
0x338 - Device DMA Channel Control Register (n = 3)
devdmastatus3: DEVDMASTATUS3
0x33c - Device DMA Channel Status Register (n = 3)
devdmanxtdsc4: DEVDMANXTDSC4
0x340 - Device DMA Channel Next Descriptor Address Register (n = 4)
devdmaaddress4: DEVDMAADDRESS4
0x344 - Device DMA Channel Address Register (n = 4)
devdmacontrol4: DEVDMACONTROL4
0x348 - Device DMA Channel Control Register (n = 4)
devdmastatus4: DEVDMASTATUS4
0x34c - Device DMA Channel Status Register (n = 4)
devdmanxtdsc5: DEVDMANXTDSC5
0x350 - Device DMA Channel Next Descriptor Address Register (n = 5)
devdmaaddress5: DEVDMAADDRESS5
0x354 - Device DMA Channel Address Register (n = 5)
devdmacontrol5: DEVDMACONTROL5
0x358 - Device DMA Channel Control Register (n = 5)
devdmastatus5: DEVDMASTATUS5
0x35c - Device DMA Channel Status Register (n = 5)
devdmanxtdsc6: DEVDMANXTDSC6
0x360 - Device DMA Channel Next Descriptor Address Register (n = 6)
devdmaaddress6: DEVDMAADDRESS6
0x364 - Device DMA Channel Address Register (n = 6)
devdmacontrol6: DEVDMACONTROL6
0x368 - Device DMA Channel Control Register (n = 6)
devdmastatus6: DEVDMASTATUS6
0x36c - Device DMA Channel Status Register (n = 6)
devdmanxtdsc7: DEVDMANXTDSC7
0x370 - Device DMA Channel Next Descriptor Address Register (n = 7)
devdmaaddress7: DEVDMAADDRESS7
0x374 - Device DMA Channel Address Register (n = 7)
devdmacontrol7: DEVDMACONTROL7
0x378 - Device DMA Channel Control Register (n = 7)
devdmastatus7: DEVDMASTATUS7
0x37c - Device DMA Channel Status Register (n = 7)
hstctrl: HSTCTRL
0x400 - Host General Control Register
hstisr: HSTISR
0x404 - Host Global Interrupt Status Register
hsticr: HSTICR
0x408 - Host Global Interrupt Clear Register
hstifr: HSTIFR
0x40c - Host Global Interrupt Set Register
hstimr: HSTIMR
0x410 - Host Global Interrupt Mask Register
hstidr: HSTIDR
0x414 - Host Global Interrupt Disable Register
hstier: HSTIER
0x418 - Host Global Interrupt Enable Register
hstpip: HSTPIP
0x41c - Host Pipe Register
hstfnum: HSTFNUM
0x420 - Host Frame Number Register
hstaddr1: HSTADDR1
0x424 - Host Address 1 Register
hstaddr2: HSTADDR2
0x428 - Host Address 2 Register
hstaddr3: HSTADDR3
0x42c - Host Address 3 Register
hstpipcfg: HSTPIPCFG_UNION
Host Pipe Configuration Register (n = 0)
hstpipisr: HSTPIPISR_UNION
Host Pipe Status Register (n = 0)
hstpipicr: HSTPIPICR_UNION
Host Pipe Clear Register (n = 0)
hstpipifr: HSTPIPIFR_UNION
Host Pipe Set Register (n = 0)
hstpipimr: HSTPIPIMR_UNION
Host Pipe Mask Register (n = 0)
hstpipier: HSTPIPIER_UNION
Host Pipe Enable Register (n = 0)
hstpipidr: HSTPIPIDR_UNION
Host Pipe Disable Register (n = 0)
hstpipinrq: [HSTPIPINRQ; 10]
0x650 - Host Pipe IN Request Register (n = 0)
hstpiperr: [HSTPIPERR; 10]
0x680 - Host Pipe Error Register (n = 0)
hstdmanxtdsc1: HSTDMANXTDSC1
0x710 - Host DMA Channel Next Descriptor Address Register (n = 1)
hstdmaaddress1: HSTDMAADDRESS1
0x714 - Host DMA Channel Address Register (n = 1)
hstdmacontrol1: HSTDMACONTROL1
0x718 - Host DMA Channel Control Register (n = 1)
hstdmastatus1: HSTDMASTATUS1
0x71c - Host DMA Channel Status Register (n = 1)
hstdmanxtdsc2: HSTDMANXTDSC2
0x720 - Host DMA Channel Next Descriptor Address Register (n = 2)
hstdmaaddress2: HSTDMAADDRESS2
0x724 - Host DMA Channel Address Register (n = 2)
hstdmacontrol2: HSTDMACONTROL2
0x728 - Host DMA Channel Control Register (n = 2)
hstdmastatus2: HSTDMASTATUS2
0x72c - Host DMA Channel Status Register (n = 2)
hstdmanxtdsc3: HSTDMANXTDSC3
0x730 - Host DMA Channel Next Descriptor Address Register (n = 3)
hstdmaaddress3: HSTDMAADDRESS3
0x734 - Host DMA Channel Address Register (n = 3)
hstdmacontrol3: HSTDMACONTROL3
0x738 - Host DMA Channel Control Register (n = 3)
hstdmastatus3: HSTDMASTATUS3
0x73c - Host DMA Channel Status Register (n = 3)
hstdmanxtdsc4: HSTDMANXTDSC4
0x740 - Host DMA Channel Next Descriptor Address Register (n = 4)
hstdmaaddress4: HSTDMAADDRESS4
0x744 - Host DMA Channel Address Register (n = 4)
hstdmacontrol4: HSTDMACONTROL4
0x748 - Host DMA Channel Control Register (n = 4)
hstdmastatus4: HSTDMASTATUS4
0x74c - Host DMA Channel Status Register (n = 4)
hstdmanxtdsc5: HSTDMANXTDSC5
0x750 - Host DMA Channel Next Descriptor Address Register (n = 5)
hstdmaaddress5: HSTDMAADDRESS5
0x754 - Host DMA Channel Address Register (n = 5)
hstdmacontrol5: HSTDMACONTROL5
0x758 - Host DMA Channel Control Register (n = 5)
hstdmastatus5: HSTDMASTATUS5
0x75c - Host DMA Channel Status Register (n = 5)
hstdmanxtdsc6: HSTDMANXTDSC6
0x760 - Host DMA Channel Next Descriptor Address Register (n = 6)
hstdmaaddress6: HSTDMAADDRESS6
0x764 - Host DMA Channel Address Register (n = 6)
hstdmacontrol6: HSTDMACONTROL6
0x768 - Host DMA Channel Control Register (n = 6)
hstdmastatus6: HSTDMASTATUS6
0x76c - Host DMA Channel Status Register (n = 6)
hstdmanxtdsc7: HSTDMANXTDSC7
0x770 - Host DMA Channel Next Descriptor Address Register (n = 7)
hstdmaaddress7: HSTDMAADDRESS7
0x774 - Host DMA Channel Address Register (n = 7)
hstdmacontrol7: HSTDMACONTROL7
0x778 - Host DMA Channel Control Register (n = 7)
hstdmastatus7: HSTDMASTATUS7
0x77c - Host DMA Channel Status Register (n = 7)
ctrl: CTRL
0x800 - General Control Register
sr: SR
0x804 - General Status Register
scr: SCR
0x808 - General Status Clear Register
sfr: SFR
0x80c - General Status Set Register
fsm: FSM
0x82c - General Finite State Machine Register
Auto Trait Implementations
impl Send for RegisterBlock
impl !Sync for RegisterBlock
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impl<T> From for T
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impl<T, U> TryFrom for T where
U: Into<T>,
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U: Into<T>,
type Error = !
try_from
)The type returned in the event of a conversion error.
fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>
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impl<T, U> TryInto for T where
U: TryFrom<T>,
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U: TryFrom<T>,
type Error = <U as TryFrom<T>>::Error
try_from
)The type returned in the event of a conversion error.
fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>
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impl<T, U> Into for T where
U: From<T>,
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U: From<T>,
impl<T> Borrow for T where
T: ?Sized,
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T: ?Sized,
impl<T> BorrowMut for T where
T: ?Sized,
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T: ?Sized,
fn borrow_mut(&mut self) -> &mut T
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impl<T> Any for T where
T: 'static + ?Sized,
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T: 'static + ?Sized,